sbsa_gic.c 1.6 KB

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  1. /*
  2. * Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <drivers/arm/gicv3.h>
  7. #include <plat/common/platform.h>
  8. static const interrupt_prop_t qemu_interrupt_props[] = {
  9. PLATFORM_G1S_PROPS(INTR_GROUP1S),
  10. PLATFORM_G0_PROPS(INTR_GROUP0)
  11. };
  12. static uintptr_t qemu_rdistif_base_addrs[PLATFORM_CORE_COUNT];
  13. static unsigned int qemu_mpidr_to_core_pos(unsigned long mpidr)
  14. {
  15. return plat_core_pos_by_mpidr(mpidr);
  16. }
  17. static gicv3_driver_data_t sbsa_gic_driver_data = {
  18. /* we set those two values for compatibility with older QEMU */
  19. .gicd_base = GICD_BASE,
  20. .gicr_base = GICR_BASE,
  21. .interrupt_props = qemu_interrupt_props,
  22. .interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props),
  23. .rdistif_num = PLATFORM_CORE_COUNT,
  24. .rdistif_base_addrs = qemu_rdistif_base_addrs,
  25. .mpidr_to_core_pos = qemu_mpidr_to_core_pos
  26. };
  27. void sbsa_set_gic_bases(const uintptr_t gicd_base, const uintptr_t gicr_base)
  28. {
  29. sbsa_gic_driver_data.gicd_base = gicd_base;
  30. sbsa_gic_driver_data.gicr_base = gicr_base;
  31. }
  32. uintptr_t sbsa_get_gicd(void)
  33. {
  34. return sbsa_gic_driver_data.gicd_base;
  35. }
  36. uintptr_t sbsa_get_gicr(void)
  37. {
  38. return sbsa_gic_driver_data.gicr_base;
  39. }
  40. void plat_qemu_gic_init(void)
  41. {
  42. gicv3_driver_init(&sbsa_gic_driver_data);
  43. gicv3_distif_init();
  44. gicv3_rdistif_init(plat_my_core_pos());
  45. gicv3_cpuif_enable(plat_my_core_pos());
  46. }
  47. void qemu_pwr_gic_on_finish(void)
  48. {
  49. gicv3_rdistif_init(plat_my_core_pos());
  50. gicv3_cpuif_enable(plat_my_core_pos());
  51. }
  52. void qemu_pwr_gic_off(void)
  53. {
  54. gicv3_cpuif_disable(plat_my_core_pos());
  55. gicv3_rdistif_off(plat_my_core_pos());
  56. }