bl31_plat_setup.c 3.6 KB

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  1. /*
  2. * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <platform_def.h>
  8. #include <common/bl_common.h>
  9. #include <common/debug.h>
  10. #include <common/desc_image_load.h>
  11. #include <drivers/console.h>
  12. #include <drivers/generic_delay_timer.h>
  13. #include <drivers/ti/uart/uart_16550.h>
  14. #include <lib/mmio.h>
  15. #include <plat_private.h>
  16. #include <plat/common/platform.h>
  17. static entry_point_info_t bl32_ep_info;
  18. static entry_point_info_t bl33_ep_info;
  19. /*******************************************************************************
  20. * Return a pointer to the 'entry_point_info' structure of the next image for
  21. * the security state specified. BL33 corresponds to the non-secure image type
  22. * while BL32 corresponds to the secure image type. A NULL pointer is returned
  23. * if the image does not exist.
  24. ******************************************************************************/
  25. entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
  26. {
  27. entry_point_info_t *next_image_info;
  28. next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
  29. assert(next_image_info->h.type == PARAM_EP);
  30. /* None of the images on this platform can have 0x0 as the entrypoint */
  31. if (next_image_info->pc)
  32. return next_image_info;
  33. else
  34. return NULL;
  35. }
  36. #pragma weak params_early_setup
  37. void params_early_setup(u_register_t plat_param_from_bl2)
  38. {
  39. }
  40. /*******************************************************************************
  41. * Perform any BL3-1 early platform setup. Here is an opportunity to copy
  42. * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they
  43. * are lost (potentially). This needs to be done before the MMU is initialized
  44. * so that the memory layout can be used while creating page tables.
  45. * BL2 has flushed this information to memory, so we are guaranteed to pick up
  46. * good data.
  47. ******************************************************************************/
  48. void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
  49. u_register_t arg2, u_register_t arg3)
  50. {
  51. static console_t console;
  52. params_early_setup(arg1);
  53. if (rockchip_get_uart_base() != 0)
  54. console_16550_register(rockchip_get_uart_base(),
  55. rockchip_get_uart_clock(),
  56. rockchip_get_uart_baudrate(), &console);
  57. VERBOSE("bl31_setup\n");
  58. bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
  59. }
  60. /*******************************************************************************
  61. * Perform any BL3-1 platform setup code
  62. ******************************************************************************/
  63. void bl31_platform_setup(void)
  64. {
  65. generic_delay_timer_init();
  66. plat_rockchip_soc_init();
  67. /* Initialize the gic cpu and distributor interfaces */
  68. plat_rockchip_gic_driver_init();
  69. plat_rockchip_gic_init();
  70. plat_rockchip_pmu_init();
  71. }
  72. /*******************************************************************************
  73. * Perform the very early platform specific architectural setup here. At the
  74. * moment this is only initializes the mmu in a quick and dirty way.
  75. ******************************************************************************/
  76. void bl31_plat_arch_setup(void)
  77. {
  78. plat_cci_init();
  79. plat_cci_enable();
  80. #if USE_COHERENT_MEM
  81. plat_configure_mmu_el3(BL_CODE_BASE,
  82. BL_COHERENT_RAM_END - BL_CODE_BASE,
  83. BL_CODE_BASE,
  84. BL_CODE_END,
  85. BL_COHERENT_RAM_BASE,
  86. BL_COHERENT_RAM_END);
  87. #else
  88. plat_configure_mmu_el3(BL31_START,
  89. BL31_END - BL31_START,
  90. BL_CODE_BASE,
  91. BL_CODE_END,
  92. 0,
  93. 0);
  94. #endif
  95. }