platform_def.h 2.1 KB

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  1. /*
  2. * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef PLATFORM_DEF_H
  7. #define PLATFORM_DEF_H
  8. #include <lib/utils_def.h>
  9. #define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
  10. #define PLATFORM_LINKER_ARCH aarch64
  11. #define PLATFORM_STACK_SIZE 0X400
  12. #define CACHE_WRITEBACK_GRANULE 64
  13. #define PLAT_PRIMARY_CPU U(0x0)
  14. #define PLATFORM_MAX_CPU_PER_CLUSTER U(4)
  15. #define PLATFORM_CLUSTER_COUNT U(2)
  16. #define PLATFORM_CLUSTER0_CORE_COUNT U(4)
  17. #define PLATFORM_CLUSTER1_CORE_COUNT U(2)
  18. #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \
  19. PLATFORM_CLUSTER1_CORE_COUNT)
  20. #define IMX_PWR_LVL0 MPIDR_AFFLVL0
  21. #define IMX_PWR_LVL1 MPIDR_AFFLVL1
  22. #define IMX_PWR_LVL2 MPIDR_AFFLVL2
  23. #define PWR_DOMAIN_AT_MAX_LVL U(1)
  24. #define PLAT_MAX_PWR_LVL U(2)
  25. #define PLAT_MAX_OFF_STATE U(2)
  26. #define PLAT_MAX_RET_STATE U(1)
  27. #define BL31_BASE 0x80000000
  28. #define BL31_LIMIT 0x80020000
  29. #define PLAT_GICD_BASE 0x51a00000
  30. #define PLAT_GICR_BASE 0x51b00000
  31. #define PLAT_CCI_BASE 0x52090000
  32. #define CLUSTER0_CCI_SLVAE_IFACE 3
  33. #define CLUSTER1_CCI_SLVAE_IFACE 4
  34. /* UART */
  35. #if defined(IMX_USE_UART0)
  36. #define IMX_BOOT_UART_BASE 0x5a060000
  37. #elif defined(IMX_USE_UART1)
  38. #define IMX_BOOT_UART_BASE 0x5a070000
  39. #else
  40. #error "Provide proper UART number in IMX_DEBUG_UART"
  41. #endif
  42. #define IMX_BOOT_UART_BAUDRATE 115200
  43. #define IMX_BOOT_UART_CLK_IN_HZ 24000000
  44. #define PLAT_CRASH_UART_BASE IMX_BOOT_UART_BASE
  45. #define PLAT__CRASH_UART_CLK_IN_HZ 24000000
  46. #define IMX_CONSOLE_BAUDRATE 115200
  47. #define SC_IPC_BASE 0x5d1b0000
  48. #define IMX_GPT_LPCG_BASE 0x5d540000
  49. #define IMX_GPT_BASE 0x5d140000
  50. #define IMX_WUP_IRQSTR_BASE 0x51090000
  51. #define IMX_REG_BASE 0x50000000
  52. #define IMX_REG_SIZE 0x10000000
  53. #define COUNTER_FREQUENCY 8000000 /* 8MHz */
  54. /* non-secure uboot base */
  55. #define PLAT_NS_IMAGE_OFFSET 0x80020000
  56. #define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
  57. #define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
  58. #define MAX_XLAT_TABLES 8
  59. #define MAX_MMAP_REGIONS 12
  60. #define DEBUG_CONSOLE_A53 DEBUG_CONSOLE
  61. #endif /* PLATFORM_DEF_H */