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agilex_clock_manager.h
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f65bdf3a54
feat(intel): implement timer init divider via cpu frequency. (#1)
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%!s(int64=2) %!d(string=hai) anos |
agilex_memory_controller.h
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3dcb94dd84
intel: Enable bridge access in Intel platform
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%!s(int64=4) %!d(string=hai) anos |
agilex_mmc.h
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aea772dd7a
plat: intel: set DRVSEL and SMPLSEL for DWMMC
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%!s(int64=4) %!d(string=hai) anos |
agilex_pinmux.h
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328718f254
intel: Refactor common platform code [1/5]
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%!s(int64=5) %!d(string=hai) anos |
socfpga_plat_def.h
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f0f631fd44
Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration
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%!s(int64=2) %!d(string=hai) anos |