mt_spm.h 1.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
  1. /*
  2. * Copyright (c) 2023, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef MT_SPM_H
  7. #define MT_SPM_H
  8. #include <stdint.h>
  9. #include <stdio.h>
  10. #include <lib/spinlock.h>
  11. #include <lib/pm/mtk_pm.h>
  12. #include <lpm/mt_lp_rq.h>
  13. /*
  14. * ARM v8.2, the cache will turn off automatically when cpu
  15. * power down. Therefore, there is no doubt to use the spin_lock here.
  16. */
  17. extern spinlock_t spm_lock;
  18. #ifdef __GNUC__
  19. #define spm_likely(x) __builtin_expect(!!(x), 1)
  20. #define spm_unlikely(x) __builtin_expect(!!(x), 0)
  21. #else
  22. #define spm_likely(x) (x)
  23. #define spm_unlikely(x) (x)
  24. #endif
  25. #define MT_SPM_USING_SRCLKEN_RC
  26. /* spm extern operand definition */
  27. #define MT_SPM_EX_OP_CLR_26M_RECORD BIT(0)
  28. #define MT_SPM_EX_OP_SET_WDT BIT(1)
  29. #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ BIT(2)
  30. #define MT_SPM_EX_OP_SET_SUSPEND_MODE BIT(3)
  31. #define MT_SPM_EX_OP_SET_IS_ADSP BIT(4)
  32. #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM BIT(5)
  33. #define MT_SPM_EX_OP_HW_S1_DETECT BIT(6)
  34. #define MT_SPM_EX_OP_TRACE_LP BIT(7)
  35. #define MT_SPM_EX_OP_TRACE_SUSPEND BIT(8)
  36. #define MT_SPM_EX_OP_TRACE_TIMESTAMP_EN BIT(9)
  37. #define MT_SPM_EX_OP_TIME_CHECK BIT(10)
  38. #define MT_SPM_EX_OP_TIME_OBS BIT(11)
  39. #define MT_SPM_EX_OP_PERI_ON BIT(12)
  40. #define MT_SPM_EX_OP_INFRA_ON BIT(13)
  41. typedef enum {
  42. WR_NONE = 0,
  43. WR_UART_BUSY = 1,
  44. WR_ABORT = 2,
  45. WR_PCM_TIMER = 3,
  46. WR_WAKE_SRC = 4,
  47. WR_DVFSRC = 5,
  48. WR_TWAM = 6,
  49. WR_PMSR = 7,
  50. WR_SPM_ACK_CHK = 8,
  51. WR_UNKNOWN = 9,
  52. } wake_reason_t;
  53. struct mt_lp_resource_user *get_spm_res_user(void);
  54. int spm_boot_init(void);
  55. #endif /* MT_SPM_H */