mt_spm_constraint.h 2.4 KB

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  1. /*
  2. * Copyright (c) 2023, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef MT_SPM_CONSTRAINT_H
  7. #define MT_SPM_CONSTRAINT_H
  8. #include <lpm/mt_lp_rm.h>
  9. #define MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF BIT(0)
  10. #define MT_RM_CONSTRAINT_ALLOW_DRAM_S0 BIT(1)
  11. #define MT_RM_CONSTRAINT_ALLOW_DRAM_S1 BIT(2)
  12. #define MT_RM_CONSTRAINT_ALLOW_VCORE_LP BIT(3)
  13. #define MT_RM_CONSTRAINT_ALLOW_INFRA_PDN BIT(4)
  14. #define MT_RM_CONSTRAINT_ALLOW_BUS26M_OFF BIT(5)
  15. #define MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND BIT(6)
  16. #define MT_RM_CONSTRAINT_ALLOW_BBLPM BIT(7)
  17. #define MT_RM_CONSTRAINT_ALLOW_XO_UFS BIT(8)
  18. #define MT_RM_CONSTRAINT_ALLOW_GPS_STATE BIT(9)
  19. #define MT_RM_CONSTRAINT_ALLOW_LVTS_STATE BIT(10)
  20. enum mt_spm_rm_rc_type {
  21. MT_RM_CONSTRAINT_ID_BUS26M,
  22. MT_RM_CONSTRAINT_ID_SYSPLL,
  23. MT_RM_CONSTRAINT_ID_DRAM,
  24. MT_RM_CONSTRAINT_ID_CPU_BUCK_LDO,
  25. MT_RM_CONSTRAINT_ID_ALL,
  26. };
  27. #define MT_SPM_RC_INVALID (0x0)
  28. #define MT_SPM_RC_VALID_SW BIT(0)
  29. #define MT_SPM_RC_VALID_FW BIT(1)
  30. #define MT_SPM_RC_VALID_RESIDNECY BIT(2)
  31. #define MT_SPM_RC_VALID_COND_CHECK BIT(3)
  32. #define MT_SPM_RC_VALID_COND_LATCH BIT(4)
  33. #define MT_SPM_RC_VALID_UFS_H8 BIT(5)
  34. #define MT_SPM_RC_VALID_FLIGHTMODE BIT(6)
  35. #define MT_SPM_RC_VALID_XSOC_BBLPM BIT(7)
  36. #define MT_SPM_RC_VALID_TRACE_EVENT BIT(8)
  37. #define MT_SPM_RC_VALID_TRACE_TIME BIT(9)
  38. /* MT_RM_CONSTRAINT_SW_VALID | MT_RM_CONSTRAINT_FW_VALID */
  39. #define MT_SPM_RC_VALID (MT_SPM_RC_VALID_SW)
  40. #define IS_MT_RM_RC_READY(status) ((status & MT_SPM_RC_VALID) == MT_SPM_RC_VALID)
  41. struct constraint_status {
  42. uint16_t id;
  43. uint16_t is_valid;
  44. uint32_t is_cond_block;
  45. uint32_t enter_cnt;
  46. uint32_t all_pll_dump;
  47. uint64_t residency;
  48. struct mt_spm_cond_tables *cond_res;
  49. };
  50. enum constraint_status_update_type {
  51. CONSTRAINT_UPDATE_VALID,
  52. CONSTRAINT_UPDATE_COND_CHECK,
  53. CONSTRAINT_RESIDNECY,
  54. };
  55. enum constraint_status_get_type {
  56. CONSTRAINT_GET_VALID = 0xD0000000,
  57. CONSTRAINT_GET_ENTER_CNT,
  58. CONSTRAINT_GET_RESIDENCY,
  59. CONSTRAINT_GET_COND_EN,
  60. CONSTRAINT_COND_BLOCK,
  61. CONSTRAINT_GET_COND_BLOCK_LATCH,
  62. CONSTRAINT_GET_COND_BLOCK_DETAIL,
  63. CONSTRAINT_GET_RESIDNECY,
  64. };
  65. struct rc_common_state {
  66. unsigned int id;
  67. unsigned int act;
  68. unsigned int type;
  69. void *value;
  70. };
  71. #define MT_SPM_RC_BBLPM_MODE (MT_SPM_RC_VALID_UFS_H8 | \
  72. MT_SPM_RC_VALID_FLIGHTMODE | \
  73. MT_SPM_RC_VALID_XSOC_BBLPM)
  74. #define IS_MT_SPM_RC_BBLPM_MODE(st) ((st & (MT_SPM_RC_BBLPM_MODE)) == MT_SPM_RC_BBLPM_MODE)
  75. #endif /* MT_SPM_CONSTRAINT_H */