nxp-ls-fuse-prov.rst 10.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271
  1. Steps to blow fuses on NXP LS SoC:
  2. ==================================
  3. - Enable POVDD
  4. -- Refer board GSG(Getting Started Guide) for the steps to enable POVDD.
  5. -- Once the POVDD is enabled, make sure to set variable POVDD_ENABLE := yes, in the platform.mk.
  6. +---+-----------------+-----------+------------+-----------------+-----------------------------+
  7. | | Platform | Jumper | Switch | LED to Verify | Through GPIO Pin (=number) |
  8. +===+=================+===========+============+=================+=============================+
  9. | 1.| lx2160ardb | J9 | | | no |
  10. +---+-----------------+-----------+------------+-----------------+-----------------------------+
  11. | 2.| lx2160aqds | J35 | | | no |
  12. +---+-----------------+-----------+------------+-----------------+-----------------------------+
  13. | 3.| lx2162aqds | J35 | SW9[4] = 1 | D15 | no |
  14. +---+-----------------+-----------+------------+-----------------+-----------------------------+
  15. - SFP registers to be written to:
  16. +---+----------------------------------+----------------------+----------------------+
  17. | | Platform | OTPMKR0..OTPMKR7 | SRKHR0..SRKHR7 |
  18. +===+==================================+======================+======================+
  19. | 1.| lx2160ardb/lx2160aqds/lx2162aqds | 0x1e80234..0x1e80250 | 0x1e80254..0x1e80270 |
  20. +---+----------------------------------+----------------------+----------------------+
  21. - At U-Boot prompt, verify that SNVS register - HPSR, whether OTPMK was written, already:
  22. +---+----------------------------------+-------------------------------------------+---------------+
  23. | | Platform | OTPMK_ZERO_BIT(=value) | SNVS_HPSR_REG |
  24. +===+==================================+===========================================+===============+
  25. | 1.| lx2160ardb/lx2160aqds/lx2162aqds | 27 (= 1 means not blown, =0 means blown) | 0x01E90014 |
  26. +---+----------------------------------+-------------------------------------------+---------------+
  27. From u-boot prompt:
  28. -- Check for the OTPMK.
  29. .. code:: shell
  30. md $SNVS_HPSR_REG
  31. Command Output:
  32. 01e90014: 88000900
  33. In case it is read as 00000000, then read this register using jtag (in development mode only through CW tap).
  34. +0 +4 +8 +C
  35. [0x01E90014] 88000900
  36. Note: OTPMK_ZERO_BIT is 1, indicating that the OTPMK is not blown.
  37. -- Check for the SRK Hash.
  38. .. code:: shell
  39. md $SRKHR0 0x10
  40. Command Output:
  41. 01e80254: 00000000 00000000 00000000 00000000 ................
  42. 01e80264: 00000000 00000000 00000000 00000000 ................
  43. Note: Zero means that SRK hash is not blown.
  44. - If not blown, then from the U-Boot prompt, using following commands:
  45. -- Provision the OTPMK.
  46. .. code:: shell
  47. mw.l $OTPMKR0 <OTMPKR_0_32Bit_val>
  48. mw.l $OTPMKR1 <OTMPKR_1_32Bit_val>
  49. mw.l $OTPMKR2 <OTMPKR_2_32Bit_val>
  50. mw.l $OTPMKR3 <OTMPKR_3_32Bit_val>
  51. mw.l $OTPMKR4 <OTMPKR_4_32Bit_val>
  52. mw.l $OTPMKR5 <OTMPKR_5_32Bit_val>
  53. mw.l $OTPMKR6 <OTMPKR_6_32Bit_val>
  54. mw.l $OTPMKR7 <OTMPKR_7_32Bit_val>
  55. -- Provision the SRK Hash.
  56. .. code:: shell
  57. mw.l $SRKHR0 <SRKHR_0_32Bit_val>
  58. mw.l $SRKHR1 <SRKHR_1_32Bit_val>
  59. mw.l $SRKHR2 <SRKHR_2_32Bit_val>
  60. mw.l $SRKHR3 <SRKHR_3_32Bit_val>
  61. mw.l $SRKHR4 <SRKHR_4_32Bit_val>
  62. mw.l $SRKHR5 <SRKHR_5_32Bit_val>
  63. mw.l $SRKHR6 <SRKHR_6_32Bit_val>
  64. mw.l $SRKHR7 <SRKHR_7_32Bit_val>
  65. Note: SRK Hash should be carefully written keeping in mind the SFP Block Endianness.
  66. - At U-Boot prompt, verify that SNVS registers for OTPMK are correctly written:
  67. -- Check for the OTPMK.
  68. .. code:: shell
  69. md $SNVS_HPSR_REG
  70. Command Output:
  71. 01e90014: 80000900
  72. OTPMK_ZERO_BIT is zero, indicating that the OTPMK is blown.
  73. Note: In case it is read as 00000000, then read this register using jtag (in development mode only through CW tap).
  74. .. code:: shell
  75. md $OTPMKR0 0x10
  76. Command Output:
  77. 01e80234: ffffffff ffffffff ffffffff ffffffff ................
  78. 01e80244: ffffffff ffffffff ffffffff ffffffff ................
  79. Note: OTPMK will never be visible in plain.
  80. -- Check for the SRK Hash. For example, if following SRK hash is written:
  81. SFP SRKHR0 = fdc2fed4
  82. SFP SRKHR1 = 317f569e
  83. SFP SRKHR2 = 1828425c
  84. SFP SRKHR3 = e87b5cfd
  85. SFP SRKHR4 = 34beab8f
  86. SFP SRKHR5 = df792a70
  87. SFP SRKHR6 = 2dff85e1
  88. SFP SRKHR7 = 32a29687,
  89. then following would be the value on dumping SRK hash.
  90. .. code:: shell
  91. md $SRKHR0 0x10
  92. Command Output:
  93. 01e80254: d4fec2fd 9e567f31 5c422818 fd5c7be8 ....1.V..(B\.{\.
  94. 01e80264: 8fabbe34 702a79df e185ff2d 8796a232 4....y*p-...2...
  95. Note: SRK Hash is visible in plain based on the SFP Block Endianness.
  96. - Caution: Donot proceed to the next step, until you are sure that OTPMK and SRKH are correctly blown from above steps.
  97. -- After the next step, there is no turning back.
  98. -- Fuses will be burnt, which cannot be undo.
  99. - Write SFP_INGR[INST] with the PROGFB(0x2) instruction to blow the fuses.
  100. -- User need to save the SRK key pair and OTPMK Key forever, to continue using this board.
  101. +---+----------------------------------+-------------------------------------------+-----------+
  102. | | Platform | SFP_INGR_REG | SFP_WRITE_DATE_FRM_MIRROR_REG_TO_FUSE |
  103. +===+==================================+=======================================================+
  104. | 1.| lx2160ardb/lx2160aqds/lx2162aqds | 0x01E80020 | 0x2 |
  105. +---+----------------------------------+--------------+----------------------------------------+
  106. .. code:: shell
  107. md $SFP_INGR_REG $SFP_WRITE_DATE_FRM_MIRROR_REG_TO_FUSE
  108. - On reset, if the SFP register were read from u-boot, it will show the following:
  109. -- Check for the OTPMK.
  110. .. code:: shell
  111. md $SNVS_HPSR_REG
  112. Command Output:
  113. 01e90014: 80000900
  114. In case it is read as 00000000, then read this register using jtag (in development mode only through CW tap).
  115. +0 +4 +8 +C
  116. [0x01E90014] 80000900
  117. Note: OTPMK_ZERO_BIT is zero, indicating that the OTPMK is blown.
  118. .. code:: shell
  119. md $OTPMKR0 0x10
  120. Command Output:
  121. 01e80234: ffffffff ffffffff ffffffff ffffffff ................
  122. 01e80244: ffffffff ffffffff ffffffff ffffffff ................
  123. Note: OTPMK will never be visible in plain.
  124. -- SRK Hash
  125. .. code:: shell
  126. md $SRKHR0 0x10
  127. Command Output:
  128. 01e80254: d4fec2fd 9e567f31 5c422818 fd5c7be8 ....1.V..(B\.{\.
  129. 01e80264: 8fabbe34 702a79df e185ff2d 8796a232 4....y*p-...2...
  130. Note: SRK Hash is visible in plain based on the SFP Block Endianness.
  131. Second method to do the fuse provsioning:
  132. =========================================
  133. This method is used for quick way to provision fuses.
  134. Typically used by those who needs to provision number of boards.
  135. - Enable POVDD:
  136. -- Refer the table above to enable POVDD.
  137. Note: If GPIO Pin supports enabling POVDD, it can be done through the below input_fuse_file.
  138. -- Once the POVDD is enabled, make sure to set variable POVDD_ENABLE := yes, in the platform.mk.
  139. - User need to populate the "input_fuse_file", corresponding to the platform for:
  140. -- OTPMK
  141. -- SRKH
  142. Table of fuse provisioning input file for every supported platform:
  143. +---+----------------------------------+-----------------------------------------------------------------+
  144. | | Platform | FUSE_PROV_FILE |
  145. +===+==================================+=================================================================+
  146. | 1.| lx2160ardb/lx2160aqds/lx2162aqds | ${CST_DIR}/input_files/gen_fusescr/ls2088_1088/input_fuse_file |
  147. +---+----------------------------------+--------------+--------------------------------------------------+
  148. - Create the TF-A binary with FUSE_PROG=1.
  149. .. code:: shell
  150. make PLAT=$PLAT FUSE_PROG=1\
  151. BOOT_MODE=<platform_supported_boot_mode> \
  152. RCW=$RCW_BIN \
  153. BL32=$TEE_BIN SPD=opteed\
  154. BL33=$UBOOT_SECURE_BIN \
  155. pbl \
  156. fip \
  157. fip_fuse \
  158. FUSE_PROV_FILE=../../apps/security/cst/input_files/gen_fusescr/ls2088_1088/input_fuse_file
  159. - Deployment:
  160. -- Refer the nxp-layerscape.rst for deploying TF-A images.
  161. -- Deploying fip_fuse.bin:
  162. For Flexspi-Nor:
  163. .. code:: shell
  164. tftp 82000000 $path/fuse_fip.bin;
  165. i2c mw 66 50 20;sf probe 0:0; sf erase 0x880000 +$filesize; sf write 0x82000000 0x880000 $filesize;
  166. For SD or eMMC [file_size_in_block_sizeof_512 = (Size_of_bytes_tftp / 512)]:
  167. .. code:: shell
  168. tftp 82000000 $path/fuse_fip.bin;
  169. mmc write 82000000 0x4408 <file_size_in_block_sizeof_512>;
  170. - Valiation:
  171. +---+----------------------------------+---------------------------------------------------+
  172. | | Platform | Error_Register | Error_Register_Address |
  173. +===+==================================+===================================================+
  174. | 1.| lx2160ardb/lx2160aqds/lx2162aqds | DCFG scratch 4 register | 0x01EE020C |
  175. +---+----------------------------------+---------------------------------------------------+
  176. At the U-Boot prompt, check DCFG scratch 4 register for any error.
  177. .. code:: shell
  178. md $Error_Register_Address 1
  179. Command Ouput:
  180. 01ee020c: 00000000
  181. Note:
  182. - 0x00000000 shows no error, then fuse provisioning is successful.
  183. - For non-zero value, refer the code header file ".../drivers/nxp/sfp/sfp_error_codes.h"