bsec2.c 17 KB

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  1. /*
  2. * Copyright (c) 2017-2024, STMicroelectronics - All Rights Reserved
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <limits.h>
  8. #include <arch_helpers.h>
  9. #include <common/debug.h>
  10. #include <drivers/st/bsec.h>
  11. #include <drivers/st/bsec2_reg.h>
  12. #include <lib/mmio.h>
  13. #include <lib/spinlock.h>
  14. #include <libfdt.h>
  15. #include <platform_def.h>
  16. #define BSEC_IP_VERSION_1_1 U(0x11)
  17. #define BSEC_IP_VERSION_2_0 U(0x20)
  18. #define BSEC_IP_ID_2 U(0x100032)
  19. /*
  20. * IP configuration
  21. */
  22. #define BSEC_OTP_MASK GENMASK(4, 0)
  23. #define BSEC_OTP_BANK_SHIFT 5
  24. #define BSEC_TIMEOUT_VALUE U(0xFFFF)
  25. #define OTP_ACCESS_SIZE (round_up(OTP_MAX_SIZE, __WORD_BIT) / __WORD_BIT)
  26. static uint32_t otp_nsec_access[OTP_ACCESS_SIZE] __maybe_unused;
  27. static uint32_t bsec_shadow_register(uint32_t otp);
  28. static uint32_t bsec_power_safmem(bool power);
  29. static uint32_t bsec_get_version(void);
  30. static uint32_t bsec_get_id(void);
  31. static uint32_t bsec_get_status(void);
  32. static uint32_t bsec_read_permanent_lock(uint32_t otp, bool *value);
  33. /* BSEC access protection */
  34. static spinlock_t bsec_spinlock;
  35. static void bsec_lock(void)
  36. {
  37. if (stm32mp_lock_available()) {
  38. spin_lock(&bsec_spinlock);
  39. }
  40. }
  41. static void bsec_unlock(void)
  42. {
  43. if (stm32mp_lock_available()) {
  44. spin_unlock(&bsec_spinlock);
  45. }
  46. }
  47. static bool is_otp_invalid_mode(void)
  48. {
  49. bool ret = ((bsec_get_status() & BSEC_OTP_STATUS_INVALID) == BSEC_OTP_STATUS_INVALID);
  50. if (ret) {
  51. ERROR("OTP mode is OTP-INVALID\n");
  52. }
  53. return ret;
  54. }
  55. #if defined(IMAGE_BL32)
  56. static int bsec_get_dt_node(struct dt_node_info *info)
  57. {
  58. int node;
  59. node = dt_get_node(info, -1, DT_BSEC_COMPAT);
  60. if (node < 0) {
  61. return -FDT_ERR_NOTFOUND;
  62. }
  63. return node;
  64. }
  65. static void enable_non_secure_access(uint32_t otp)
  66. {
  67. otp_nsec_access[otp / __WORD_BIT] |= BIT(otp % __WORD_BIT);
  68. if (bsec_shadow_register(otp) != BSEC_OK) {
  69. panic();
  70. }
  71. }
  72. static bool non_secure_can_access(uint32_t otp)
  73. {
  74. return (otp_nsec_access[otp / __WORD_BIT] &
  75. BIT(otp % __WORD_BIT)) != 0U;
  76. }
  77. static void bsec_dt_otp_nsec_access(void *fdt, int bsec_node)
  78. {
  79. int bsec_subnode;
  80. fdt_for_each_subnode(bsec_subnode, fdt, bsec_node) {
  81. const fdt32_t *cuint;
  82. uint32_t otp;
  83. uint32_t i;
  84. uint32_t size;
  85. uint32_t offset;
  86. uint32_t length;
  87. cuint = fdt_getprop(fdt, bsec_subnode, "reg", NULL);
  88. if (cuint == NULL) {
  89. panic();
  90. }
  91. offset = fdt32_to_cpu(*cuint);
  92. cuint++;
  93. length = fdt32_to_cpu(*cuint);
  94. otp = offset / sizeof(uint32_t);
  95. if (otp < STM32MP1_UPPER_OTP_START) {
  96. unsigned int otp_end = round_up(offset + length,
  97. sizeof(uint32_t)) /
  98. sizeof(uint32_t);
  99. if (otp_end > STM32MP1_UPPER_OTP_START) {
  100. /*
  101. * OTP crosses Lower/Upper boundary, consider
  102. * only the upper part.
  103. */
  104. otp = STM32MP1_UPPER_OTP_START;
  105. length -= (STM32MP1_UPPER_OTP_START *
  106. sizeof(uint32_t)) - offset;
  107. offset = STM32MP1_UPPER_OTP_START *
  108. sizeof(uint32_t);
  109. WARN("OTP crosses Lower/Upper boundary\n");
  110. } else {
  111. continue;
  112. }
  113. }
  114. if ((fdt_getprop(fdt, bsec_subnode,
  115. "st,non-secure-otp", NULL)) == NULL) {
  116. continue;
  117. }
  118. if (((offset % sizeof(uint32_t)) != 0U) ||
  119. ((length % sizeof(uint32_t)) != 0U)) {
  120. ERROR("Unaligned non-secure OTP\n");
  121. panic();
  122. }
  123. size = length / sizeof(uint32_t);
  124. for (i = otp; i < (otp + size); i++) {
  125. enable_non_secure_access(i);
  126. }
  127. }
  128. }
  129. static void bsec_late_init(void)
  130. {
  131. void *fdt;
  132. int node;
  133. struct dt_node_info bsec_info;
  134. if (fdt_get_address(&fdt) == 0) {
  135. EARLY_ERROR("%s: DT not found\n", __func__);
  136. panic();
  137. }
  138. node = bsec_get_dt_node(&bsec_info);
  139. if (node < 0) {
  140. EARLY_ERROR("%s: BSEC node not found\n", __func__);
  141. panic();
  142. }
  143. assert(bsec_info.base == BSEC_BASE);
  144. bsec_dt_otp_nsec_access(fdt, node);
  145. }
  146. #endif
  147. static uint32_t otp_bank_offset(uint32_t otp)
  148. {
  149. assert(otp <= STM32MP1_OTP_MAX_ID);
  150. return ((otp & ~BSEC_OTP_MASK) >> BSEC_OTP_BANK_SHIFT) *
  151. sizeof(uint32_t);
  152. }
  153. static uint32_t otp_bit_mask(uint32_t otp)
  154. {
  155. return BIT(otp & BSEC_OTP_MASK);
  156. }
  157. /*
  158. * bsec_check_error: check BSEC error status.
  159. * otp: OTP number.
  160. * check_disturbed: check only error (false),
  161. * or error and disturbed status (true).
  162. * return value: BSEC_OK if no error.
  163. */
  164. static uint32_t bsec_check_error(uint32_t otp, bool check_disturbed)
  165. {
  166. uint32_t bit = otp_bit_mask(otp);
  167. uint32_t bank = otp_bank_offset(otp);
  168. if ((mmio_read_32(BSEC_BASE + BSEC_ERROR_OFF + bank) & bit) != 0U) {
  169. return BSEC_ERROR;
  170. }
  171. if (!check_disturbed) {
  172. return BSEC_OK;
  173. }
  174. if ((mmio_read_32(BSEC_BASE + BSEC_DISTURBED_OFF + bank) & bit) != 0U) {
  175. return BSEC_DISTURBED;
  176. }
  177. return BSEC_OK;
  178. }
  179. /*
  180. * bsec_probe: initialize BSEC driver.
  181. * return value: BSEC_OK if no error.
  182. */
  183. uint32_t bsec_probe(void)
  184. {
  185. uint32_t version;
  186. uint32_t id;
  187. if (is_otp_invalid_mode()) {
  188. EARLY_ERROR("%s: otp_invalid_mod\n", __func__);
  189. return BSEC_ERROR;
  190. }
  191. version = bsec_get_version();
  192. id = bsec_get_id();
  193. if (((version != BSEC_IP_VERSION_1_1) &&
  194. (version != BSEC_IP_VERSION_2_0)) ||
  195. (id != BSEC_IP_ID_2)) {
  196. EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
  197. panic();
  198. }
  199. #if defined(IMAGE_BL32)
  200. bsec_late_init();
  201. #endif
  202. return BSEC_OK;
  203. }
  204. /*
  205. * bsec_shadow_register: copy SAFMEM OTP to BSEC data.
  206. * otp: OTP number.
  207. * return value: BSEC_OK if no error.
  208. */
  209. static uint32_t bsec_shadow_register(uint32_t otp)
  210. {
  211. uint32_t result;
  212. bool value;
  213. bool power_up = false;
  214. if (is_otp_invalid_mode()) {
  215. return BSEC_ERROR;
  216. }
  217. result = bsec_read_sr_lock(otp, &value);
  218. if (result != BSEC_OK) {
  219. ERROR("BSEC: %u Sticky-read bit read Error %u\n", otp, result);
  220. return result;
  221. }
  222. if (value) {
  223. VERBOSE("BSEC: OTP %u is locked and will not be refreshed\n",
  224. otp);
  225. }
  226. if ((bsec_get_status() & BSEC_OTP_STATUS_PWRON) == 0U) {
  227. result = bsec_power_safmem(true);
  228. if (result != BSEC_OK) {
  229. return result;
  230. }
  231. power_up = true;
  232. }
  233. bsec_lock();
  234. mmio_write_32(BSEC_BASE + BSEC_OTP_CTRL_OFF, otp | BSEC_READ);
  235. while ((bsec_get_status() & BSEC_OTP_STATUS_BUSY) != 0U) {
  236. ;
  237. }
  238. result = bsec_check_error(otp, true);
  239. bsec_unlock();
  240. if (power_up) {
  241. if (bsec_power_safmem(false) != BSEC_OK) {
  242. panic();
  243. }
  244. }
  245. return result;
  246. }
  247. /*
  248. * bsec_read_otp: read an OTP data value.
  249. * val: read value.
  250. * otp: OTP number.
  251. * return value: BSEC_OK if no error.
  252. */
  253. uint32_t bsec_read_otp(uint32_t *val, uint32_t otp)
  254. {
  255. if (is_otp_invalid_mode()) {
  256. return BSEC_ERROR;
  257. }
  258. if (otp > STM32MP1_OTP_MAX_ID) {
  259. return BSEC_INVALID_PARAM;
  260. }
  261. *val = mmio_read_32(BSEC_BASE + BSEC_OTP_DATA_OFF +
  262. (otp * sizeof(uint32_t)));
  263. return BSEC_OK;
  264. }
  265. /*
  266. * bsec_write_otp: write value in BSEC data register.
  267. * val: value to write.
  268. * otp: OTP number.
  269. * return value: BSEC_OK if no error.
  270. */
  271. uint32_t bsec_write_otp(uint32_t val, uint32_t otp)
  272. {
  273. uint32_t result;
  274. bool value;
  275. if (is_otp_invalid_mode()) {
  276. return BSEC_ERROR;
  277. }
  278. result = bsec_read_sw_lock(otp, &value);
  279. if (result != BSEC_OK) {
  280. ERROR("BSEC: %u Sticky-write bit read Error %u\n", otp, result);
  281. return result;
  282. }
  283. if (value) {
  284. VERBOSE("BSEC: OTP %u is locked and write will be ignored\n",
  285. otp);
  286. }
  287. /* Ensure integrity of each register access sequence */
  288. bsec_lock();
  289. mmio_write_32(BSEC_BASE + BSEC_OTP_DATA_OFF +
  290. (otp * sizeof(uint32_t)), val);
  291. bsec_unlock();
  292. return result;
  293. }
  294. /*
  295. * bsec_program_otp: program a bit in SAFMEM after the prog.
  296. * The OTP data is not refreshed.
  297. * val: value to program.
  298. * otp: OTP number.
  299. * return value: BSEC_OK if no error.
  300. */
  301. uint32_t bsec_program_otp(uint32_t val, uint32_t otp)
  302. {
  303. uint32_t result;
  304. bool power_up = false;
  305. bool sp_lock;
  306. bool perm_lock;
  307. if (is_otp_invalid_mode()) {
  308. return BSEC_ERROR;
  309. }
  310. result = bsec_read_sp_lock(otp, &sp_lock);
  311. if (result != BSEC_OK) {
  312. ERROR("BSEC: %u Sticky-prog bit read Error %u\n", otp, result);
  313. return result;
  314. }
  315. result = bsec_read_permanent_lock(otp, &perm_lock);
  316. if (result != BSEC_OK) {
  317. ERROR("BSEC: %u permanent bit read Error %u\n", otp, result);
  318. return result;
  319. }
  320. if (sp_lock || perm_lock) {
  321. WARN("BSEC: OTP locked, prog will be ignored\n");
  322. return BSEC_PROG_FAIL;
  323. }
  324. if ((mmio_read_32(BSEC_BASE + BSEC_OTP_LOCK_OFF) & GPLOCK_LOCK_MASK) != 0U) {
  325. WARN("BSEC: GPLOCK activated, prog will be ignored\n");
  326. }
  327. if ((bsec_get_status() & BSEC_OTP_STATUS_PWRON) == 0U) {
  328. result = bsec_power_safmem(true);
  329. if (result != BSEC_OK) {
  330. return result;
  331. }
  332. power_up = true;
  333. }
  334. bsec_lock();
  335. mmio_write_32(BSEC_BASE + BSEC_OTP_WRDATA_OFF, val);
  336. mmio_write_32(BSEC_BASE + BSEC_OTP_CTRL_OFF, otp | BSEC_WRITE);
  337. while ((bsec_get_status() & BSEC_OTP_STATUS_BUSY) != 0U) {
  338. ;
  339. }
  340. if ((bsec_get_status() & BSEC_OTP_STATUS_PROGFAIL) != 0U) {
  341. result = BSEC_PROG_FAIL;
  342. } else {
  343. result = bsec_check_error(otp, true);
  344. }
  345. bsec_unlock();
  346. if (power_up) {
  347. if (bsec_power_safmem(false) != BSEC_OK) {
  348. panic();
  349. }
  350. }
  351. return result;
  352. }
  353. /*
  354. * bsec_permanent_lock_otp: permanent lock of OTP in SAFMEM.
  355. * otp: OTP number.
  356. * return value: BSEC_OK if no error.
  357. */
  358. #if defined(IMAGE_BL32)
  359. uint32_t bsec_permanent_lock_otp(uint32_t otp)
  360. {
  361. uint32_t result;
  362. bool power_up = false;
  363. uint32_t data;
  364. uint32_t addr;
  365. if (is_otp_invalid_mode()) {
  366. return BSEC_ERROR;
  367. }
  368. if (otp > STM32MP1_OTP_MAX_ID) {
  369. return BSEC_INVALID_PARAM;
  370. }
  371. if ((bsec_get_status() & BSEC_OTP_STATUS_PWRON) == 0U) {
  372. result = bsec_power_safmem(true);
  373. if (result != BSEC_OK) {
  374. return result;
  375. }
  376. power_up = true;
  377. }
  378. if (otp < STM32MP1_UPPER_OTP_START) {
  379. addr = otp >> ADDR_LOWER_OTP_PERLOCK_SHIFT;
  380. data = DATA_LOWER_OTP_PERLOCK_BIT <<
  381. ((otp & DATA_LOWER_OTP_PERLOCK_MASK) << 1U);
  382. } else {
  383. addr = (otp >> ADDR_UPPER_OTP_PERLOCK_SHIFT) + 2U;
  384. data = DATA_UPPER_OTP_PERLOCK_BIT <<
  385. (otp & DATA_UPPER_OTP_PERLOCK_MASK);
  386. }
  387. bsec_lock();
  388. mmio_write_32(BSEC_BASE + BSEC_OTP_WRDATA_OFF, data);
  389. mmio_write_32(BSEC_BASE + BSEC_OTP_CTRL_OFF,
  390. addr | BSEC_WRITE | BSEC_LOCK);
  391. while ((bsec_get_status() & BSEC_OTP_STATUS_BUSY) != 0U) {
  392. ;
  393. }
  394. if ((bsec_get_status() & BSEC_OTP_STATUS_PROGFAIL) != 0U) {
  395. result = BSEC_PROG_FAIL;
  396. } else {
  397. result = bsec_check_error(otp, false);
  398. }
  399. bsec_unlock();
  400. if (power_up) {
  401. if (bsec_power_safmem(false) != BSEC_OK) {
  402. panic();
  403. }
  404. }
  405. return result;
  406. }
  407. #endif
  408. /*
  409. * bsec_read_debug_conf: return debug configuration register value.
  410. */
  411. uint32_t bsec_read_debug_conf(void)
  412. {
  413. return mmio_read_32(BSEC_BASE + BSEC_DEN_OFF);
  414. }
  415. /*
  416. * bsec_write_scratch: write value in scratch register.
  417. * val: value to write.
  418. * return value: none.
  419. */
  420. void bsec_write_scratch(uint32_t val)
  421. {
  422. #if defined(IMAGE_BL32)
  423. if (is_otp_invalid_mode()) {
  424. return;
  425. }
  426. bsec_lock();
  427. mmio_write_32(BSEC_BASE + BSEC_SCRATCH_OFF, val);
  428. bsec_unlock();
  429. #else
  430. mmio_write_32(BSEC_BASE + BSEC_SCRATCH_OFF, val);
  431. #endif
  432. }
  433. /*
  434. * bsec_get_status: return status register value.
  435. */
  436. static uint32_t bsec_get_status(void)
  437. {
  438. return mmio_read_32(BSEC_BASE + BSEC_OTP_STATUS_OFF);
  439. }
  440. /*
  441. * bsec_get_version: return BSEC version register value.
  442. */
  443. static uint32_t bsec_get_version(void)
  444. {
  445. return mmio_read_32(BSEC_BASE + BSEC_IPVR_OFF) & BSEC_IPVR_MSK;
  446. }
  447. /*
  448. * bsec_get_id: return BSEC ID register value.
  449. */
  450. static uint32_t bsec_get_id(void)
  451. {
  452. return mmio_read_32(BSEC_BASE + BSEC_IP_ID_OFF);
  453. }
  454. /*
  455. * bsec_set_sr_lock: set shadow-read lock.
  456. * otp: OTP number.
  457. * return value: BSEC_OK if no error.
  458. */
  459. uint32_t bsec_set_sr_lock(uint32_t otp)
  460. {
  461. uint32_t bank = otp_bank_offset(otp);
  462. uint32_t otp_mask = otp_bit_mask(otp);
  463. if (is_otp_invalid_mode()) {
  464. return BSEC_ERROR;
  465. }
  466. if (otp > STM32MP1_OTP_MAX_ID) {
  467. return BSEC_INVALID_PARAM;
  468. }
  469. bsec_lock();
  470. mmio_write_32(BSEC_BASE + BSEC_SRLOCK_OFF + bank, otp_mask);
  471. bsec_unlock();
  472. return BSEC_OK;
  473. }
  474. /*
  475. * bsec_read_sr_lock: read shadow-read lock.
  476. * otp: OTP number.
  477. * value: read value (true or false).
  478. * return value: BSEC_OK if no error.
  479. */
  480. uint32_t bsec_read_sr_lock(uint32_t otp, bool *value)
  481. {
  482. uint32_t bank = otp_bank_offset(otp);
  483. uint32_t otp_mask = otp_bit_mask(otp);
  484. uint32_t bank_value;
  485. if (otp > STM32MP1_OTP_MAX_ID) {
  486. return BSEC_INVALID_PARAM;
  487. }
  488. bank_value = mmio_read_32(BSEC_BASE + BSEC_SRLOCK_OFF + bank);
  489. *value = ((bank_value & otp_mask) != 0U);
  490. return BSEC_OK;
  491. }
  492. /*
  493. * bsec_set_sw_lock: set shadow-write lock.
  494. * otp: OTP number.
  495. * return value: BSEC_OK if no error.
  496. */
  497. uint32_t bsec_set_sw_lock(uint32_t otp)
  498. {
  499. uint32_t bank = otp_bank_offset(otp);
  500. uint32_t otp_mask = otp_bit_mask(otp);
  501. if (is_otp_invalid_mode()) {
  502. return BSEC_ERROR;
  503. }
  504. if (otp > STM32MP1_OTP_MAX_ID) {
  505. return BSEC_INVALID_PARAM;
  506. }
  507. bsec_lock();
  508. mmio_write_32(BSEC_BASE + BSEC_SWLOCK_OFF + bank, otp_mask);
  509. bsec_unlock();
  510. return BSEC_OK;
  511. }
  512. /*
  513. * bsec_read_sw_lock: read shadow-write lock.
  514. * otp: OTP number.
  515. * value: read value (true or false).
  516. * return value: BSEC_OK if no error.
  517. */
  518. uint32_t bsec_read_sw_lock(uint32_t otp, bool *value)
  519. {
  520. uint32_t bank = otp_bank_offset(otp);
  521. uint32_t otp_mask = BIT(otp & BSEC_OTP_MASK);
  522. uint32_t bank_value;
  523. if (otp > STM32MP1_OTP_MAX_ID) {
  524. return BSEC_INVALID_PARAM;
  525. }
  526. bank_value = mmio_read_32(BSEC_BASE + BSEC_SWLOCK_OFF + bank);
  527. *value = ((bank_value & otp_mask) != 0U);
  528. return BSEC_OK;
  529. }
  530. /*
  531. * bsec_set_sp_lock: set shadow-program lock.
  532. * otp: OTP number.
  533. * return value: BSEC_OK if no error.
  534. */
  535. uint32_t bsec_set_sp_lock(uint32_t otp)
  536. {
  537. uint32_t bank = otp_bank_offset(otp);
  538. uint32_t otp_mask = otp_bit_mask(otp);
  539. if (is_otp_invalid_mode()) {
  540. return BSEC_ERROR;
  541. }
  542. if (otp > STM32MP1_OTP_MAX_ID) {
  543. return BSEC_INVALID_PARAM;
  544. }
  545. bsec_lock();
  546. mmio_write_32(BSEC_BASE + BSEC_SPLOCK_OFF + bank, otp_mask);
  547. bsec_unlock();
  548. return BSEC_OK;
  549. }
  550. /*
  551. * bsec_read_sp_lock: read shadow-program lock.
  552. * otp: OTP number.
  553. * value: read value (true or false).
  554. * return value: BSEC_OK if no error.
  555. */
  556. uint32_t bsec_read_sp_lock(uint32_t otp, bool *value)
  557. {
  558. uint32_t bank = otp_bank_offset(otp);
  559. uint32_t otp_mask = BIT(otp & BSEC_OTP_MASK);
  560. uint32_t bank_value;
  561. if (otp > STM32MP1_OTP_MAX_ID) {
  562. return BSEC_INVALID_PARAM;
  563. }
  564. bank_value = mmio_read_32(BSEC_BASE + BSEC_SPLOCK_OFF + bank);
  565. *value = ((bank_value & otp_mask) != 0U);
  566. return BSEC_OK;
  567. }
  568. /*
  569. * bsec_read_permanent_lock: Read permanent lock status.
  570. * otp: OTP number.
  571. * value: read value (true or false).
  572. * return value: BSEC_OK if no error.
  573. */
  574. static uint32_t bsec_read_permanent_lock(uint32_t otp, bool *value)
  575. {
  576. uint32_t bank = otp_bank_offset(otp);
  577. uint32_t otp_mask = otp_bit_mask(otp);
  578. uint32_t bank_value;
  579. if (otp > STM32MP1_OTP_MAX_ID) {
  580. return BSEC_INVALID_PARAM;
  581. }
  582. bank_value = mmio_read_32(BSEC_BASE + BSEC_WRLOCK_OFF + bank);
  583. *value = ((bank_value & otp_mask) != 0U);
  584. return BSEC_OK;
  585. }
  586. /*
  587. * bsec_power_safmem: Activate or deactivate SAFMEM power.
  588. * power: true to power up, false to power down.
  589. * return value: BSEC_OK if no error.
  590. */
  591. static uint32_t bsec_power_safmem(bool power)
  592. {
  593. uint32_t register_val;
  594. uint32_t timeout = BSEC_TIMEOUT_VALUE;
  595. bsec_lock();
  596. register_val = mmio_read_32(BSEC_BASE + BSEC_OTP_CONF_OFF);
  597. if (power) {
  598. register_val |= BSEC_CONF_POWER_UP_MASK;
  599. } else {
  600. register_val &= ~BSEC_CONF_POWER_UP_MASK;
  601. }
  602. mmio_write_32(BSEC_BASE + BSEC_OTP_CONF_OFF, register_val);
  603. if (power) {
  604. while (((bsec_get_status() & BSEC_OTP_STATUS_PWRON) == 0U) &&
  605. (timeout != 0U)) {
  606. timeout--;
  607. }
  608. } else {
  609. while (((bsec_get_status() & BSEC_OTP_STATUS_PWRON) != 0U) &&
  610. (timeout != 0U)) {
  611. timeout--;
  612. }
  613. }
  614. bsec_unlock();
  615. if (timeout == 0U) {
  616. return BSEC_TIMEOUT;
  617. }
  618. return BSEC_OK;
  619. }
  620. /*
  621. * bsec_shadow_read_otp: Load OTP from SAFMEM and provide its value.
  622. * val: read value.
  623. * otp: OTP number.
  624. * return value: BSEC_OK if no error.
  625. */
  626. uint32_t bsec_shadow_read_otp(uint32_t *val, uint32_t otp)
  627. {
  628. uint32_t result;
  629. result = bsec_shadow_register(otp);
  630. if (result != BSEC_OK) {
  631. ERROR("BSEC: %u Shadowing Error %u\n", otp, result);
  632. return result;
  633. }
  634. result = bsec_read_otp(val, otp);
  635. if (result != BSEC_OK) {
  636. ERROR("BSEC: %u Read Error %u\n", otp, result);
  637. }
  638. return result;
  639. }
  640. #if defined(IMAGE_BL32)
  641. /*
  642. * bsec_check_nsec_access_rights: check non-secure access rights to target OTP.
  643. * otp: OTP number.
  644. * return value: BSEC_OK if authorized access.
  645. */
  646. uint32_t bsec_check_nsec_access_rights(uint32_t otp)
  647. {
  648. if (otp > STM32MP1_OTP_MAX_ID) {
  649. return BSEC_INVALID_PARAM;
  650. }
  651. if (otp >= STM32MP1_UPPER_OTP_START) {
  652. if (!non_secure_can_access(otp)) {
  653. return BSEC_ERROR;
  654. }
  655. }
  656. return BSEC_OK;
  657. }
  658. #endif
  659. uint32_t bsec_get_secure_state(void)
  660. {
  661. uint32_t status = bsec_get_status();
  662. uint32_t result = BSEC_STATE_INVALID;
  663. uint32_t otp_enc_id __maybe_unused;
  664. uint32_t otp_bit_len __maybe_unused;
  665. int res __maybe_unused;
  666. if ((status & BSEC_OTP_STATUS_INVALID) != 0U) {
  667. result = BSEC_STATE_INVALID;
  668. } else {
  669. if ((status & BSEC_OTP_STATUS_SECURE) != 0U) {
  670. if (stm32mp_check_closed_device() == STM32MP_CHIP_SEC_CLOSED) {
  671. result = BSEC_STATE_SEC_CLOSED;
  672. } else {
  673. result = BSEC_STATE_SEC_OPEN;
  674. }
  675. } else {
  676. /* OTP modes OPEN1 and OPEN2 are not supported */
  677. result = BSEC_STATE_INVALID;
  678. }
  679. }
  680. return result;
  681. }