bsec3.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533
  1. /*
  2. * Copyright (c) 2024, STMicroelectronics - All Rights Reserved
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <limits.h>
  8. #include <arch_helpers.h>
  9. #include <common/debug.h>
  10. #include <drivers/st/bsec.h>
  11. #include <drivers/st/bsec3_reg.h>
  12. #include <drivers/st/stm32mp_reset.h>
  13. #include <lib/mmio.h>
  14. #include <lib/spinlock.h>
  15. #include <libfdt.h>
  16. #include <platform_def.h>
  17. #define BSEC_IP_VERSION_1_0 U(0x10)
  18. #define BSEC_IP_ID_3 U(0x100033)
  19. #define MAX_NB_TRIES U(3)
  20. /*
  21. * IP configuration
  22. */
  23. #define BSEC_OTP_MASK GENMASK_32(4, 0)
  24. #define BSEC_OTP_BANK_SHIFT U(5)
  25. #define BSEC_TIMEOUT_VALUE U(0x800000) /* ~7sec @1.2GHz */
  26. /* Magic use to indicated valid SHADOW = 'B' 'S' 'E' 'C' */
  27. #define BSEC_MAGIC U(0x42534543)
  28. #define OTP_MAX_SIZE (STM32MP2_OTP_MAX_ID + U(1))
  29. struct bsec_shadow {
  30. uint32_t magic;
  31. uint32_t state;
  32. uint32_t value[OTP_MAX_SIZE];
  33. uint32_t status[OTP_MAX_SIZE];
  34. };
  35. static uint32_t otp_bank(uint32_t otp)
  36. {
  37. if (otp > STM32MP2_OTP_MAX_ID) {
  38. panic();
  39. }
  40. return (otp & ~BSEC_OTP_MASK) >> BSEC_OTP_BANK_SHIFT;
  41. }
  42. static uint32_t otp_bit_mask(uint32_t otp)
  43. {
  44. return BIT(otp & BSEC_OTP_MASK);
  45. }
  46. /*
  47. * bsec_get_status: return status register value.
  48. */
  49. static uint32_t bsec_get_status(void)
  50. {
  51. return mmio_read_32(BSEC_BASE + BSEC_OTPSR);
  52. }
  53. /*
  54. * bsec_get_version: return BSEC version.
  55. */
  56. static uint32_t bsec_get_version(void)
  57. {
  58. return mmio_read_32(BSEC_BASE + BSEC_VERR) & BSEC_VERR_MASK;
  59. }
  60. /*
  61. * bsec_get_id: return BSEC ID.
  62. */
  63. static uint32_t bsec_get_id(void)
  64. {
  65. return mmio_read_32(BSEC_BASE + BSEC_IPIDR);
  66. }
  67. static bool is_fuse_shadowed(uint32_t otp)
  68. {
  69. uint32_t bank = otp_bank(otp);
  70. uint32_t otp_mask = otp_bit_mask(otp);
  71. uint32_t bank_value;
  72. bank_value = mmio_read_32(BSEC_BASE + BSEC_SFSR(bank));
  73. if ((bank_value & otp_mask) != 0U) {
  74. return true;
  75. }
  76. return false;
  77. }
  78. static void poll_otp_status_busy(void)
  79. {
  80. uint32_t timeout = BSEC_TIMEOUT_VALUE;
  81. while (((bsec_get_status() & BSEC_OTPSR_BUSY) != 0U) && (timeout != 0U)) {
  82. timeout--;
  83. }
  84. if ((bsec_get_status() & BSEC_OTPSR_BUSY) != 0U) {
  85. ERROR("BSEC timeout\n");
  86. panic();
  87. }
  88. }
  89. static uint32_t check_read_error(uint32_t otp)
  90. {
  91. uint32_t status = bsec_get_status();
  92. if ((status & BSEC_OTPSR_SECF) != 0U) {
  93. VERBOSE("BSEC read %u single error correction detected\n", otp);
  94. }
  95. if ((status & BSEC_OTPSR_PPLF) != 0U) {
  96. VERBOSE("BSEC read %u permanent programming lock detected.\n", otp);
  97. }
  98. if ((status & BSEC_OTPSR_PPLMF) != 0U) {
  99. ERROR("BSEC read %u error 0x%x\n", otp, status);
  100. return BSEC_ERROR;
  101. }
  102. if ((status & (BSEC_OTPSR_DISTURBF | BSEC_OTPSR_DEDF | BSEC_OTPSR_AMEF)) != 0U) {
  103. ERROR("BSEC read %u error 0x%x with invalid FVR\n", otp, status);
  104. return BSEC_RETRY;
  105. }
  106. return BSEC_OK;
  107. }
  108. static uint32_t check_program_error(uint32_t otp)
  109. {
  110. uint32_t status = bsec_get_status();
  111. if ((status & BSEC_OTPSR_PROGFAIL) != 0U) {
  112. ERROR("BSEC program %u error 0x%x\n", otp, status);
  113. return BSEC_RETRY;
  114. }
  115. return BSEC_OK;
  116. }
  117. static void check_reset_error(void)
  118. {
  119. uint32_t status = bsec_get_status();
  120. /* check initial status reporting */
  121. if ((status & BSEC_OTPSR_BUSY) != 0U) {
  122. VERBOSE("BSEC reset and busy when OTPSR read\n");
  123. }
  124. if ((status & BSEC_OTPSR_HIDEUP) != 0U) {
  125. VERBOSE("BSEC upper fuse are not accessible (HIDEUP)\n");
  126. }
  127. if ((status & BSEC_OTPSR_OTPSEC) != 0U) {
  128. VERBOSE("BSEC reset single error correction detected\n");
  129. }
  130. if ((status & BSEC_OTPSR_OTPNVIR) == 0U) {
  131. VERBOSE("BSEC reset first fuse word 0 is detected zero\n");
  132. }
  133. if ((status & BSEC_OTPSR_OTPERR) != 0U) {
  134. ERROR("BSEC reset critical error 0x%x\n", status);
  135. panic();
  136. }
  137. if ((status & BSEC_OTPSR_FUSEOK) != BSEC_OTPSR_FUSEOK) {
  138. ERROR("BSEC reset critical error 0x%x\n", status);
  139. panic();
  140. }
  141. }
  142. static bool is_bsec_write_locked(void)
  143. {
  144. return (mmio_read_32(BSEC_BASE + BSEC_LOCKR) & BSEC_LOCKR_GWLOCK_MASK) != 0U;
  145. }
  146. /*
  147. * bsec_probe: initialize BSEC driver.
  148. * return value: BSEC_OK if no error.
  149. */
  150. uint32_t bsec_probe(void)
  151. {
  152. uint32_t version = bsec_get_version();
  153. uint32_t id = bsec_get_id();
  154. if ((version != BSEC_IP_VERSION_1_0) || (id != BSEC_IP_ID_3)) {
  155. EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
  156. panic();
  157. }
  158. check_reset_error();
  159. return BSEC_OK;
  160. }
  161. /*
  162. * bsec_shadow_register: copy SAFMEM OTP to BSEC data.
  163. * otp: OTP number.
  164. * return value: BSEC_OK if no error.
  165. */
  166. static uint32_t bsec_shadow_register(uint32_t otp)
  167. {
  168. uint32_t result;
  169. uint32_t i;
  170. bool value;
  171. result = bsec_read_sr_lock(otp, &value);
  172. if (result != BSEC_OK) {
  173. WARN("BSEC: %u Sticky-read bit read Error %u\n", otp, result);
  174. } else if (value) {
  175. VERBOSE("BSEC: OTP %u is locked and will not be refreshed\n", otp);
  176. }
  177. for (i = 0U; i < MAX_NB_TRIES; i++) {
  178. mmio_write_32(BSEC_BASE + BSEC_OTPCR, otp);
  179. poll_otp_status_busy();
  180. result = check_read_error(otp);
  181. if (result != BSEC_RETRY) {
  182. break;
  183. }
  184. }
  185. return result;
  186. }
  187. /*
  188. * bsec_write_otp: write a value in shadow OTP.
  189. * val: value to program.
  190. * otp: OTP number.
  191. * return value: BSEC_OK if no error.
  192. */
  193. uint32_t bsec_write_otp(uint32_t val, uint32_t otp)
  194. {
  195. bool state;
  196. uint32_t result;
  197. if (otp > STM32MP2_OTP_MAX_ID) {
  198. panic();
  199. }
  200. if (!is_fuse_shadowed(otp)) {
  201. return BSEC_ERROR;
  202. }
  203. if (is_bsec_write_locked()) {
  204. return BSEC_WRITE_LOCKED;
  205. }
  206. result = bsec_read_sw_lock(otp, &state);
  207. if (result != BSEC_OK) {
  208. WARN("Shadow register is SW locked\n");
  209. return result;
  210. }
  211. mmio_write_32(BSEC_BASE + BSEC_FVR(otp), val);
  212. return BSEC_OK;
  213. }
  214. /*
  215. * bsec_program_otp: program a bit in SAFMEM after the prog.
  216. * The OTP data is not refreshed.
  217. * val: value to program.
  218. * otp: OTP number.
  219. * return value: BSEC_OK if no error.
  220. */
  221. uint32_t bsec_program_otp(uint32_t val, uint32_t otp)
  222. {
  223. uint32_t result;
  224. uint32_t i;
  225. bool value;
  226. if (otp > STM32MP2_OTP_MAX_ID) {
  227. panic();
  228. }
  229. if (is_bsec_write_locked() == true) {
  230. return BSEC_WRITE_LOCKED;
  231. }
  232. result = bsec_read_sp_lock(otp, &value);
  233. if (result != BSEC_OK) {
  234. WARN("BSEC: %u Sticky-prog bit read Error %u\n", otp, result);
  235. } else if (value) {
  236. WARN("BSEC: OTP locked, prog will be ignored\n");
  237. return BSEC_WRITE_LOCKED;
  238. }
  239. mmio_write_32(BSEC_BASE + BSEC_WDR, val);
  240. for (i = 0U; i < MAX_NB_TRIES; i++) {
  241. mmio_write_32(BSEC_BASE + BSEC_OTPCR, otp | BSEC_OTPCR_PROG);
  242. poll_otp_status_busy();
  243. result = check_program_error(otp);
  244. if (result != BSEC_RETRY) {
  245. break;
  246. }
  247. }
  248. return result;
  249. }
  250. /*
  251. * bsec_read_debug_conf: read debug configuration.
  252. */
  253. uint32_t bsec_read_debug_conf(void)
  254. {
  255. return mmio_read_32(BSEC_BASE + BSEC_DENR);
  256. }
  257. static uint32_t bsec_lock_register_set(uint32_t offset, uint32_t mask)
  258. {
  259. uint32_t value = mmio_read_32(BSEC_BASE + offset);
  260. /* The lock is already set */
  261. if ((value & mask) != 0U) {
  262. return BSEC_OK;
  263. }
  264. if (is_bsec_write_locked()) {
  265. return BSEC_WRITE_LOCKED;
  266. }
  267. value |= mask;
  268. mmio_write_32(BSEC_BASE + offset, value);
  269. return BSEC_OK;
  270. }
  271. static bool bsec_lock_register_get(uint32_t offset, uint32_t mask)
  272. {
  273. uint32_t value = mmio_read_32(BSEC_BASE + offset);
  274. return (value & mask) != 0U;
  275. }
  276. /*
  277. * bsec_set_sr_lock: set shadow-read lock.
  278. * otp: OTP number.
  279. * return value: BSEC_OK if no error.
  280. */
  281. uint32_t bsec_set_sr_lock(uint32_t otp)
  282. {
  283. uint32_t bank = otp_bank(otp);
  284. uint32_t otp_mask = otp_bit_mask(otp);
  285. if (otp > STM32MP2_OTP_MAX_ID) {
  286. panic();
  287. }
  288. return bsec_lock_register_set(BSEC_SRLOCK(bank), otp_mask);
  289. }
  290. /*
  291. * bsec_read_sr_lock: read shadow-read lock.
  292. * otp: OTP number.
  293. * value: read value (true or false).
  294. * return value: BSEC_OK if no error.
  295. */
  296. uint32_t bsec_read_sr_lock(uint32_t otp, bool *value)
  297. {
  298. uint32_t bank = otp_bank(otp);
  299. uint32_t otp_mask = otp_bit_mask(otp);
  300. assert(value != NULL);
  301. if (otp > STM32MP2_OTP_MAX_ID) {
  302. panic();
  303. }
  304. *value = bsec_lock_register_get(BSEC_SRLOCK(bank), otp_mask);
  305. return BSEC_OK;
  306. }
  307. /*
  308. * bsec_set_sw_lock: set shadow-write lock.
  309. * otp: OTP number.
  310. * return value: BSEC_OK if no error.
  311. */
  312. uint32_t bsec_set_sw_lock(uint32_t otp)
  313. {
  314. uint32_t bank = otp_bank(otp);
  315. uint32_t otp_mask = otp_bit_mask(otp);
  316. if (otp > STM32MP2_OTP_MAX_ID) {
  317. panic();
  318. }
  319. return bsec_lock_register_set(BSEC_SWLOCK(bank), otp_mask);
  320. }
  321. /*
  322. * bsec_read_sw_lock: read shadow-write lock.
  323. * otp: OTP number.
  324. * value: read value (true or false).
  325. * return value: BSEC_OK if no error.
  326. */
  327. uint32_t bsec_read_sw_lock(uint32_t otp, bool *value)
  328. {
  329. uint32_t bank = otp_bank(otp);
  330. uint32_t otp_mask = otp_bit_mask(otp);
  331. assert(value != NULL);
  332. if (otp > STM32MP2_OTP_MAX_ID) {
  333. panic();
  334. }
  335. *value = bsec_lock_register_get(BSEC_SWLOCK(bank), otp_mask);
  336. return BSEC_OK;
  337. }
  338. /*
  339. * bsec_set_sp_lock: set shadow-program lock.
  340. * otp: OTP number.
  341. * return value: BSEC_OK if no error.
  342. */
  343. uint32_t bsec_set_sp_lock(uint32_t otp)
  344. {
  345. uint32_t bank = otp_bank(otp);
  346. uint32_t otp_mask = otp_bit_mask(otp);
  347. if (otp > STM32MP2_OTP_MAX_ID) {
  348. panic();
  349. }
  350. return bsec_lock_register_set(BSEC_SPLOCK(bank), otp_mask);
  351. }
  352. /*
  353. * bsec_read_sp_lock: read shadow-program lock.
  354. * otp: OTP number.
  355. * value: read value (true or false).
  356. * return value: BSEC_OK if no error.
  357. */
  358. uint32_t bsec_read_sp_lock(uint32_t otp, bool *value)
  359. {
  360. uint32_t bank = otp_bank(otp);
  361. uint32_t otp_mask = otp_bit_mask(otp);
  362. assert(value != NULL);
  363. if (otp > STM32MP2_OTP_MAX_ID) {
  364. panic();
  365. }
  366. *value = bsec_lock_register_get(BSEC_SPLOCK(bank), otp_mask);
  367. return BSEC_OK;
  368. }
  369. /*
  370. * bsec_get_secure_state: read state in BSEC status register.
  371. * return: secure state
  372. */
  373. uint32_t bsec_get_secure_state(void)
  374. {
  375. uint32_t state = BSEC_STATE_INVALID;
  376. uint32_t status = bsec_get_status();
  377. uint32_t bsec_sr = mmio_read_32(BSEC_BASE + BSEC_SR);
  378. if ((status & BSEC_OTPSR_FUSEOK) == BSEC_OTPSR_FUSEOK) {
  379. /* NVSTATE is only valid if FUSEOK */
  380. uint32_t nvstates = (bsec_sr & BSEC_SR_NVSTATE_MASK) >> BSEC_SR_NVSTATE_SHIFT;
  381. if (nvstates == BSEC_SR_NVSTATE_OPEN) {
  382. state = BSEC_STATE_SEC_OPEN;
  383. } else if (nvstates == BSEC_SR_NVSTATE_CLOSED) {
  384. state = BSEC_STATE_SEC_CLOSED;
  385. } else {
  386. VERBOSE("%s nvstates = %u\n", __func__, nvstates);
  387. }
  388. }
  389. return state;
  390. }
  391. /*
  392. * bsec_shadow_read_otp: Load OTP from SAFMEM and provide its value
  393. * val: read value.
  394. * otp: OTP number.
  395. * return value: BSEC_OK if no error.
  396. */
  397. uint32_t bsec_shadow_read_otp(uint32_t *val, uint32_t otp)
  398. {
  399. assert(val != NULL);
  400. if (otp > STM32MP2_OTP_MAX_ID) {
  401. panic();
  402. }
  403. *val = 0U;
  404. if (is_bsec_write_locked()) {
  405. return BSEC_WRITE_LOCKED;
  406. }
  407. if (!is_fuse_shadowed(otp)) {
  408. uint32_t result = bsec_shadow_register(otp);
  409. if (result != BSEC_OK) {
  410. ERROR("BSEC: %u Shadowing Error %u\n", otp, result);
  411. return result;
  412. }
  413. }
  414. *val = mmio_read_32(BSEC_BASE + BSEC_FVR(otp));
  415. return BSEC_OK;
  416. }
  417. /*
  418. * bsec_read_otp: read an OTP data value.
  419. * val: read value.
  420. * otp: OTP number.
  421. * return value: BSEC_OK if no error.
  422. */
  423. uint32_t bsec_read_otp(uint32_t *val, uint32_t otp)
  424. {
  425. assert(val != NULL);
  426. if (otp > STM32MP2_OTP_MAX_ID) {
  427. panic();
  428. }
  429. return bsec_shadow_read_otp(val, otp);
  430. }