stm32mp15-pinctrl.dtsi 10 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
  4. * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
  5. */
  6. #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  7. &pinctrl {
  8. /omit-if-no-ref/
  9. fmc_pins_a: fmc-0 {
  10. pins1 {
  11. pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
  12. <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
  13. <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
  14. <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
  15. <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
  16. <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
  17. <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
  18. <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
  19. <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
  20. <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
  21. <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
  22. <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
  23. <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
  24. bias-disable;
  25. drive-push-pull;
  26. slew-rate = <1>;
  27. };
  28. pins2 {
  29. pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
  30. bias-pull-up;
  31. };
  32. };
  33. /omit-if-no-ref/
  34. i2c2_pins_a: i2c2-0 {
  35. pins {
  36. pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
  37. <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
  38. bias-disable;
  39. drive-open-drain;
  40. slew-rate = <0>;
  41. };
  42. };
  43. /omit-if-no-ref/
  44. qspi_clk_pins_a: qspi-clk-0 {
  45. pins {
  46. pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
  47. bias-disable;
  48. drive-push-pull;
  49. slew-rate = <3>;
  50. };
  51. };
  52. /omit-if-no-ref/
  53. qspi_bk1_pins_a: qspi-bk1-0 {
  54. pins {
  55. pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
  56. <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
  57. <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
  58. <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
  59. bias-disable;
  60. drive-push-pull;
  61. slew-rate = <1>;
  62. };
  63. };
  64. /omit-if-no-ref/
  65. qspi_bk2_pins_a: qspi-bk2-0 {
  66. pins {
  67. pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
  68. <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
  69. <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
  70. <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
  71. bias-disable;
  72. drive-push-pull;
  73. slew-rate = <1>;
  74. };
  75. };
  76. /omit-if-no-ref/
  77. qspi_cs1_pins_a: qspi-cs1-0 {
  78. pins {
  79. pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
  80. bias-pull-up;
  81. drive-push-pull;
  82. slew-rate = <1>;
  83. };
  84. };
  85. /omit-if-no-ref/
  86. qspi_cs2_pins_a: qspi-cs2-0 {
  87. pins {
  88. pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
  89. bias-pull-up;
  90. drive-push-pull;
  91. slew-rate = <1>;
  92. };
  93. };
  94. /omit-if-no-ref/
  95. sdmmc1_b4_pins_a: sdmmc1-b4-0 {
  96. pins1 {
  97. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  98. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  99. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  100. <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  101. <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  102. slew-rate = <1>;
  103. drive-push-pull;
  104. bias-disable;
  105. };
  106. pins2 {
  107. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  108. slew-rate = <2>;
  109. drive-push-pull;
  110. bias-disable;
  111. };
  112. };
  113. /omit-if-no-ref/
  114. sdmmc1_dir_pins_a: sdmmc1-dir-0 {
  115. pins1 {
  116. pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
  117. <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
  118. <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
  119. slew-rate = <1>;
  120. drive-push-pull;
  121. bias-pull-up;
  122. };
  123. pins2 {
  124. pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
  125. bias-pull-up;
  126. };
  127. };
  128. /omit-if-no-ref/
  129. sdmmc1_dir_pins_b: sdmmc1-dir-1 {
  130. pins1 {
  131. pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
  132. <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
  133. <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
  134. slew-rate = <1>;
  135. drive-push-pull;
  136. bias-pull-up;
  137. };
  138. pins2 {
  139. pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
  140. bias-pull-up;
  141. };
  142. };
  143. /omit-if-no-ref/
  144. sdmmc2_b4_pins_a: sdmmc2-b4-0 {
  145. pins1 {
  146. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  147. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  148. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  149. <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
  150. <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  151. slew-rate = <1>;
  152. drive-push-pull;
  153. bias-pull-up;
  154. };
  155. pins2 {
  156. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  157. slew-rate = <2>;
  158. drive-push-pull;
  159. bias-pull-up;
  160. };
  161. };
  162. /omit-if-no-ref/
  163. sdmmc2_b4_pins_b: sdmmc2-b4-1 {
  164. pins1 {
  165. pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
  166. <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
  167. <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
  168. <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
  169. <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  170. slew-rate = <1>;
  171. drive-push-pull;
  172. bias-disable;
  173. };
  174. pins2 {
  175. pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
  176. slew-rate = <2>;
  177. drive-push-pull;
  178. bias-disable;
  179. };
  180. };
  181. /omit-if-no-ref/
  182. sdmmc2_d47_pins_a: sdmmc2-d47-0 {
  183. pins {
  184. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  185. <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
  186. <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
  187. <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
  188. slew-rate = <1>;
  189. drive-push-pull;
  190. bias-pull-up;
  191. };
  192. };
  193. /omit-if-no-ref/
  194. sdmmc2_d47_pins_b: sdmmc2-d47-1 {
  195. pins {
  196. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  197. <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
  198. <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
  199. <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
  200. slew-rate = <1>;
  201. drive-push-pull;
  202. bias-disable;
  203. };
  204. };
  205. /omit-if-no-ref/
  206. sdmmc2_d47_pins_c: sdmmc2-d47-2 {
  207. pins {
  208. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  209. <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
  210. <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
  211. <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
  212. slew-rate = <1>;
  213. drive-push-pull;
  214. bias-pull-up;
  215. };
  216. };
  217. /omit-if-no-ref/
  218. sdmmc2_d47_pins_d: sdmmc2-d47-3 {
  219. pins {
  220. pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
  221. <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
  222. <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
  223. <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
  224. };
  225. };
  226. /omit-if-no-ref/
  227. uart4_pins_a: uart4-0 {
  228. pins1 {
  229. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  230. bias-disable;
  231. drive-push-pull;
  232. slew-rate = <0>;
  233. };
  234. pins2 {
  235. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  236. bias-disable;
  237. };
  238. };
  239. /omit-if-no-ref/
  240. uart4_pins_b: uart4-1 {
  241. pins1 {
  242. pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
  243. bias-disable;
  244. drive-push-pull;
  245. slew-rate = <0>;
  246. };
  247. pins2 {
  248. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  249. bias-disable;
  250. };
  251. };
  252. /omit-if-no-ref/
  253. uart7_pins_a: uart7-0 {
  254. pins1 {
  255. pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
  256. bias-disable;
  257. drive-push-pull;
  258. slew-rate = <0>;
  259. };
  260. pins2 {
  261. pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
  262. <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
  263. <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
  264. bias-disable;
  265. };
  266. };
  267. /omit-if-no-ref/
  268. uart7_pins_b: uart7-1 {
  269. pins1 {
  270. pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
  271. bias-disable;
  272. drive-push-pull;
  273. slew-rate = <0>;
  274. };
  275. pins2 {
  276. pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
  277. bias-disable;
  278. };
  279. };
  280. /omit-if-no-ref/
  281. uart7_pins_c: uart7-2 {
  282. pins1 {
  283. pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
  284. bias-disable;
  285. drive-push-pull;
  286. slew-rate = <0>;
  287. };
  288. pins2 {
  289. pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
  290. bias-pull-up;
  291. };
  292. };
  293. /omit-if-no-ref/
  294. uart8_pins_a: uart8-0 {
  295. pins1 {
  296. pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
  297. bias-disable;
  298. drive-push-pull;
  299. slew-rate = <0>;
  300. };
  301. pins2 {
  302. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
  303. bias-disable;
  304. };
  305. };
  306. /omit-if-no-ref/
  307. usart2_pins_a: usart2-0 {
  308. pins1 {
  309. pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
  310. <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
  311. bias-disable;
  312. drive-push-pull;
  313. slew-rate = <0>;
  314. };
  315. pins2 {
  316. pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
  317. <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
  318. bias-disable;
  319. };
  320. };
  321. /omit-if-no-ref/
  322. usart2_pins_b: usart2-1 {
  323. pins1 {
  324. pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
  325. <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
  326. bias-disable;
  327. drive-push-pull;
  328. slew-rate = <0>;
  329. };
  330. pins2 {
  331. pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
  332. <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
  333. bias-disable;
  334. };
  335. };
  336. /omit-if-no-ref/
  337. usart2_pins_c: usart2-2 {
  338. pins1 {
  339. pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
  340. <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
  341. bias-disable;
  342. drive-push-pull;
  343. slew-rate = <0>;
  344. };
  345. pins2 {
  346. pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
  347. <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
  348. bias-disable;
  349. };
  350. };
  351. /omit-if-no-ref/
  352. usart3_pins_a: usart3-0 {
  353. pins1 {
  354. pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
  355. bias-disable;
  356. drive-push-pull;
  357. slew-rate = <0>;
  358. };
  359. pins2 {
  360. pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
  361. bias-disable;
  362. };
  363. };
  364. /omit-if-no-ref/
  365. usart3_pins_b: usart3-1 {
  366. pins1 {
  367. pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
  368. <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
  369. bias-disable;
  370. drive-push-pull;
  371. slew-rate = <0>;
  372. };
  373. pins2 {
  374. pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
  375. <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
  376. bias-disable;
  377. };
  378. };
  379. /omit-if-no-ref/
  380. usart3_pins_c: usart3-2 {
  381. pins1 {
  382. pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
  383. <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
  384. bias-disable;
  385. drive-push-pull;
  386. slew-rate = <0>;
  387. };
  388. pins2 {
  389. pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
  390. <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
  391. bias-disable;
  392. };
  393. };
  394. /omit-if-no-ref/
  395. usbotg_hs_pins_a: usbotg-hs-0 {
  396. pins {
  397. pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
  398. };
  399. };
  400. /omit-if-no-ref/
  401. usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
  402. pins {
  403. pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
  404. <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
  405. };
  406. };
  407. };
  408. &pinctrl_z {
  409. /omit-if-no-ref/
  410. i2c4_pins_a: i2c4-0 {
  411. pins {
  412. pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
  413. <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
  414. bias-disable;
  415. drive-open-drain;
  416. slew-rate = <0>;
  417. };
  418. };
  419. };