stm32mp15xx-dkx.dtsi 6.6 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (c) 2019-2024, STMicroelectronics - All Rights Reserved
  4. * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
  5. */
  6. #include <dt-bindings/clock/stm32mp1-clksrc.h>
  7. #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
  8. / {
  9. aliases {
  10. serial0 = &uart4;
  11. serial1 = &usart3;
  12. serial2 = &uart7;
  13. };
  14. memory@c0000000 {
  15. device_type = "memory";
  16. reg = <0xc0000000 0x20000000>;
  17. };
  18. vin: vin {
  19. compatible = "regulator-fixed";
  20. regulator-name = "vin";
  21. regulator-min-microvolt = <5000000>;
  22. regulator-max-microvolt = <5000000>;
  23. regulator-always-on;
  24. };
  25. };
  26. &bsec {
  27. board_id: board-id@ec {
  28. reg = <0xec 0x4>;
  29. st,non-secure-otp;
  30. };
  31. };
  32. &clk_hse {
  33. st,digbypass;
  34. };
  35. &cpu0 {
  36. cpu-supply = <&vddcore>;
  37. };
  38. &cpu1 {
  39. cpu-supply = <&vddcore>;
  40. };
  41. &hash1 {
  42. status = "okay";
  43. };
  44. &i2c4 {
  45. pinctrl-names = "default";
  46. pinctrl-0 = <&i2c4_pins_a>;
  47. i2c-scl-rising-time-ns = <185>;
  48. i2c-scl-falling-time-ns = <20>;
  49. clock-frequency = <400000>;
  50. status = "okay";
  51. pmic: stpmic@33 {
  52. compatible = "st,stpmic1";
  53. reg = <0x33>;
  54. interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
  55. interrupt-controller;
  56. #interrupt-cells = <2>;
  57. status = "okay";
  58. regulators {
  59. compatible = "st,stpmic1-regulators";
  60. buck1-supply = <&vin>;
  61. buck2-supply = <&vin>;
  62. buck3-supply = <&vin>;
  63. buck4-supply = <&vin>;
  64. ldo1-supply = <&v3v3>;
  65. ldo2-supply = <&vin>;
  66. ldo3-supply = <&vdd_ddr>;
  67. ldo4-supply = <&vin>;
  68. ldo5-supply = <&vin>;
  69. ldo6-supply = <&v3v3>;
  70. vref_ddr-supply = <&vin>;
  71. boost-supply = <&vin>;
  72. pwr_sw1-supply = <&bst_out>;
  73. pwr_sw2-supply = <&bst_out>;
  74. vddcore: buck1 {
  75. regulator-name = "vddcore";
  76. regulator-min-microvolt = <1200000>;
  77. regulator-max-microvolt = <1350000>;
  78. regulator-always-on;
  79. regulator-initial-mode = <0>;
  80. regulator-over-current-protection;
  81. };
  82. vdd_ddr: buck2 {
  83. regulator-name = "vdd_ddr";
  84. regulator-min-microvolt = <1350000>;
  85. regulator-max-microvolt = <1350000>;
  86. regulator-always-on;
  87. regulator-initial-mode = <0>;
  88. regulator-over-current-protection;
  89. };
  90. vdd: buck3 {
  91. regulator-name = "vdd";
  92. regulator-min-microvolt = <3300000>;
  93. regulator-max-microvolt = <3300000>;
  94. regulator-always-on;
  95. st,mask-reset;
  96. regulator-initial-mode = <0>;
  97. regulator-over-current-protection;
  98. };
  99. v3v3: buck4 {
  100. regulator-name = "v3v3";
  101. regulator-min-microvolt = <3300000>;
  102. regulator-max-microvolt = <3300000>;
  103. regulator-always-on;
  104. regulator-over-current-protection;
  105. regulator-initial-mode = <0>;
  106. };
  107. v1v8_audio: ldo1 {
  108. regulator-name = "v1v8_audio";
  109. regulator-min-microvolt = <1800000>;
  110. regulator-max-microvolt = <1800000>;
  111. regulator-always-on;
  112. };
  113. v3v3_hdmi: ldo2 {
  114. regulator-name = "v3v3_hdmi";
  115. regulator-min-microvolt = <3300000>;
  116. regulator-max-microvolt = <3300000>;
  117. regulator-always-on;
  118. };
  119. vtt_ddr: ldo3 {
  120. regulator-name = "vtt_ddr";
  121. regulator-always-on;
  122. regulator-over-current-protection;
  123. st,regulator-sink-source;
  124. };
  125. vdd_usb: ldo4 {
  126. regulator-name = "vdd_usb";
  127. regulator-min-microvolt = <3300000>;
  128. regulator-max-microvolt = <3300000>;
  129. };
  130. vdda: ldo5 {
  131. regulator-name = "vdda";
  132. regulator-min-microvolt = <2900000>;
  133. regulator-max-microvolt = <2900000>;
  134. regulator-boot-on;
  135. };
  136. v1v2_hdmi: ldo6 {
  137. regulator-name = "v1v2_hdmi";
  138. regulator-min-microvolt = <1200000>;
  139. regulator-max-microvolt = <1200000>;
  140. regulator-always-on;
  141. };
  142. vref_ddr: vref_ddr {
  143. regulator-name = "vref_ddr";
  144. regulator-always-on;
  145. };
  146. bst_out: boost {
  147. regulator-name = "bst_out";
  148. };
  149. vbus_otg: pwr_sw1 {
  150. regulator-name = "vbus_otg";
  151. };
  152. vbus_sw: pwr_sw2 {
  153. regulator-name = "vbus_sw";
  154. regulator-active-discharge = <1>;
  155. };
  156. };
  157. };
  158. };
  159. &iwdg2 {
  160. timeout-sec = <32>;
  161. status = "okay";
  162. };
  163. &pwr_regulators {
  164. vdd-supply = <&vdd>;
  165. vdd_3v3_usbfs-supply = <&vdd_usb>;
  166. };
  167. &rcc {
  168. st,clksrc = <
  169. CLK_MPU_PLL1P
  170. CLK_AXI_PLL2P
  171. CLK_MCU_PLL3P
  172. CLK_MCO1_DISABLED
  173. CLK_MCO2_DISABLED
  174. CLK_CKPER_HSE
  175. CLK_FMC_ACLK
  176. CLK_QSPI_ACLK
  177. CLK_ETH_PLL4P
  178. CLK_SDMMC12_PLL4P
  179. CLK_DSI_DSIPLL
  180. CLK_STGEN_HSE
  181. CLK_USBPHY_HSE
  182. CLK_SPI2S1_PLL3Q
  183. CLK_SPI2S23_PLL3Q
  184. CLK_SPI45_HSI
  185. CLK_SPI6_HSI
  186. CLK_I2C46_HSI
  187. CLK_SDMMC3_PLL4P
  188. CLK_USBO_USBPHY
  189. CLK_ADC_CKPER
  190. CLK_CEC_LSE
  191. CLK_I2C12_HSI
  192. CLK_I2C35_HSI
  193. CLK_UART1_HSI
  194. CLK_UART24_HSI
  195. CLK_UART35_HSI
  196. CLK_UART6_HSI
  197. CLK_UART78_HSI
  198. CLK_SPDIF_PLL4P
  199. CLK_FDCAN_PLL4R
  200. CLK_SAI1_PLL3Q
  201. CLK_SAI2_PLL3Q
  202. CLK_SAI3_PLL3Q
  203. CLK_SAI4_PLL3Q
  204. CLK_RNG1_CSI
  205. CLK_RNG2_LSI
  206. CLK_LPTIM1_PCLK1
  207. CLK_LPTIM23_PCLK3
  208. CLK_LPTIM45_LSE
  209. >;
  210. st,clkdiv = <
  211. DIV(DIV_MPU, 1)
  212. DIV(DIV_AXI, 0)
  213. DIV(DIV_MCU, 0)
  214. DIV(DIV_APB1, 1)
  215. DIV(DIV_APB2, 1)
  216. DIV(DIV_APB3, 1)
  217. DIV(DIV_APB4, 1)
  218. DIV(DIV_APB5, 2)
  219. DIV(DIV_MCO1, 0)
  220. DIV(DIV_MCO2, 0)
  221. >;
  222. st,pll_vco {
  223. pll2_vco_1066Mhz: pll2-vco-1066Mhz {
  224. src = <CLK_PLL12_HSE>;
  225. divmn = <2 65>;
  226. frac = <0x1400>;
  227. };
  228. pll3_vco_417Mhz: pll3-vco-417Mhz {
  229. src = <CLK_PLL3_HSE>;
  230. divmn = <1 33>;
  231. frac = <0x1a04>;
  232. };
  233. pll4_vco_594Mhz: pll4-vco-594Mhz {
  234. src = <CLK_PLL4_HSE>;
  235. divmn = <3 98>;
  236. };
  237. };
  238. /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
  239. pll2: st,pll@1 {
  240. compatible = "st,stm32mp1-pll";
  241. reg = <1>;
  242. st,pll = <&pll2_cfg1>;
  243. pll2_cfg1: pll2_cfg1 {
  244. st,pll_vco = <&pll2_vco_1066Mhz>;
  245. st,pll_div_pqr = <1 0 0>;
  246. };
  247. };
  248. /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
  249. pll3: st,pll@2 {
  250. compatible = "st,stm32mp1-pll";
  251. reg = <2>;
  252. st,pll = <&pll3_cfg1>;
  253. pll3_cfg1: pll3_cfg1 {
  254. st,pll_vco = <&pll3_vco_417Mhz>;
  255. st,pll_div_pqr = <1 16 36>;
  256. };
  257. };
  258. /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
  259. pll4: st,pll@3 {
  260. compatible = "st,stm32mp1-pll";
  261. reg = <3>;
  262. st,pll = <&pll4_cfg1>;
  263. pll4_cfg1: pll4_cfg1 {
  264. st,pll_vco = <&pll4_vco_594Mhz>;
  265. st,pll_div_pqr = <5 7 7>;
  266. };
  267. };
  268. };
  269. &rng1 {
  270. status = "okay";
  271. };
  272. &rtc {
  273. status = "okay";
  274. };
  275. &sdmmc1 {
  276. pinctrl-names = "default";
  277. pinctrl-0 = <&sdmmc1_b4_pins_a>;
  278. disable-wp;
  279. st,neg-edge;
  280. bus-width = <4>;
  281. vmmc-supply = <&v3v3>;
  282. status = "okay";
  283. };
  284. &uart4 {
  285. pinctrl-names = "default";
  286. pinctrl-0 = <&uart4_pins_a>;
  287. status = "okay";
  288. };
  289. &uart7 {
  290. pinctrl-names = "default";
  291. pinctrl-0 = <&uart7_pins_c>;
  292. status = "disabled";
  293. };
  294. &usart3 {
  295. pinctrl-names = "default";
  296. pinctrl-0 = <&usart3_pins_c>;
  297. uart-has-rtscts;
  298. status = "disabled";
  299. };
  300. &usbotg_hs {
  301. phys = <&usbphyc_port1 0>;
  302. phy-names = "usb2-phy";
  303. usb-role-switch;
  304. status = "okay";
  305. };
  306. &usbphyc {
  307. status = "okay";
  308. };
  309. &usbphyc_port0 {
  310. phy-supply = <&vdd_usb>;
  311. };
  312. &usbphyc_port1 {
  313. phy-supply = <&vdd_usb>;
  314. };