stm32mp15-resets.h 2.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
  2. /*
  3. * Copyright (C) STMicroelectronics 2018-2022 - All Rights Reserved
  4. * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
  5. */
  6. #ifndef _DT_BINDINGS_STM32MP15_RESET_H_
  7. #define _DT_BINDINGS_STM32MP15_RESET_H_
  8. #define MCU_HOLD_BOOT_R 2144
  9. #define LTDC_R 3072
  10. #define DSI_R 3076
  11. #define DDRPERFM_R 3080
  12. #define USBPHY_R 3088
  13. #define SPI6_R 3136
  14. #define I2C4_R 3138
  15. #define I2C6_R 3139
  16. #define USART1_R 3140
  17. #define STGEN_R 3156
  18. #define GPIOZ_R 3200
  19. #define CRYP1_R 3204
  20. #define HASH1_R 3205
  21. #define RNG1_R 3206
  22. #define AXIM_R 3216
  23. #define GPU_R 3269
  24. #define ETHMAC_R 3274
  25. #define FMC_R 3276
  26. #define QSPI_R 3278
  27. #define SDMMC1_R 3280
  28. #define SDMMC2_R 3281
  29. #define CRC1_R 3284
  30. #define USBH_R 3288
  31. #define MDMA_R 3328
  32. #define MCU_R 8225
  33. #define TIM2_R 19456
  34. #define TIM3_R 19457
  35. #define TIM4_R 19458
  36. #define TIM5_R 19459
  37. #define TIM6_R 19460
  38. #define TIM7_R 19461
  39. #define TIM12_R 16462
  40. #define TIM13_R 16463
  41. #define TIM14_R 16464
  42. #define LPTIM1_R 19465
  43. #define SPI2_R 19467
  44. #define SPI3_R 19468
  45. #define USART2_R 19470
  46. #define USART3_R 19471
  47. #define UART4_R 19472
  48. #define UART5_R 19473
  49. #define UART7_R 19474
  50. #define UART8_R 19475
  51. #define I2C1_R 19477
  52. #define I2C2_R 19478
  53. #define I2C3_R 19479
  54. #define I2C5_R 19480
  55. #define SPDIF_R 19482
  56. #define CEC_R 19483
  57. #define DAC12_R 19485
  58. #define MDIO_R 19847
  59. #define TIM1_R 19520
  60. #define TIM8_R 19521
  61. #define TIM15_R 19522
  62. #define TIM16_R 19523
  63. #define TIM17_R 19524
  64. #define SPI1_R 19528
  65. #define SPI4_R 19529
  66. #define SPI5_R 19530
  67. #define USART6_R 19533
  68. #define SAI1_R 19536
  69. #define SAI2_R 19537
  70. #define SAI3_R 19538
  71. #define DFSDM_R 19540
  72. #define FDCAN_R 19544
  73. #define LPTIM2_R 19584
  74. #define LPTIM3_R 19585
  75. #define LPTIM4_R 19586
  76. #define LPTIM5_R 19587
  77. #define SAI4_R 19592
  78. #define SYSCFG_R 19595
  79. #define VREF_R 19597
  80. #define TMPSENS_R 19600
  81. #define PMBCTRL_R 19601
  82. #define DMA1_R 19648
  83. #define DMA2_R 19649
  84. #define DMAMUX_R 19650
  85. #define ADC12_R 19653
  86. #define USBO_R 19656
  87. #define SDMMC3_R 19664
  88. #define CAMITF_R 19712
  89. #define CRYP2_R 19716
  90. #define HASH2_R 19717
  91. #define RNG2_R 19718
  92. #define CRC2_R 19719
  93. #define HSEM_R 19723
  94. #define MBOX_R 19724
  95. #define GPIOA_R 19776
  96. #define GPIOB_R 19777
  97. #define GPIOC_R 19778
  98. #define GPIOD_R 19779
  99. #define GPIOE_R 19780
  100. #define GPIOF_R 19781
  101. #define GPIOG_R 19782
  102. #define GPIOH_R 19783
  103. #define GPIOI_R 19784
  104. #define GPIOJ_R 19785
  105. #define GPIOK_R 19786
  106. /* SCMI reset domain identifiers */
  107. #define RST_SCMI0_SPI6 0
  108. #define RST_SCMI0_I2C4 1
  109. #define RST_SCMI0_I2C6 2
  110. #define RST_SCMI0_USART1 3
  111. #define RST_SCMI0_STGEN 4
  112. #define RST_SCMI0_GPIOZ 5
  113. #define RST_SCMI0_CRYP1 6
  114. #define RST_SCMI0_HASH1 7
  115. #define RST_SCMI0_RNG1 8
  116. #define RST_SCMI0_MDMA 9
  117. #define RST_SCMI0_MCU 10
  118. #define RST_SCMI0_MCU_HOLD_BOOT 11
  119. #endif /* _DT_BINDINGS_STM32MP15_RESET_H_ */