coreboot.h 1.2 KB

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  1. /*
  2. * Copyright (c) 2017-2020, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef COREBOOT_H
  7. #define COREBOOT_H
  8. #include <stdint.h>
  9. typedef struct {
  10. uint32_t type; /* always 2 (memory-mapped) on ARM */
  11. uint32_t baseaddr;
  12. uint32_t baud;
  13. uint32_t regwidth; /* in bytes, i.e. usually 4 */
  14. uint32_t input_hertz;
  15. uint32_t uart_pci_addr; /* unused on current ARM systems */
  16. } coreboot_serial_t;
  17. extern coreboot_serial_t coreboot_serial;
  18. #define COREBOOT_MAX_MEMRANGES 32 /* libpayload also uses this limit */
  19. typedef struct __packed {
  20. uint64_t start;
  21. uint64_t size;
  22. uint32_t type;
  23. } coreboot_memrange_t;
  24. extern coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
  25. typedef enum {
  26. CB_MEM_NONE = 0, /* coreboot will never report this */
  27. CB_MEM_RAM = 1,
  28. CB_MEM_RESERVED = 2,
  29. CB_MEM_ACPI = 3,
  30. CB_MEM_NVS = 4,
  31. CB_MEM_UNUSABLE = 5,
  32. CB_MEM_VENDOR_RSVD = 6,
  33. CB_MEM_TABLE = 16,
  34. } coreboot_memory_t;
  35. coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size);
  36. void coreboot_table_setup(void *base);
  37. void coreboot_get_table_location(uint64_t *address, uint32_t *size);
  38. #endif /* COREBOOT_H */