xlat_mpu_private.h 2.9 KB

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  1. /*
  2. * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef XLAT_MPU_PRIVATE_H
  7. #define XLAT_MPU_PRIVATE_H
  8. #include <stdbool.h>
  9. #include <lib/xlat_tables/xlat_tables_defs.h>
  10. #include <lib/xlat_tables/xlat_tables_v2.h>
  11. #include <platform_def.h>
  12. #if PLAT_XLAT_TABLES_DYNAMIC
  13. /*
  14. * Private shifts and masks to access fields of an mmap attribute
  15. */
  16. /* Dynamic or static */
  17. #define MT_DYN_SHIFT U(31)
  18. /*
  19. * Memory mapping private attributes
  20. *
  21. * Private attributes not exposed in the public header.
  22. */
  23. #endif /* PLAT_XLAT_TABLES_DYNAMIC */
  24. /* Calculate region-attributes byte for PRBAR part of MPU-region descriptor: */
  25. uint64_t prbar_attr_value(uint32_t attr);
  26. /* Calculate region-attributes byte for PRLAR part of MPU-region descriptor: */
  27. uint64_t prlar_attr_value(uint32_t attr);
  28. /* Calculates the attr value for a given PRBAR and PRLAR entry value: */
  29. uint32_t region_attr(uint64_t prbar_attr, uint64_t prlar_attr);
  30. #define PRBAR_PRLAR_ADDR_MASK UL(0xffffffffffc0)
  31. /* mask for PRBAR & PRLAR MPU-region field */
  32. /* MPU region attribute bit fields: */
  33. #define PRBAR_SH_SHIFT UL(4)
  34. #define PRBAR_SH_MASK UL(0x3)
  35. #define PRBAR_AP_SHIFT UL(2)
  36. #define PRBAR_AP_MASK UL(0x3)
  37. #define PRBAR_XN_SHIFT UL(1)
  38. #define PRBAR_XN_MASK UL(0x3)
  39. #define PRLAR_NS_SHIFT UL(4)
  40. #define PRLAR_NS_MASK UL(0x3)
  41. #define PRBAR_ATTR_SHIFT UL(0)
  42. #define PRBAR_ATTR_MASK UL(0x3f)
  43. #define PRLAR_ATTR_SHIFT UL(1)
  44. #define PRLAR_ATTR_MASK UL(0x7)
  45. #define PRLAR_EN_SHIFT UL(0)
  46. #define PRLAR_EN_MASK UL(0x1)
  47. /* Aspects of the source attributes not defined elsewhere: */
  48. #define MT_PERM_MASK UL(0x1)
  49. #define MT_SEC_MASK UL(0x1)
  50. #define MT_EXECUTE_MASK UL(0x3)
  51. #define MT_TYPE_SHIFT UL(0)
  52. extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
  53. /*
  54. * Return the execute-never mask that will prevent instruction fetch at the
  55. * given translation regime.
  56. */
  57. uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime);
  58. /* Print VA, PA, size and attributes of all regions in the mmap array. */
  59. void xlat_mmap_print(const mmap_region_t *mmap);
  60. /*
  61. * Print the current state of the translation tables by reading them from
  62. * memory.
  63. */
  64. void xlat_tables_print(xlat_ctx_t *ctx);
  65. /*
  66. * Returns a block/page table descriptor for the given level and attributes.
  67. */
  68. uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
  69. unsigned long long addr_pa, unsigned int level);
  70. /*
  71. * Architecture-specific initialization code.
  72. */
  73. /* Returns the current Exception Level. The returned EL must be 1 or higher. */
  74. unsigned int xlat_arch_current_el(void);
  75. /*
  76. * Returns true if the MMU of the translation regime managed by the given
  77. * xlat_ctx_t is enabled, false otherwise.
  78. */
  79. bool is_mpu_enabled_ctx(const xlat_ctx_t *ctx);
  80. /*
  81. * Returns minimum virtual address space size supported by the architecture
  82. */
  83. uintptr_t xlat_get_min_virt_addr_space_size(void);
  84. #endif /* XLAT_MPU_PRIVATE_H */