platform.mk 5.3 KB

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  1. #
  2. # Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
  3. #
  4. # SPDX-License-Identifier: BSD-3-Clause
  5. #
  6. # Non-TF Boot ROM
  7. RESET_TO_BL2 := 1
  8. # On Hikey, the TSP can execute from TZC secure area in DRAM (default)
  9. # or SRAM.
  10. HIKEY_TSP_RAM_LOCATION ?= dram
  11. ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
  12. HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
  13. else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
  14. HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
  15. else
  16. $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
  17. endif
  18. CONSOLE_BASE := PL011_UART3_BASE
  19. CRASH_CONSOLE_BASE := PL011_UART3_BASE
  20. PLAT_PARTITION_MAX_ENTRIES := 12
  21. PLAT_PL061_MAX_GPIOS := 160
  22. COLD_BOOT_SINGLE_CPU := 1
  23. PROGRAMMABLE_RESET_ADDRESS := 1
  24. ENABLE_SVE_FOR_NS := 0
  25. # Process flags
  26. $(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
  27. $(eval $(call add_define,CONSOLE_BASE))
  28. $(eval $(call add_define,CRASH_CONSOLE_BASE))
  29. $(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
  30. $(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
  31. # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
  32. # in the FIP if the platform requires.
  33. ifneq ($(BL32_EXTRA1),)
  34. $(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
  35. endif
  36. ifneq ($(BL32_EXTRA2),)
  37. $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
  38. endif
  39. USE_COHERENT_MEM := 1
  40. PLAT_INCLUDES := -Iplat/hisilicon/hikey/include
  41. PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
  42. lib/xlat_tables/aarch64/xlat_tables.c \
  43. lib/xlat_tables/xlat_tables_common.c \
  44. plat/hisilicon/hikey/aarch64/hikey_common.c
  45. BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
  46. drivers/arm/pl061/pl061_gpio.c \
  47. drivers/arm/sp804/sp804_delay_timer.c \
  48. drivers/delay_timer/delay_timer.c \
  49. drivers/gpio/gpio.c \
  50. drivers/io/io_block.c \
  51. drivers/io/io_fip.c \
  52. drivers/io/io_storage.c \
  53. drivers/mmc/mmc.c \
  54. drivers/synopsys/emmc/dw_mmc.c \
  55. lib/cpus/aarch64/cortex_a53.S \
  56. plat/hisilicon/hikey/aarch64/hikey_helpers.S \
  57. plat/hisilicon/hikey/hikey_bl1_setup.c \
  58. plat/hisilicon/hikey/hikey_bl_common.c \
  59. plat/hisilicon/hikey/hikey_io_storage.c
  60. BL2_SOURCES += common/desc_image_load.c \
  61. drivers/arm/pl061/pl061_gpio.c \
  62. drivers/arm/sp804/sp804_delay_timer.c \
  63. drivers/delay_timer/delay_timer.c \
  64. drivers/gpio/gpio.c \
  65. drivers/io/io_block.c \
  66. drivers/io/io_fip.c \
  67. drivers/io/io_storage.c \
  68. drivers/mmc/mmc.c \
  69. drivers/partition/gpt.c \
  70. drivers/partition/partition.c \
  71. drivers/synopsys/emmc/dw_mmc.c \
  72. lib/cpus/aarch64/cortex_a53.S \
  73. plat/hisilicon/hikey/aarch64/hikey_helpers.S \
  74. plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
  75. plat/hisilicon/hikey/hikey_bl2_setup.c \
  76. plat/hisilicon/hikey/hikey_bl_common.c \
  77. plat/hisilicon/hikey/hikey_security.c \
  78. plat/hisilicon/hikey/hikey_ddr.c \
  79. plat/hisilicon/hikey/hikey_image_load.c \
  80. plat/hisilicon/hikey/hikey_io_storage.c \
  81. plat/hisilicon/hikey/hisi_dvfs.c \
  82. plat/hisilicon/hikey/hisi_mcu.c
  83. ifeq (${SPD},opteed)
  84. BL2_SOURCES += lib/optee/optee_utils.c
  85. endif
  86. include lib/zlib/zlib.mk
  87. PLAT_INCLUDES += -Ilib/zlib
  88. BL2_SOURCES += $(ZLIB_SOURCES)
  89. HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
  90. drivers/arm/gic/v2/gicv2_main.c \
  91. drivers/arm/gic/v2/gicv2_helpers.c \
  92. plat/common/plat_gicv2.c
  93. BL31_SOURCES += drivers/arm/cci/cci.c \
  94. drivers/arm/sp804/sp804_delay_timer.c \
  95. drivers/delay_timer/delay_timer.c \
  96. lib/cpus/aarch64/cortex_a53.S \
  97. plat/common/plat_psci_common.c \
  98. plat/hisilicon/hikey/aarch64/hikey_helpers.S \
  99. plat/hisilicon/hikey/hikey_bl31_setup.c \
  100. plat/hisilicon/hikey/hikey_pm.c \
  101. plat/hisilicon/hikey/hikey_topology.c \
  102. plat/hisilicon/hikey/hisi_ipc.c \
  103. plat/hisilicon/hikey/hisi_pwrc.c \
  104. plat/hisilicon/hikey/hisi_pwrc_sram.S \
  105. ${HIKEY_GIC_SOURCES}
  106. ifeq (${ENABLE_PMF}, 1)
  107. BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \
  108. lib/pmf/pmf_smc.c
  109. endif
  110. ifneq (${TRUSTED_BOARD_BOOT},0)
  111. include drivers/auth/mbedtls/mbedtls_crypto.mk
  112. include drivers/auth/mbedtls/mbedtls_x509.mk
  113. AUTH_SOURCES := drivers/auth/auth_mod.c \
  114. drivers/auth/crypto_mod.c \
  115. drivers/auth/img_parser_mod.c \
  116. drivers/auth/tbbr/tbbr_cot_common.c
  117. BL1_SOURCES += ${AUTH_SOURCES} \
  118. plat/common/tbbr/plat_tbbr.c \
  119. plat/hisilicon/hikey/hikey_tbbr.c \
  120. plat/hisilicon/hikey/hikey_rotpk.S \
  121. drivers/auth/tbbr/tbbr_cot_bl1.c
  122. BL2_SOURCES += ${AUTH_SOURCES} \
  123. plat/common/tbbr/plat_tbbr.c \
  124. plat/hisilicon/hikey/hikey_tbbr.c \
  125. plat/hisilicon/hikey/hikey_rotpk.S \
  126. drivers/auth/tbbr/tbbr_cot_bl2.c
  127. ROT_KEY = $(BUILD_PLAT)/rot_key.pem
  128. ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
  129. $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
  130. $(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH)
  131. $(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH)
  132. certificates: $(ROT_KEY)
  133. $(ROT_KEY): | $$(@D)/
  134. $(s)echo " OPENSSL $@"
  135. $(q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null
  136. $(ROTPK_HASH): $(ROT_KEY) | $$(@D)/
  137. $(s)echo " OPENSSL $@"
  138. $(q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
  139. ${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
  140. endif
  141. # Enable workarounds for selected Cortex-A53 errata.
  142. ERRATA_A53_836870 := 1
  143. ERRATA_A53_843419 := 1
  144. ERRATA_A53_855873 := 1
  145. WORKAROUND_CVE_2017_5715 := 0
  146. FIP_ALIGN := 512