picopi_bl2_el3_setup.c 4.5 KB

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  1. /*
  2. * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <platform_def.h>
  8. #include <common/debug.h>
  9. #include <drivers/console.h>
  10. #include <drivers/mmc.h>
  11. #include <lib/utils.h>
  12. #include <imx_caam.h>
  13. #include <imx_clock.h>
  14. #include <imx_io_mux.h>
  15. #include <imx_uart.h>
  16. #include <imx_usdhc.h>
  17. #include <imx7_def.h>
  18. #define UART5_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
  19. CCM_TRGT_MUX_UART5_CLK_ROOT_OSC_24M)
  20. #define USDHC_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
  21. CCM_TRGT_MUX_NAND_USDHC_BUS_CLK_ROOT_AHB |\
  22. CCM_TARGET_POST_PODF(2))
  23. #define USB_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
  24. CCM_TRGT_MUX_USB_HSIC_CLK_ROOT_SYS_PLL)
  25. #define PICOPI_UART5_RX_MUX \
  26. IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT1_UART5_RX_DATA
  27. #define PICOPI_UART5_TX_MUX \
  28. IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT1_UART5_TX_DATA
  29. #define PICOPI_SD3_FEATURES \
  30. (IOMUXC_SW_PAD_CTL_PAD_SD3_PU_47K | \
  31. IOMUXC_SW_PAD_CTL_PAD_SD3_PE | \
  32. IOMUXC_SW_PAD_CTL_PAD_SD3_HYS | \
  33. IOMUXC_SW_PAD_CTL_PAD_SD3_SLEW_SLOW | \
  34. IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_3_X6)
  35. static struct mmc_device_info mmc_info;
  36. static void picopi_setup_pinmux(void)
  37. {
  38. /* Configure UART5 TX */
  39. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_OFFSET,
  40. PICOPI_UART5_TX_MUX);
  41. /* Configure UART5 RX */
  42. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_OFFSET,
  43. PICOPI_UART5_RX_MUX);
  44. /* Configure USDHC3 */
  45. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_CLK_OFFSET, 0);
  46. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_CMD_OFFSET, 0);
  47. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA0_OFFSET, 0);
  48. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA1_OFFSET, 0);
  49. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA2_OFFSET, 0);
  50. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA3_OFFSET, 0);
  51. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA4_OFFSET, 0);
  52. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA5_OFFSET, 0);
  53. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA6_OFFSET, 0);
  54. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA7_OFFSET, 0);
  55. imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_OFFSET,
  56. IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_ALT1_SD3_CD_B);
  57. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_CLK_OFFSET,
  58. PICOPI_SD3_FEATURES);
  59. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_CMD_OFFSET,
  60. PICOPI_SD3_FEATURES);
  61. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA0_OFFSET,
  62. PICOPI_SD3_FEATURES);
  63. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA1_OFFSET,
  64. PICOPI_SD3_FEATURES);
  65. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2_OFFSET,
  66. PICOPI_SD3_FEATURES);
  67. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA3_OFFSET,
  68. PICOPI_SD3_FEATURES);
  69. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA4_OFFSET,
  70. PICOPI_SD3_FEATURES);
  71. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA5_OFFSET,
  72. PICOPI_SD3_FEATURES);
  73. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA6_OFFSET,
  74. PICOPI_SD3_FEATURES);
  75. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7_OFFSET,
  76. PICOPI_SD3_FEATURES);
  77. imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO14_OFFSET,
  78. PICOPI_SD3_FEATURES);
  79. }
  80. static void picopi_usdhc_setup(void)
  81. {
  82. imx_usdhc_params_t params;
  83. zeromem(&params, sizeof(imx_usdhc_params_t));
  84. params.reg_base = PLAT_PICOPI_BOOT_MMC_BASE;
  85. params.clk_rate = 25000000;
  86. params.bus_width = MMC_BUS_WIDTH_8;
  87. mmc_info.mmc_dev_type = MMC_IS_EMMC;
  88. imx_usdhc_init(&params, &mmc_info);
  89. }
  90. static void picopi_setup_usb_clocks(void)
  91. {
  92. uint32_t usb_en_bits = (uint32_t)USB_CLK_SELECT;
  93. imx_clock_set_usb_clk_root_bits(usb_en_bits);
  94. imx_clock_enable_usb(CCM_CCGR_ID_USB_IPG);
  95. imx_clock_enable_usb(CCM_CCGR_ID_USB_PHY_480MCLK);
  96. imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG1_PHY);
  97. imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG2_PHY);
  98. }
  99. void imx7_platform_setup(u_register_t arg1, u_register_t arg2,
  100. u_register_t arg3, u_register_t arg4)
  101. {
  102. uint32_t uart5_en_bits = (uint32_t)UART5_CLK_SELECT;
  103. uint32_t usdhc_clock_sel = PLAT_PICOPI_SD - 1;
  104. /* Initialize clocks etc */
  105. imx_clock_enable_uart(4, uart5_en_bits);
  106. imx_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT);
  107. picopi_setup_usb_clocks();
  108. /* Setup pin-muxes */
  109. picopi_setup_pinmux();
  110. picopi_usdhc_setup();
  111. }