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a3700_plat_def.h
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a4d35ff381
feat(plat/marvell/a3k): add north and south bridge reset registers
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3 years ago |
a3700_pm.h
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5993af454f
fix(plat/marvell/a3k): reset GIC before resetting via CM3 secure coprocessor
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8 months ago |
ddr_info.h
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b5c850d48d
plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs
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4 years ago |
dram_win.h
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b5c850d48d
plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs
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4 years ago |
io_addr_dec.h
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b5c850d48d
plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs
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4 years ago |
plat_macros.S
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b5c850d48d
plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs
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4 years ago |
platform_def.h
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5a91c439cb
fix(plat/marvell/a3720/uart): fix UART parent clock rate determination
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3 years ago |