mtk_bl31_setup.c 4.8 KB

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  1. /*
  2. * Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <assert.h>
  7. #include <arch.h>
  8. #include <common/bl_common.h>
  9. #include <common/debug.h>
  10. #include <drivers/delay_timer.h>
  11. #include <drivers/generic_delay_timer.h>
  12. #if XLAT_TABLES_LIB_V2 && PLAT_XLAT_TABLES_DYNAMIC
  13. #include <lib/xlat_tables/xlat_tables_v2.h>
  14. #endif
  15. #include <plat/common/platform.h>
  16. #if COREBOOT
  17. #include <common/desc_image_load.h>
  18. #include <drivers/ti/uart/uart_16550.h>
  19. #include <lib/coreboot.h>
  20. #include <plat_params.h>
  21. #endif
  22. /* MTK headers */
  23. #if MTK_SIP_KERNEL_BOOT_ENABLE
  24. #include <cold_boot.h>
  25. #endif
  26. #include <lib/mtk_init/mtk_init.h>
  27. #include <mtk_mmap_pool.h>
  28. IMPORT_SYM(uintptr_t, __RW_START__, RW_START);
  29. IMPORT_SYM(uintptr_t, __DATA_START__, DATA_START);
  30. #if COREBOOT
  31. static entry_point_info_t bl32_ep_info;
  32. static entry_point_info_t bl33_ep_info;
  33. /*******************************************************************************
  34. * Return a pointer to the 'entry_point_info' structure of the next image for
  35. * the security state specified. BL33 corresponds to the non-secure image type
  36. * while BL32 corresponds to the secure image type. A NULL pointer is returned
  37. * if the image does not exist.
  38. ******************************************************************************/
  39. entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
  40. {
  41. entry_point_info_t *next_image_info;
  42. next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
  43. assert(next_image_info->h.type == PARAM_EP);
  44. /* None of the images on this platform can have 0x0 as the entrypoint */
  45. if (next_image_info->pc) {
  46. return next_image_info;
  47. } else {
  48. return NULL;
  49. }
  50. }
  51. #else
  52. #ifndef MTK_BL31_AS_BL2
  53. static struct mtk_bl31_fw_config bl31_fw_config;
  54. #else
  55. struct mtk_bl31_fw_config bl31_fw_config;
  56. #endif
  57. /* In order to be accessed after MMU enable */
  58. static struct mtk_bl_param_t bl_param_clone;
  59. void *get_mtk_bl31_fw_config(int index)
  60. {
  61. void *arg = NULL;
  62. switch (index) {
  63. case BOOT_ARG_FROM_BL2:
  64. arg = bl31_fw_config.from_bl2;
  65. break;
  66. case BOOT_ARG_SOC_FW_CONFIG:
  67. arg = bl31_fw_config.soc_fw_config;
  68. break;
  69. case BOOT_ARG_HW_CONFIG:
  70. arg = bl31_fw_config.hw_config;
  71. break;
  72. case BOOT_ARG_RESERVED:
  73. arg = bl31_fw_config.reserved;
  74. break;
  75. default:
  76. WARN("Fail to get boot arg, index:%d", index);
  77. break;
  78. }
  79. return arg;
  80. }
  81. #endif
  82. /*****************************************************************************
  83. * Perform the very early platform specific architectural setup shared between
  84. * ARM standard platforms. This only does basic initialization. Later
  85. * architectural setup (bl31_arch_setup()) does not do anything platform
  86. * specific.
  87. ******************************************************************************/
  88. void bl31_early_platform_setup2(u_register_t from_bl2,
  89. u_register_t soc_fw_config,
  90. u_register_t hw_config, u_register_t plat_params_from_bl2)
  91. {
  92. #if COREBOOT
  93. static console_t console;
  94. params_early_setup(soc_fw_config);
  95. if (coreboot_serial.type) {
  96. console_16550_register(coreboot_serial.baseaddr,
  97. coreboot_serial.input_hertz,
  98. coreboot_serial.baud,
  99. &console);
  100. }
  101. bl31_params_parse_helper(from_bl2, &bl32_ep_info, &bl33_ep_info);
  102. #else
  103. struct mtk_bl_param_t *p_mtk_bl_param = (struct mtk_bl_param_t *)from_bl2;
  104. if (p_mtk_bl_param == NULL) {
  105. ERROR("from_bl2 should not be NULL\n");
  106. panic();
  107. }
  108. memcpy(&bl_param_clone, p_mtk_bl_param, sizeof(struct mtk_bl_param_t));
  109. bl31_fw_config.from_bl2 = (void *)&bl_param_clone;
  110. bl31_fw_config.soc_fw_config = (void *)soc_fw_config;
  111. bl31_fw_config.hw_config = (void *)hw_config;
  112. bl31_fw_config.reserved = (void *)plat_params_from_bl2;
  113. #endif
  114. INFO("MTK BL31 start\n");
  115. /* Init delay function */
  116. generic_delay_timer_init();
  117. /* Initialize module initcall */
  118. mtk_init_one_level(MTK_INIT_LVL_EARLY_PLAT);
  119. }
  120. void bl31_plat_arch_setup(void)
  121. {
  122. const mmap_region_t bl_regions[] = {
  123. MAP_BL_RO,
  124. MAP_BL_RW,
  125. #if USE_COHERENT_MEM
  126. MAP_BL_COHERENT_RAM,
  127. #endif
  128. {0},
  129. };
  130. mtk_xlat_init(bl_regions);
  131. /* Initialize module initcall */
  132. mtk_init_one_level(MTK_INIT_LVL_ARCH);
  133. }
  134. /*****************************************************************************
  135. * Perform any BL31 platform setup common to ARM standard platforms
  136. ******************************************************************************/
  137. void bl31_platform_setup(void)
  138. {
  139. mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_0);
  140. mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_1);
  141. }
  142. /*******************************************************************************
  143. * Operations before cold CPU leave BL31.
  144. * Switch console to runtime state.
  145. ******************************************************************************/
  146. void bl31_plat_runtime_setup(void)
  147. {
  148. mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME);
  149. }
  150. unsigned int plat_get_syscnt_freq2(void)
  151. {
  152. return SYS_COUNTER_FREQ_IN_HZ;
  153. }