mt_spm_cond.h 2.8 KB

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  1. /*
  2. * Copyright (c) 2023, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef MT_SPM_COND_H
  7. #define MT_SPM_COND_H
  8. #include <lpm/mt_lp_rm.h>
  9. enum plat_spm_cond {
  10. PLAT_SPM_COND_MTCMOS1 = 0,
  11. PLAT_SPM_COND_MTCMOS2,
  12. PLAT_SPM_COND_CG_INFRA_0,
  13. PLAT_SPM_COND_CG_INFRA_1,
  14. PLAT_SPM_COND_CG_INFRA_2,
  15. PLAT_SPM_COND_CG_INFRA_3,
  16. PLAT_SPM_COND_CG_INFRA_4,
  17. PLAT_SPM_COND_CG_PERI_0,
  18. PLAT_SPM_COND_CG_VPPSYS0_0,
  19. PLAT_SPM_COND_CG_VPPSYS0_1,
  20. PLAT_SPM_COND_CG_VPPSYS1_0,
  21. PLAT_SPM_COND_CG_VPPSYS1_1,
  22. PLAT_SPM_COND_CG_VDOSYS0_0,
  23. PLAT_SPM_COND_CG_VDOSYS0_1,
  24. PLAT_SPM_COND_CG_VDOSYS1_0,
  25. PLAT_SPM_COND_CG_VDOSYS1_1,
  26. PLAT_SPM_COND_CG_VDOSYS1_2,
  27. PLAT_SPM_COND_MAX,
  28. };
  29. /* For PLL id >= PLAT_SPM_COND_PLL_MAX is not checked in idle condition */
  30. enum plat_spm_cond_pll {
  31. PLAT_SPM_COND_PLL_UNIVPLL = 0,
  32. PLAT_SPM_COND_PLL_MFGPLL,
  33. PLAT_SPM_COND_PLL_MSDCPLL,
  34. PLAT_SPM_COND_PLL_TVDPLL1,
  35. PLAT_SPM_COND_PLL_TVDPLL2,
  36. PLAT_SPM_COND_PLL_MMPLL,
  37. PLAT_SPM_COND_PLL_ETHPLL,
  38. PLAT_SPM_COND_PLL_IMGPLL,
  39. PLAT_SPM_COND_PLL_APLL1,
  40. PLAT_SPM_COND_PLL_APLL2,
  41. PLAT_SPM_COND_PLL_APLL3,
  42. PLAT_SPM_COND_PLL_APLL4,
  43. PLAT_SPM_COND_PLL_APLL5,
  44. PLAT_SPM_COND_PLL_MAX,
  45. };
  46. #define PLL_BIT_MFGPLL BIT(PLAT_SPM_COND_PLL_MFGPLL)
  47. #define PLL_BIT_MMPLL BIT(PLAT_SPM_COND_PLL_MMPLL)
  48. #define PLL_BIT_UNIVPLL BIT(PLAT_SPM_COND_PLL_UNIVPLL)
  49. #define PLL_BIT_MSDCPLL BIT(PLAT_SPM_COND_PLL_MSDCPLL)
  50. #define PLL_BIT_TVDPLL1 BIT(PLAT_SPM_COND_PLL_TVDPLL1)
  51. #define PLL_BIT_TVDPLL2 BIT(PLAT_SPM_COND_PLL_TVDPLL2)
  52. #define PLL_BIT_ETHPLL BIT(PLAT_SPM_COND_PLL_ETHPLL)
  53. #define PLL_BIT_IMGPLL BIT(PLAT_SPM_COND_PLL_IMGPLL)
  54. #define PLL_BIT_APLL1 BIT(PLAT_SPM_COND_PLL_APLL1)
  55. #define PLL_BIT_APLL2 BIT(PLAT_SPM_COND_PLL_APLL2)
  56. #define PLL_BIT_APLL3 BIT(PLAT_SPM_COND_PLL_APLL3)
  57. #define PLL_BIT_APLL4 BIT(PLAT_SPM_COND_PLL_APLL4)
  58. #define PLL_BIT_APLL5 BIT(PLAT_SPM_COND_PLL_APLL5)
  59. /*
  60. * Definition about SPM_COND_CHECK_BLOCKED
  61. * bit[00:16]: cg blocking index
  62. * bit[17:29]: pll blocking index
  63. * bit[30]: pll blocking information
  64. * bit[31]: idle condition check fail
  65. */
  66. #define SPM_COND_BLOCKED_CG_IDX (0)
  67. #define SPM_COND_BLOCKED_PLL_IDX (17)
  68. #define SPM_COND_CHECK_BLOCKED_PLL BIT(30)
  69. #define SPM_COND_CHECK_FAIL BIT(31)
  70. struct mt_spm_cond_tables {
  71. char *name;
  72. unsigned int table_cg[PLAT_SPM_COND_MAX];
  73. unsigned int table_pll;
  74. unsigned int table_all_pll;
  75. void *priv;
  76. };
  77. unsigned int mt_spm_cond_check(int state_id,
  78. const struct mt_spm_cond_tables *src,
  79. const struct mt_spm_cond_tables *dest,
  80. struct mt_spm_cond_tables *res);
  81. unsigned int mt_spm_dump_all_pll(const struct mt_spm_cond_tables *src,
  82. const struct mt_spm_cond_tables *dest,
  83. struct mt_spm_cond_tables *res);
  84. int mt_spm_cond_update(struct mt_resource_constraint **con, unsigned int num,
  85. int stateid, void *priv);
  86. #endif