plat_pm.h 4.3 KB

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  1. /*
  2. * Copyright (c) 2021, MediaTek Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef PLAT_PM_H
  7. #define PLAT_PM_H
  8. #include <lib/utils_def.h>
  9. #ifndef __ASSEMBLY__
  10. extern uintptr_t mtk_suspend_footprint_addr;
  11. extern uintptr_t mtk_suspend_timestamp_addr;
  12. #define MT_PLAT_PWR_STATE_CPU U(1)
  13. #define MT_PLAT_PWR_STATE_CLUSTER U(2)
  14. #define MT_PLAT_PWR_STATE_MCUSYS U(3)
  15. #define MT_PLAT_PWR_STATE_SUSPEND2IDLE U(8)
  16. #define MT_PLAT_PWR_STATE_SYSTEM_SUSPEND U(9)
  17. #define MTK_LOCAL_STATE_RUN U(0)
  18. #define MTK_LOCAL_STATE_RET U(1)
  19. #define MTK_LOCAL_STATE_OFF U(2)
  20. #define MTK_AFFLVL_CPU U(0)
  21. #define MTK_AFFLVL_CLUSTER U(1)
  22. #define MTK_AFFLVL_MCUSYS U(2)
  23. #define MTK_AFFLVL_SYSTEM U(3)
  24. void mtk_suspend_footprint_log(int idx);
  25. void mtk_suspend_timestamp_log(int idx);
  26. int mt_cluster_ops(int cputop_mpx, int mode, int state);
  27. int mt_core_ops(int cpux, int state);
  28. #define IS_CLUSTER_OFF_STATE(s) \
  29. is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_CLUSTER])
  30. #define IS_MCUSYS_OFF_STATE(s) \
  31. is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_MCUSYS])
  32. #define IS_SYSTEM_SUSPEND_STATE(s) \
  33. is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_SYSTEM])
  34. /* SMC secure magic number */
  35. #define SPM_LP_SMC_MAGIC (0xDAF10000)
  36. #define IS_SPM_LP_SMC(_type, _id) (_id == (SPM_LP_SMC_MAGIC | _type))
  37. enum mtk_suspend_mode {
  38. MTK_MCDI_MODE = 1U,
  39. MTK_IDLEDRAM_MODE = 2U,
  40. MTK_IDLESYSPLL_MODE = 3U,
  41. MTK_IDLEBUS26M_MODE = 4U,
  42. MTK_SUSPEND_MODE = 5U,
  43. };
  44. #endif
  45. enum mt8169_idle_model {
  46. IDLE_MODEL_START = 0U,
  47. IDLE_MODEL_RESOURCE_HEAD = IDLE_MODEL_START,
  48. IDLE_MODEL_BUS26M = IDLE_MODEL_RESOURCE_HEAD,
  49. IDLE_MODEL_SYSPLL = 1U,
  50. IDLE_MODEL_DRAM = 2U,
  51. IDLE_MODEL_NUM = 3U,
  52. };
  53. #define footprint_addr(cpu) (mtk_suspend_footprint_addr + (cpu << 2))
  54. #define timestamp_addr(cpu, idx) (mtk_suspend_timestamp_addr + \
  55. ((cpu * MTK_SUSPEND_TIMESTAMP_MAX + idx) << 3))
  56. #define MTK_SUSPEND_FOOTPRINT_ENTER_CPUIDLE (0U)
  57. #define MTK_SUSPEND_FOOTPRINT_BEFORE_ATF (1U)
  58. #define MTK_SUSPEND_FOOTPRINT_ENTER_ATF (2U)
  59. #define MTK_SUSPEND_FOOTPRINT_RESERVE_P1 (3U)
  60. #define MTK_SUSPEND_FOOTPRINT_RESERVE_P2 (4U)
  61. #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND (5U)
  62. #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND (6U)
  63. #define MTK_SUSPEND_FOOTPRINT_BEFORE_WFI (7U)
  64. #define MTK_SUSPEND_FOOTPRINT_AFTER_WFI (8U)
  65. #define MTK_SUSPEND_FOOTPRINT_BEFORE_MMU (9U)
  66. #define MTK_SUSPEND_FOOTPRINT_AFTER_MMU (10U)
  67. #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND_FINISH (11U)
  68. #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND_FINISH (12U)
  69. #define MTK_SUSPEND_FOOTPRINT_LEAVE_ATF (13U)
  70. #define MTK_SUSPEND_FOOTPRINT_AFTER_ATF (14U)
  71. #define MTK_SUSPEND_FOOTPRINT_LEAVE_CPUIDLE (15U)
  72. #define MTK_SUSPEND_TIMESTAMP_ENTER_CPUIDLE (0U)
  73. #define MTK_SUSPEND_TIMESTAMP_BEFORE_ATF (1U)
  74. #define MTK_SUSPEND_TIMESTAMP_ENTER_ATF (2U)
  75. #define MTK_SUSPEND_TIMESTAMP_BEFORE_L2_FLUSH (3U)
  76. #define MTK_SUSPEND_TIMESTAMP_AFTER_L2_FLUSH (4U)
  77. #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND (5U)
  78. #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND (6U)
  79. #define MTK_SUSPEND_TIMESTAMP_GIC_P1 (7U)
  80. #define MTK_SUSPEND_TIMESTAMP_GIC_P2 (8U)
  81. #define MTK_SUSPEND_TIMESTAMP_BEFORE_WFI (9U)
  82. #define MTK_SUSPEND_TIMESTAMP_AFTER_WFI (10U)
  83. #define MTK_SUSPEND_TIMESTAMP_RESERVE_P1 (11U)
  84. #define MTK_SUSPEND_TIMESTAMP_RESERVE_P2 (12U)
  85. #define MTK_SUSPEND_TIMESTAMP_GIC_P3 (13U)
  86. #define MTK_SUSPEND_TIMESTAMP_GIC_P4 (14U)
  87. #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND_FINISH (15U)
  88. #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND_FINISH (16U)
  89. #define MTK_SUSPEND_TIMESTAMP_LEAVE_ATF (17U)
  90. #define MTK_SUSPEND_TIMESTAMP_AFTER_ATF (18U)
  91. #define MTK_SUSPEND_TIMESTAMP_LEAVE_CPUIDLE (19U)
  92. #define MTK_SUSPEND_TIMESTAMP_MAX (20U)
  93. /*
  94. * definition platform power state menas.
  95. * PLAT_MT_SYSTEM_SUSPEND - system suspend pwr level
  96. * PLAT_MT_CPU_SUSPEND_CLUSTER - cluster off pwr level
  97. */
  98. #define PLAT_MT_SYSTEM_SUSPEND PLAT_MAX_OFF_STATE
  99. #define PLAT_MT_CPU_SUSPEND_CLUSTER PLAT_MAX_RET_STATE
  100. #define IS_PLAT_SYSTEM_SUSPEND(aff) (aff == PLAT_MT_SYSTEM_SUSPEND)
  101. #define IS_PLAT_SYSTEM_RETENTION(aff) (aff >= PLAT_MAX_RET_STATE)
  102. #define IS_PLAT_SUSPEND2IDLE_ID(stateid)\
  103. (stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE)
  104. #define IS_PLAT_SUSPEND_ID(stateid) \
  105. ((stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE) \
  106. || (stateid == MT_PLAT_PWR_STATE_SYSTEM_SUSPEND))
  107. #endif /* PLAT_PM_H */