plat_helpers.S 1.4 KB

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  1. /*
  2. * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch.h>
  7. #include <asm_macros.S>
  8. #include <platform_def.h>
  9. .globl plat_is_my_cpu_primary
  10. .globl plat_my_core_pos
  11. .globl plat_mediatek_calc_core_pos
  12. func plat_is_my_cpu_primary
  13. mrs x0, mpidr_el1
  14. and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
  15. cmp x0, #PLAT_PRIMARY_CPU
  16. cset x0, eq
  17. ret
  18. endfunc plat_is_my_cpu_primary
  19. /* -----------------------------------------------------
  20. * unsigned int plat_my_core_pos(void)
  21. * This function uses the plat_mediatek_calc_core_pos()
  22. * definition to get the index of the calling CPU.
  23. * -----------------------------------------------------
  24. */
  25. func plat_my_core_pos
  26. mrs x0, mpidr_el1
  27. b plat_mediatek_calc_core_pos
  28. endfunc plat_my_core_pos
  29. /* -----------------------------------------------------
  30. * unsigned int plat_mediatek_calc_core_pos(u_register_t mpidr);
  31. *
  32. * In ARMv8.2, AFF2 is cluster id, AFF1 is core id and
  33. * AFF0 is thread id. There is only one cluster in ARMv8.2
  34. * and one thread in current implementation.
  35. *
  36. * With this function: CorePos = CoreID (AFF1)
  37. * we do it with x0 = (x0 >> 8) & 0xff
  38. * -----------------------------------------------------
  39. */
  40. func plat_mediatek_calc_core_pos
  41. mov x1, #MPIDR_AFFLVL_MASK
  42. and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT
  43. ret
  44. endfunc plat_mediatek_calc_core_pos