plat.ld.S 904 B

123456789101112131415161718192021222324252627282930313233343536373839404142
  1. /*
  2. * Copyright (c) 2024, Rockchip, Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #ifndef ROCKCHIP_PLAT_LD_S
  7. #define ROCKCHIP_PLAT_LD_S
  8. MEMORY {
  9. PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
  10. }
  11. SECTIONS
  12. {
  13. . = PMUSRAM_BASE;
  14. /*
  15. * pmu_cpuson_entrypoint request address
  16. * align 64K when resume, so put it in the
  17. * start of pmusram
  18. */
  19. .text_pmusram : {
  20. ASSERT(. == ALIGN(64 * 1024),
  21. ".pmusram.entry request 64K aligned.");
  22. KEEP(*(.pmusram.entry))
  23. __bl31_pmusram_text_start = .;
  24. *(.pmusram.text)
  25. *(.pmusram.rodata)
  26. . = ALIGN(PAGE_SIZE);
  27. __bl31_pmusram_text_end = .;
  28. __bl31_pmusram_data_start = .;
  29. *(.pmusram.data)
  30. . = ALIGN(PAGE_SIZE);
  31. __bl31_pmusram_data_end = .;
  32. ASSERT(__bl31_pmusram_data_end <= PMUSRAM_BASE + PMUSRAM_RSIZE,
  33. ".pmusram has exceeded its limit.");
  34. } >PMUSRAM
  35. }
  36. #endif /* ROCKCHIP_PLAT_LD_S */