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arm-trusted-firmware
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plat
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rpi
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rpi5
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include
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rpi_hw.h

rpi_hw.h 1.3 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
    3. 

  3.  * Copyright (c) 2024, Mario Bălănică <mariobalanica02@gmail.com>
    4. 

  4.  *
    5. 

  5.  * SPDX-License-Identifier: BSD-3-Clause
    6. 

  6.  */
    7. 

  7. 

  8. #ifndef RPI_HW_H
    9. 

  9. #define RPI_HW_H
    10. 

  10. 

  11. #include <lib/utils_def.h>
    12. 

  12. 

  13. /*
    14. 

  14.  * Peripherals
    15. 

  15.  */
    16. 

  16. 

  17. #define RPI_IO_BASE			ULL(0x1000000000)
    18. 

  18. #define RPI_IO_SIZE			ULL(0x1000000000)
    19. 

  19. 

  20. /*
    21. 

  21.  * ARM <-> VideoCore mailboxes
    22. 

  22.  */
    23. 

  23. #define RPI3_MBOX_BASE			(RPI_IO_BASE + ULL(0x7c013880))
    24. 

  24. 

  25. /*
    26. 

  26.  * Power management, reset controller, watchdog.
    27. 

  27.  */
    28. 

  28. #define RPI3_PM_BASE			(RPI_IO_BASE + ULL(0x7d200000))
    29. 

  29. 

  30. /*
    31. 

  31.  * Hardware random number generator.
    32. 

  32.  */
    33. 

  33. #define RPI3_RNG_BASE			(RPI_IO_BASE + ULL(0x7d208000))
    34. 

  34. 

  35. /*
    36. 

  36.  * PL011 system serial port
    37. 

  37.  */
    38. 

  38. #define RPI4_PL011_UART_BASE		(RPI_IO_BASE + ULL(0x7d001000))
    39. 

  39. #define RPI4_PL011_UART_CLOCK		ULL(44000000)
    40. 

  40. 

  41. /*
    42. 

  42.  * GIC interrupt controller
    43. 

  43.  */
    44. 

  44. #define RPI_HAVE_GIC
    45. 

  45. #define RPI4_GIC_GICD_BASE		(RPI_IO_BASE + ULL(0x7fff9000))
    46. 

  46. #define RPI4_GIC_GICC_BASE		(RPI_IO_BASE + ULL(0x7fffa000))
    47. 

  47. 

  48. #define	RPI4_LOCAL_CONTROL_BASE_ADDRESS		(RPI_IO_BASE + ULL(0x7c280000))
    49. 

  49. #define	RPI4_LOCAL_CONTROL_PRESCALER		(RPI_IO_BASE + ULL(0x7c280008))
    50. 

  50. 

  51. /*
    52. 

  52.  * PCI Express
    53. 

  53.  */
    54. 

  54. #define RPI_PCIE_RC_BASES		RPI_IO_BASE + ULL(0x00100000), \
    55. 

  55. 					RPI_IO_BASE + ULL(0x00110000), \
    56. 

  56. 					RPI_IO_BASE + ULL(0x00120000)
    57. 

  57. 

  58. #endif /* RPI_HW_H */
    59.