pm_client.c 5.9 KB

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  1. /*
  2. * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
  3. * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-3-Clause
  6. */
  7. /*
  8. * APU specific definition of processors in the subsystem as well as functions
  9. * for getting information about and changing state of the APU.
  10. */
  11. #include <assert.h>
  12. #include <drivers/arm/gic_common.h>
  13. #include <drivers/arm/gicv3.h>
  14. #include <lib/bakery_lock.h>
  15. #include <lib/mmio.h>
  16. #include <lib/utils.h>
  17. #include <plat/common/platform.h>
  18. #include <plat_ipi.h>
  19. #include <platform_def.h>
  20. #include "pm_api_sys.h"
  21. #include "pm_client.h"
  22. #include "pm_defs.h"
  23. #include <versal_def.h>
  24. #define UNDEFINED_CPUID (~0)
  25. DEFINE_BAKERY_LOCK(pm_client_secure_lock);
  26. static const struct pm_ipi apu_ipi = {
  27. .local_ipi_id = IPI_LOCAL_ID,
  28. .remote_ipi_id = IPI_REMOTE_ID,
  29. .buffer_base = IPI_BUFFER_LOCAL_BASE,
  30. };
  31. /* Order in pm_procs_all array must match cpu ids */
  32. static const struct pm_proc pm_procs_all[] = {
  33. {
  34. .node_id = XPM_DEVID_ACPU_0,
  35. .ipi = &apu_ipi,
  36. .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK,
  37. },
  38. {
  39. .node_id = XPM_DEVID_ACPU_1,
  40. .ipi = &apu_ipi,
  41. .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK,
  42. }
  43. };
  44. const struct pm_proc *primary_proc = &pm_procs_all[0];
  45. /**
  46. * irq_to_pm_node_idx - Get PM node index corresponding to the interrupt number.
  47. * @irq: Interrupt number
  48. *
  49. * Return: PM node index corresponding to the specified interrupt.
  50. *
  51. */
  52. enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq)
  53. {
  54. enum pm_device_node_idx dev_idx = XPM_NODEIDX_DEV_MIN;
  55. assert(irq <= IRQ_MAX);
  56. switch (irq) {
  57. case 13:
  58. dev_idx = XPM_NODEIDX_DEV_GPIO;
  59. break;
  60. case 14:
  61. dev_idx = XPM_NODEIDX_DEV_I2C_0;
  62. break;
  63. case 15:
  64. dev_idx = XPM_NODEIDX_DEV_I2C_1;
  65. break;
  66. case 16:
  67. dev_idx = XPM_NODEIDX_DEV_SPI_0;
  68. break;
  69. case 17:
  70. dev_idx = XPM_NODEIDX_DEV_SPI_1;
  71. break;
  72. case 18:
  73. dev_idx = XPM_NODEIDX_DEV_UART_0;
  74. break;
  75. case 19:
  76. dev_idx = XPM_NODEIDX_DEV_UART_1;
  77. break;
  78. case 20:
  79. dev_idx = XPM_NODEIDX_DEV_CAN_FD_0;
  80. break;
  81. case 21:
  82. dev_idx = XPM_NODEIDX_DEV_CAN_FD_1;
  83. break;
  84. case 22:
  85. case 23:
  86. case 24:
  87. case 25:
  88. case 26:
  89. dev_idx = XPM_NODEIDX_DEV_USB_0;
  90. break;
  91. case 37:
  92. case 38:
  93. case 39:
  94. dev_idx = XPM_NODEIDX_DEV_TTC_0;
  95. break;
  96. case 40:
  97. case 41:
  98. case 42:
  99. dev_idx = XPM_NODEIDX_DEV_TTC_1;
  100. break;
  101. case 43:
  102. case 44:
  103. case 45:
  104. dev_idx = XPM_NODEIDX_DEV_TTC_2;
  105. break;
  106. case 46:
  107. case 47:
  108. case 48:
  109. dev_idx = XPM_NODEIDX_DEV_TTC_3;
  110. break;
  111. case 56:
  112. case 57:
  113. dev_idx = XPM_NODEIDX_DEV_GEM_0;
  114. break;
  115. case 58:
  116. case 59:
  117. dev_idx = XPM_NODEIDX_DEV_GEM_1;
  118. break;
  119. case 60:
  120. dev_idx = XPM_NODEIDX_DEV_ADMA_0;
  121. break;
  122. case 61:
  123. dev_idx = XPM_NODEIDX_DEV_ADMA_1;
  124. break;
  125. case 62:
  126. dev_idx = XPM_NODEIDX_DEV_ADMA_2;
  127. break;
  128. case 63:
  129. dev_idx = XPM_NODEIDX_DEV_ADMA_3;
  130. break;
  131. case 64:
  132. dev_idx = XPM_NODEIDX_DEV_ADMA_4;
  133. break;
  134. case 65:
  135. dev_idx = XPM_NODEIDX_DEV_ADMA_5;
  136. break;
  137. case 66:
  138. dev_idx = XPM_NODEIDX_DEV_ADMA_6;
  139. break;
  140. case 67:
  141. dev_idx = XPM_NODEIDX_DEV_ADMA_7;
  142. break;
  143. case 74:
  144. dev_idx = XPM_NODEIDX_DEV_USB_0;
  145. break;
  146. case 122:
  147. dev_idx = XPM_NODEIDX_DEV_GPIO_PMC;
  148. break;
  149. case 126:
  150. case 127:
  151. dev_idx = XPM_NODEIDX_DEV_SDIO_0;
  152. break;
  153. case 128:
  154. case 129:
  155. dev_idx = XPM_NODEIDX_DEV_SDIO_1;
  156. break;
  157. case 142:
  158. dev_idx = XPM_NODEIDX_DEV_RTC;
  159. break;
  160. default:
  161. dev_idx = XPM_NODEIDX_DEV_MIN;
  162. break;
  163. }
  164. return dev_idx;
  165. }
  166. /**
  167. * pm_client_suspend() - Client-specific suspend actions.
  168. * @proc: processor which need to suspend.
  169. * @state: desired suspend state.
  170. *
  171. * This function should contain any PU-specific actions
  172. * required prior to sending suspend request to PMU
  173. * Actions taken depend on the state system is suspending to.
  174. *
  175. */
  176. void pm_client_suspend(const struct pm_proc *proc, uint32_t state)
  177. {
  178. bakery_lock_get(&pm_client_secure_lock);
  179. if (state == PM_STATE_SUSPEND_TO_RAM) {
  180. pm_client_set_wakeup_sources((uint32_t)proc->node_id);
  181. }
  182. /* Set powerdown request */
  183. mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) |
  184. (uint32_t)proc->pwrdn_mask);
  185. bakery_lock_release(&pm_client_secure_lock);
  186. }
  187. /**
  188. * pm_client_abort_suspend() - Client-specific abort-suspend actions.
  189. *
  190. * This function should contain any PU-specific actions
  191. * required for aborting a prior suspend request.
  192. *
  193. */
  194. void pm_client_abort_suspend(void)
  195. {
  196. /* Enable interrupts at processor level (for current cpu) */
  197. gicv3_cpuif_enable(plat_my_core_pos());
  198. bakery_lock_get(&pm_client_secure_lock);
  199. /* Clear powerdown request */
  200. mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) &
  201. ~((uint32_t)primary_proc->pwrdn_mask));
  202. bakery_lock_release(&pm_client_secure_lock);
  203. }
  204. /**
  205. * pm_get_cpuid() - get the local cpu ID for a global node ID.
  206. * @nid: node id of the processor.
  207. *
  208. * Return: the cpu ID (starting from 0) for the subsystem.
  209. *
  210. */
  211. static uint32_t pm_get_cpuid(uint32_t nid)
  212. {
  213. for (size_t i = 0U; i < ARRAY_SIZE(pm_procs_all); i++) {
  214. if (pm_procs_all[i].node_id == nid) {
  215. return i;
  216. }
  217. }
  218. return UNDEFINED_CPUID;
  219. }
  220. /**
  221. * pm_client_wakeup() - Client-specific wakeup actions.
  222. * @proc: Processor which need to wakeup.
  223. *
  224. * This function should contain any PU-specific actions
  225. * required for waking up another APU core.
  226. *
  227. */
  228. void pm_client_wakeup(const struct pm_proc *proc)
  229. {
  230. uint32_t cpuid = pm_get_cpuid(proc->node_id);
  231. if (cpuid == UNDEFINED_CPUID) {
  232. return;
  233. }
  234. bakery_lock_get(&pm_client_secure_lock);
  235. /* clear powerdown bit for affected cpu */
  236. uint32_t val = mmio_read_32(FPD_APU_PWRCTL);
  237. val &= ~(proc->pwrdn_mask);
  238. mmio_write_32(FPD_APU_PWRCTL, val);
  239. bakery_lock_release(&pm_client_secure_lock);
  240. }
  241. /**
  242. * pm_get_proc() - returns pointer to the proc structure.
  243. * @cpuid: id of the cpu whose proc struct pointer should be returned.
  244. *
  245. * Return: pointer to a proc structure if proc is found, otherwise NULL.
  246. *
  247. */
  248. const struct pm_proc *pm_get_proc(uint32_t cpuid)
  249. {
  250. if (cpuid < ARRAY_SIZE(pm_procs_all)) {
  251. return &pm_procs_all[cpuid];
  252. }
  253. return NULL;
  254. }