spm_mm_main.c 10 KB

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  1. /*
  2. * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #include <arch_helpers.h>
  7. #include <assert.h>
  8. #include <errno.h>
  9. #include <bl31/bl31.h>
  10. #include <bl31/ehf.h>
  11. #include <common/debug.h>
  12. #include <common/runtime_svc.h>
  13. #include <lib/el3_runtime/context_mgmt.h>
  14. #include <lib/el3_runtime/simd_ctx.h>
  15. #include <lib/smccc.h>
  16. #include <lib/spinlock.h>
  17. #include <lib/utils.h>
  18. #include <lib/xlat_tables/xlat_tables_v2.h>
  19. #include <plat/common/platform.h>
  20. #include <services/spm_mm_partition.h>
  21. #include <services/spm_mm_svc.h>
  22. #include <smccc_helpers.h>
  23. #include "spm_common.h"
  24. #include "spm_mm_private.h"
  25. /*******************************************************************************
  26. * Secure Partition context information.
  27. ******************************************************************************/
  28. static sp_context_t sp_ctx;
  29. /*******************************************************************************
  30. * Set state of a Secure Partition context.
  31. ******************************************************************************/
  32. void sp_state_set(sp_context_t *sp_ptr, sp_state_t state)
  33. {
  34. spin_lock(&(sp_ptr->state_lock));
  35. sp_ptr->state = state;
  36. spin_unlock(&(sp_ptr->state_lock));
  37. }
  38. /*******************************************************************************
  39. * Wait until the state of a Secure Partition is the specified one and change it
  40. * to the desired state.
  41. ******************************************************************************/
  42. void sp_state_wait_switch(sp_context_t *sp_ptr, sp_state_t from, sp_state_t to)
  43. {
  44. int success = 0;
  45. while (success == 0) {
  46. spin_lock(&(sp_ptr->state_lock));
  47. if (sp_ptr->state == from) {
  48. sp_ptr->state = to;
  49. success = 1;
  50. }
  51. spin_unlock(&(sp_ptr->state_lock));
  52. }
  53. }
  54. /*******************************************************************************
  55. * Check if the state of a Secure Partition is the specified one and, if so,
  56. * change it to the desired state. Returns 0 on success, -1 on error.
  57. ******************************************************************************/
  58. int sp_state_try_switch(sp_context_t *sp_ptr, sp_state_t from, sp_state_t to)
  59. {
  60. int ret = -1;
  61. spin_lock(&(sp_ptr->state_lock));
  62. if (sp_ptr->state == from) {
  63. sp_ptr->state = to;
  64. ret = 0;
  65. }
  66. spin_unlock(&(sp_ptr->state_lock));
  67. return ret;
  68. }
  69. /*******************************************************************************
  70. * This function takes an SP context pointer and performs a synchronous entry
  71. * into it.
  72. ******************************************************************************/
  73. static uint64_t spm_sp_synchronous_entry(sp_context_t *ctx)
  74. {
  75. uint64_t rc;
  76. assert(ctx != NULL);
  77. /* Assign the context of the SP to this CPU */
  78. cm_set_context(&(ctx->cpu_ctx), SECURE);
  79. /* Restore the context assigned above */
  80. cm_el1_sysregs_context_restore(SECURE);
  81. cm_set_next_eret_context(SECURE);
  82. /* Invalidate TLBs at EL1. */
  83. tlbivmalle1();
  84. dsbish();
  85. /* Enter Secure Partition */
  86. rc = spm_secure_partition_enter(&ctx->c_rt_ctx);
  87. /* Save secure state */
  88. cm_el1_sysregs_context_save(SECURE);
  89. return rc;
  90. }
  91. /*******************************************************************************
  92. * This function returns to the place where spm_sp_synchronous_entry() was
  93. * called originally.
  94. ******************************************************************************/
  95. __dead2 static void spm_sp_synchronous_exit(uint64_t rc)
  96. {
  97. sp_context_t *ctx = &sp_ctx;
  98. /*
  99. * The SPM must have initiated the original request through a
  100. * synchronous entry into the secure partition. Jump back to the
  101. * original C runtime context with the value of rc in x0;
  102. */
  103. spm_secure_partition_exit(ctx->c_rt_ctx, rc);
  104. panic();
  105. }
  106. /*******************************************************************************
  107. * Jump to each Secure Partition for the first time.
  108. ******************************************************************************/
  109. static int32_t spm_init(void)
  110. {
  111. uint64_t rc;
  112. sp_context_t *ctx;
  113. INFO("Secure Partition init...\n");
  114. ctx = &sp_ctx;
  115. ctx->state = SP_STATE_RESET;
  116. rc = spm_sp_synchronous_entry(ctx);
  117. assert(rc == 0);
  118. ctx->state = SP_STATE_IDLE;
  119. INFO("Secure Partition initialized.\n");
  120. return !rc;
  121. }
  122. /*******************************************************************************
  123. * Initialize contexts of all Secure Partitions.
  124. ******************************************************************************/
  125. int32_t spm_mm_setup(void)
  126. {
  127. sp_context_t *ctx;
  128. /* Disable MMU at EL1 (initialized by BL2) */
  129. disable_mmu_icache_el1();
  130. /* Initialize context of the SP */
  131. INFO("Secure Partition context setup start...\n");
  132. ctx = &sp_ctx;
  133. /* Assign translation tables context. */
  134. ctx->xlat_ctx_handle = spm_get_sp_xlat_context();
  135. spm_sp_setup(ctx);
  136. /* Register init function for deferred init. */
  137. bl31_register_bl32_init(&spm_init);
  138. INFO("Secure Partition setup done.\n");
  139. return 0;
  140. }
  141. /*******************************************************************************
  142. * Function to perform a call to a Secure Partition.
  143. ******************************************************************************/
  144. uint64_t spm_mm_sp_call(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3)
  145. {
  146. uint64_t rc;
  147. sp_context_t *sp_ptr = &sp_ctx;
  148. #if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
  149. /*
  150. * SP runs to completion, no need to restore FP/SVE registers of secure context.
  151. * Save FP/SVE registers only for non secure context.
  152. */
  153. simd_ctx_save(NON_SECURE, false);
  154. #endif /* CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS */
  155. /* Wait until the Secure Partition is idle and set it to busy. */
  156. sp_state_wait_switch(sp_ptr, SP_STATE_IDLE, SP_STATE_BUSY);
  157. /* Set values for registers on SP entry */
  158. cpu_context_t *cpu_ctx = &(sp_ptr->cpu_ctx);
  159. write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X0, smc_fid);
  160. write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X1, x1);
  161. write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X2, x2);
  162. write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X3, x3);
  163. /* Jump to the Secure Partition. */
  164. rc = spm_sp_synchronous_entry(sp_ptr);
  165. /* Flag Secure Partition as idle. */
  166. assert(sp_ptr->state == SP_STATE_BUSY);
  167. sp_state_set(sp_ptr, SP_STATE_IDLE);
  168. #if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
  169. /*
  170. * SP runs to completion, no need to save FP/SVE registers of secure context.
  171. * Restore only non secure world FP/SVE registers.
  172. */
  173. simd_ctx_restore(NON_SECURE);
  174. #endif /* CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS */
  175. return rc;
  176. }
  177. /*******************************************************************************
  178. * MM_COMMUNICATE handler
  179. ******************************************************************************/
  180. static uint64_t mm_communicate(uint32_t smc_fid, uint64_t mm_cookie,
  181. uint64_t comm_buffer_address,
  182. uint64_t comm_size_address, void *handle)
  183. {
  184. uint64_t rc;
  185. /* Cookie. Reserved for future use. It must be zero. */
  186. if (mm_cookie != 0U) {
  187. ERROR("MM_COMMUNICATE: cookie is not zero\n");
  188. SMC_RET1(handle, SPM_MM_INVALID_PARAMETER);
  189. }
  190. if (comm_buffer_address == 0U) {
  191. ERROR("MM_COMMUNICATE: comm_buffer_address is zero\n");
  192. SMC_RET1(handle, SPM_MM_INVALID_PARAMETER);
  193. }
  194. if (comm_size_address != 0U) {
  195. VERBOSE("MM_COMMUNICATE: comm_size_address is not 0 as recommended.\n");
  196. }
  197. /*
  198. * The current secure partition design mandates
  199. * - at any point, only a single core can be
  200. * executing in the secure partition.
  201. * - a core cannot be preempted by an interrupt
  202. * while executing in secure partition.
  203. * Raise the running priority of the core to the
  204. * interrupt level configured for secure partition
  205. * so as to block any interrupt from preempting this
  206. * core.
  207. */
  208. ehf_activate_priority(PLAT_SP_PRI);
  209. /* Save the Normal world context */
  210. cm_el1_sysregs_context_save(NON_SECURE);
  211. rc = spm_mm_sp_call(smc_fid, comm_buffer_address, comm_size_address,
  212. plat_my_core_pos());
  213. /* Restore non-secure state */
  214. cm_el1_sysregs_context_restore(NON_SECURE);
  215. cm_set_next_eret_context(NON_SECURE);
  216. /*
  217. * Exited from secure partition. This core can take
  218. * interrupts now.
  219. */
  220. ehf_deactivate_priority(PLAT_SP_PRI);
  221. SMC_RET1(handle, rc);
  222. }
  223. /*******************************************************************************
  224. * Secure Partition Manager SMC handler.
  225. ******************************************************************************/
  226. uint64_t spm_mm_smc_handler(uint32_t smc_fid,
  227. uint64_t x1,
  228. uint64_t x2,
  229. uint64_t x3,
  230. uint64_t x4,
  231. void *cookie,
  232. void *handle,
  233. uint64_t flags)
  234. {
  235. unsigned int ns;
  236. /* Determine which security state this SMC originated from */
  237. ns = is_caller_non_secure(flags);
  238. if (ns == SMC_FROM_SECURE) {
  239. /* Handle SMCs from Secure world. */
  240. assert(handle == cm_get_context(SECURE));
  241. /* Make next ERET jump to S-EL0 instead of S-EL1. */
  242. cm_set_elr_spsr_el3(SECURE, read_elr_el1(), read_spsr_el1());
  243. switch (smc_fid) {
  244. case SPM_MM_VERSION_AARCH32:
  245. SMC_RET1(handle, SPM_MM_VERSION_COMPILED);
  246. case MM_SP_EVENT_COMPLETE_AARCH64:
  247. spm_sp_synchronous_exit(x1);
  248. case MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64:
  249. INFO("Received MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 SMC\n");
  250. if (sp_ctx.state != SP_STATE_RESET) {
  251. WARN("MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 is available at boot time only\n");
  252. SMC_RET1(handle, SPM_MM_NOT_SUPPORTED);
  253. }
  254. SMC_RET1(handle,
  255. spm_memory_attributes_get_smc_handler(
  256. &sp_ctx, x1));
  257. case MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64:
  258. INFO("Received MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64 SMC\n");
  259. if (sp_ctx.state != SP_STATE_RESET) {
  260. WARN("MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64 is available at boot time only\n");
  261. SMC_RET1(handle, SPM_MM_NOT_SUPPORTED);
  262. }
  263. SMC_RET1(handle,
  264. spm_memory_attributes_set_smc_handler(
  265. &sp_ctx, x1, x2, x3));
  266. default:
  267. break;
  268. }
  269. } else {
  270. /* Handle SMCs from Non-secure world. */
  271. assert(handle == cm_get_context(NON_SECURE));
  272. switch (smc_fid) {
  273. case MM_VERSION_AARCH32:
  274. SMC_RET1(handle, MM_VERSION_COMPILED);
  275. case MM_COMMUNICATE_AARCH32:
  276. case MM_COMMUNICATE_AARCH64:
  277. return mm_communicate(smc_fid, x1, x2, x3, handle);
  278. case MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64:
  279. case MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64:
  280. /* SMC interfaces reserved for secure callers. */
  281. SMC_RET1(handle, SPM_MM_NOT_SUPPORTED);
  282. default:
  283. break;
  284. }
  285. }
  286. SMC_RET1(handle, SMC_UNK);
  287. }