i2c_tools.c 37 KB

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  1. /* vi: set sw=4 ts=4: */
  2. /*
  3. * Minimal i2c-tools implementation for busybox.
  4. * Parts of code ported from i2c-tools:
  5. * http://www.lm-sensors.org/wiki/I2CTools.
  6. *
  7. * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
  8. *
  9. * Licensed under GPLv2 or later, see file LICENSE in this source tree.
  10. */
  11. //config:config I2CGET
  12. //config: bool "i2cget (5.5 kb)"
  13. //config: default y
  14. //config: select PLATFORM_LINUX
  15. //config: help
  16. //config: Read from I2C/SMBus chip registers.
  17. //config:
  18. //config:config I2CSET
  19. //config: bool "i2cset (6.7 kb)"
  20. //config: default y
  21. //config: select PLATFORM_LINUX
  22. //config: help
  23. //config: Set I2C registers.
  24. //config:
  25. //config:config I2CDUMP
  26. //config: bool "i2cdump (7.1 kb)"
  27. //config: default y
  28. //config: select PLATFORM_LINUX
  29. //config: help
  30. //config: Examine I2C registers.
  31. //config:
  32. //config:config I2CDETECT
  33. //config: bool "i2cdetect (7.1 kb)"
  34. //config: default y
  35. //config: select PLATFORM_LINUX
  36. //config: help
  37. //config: Detect I2C chips.
  38. //config:
  39. //config:config I2CTRANSFER
  40. //config: bool "i2ctransfer (4.0 kb)"
  41. //config: default y
  42. //config: select PLATFORM_LINUX
  43. //config: help
  44. //config: Send user-defined I2C messages in one transfer.
  45. //config:
  46. //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
  47. //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
  48. //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
  49. //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
  50. //applet:IF_I2CTRANSFER(APPLET(i2ctransfer, BB_DIR_USR_SBIN, BB_SUID_DROP))
  51. /* not NOEXEC: if hw operation stalls, use less memory in "hung" process */
  52. //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
  53. //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
  54. //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
  55. //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
  56. //kbuild:lib-$(CONFIG_I2CTRANSFER) += i2c_tools.o
  57. /*
  58. * Unsupported stuff:
  59. *
  60. * - upstream i2c-tools can also look-up i2c busses by name, we only accept
  61. * numbers,
  62. * - bank and bankreg parameters for i2cdump are not supported because of
  63. * their limited usefulness (see i2cdump manual entry for more info),
  64. * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
  65. * it shouldn't be a problem in modern kernels.
  66. */
  67. #include "libbb.h"
  68. #include <linux/i2c.h>
  69. #define I2CDUMP_NUM_REGS 256
  70. #define I2CDETECT_MODE_AUTO 0
  71. #define I2CDETECT_MODE_QUICK 1
  72. #define I2CDETECT_MODE_READ 2
  73. /* linux/i2c-dev.h from i2c-tools overwrites the one from linux uapi
  74. * and defines symbols already defined by linux/i2c.h.
  75. * Also, it defines a bunch of static inlines which we would rather NOT
  76. * inline. What a mess.
  77. * We need only these definitions from linux/i2c-dev.h:
  78. */
  79. #define I2C_SLAVE 0x0703
  80. #define I2C_SLAVE_FORCE 0x0706
  81. #define I2C_FUNCS 0x0705
  82. #define I2C_PEC 0x0708
  83. #define I2C_SMBUS 0x0720
  84. #define I2C_RDWR 0x0707
  85. #define I2C_RDWR_IOCTL_MAX_MSGS 42
  86. #define I2C_RDWR_IOCTL_MAX_MSGS_STR "42"
  87. struct i2c_smbus_ioctl_data {
  88. __u8 read_write;
  89. __u8 command;
  90. __u32 size;
  91. union i2c_smbus_data *data;
  92. };
  93. struct i2c_rdwr_ioctl_data {
  94. struct i2c_msg *msgs; /* pointers to i2c_msgs */
  95. __u32 nmsgs; /* number of i2c_msgs */
  96. };
  97. /* end linux/i2c-dev.h */
  98. /*
  99. * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
  100. */
  101. static ALWAYS_INLINE void *itoptr(int i)
  102. {
  103. return (void*)(intptr_t)i;
  104. }
  105. static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
  106. int size, union i2c_smbus_data *data)
  107. {
  108. struct i2c_smbus_ioctl_data args;
  109. args.read_write = read_write;
  110. args.command = cmd;
  111. args.size = size;
  112. args.data = data;
  113. return ioctl(fd, I2C_SMBUS, &args);
  114. }
  115. static int32_t i2c_smbus_read_byte(int fd)
  116. {
  117. union i2c_smbus_data data;
  118. int err;
  119. err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
  120. if (err < 0)
  121. return err;
  122. return data.byte;
  123. }
  124. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  125. static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
  126. {
  127. return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
  128. val, I2C_SMBUS_BYTE, NULL);
  129. }
  130. static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
  131. {
  132. union i2c_smbus_data data;
  133. int err;
  134. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  135. I2C_SMBUS_BYTE_DATA, &data);
  136. if (err < 0)
  137. return err;
  138. return data.byte;
  139. }
  140. static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
  141. {
  142. union i2c_smbus_data data;
  143. int err;
  144. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  145. I2C_SMBUS_WORD_DATA, &data);
  146. if (err < 0)
  147. return err;
  148. return data.word;
  149. }
  150. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  151. #if ENABLE_I2CSET
  152. static int32_t i2c_smbus_write_byte_data(int file,
  153. uint8_t cmd, uint8_t value)
  154. {
  155. union i2c_smbus_data data;
  156. data.byte = value;
  157. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  158. I2C_SMBUS_BYTE_DATA, &data);
  159. }
  160. static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
  161. {
  162. union i2c_smbus_data data;
  163. data.word = value;
  164. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  165. I2C_SMBUS_WORD_DATA, &data);
  166. }
  167. static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
  168. uint8_t length, const uint8_t *values)
  169. {
  170. union i2c_smbus_data data;
  171. if (length > I2C_SMBUS_BLOCK_MAX)
  172. length = I2C_SMBUS_BLOCK_MAX;
  173. memcpy(data.block+1, values, length);
  174. data.block[0] = length;
  175. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  176. I2C_SMBUS_BLOCK_DATA, &data);
  177. }
  178. static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
  179. uint8_t length, const uint8_t *values)
  180. {
  181. union i2c_smbus_data data;
  182. if (length > I2C_SMBUS_BLOCK_MAX)
  183. length = I2C_SMBUS_BLOCK_MAX;
  184. memcpy(data.block+1, values, length);
  185. data.block[0] = length;
  186. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  187. I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
  188. }
  189. #endif /* ENABLE_I2CSET */
  190. #if ENABLE_I2CDUMP
  191. /*
  192. * Returns the number of bytes read, vals must hold at
  193. * least I2C_SMBUS_BLOCK_MAX bytes.
  194. */
  195. static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
  196. {
  197. union i2c_smbus_data data;
  198. int i, err;
  199. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  200. I2C_SMBUS_BLOCK_DATA, &data);
  201. if (err < 0)
  202. return err;
  203. for (i = 1; i <= data.block[0]; i++)
  204. *vals++ = data.block[i];
  205. return data.block[0];
  206. }
  207. static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
  208. uint8_t len, uint8_t *vals)
  209. {
  210. union i2c_smbus_data data;
  211. int i, err;
  212. if (len > I2C_SMBUS_BLOCK_MAX)
  213. len = I2C_SMBUS_BLOCK_MAX;
  214. data.block[0] = len;
  215. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  216. len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
  217. I2C_SMBUS_I2C_BLOCK_DATA, &data);
  218. if (err < 0)
  219. return err;
  220. for (i = 1; i <= data.block[0]; i++)
  221. *vals++ = data.block[i];
  222. return data.block[0];
  223. }
  224. #endif /* ENABLE_I2CDUMP */
  225. #if ENABLE_I2CDETECT
  226. static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
  227. {
  228. return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
  229. }
  230. #endif /* ENABLE_I2CDETECT */
  231. static int i2c_bus_lookup(const char *bus_str)
  232. {
  233. return xstrtou_range(bus_str, 10, 0, 0xfffff);
  234. }
  235. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP || ENABLE_I2CTRANSFER
  236. static int i2c_parse_bus_addr(const char *addr_str)
  237. {
  238. /* Slave address must be in range 0x03 - 0x77. */
  239. return xstrtou_range(addr_str, 16, 0x03, 0x77);
  240. }
  241. static void i2c_set_pec(int fd, int pec)
  242. {
  243. ioctl_or_perror_and_die(fd, I2C_PEC,
  244. itoptr(pec ? 1 : 0),
  245. "can't set PEC");
  246. }
  247. static void i2c_set_slave_addr(int fd, int addr, int force)
  248. {
  249. ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
  250. itoptr(addr),
  251. "can't set address to 0x%02x", addr);
  252. }
  253. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  254. #if ENABLE_I2CGET || ENABLE_I2CSET
  255. static int i2c_parse_data_addr(const char *data_addr)
  256. {
  257. /* Data address must be an 8 bit integer. */
  258. return xstrtou_range(data_addr, 16, 0, 0xff);
  259. }
  260. #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
  261. /*
  262. * Opens the device file associated with given i2c bus.
  263. *
  264. * Upstream i2c-tools also support opening devices by i2c bus name
  265. * but we drop it here for size reduction.
  266. */
  267. static int i2c_dev_open(int i2cbus)
  268. {
  269. char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
  270. int fd;
  271. sprintf(filename, "/dev/i2c-%d", i2cbus);
  272. fd = open(filename, O_RDWR);
  273. if (fd < 0) {
  274. if (errno == ENOENT) {
  275. filename[8] = '/'; /* change to "/dev/i2c/%d" */
  276. fd = xopen(filename, O_RDWR);
  277. } else {
  278. bb_perror_msg_and_die("can't open '%s'", filename);
  279. }
  280. }
  281. return fd;
  282. }
  283. /* Size reducing helpers for xxx_check_funcs(). */
  284. static void get_funcs_matrix(int fd, unsigned long *funcs)
  285. {
  286. ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
  287. "can't get adapter functionality matrix");
  288. }
  289. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  290. static void check_funcs_test_end(int funcs, int pec, const char *err)
  291. {
  292. if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
  293. bb_simple_error_msg("warning: adapter does not support PEC");
  294. if (err)
  295. bb_error_msg_and_die(
  296. "adapter has no %s capability", err);
  297. }
  298. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  299. /*
  300. * The below functions emit an error message and exit if the adapter doesn't
  301. * support desired functionalities.
  302. */
  303. #if ENABLE_I2CGET || ENABLE_I2CDUMP
  304. static void check_read_funcs(int fd, int mode, int data_addr, int pec)
  305. {
  306. unsigned long funcs;
  307. const char *err = NULL;
  308. get_funcs_matrix(fd, &funcs);
  309. switch (mode) {
  310. case I2C_SMBUS_BYTE:
  311. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  312. err = "SMBus receive byte";
  313. break;
  314. }
  315. if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  316. err = "SMBus send byte";
  317. break;
  318. case I2C_SMBUS_BYTE_DATA:
  319. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
  320. err = "SMBus read byte";
  321. break;
  322. case I2C_SMBUS_WORD_DATA:
  323. if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
  324. err = "SMBus read word";
  325. break;
  326. #if ENABLE_I2CDUMP
  327. case I2C_SMBUS_BLOCK_DATA:
  328. if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
  329. err = "SMBus block read";
  330. break;
  331. case I2C_SMBUS_I2C_BLOCK_DATA:
  332. if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
  333. err = "I2C block read";
  334. break;
  335. #endif /* ENABLE_I2CDUMP */
  336. default:
  337. bb_simple_error_msg_and_die("internal error");
  338. }
  339. check_funcs_test_end(funcs, pec, err);
  340. }
  341. #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
  342. #if ENABLE_I2CSET
  343. static void check_write_funcs(int fd, int mode, int pec)
  344. {
  345. unsigned long funcs;
  346. const char *err = NULL;
  347. get_funcs_matrix(fd, &funcs);
  348. switch (mode) {
  349. case I2C_SMBUS_BYTE:
  350. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  351. err = "SMBus send byte";
  352. break;
  353. case I2C_SMBUS_BYTE_DATA:
  354. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  355. err = "SMBus write byte";
  356. break;
  357. case I2C_SMBUS_WORD_DATA:
  358. if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
  359. err = "SMBus write word";
  360. break;
  361. case I2C_SMBUS_BLOCK_DATA:
  362. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
  363. err = "SMBus block write";
  364. break;
  365. case I2C_SMBUS_I2C_BLOCK_DATA:
  366. if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
  367. err = "I2C block write";
  368. break;
  369. }
  370. check_funcs_test_end(funcs, pec, err);
  371. }
  372. #endif /* ENABLE_I2CSET */
  373. static void confirm_or_abort(void)
  374. {
  375. fprintf(stderr, "Continue? [y/N] ");
  376. if (!bb_ask_y_confirmation())
  377. bb_simple_error_msg_and_die("aborting");
  378. }
  379. /*
  380. * Return only if user confirms the action, abort otherwise.
  381. *
  382. * The messages displayed here are much less elaborate than their i2c-tools
  383. * counterparts - this is done for size reduction.
  384. */
  385. static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
  386. {
  387. bb_simple_error_msg("WARNING! This program can confuse your I2C bus");
  388. /* Don't let the user break his/her EEPROMs */
  389. if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
  390. bb_simple_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
  391. "devices may result in data loss, aborting");
  392. }
  393. if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
  394. bb_simple_error_msg("WARNING! May interpret a write byte command "
  395. "with PEC as a write byte data command");
  396. if (pec)
  397. bb_simple_error_msg("PEC checking enabled");
  398. confirm_or_abort();
  399. }
  400. #if ENABLE_I2CGET
  401. //usage:#define i2cget_trivial_usage
  402. //usage: "[-fy] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
  403. //usage:#define i2cget_full_usage "\n\n"
  404. //usage: "Read from I2C/SMBus chip registers"
  405. //usage: "\n"
  406. //usage: "\n I2CBUS I2C bus number"
  407. //usage: "\n ADDRESS 0x03-0x77"
  408. //usage: "\nMODE is:"
  409. //usage: "\n b Read byte data (default)"
  410. //usage: "\n w Read word data"
  411. //usage: "\n c Write byte/read byte"
  412. //usage: "\n Append p for SMBus PEC"
  413. //usage: "\n"
  414. //usage: "\n -f Force access"
  415. //usage: "\n -y Disable interactive mode"
  416. int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  417. int i2cget_main(int argc UNUSED_PARAM, char **argv)
  418. {
  419. const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
  420. int bus_num, bus_addr, data_addr = -1, status;
  421. int mode = I2C_SMBUS_BYTE, pec = 0, fd;
  422. unsigned opts;
  423. opts = getopt32(argv, "^" "fy" "\0" "-2:?4"/*from 2 to 4 args*/);
  424. argv += optind;
  425. bus_num = i2c_bus_lookup(argv[0]);
  426. bus_addr = i2c_parse_bus_addr(argv[1]);
  427. if (argv[2]) {
  428. data_addr = i2c_parse_data_addr(argv[2]);
  429. mode = I2C_SMBUS_BYTE_DATA;
  430. if (argv[3]) {
  431. switch (argv[3][0]) {
  432. case 'b': /* Already set */ break;
  433. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  434. case 'c': mode = I2C_SMBUS_BYTE; break;
  435. default:
  436. bb_simple_error_msg("invalid mode");
  437. bb_show_usage();
  438. }
  439. pec = argv[3][1] == 'p';
  440. }
  441. }
  442. fd = i2c_dev_open(bus_num);
  443. check_read_funcs(fd, mode, data_addr, pec);
  444. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  445. if (!(opts & opt_y))
  446. confirm_action(bus_addr, mode, data_addr, pec);
  447. if (pec)
  448. i2c_set_pec(fd, 1);
  449. switch (mode) {
  450. case I2C_SMBUS_BYTE:
  451. if (data_addr >= 0) {
  452. status = i2c_smbus_write_byte(fd, data_addr);
  453. if (status < 0)
  454. bb_simple_error_msg("warning - write failed");
  455. }
  456. status = i2c_smbus_read_byte(fd);
  457. break;
  458. case I2C_SMBUS_WORD_DATA:
  459. status = i2c_smbus_read_word_data(fd, data_addr);
  460. break;
  461. default: /* I2C_SMBUS_BYTE_DATA */
  462. status = i2c_smbus_read_byte_data(fd, data_addr);
  463. }
  464. close(fd);
  465. if (status < 0)
  466. bb_simple_perror_msg_and_die("read failed");
  467. printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  468. return 0;
  469. }
  470. #endif /* ENABLE_I2CGET */
  471. #if ENABLE_I2CSET
  472. //usage:#define i2cset_trivial_usage
  473. //usage: "[-fy] [-m MASK] BUS CHIP-ADDRESS DATA-ADDRESS [VALUE] ... [MODE]"
  474. //usage:#define i2cset_full_usage "\n\n"
  475. //usage: "Set I2C registers"
  476. //usage: "\n"
  477. //usage: "\n I2CBUS I2C bus number"
  478. //usage: "\n ADDRESS 0x03-0x77"
  479. //usage: "\nMODE is:"
  480. //usage: "\n c Byte, no value"
  481. //usage: "\n b Byte data (default)"
  482. //usage: "\n w Word data"
  483. //usage: "\n i I2C block data"
  484. //usage: "\n s SMBus block data"
  485. //usage: "\n Append p for SMBus PEC"
  486. //usage: "\n"
  487. //usage: "\n -f Force access"
  488. //usage: "\n -y Disable interactive mode"
  489. //usage: "\n -r Read back and compare the result"
  490. //usage: "\n -m MASK Mask specifying which bits to write"
  491. int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  492. int i2cset_main(int argc, char **argv)
  493. {
  494. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  495. opt_m = (1 << 2), opt_r = (1 << 3);
  496. int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
  497. int val, blen, mask, fd, status;
  498. unsigned char block[I2C_SMBUS_BLOCK_MAX];
  499. char *opt_m_arg = NULL;
  500. unsigned opts;
  501. opts = getopt32(argv, "^"
  502. "fym:r"
  503. "\0" "-3", /* minimum 3 args */
  504. &opt_m_arg
  505. );
  506. argv += optind;
  507. argc -= optind;
  508. argc--; /* now argv[argc] is last arg */
  509. bus_num = i2c_bus_lookup(argv[0]);
  510. bus_addr = i2c_parse_bus_addr(argv[1]);
  511. data_addr = i2c_parse_data_addr(argv[2]);
  512. if (argv[3]) {
  513. if (!argv[4] && argv[3][0] != 'c') {
  514. mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
  515. } else {
  516. switch (argv[argc][0]) {
  517. case 'c': /* Already set */
  518. break;
  519. case 'b': mode = I2C_SMBUS_BYTE_DATA;
  520. break;
  521. case 'w': mode = I2C_SMBUS_WORD_DATA;
  522. break;
  523. case 's': mode = I2C_SMBUS_BLOCK_DATA;
  524. break;
  525. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA;
  526. break;
  527. default:
  528. bb_simple_error_msg("invalid mode");
  529. bb_show_usage();
  530. }
  531. pec = (argv[argc][1] == 'p');
  532. if (mode == I2C_SMBUS_BLOCK_DATA
  533. || mode == I2C_SMBUS_I2C_BLOCK_DATA
  534. ) {
  535. if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
  536. bb_simple_error_msg_and_die(
  537. "PEC not supported for I2C "
  538. "block writes");
  539. if (opts & opt_m)
  540. bb_simple_error_msg_and_die(
  541. "mask not supported for block "
  542. "writes");
  543. }
  544. }
  545. }
  546. /* Prepare the value(s) to be written according to current mode. */
  547. mask = 0;
  548. blen = 0;
  549. switch (mode) {
  550. case I2C_SMBUS_BYTE_DATA:
  551. val = xstrtou_range(argv[3], 0, 0, 0xff);
  552. break;
  553. case I2C_SMBUS_WORD_DATA:
  554. val = xstrtou_range(argv[3], 0, 0, 0xffff);
  555. break;
  556. case I2C_SMBUS_BLOCK_DATA:
  557. case I2C_SMBUS_I2C_BLOCK_DATA:
  558. for (blen = 3; blen < argc; blen++)
  559. block[blen - 3] = xstrtou_range(argv[blen], 0, 0, 0xff);
  560. blen -= 3;
  561. val = -1;
  562. break;
  563. default:
  564. val = -1;
  565. break;
  566. }
  567. if (opts & opt_m) {
  568. mask = xstrtou_range(opt_m_arg, 0, 0,
  569. (mode == I2C_SMBUS_BYTE ||
  570. mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
  571. }
  572. fd = i2c_dev_open(bus_num);
  573. check_write_funcs(fd, mode, pec);
  574. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  575. if (!(opts & opt_y))
  576. confirm_action(bus_addr, mode, data_addr, pec);
  577. /*
  578. * If we're using mask - read the current value here and adjust the
  579. * value to be written.
  580. */
  581. if (opts & opt_m) {
  582. int tmpval;
  583. switch (mode) {
  584. case I2C_SMBUS_BYTE:
  585. tmpval = i2c_smbus_read_byte(fd);
  586. break;
  587. case I2C_SMBUS_WORD_DATA:
  588. tmpval = i2c_smbus_read_word_data(fd, data_addr);
  589. break;
  590. default:
  591. tmpval = i2c_smbus_read_byte_data(fd, data_addr);
  592. }
  593. if (tmpval < 0)
  594. bb_simple_perror_msg_and_die("can't read old value");
  595. val = (val & mask) | (tmpval & ~mask);
  596. if (!(opts & opt_y)) {
  597. bb_error_msg("old value 0x%0*x, write mask "
  598. "0x%0*x, will write 0x%0*x to register "
  599. "0x%02x",
  600. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
  601. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
  602. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  603. data_addr);
  604. confirm_or_abort();
  605. }
  606. }
  607. if (pec)
  608. i2c_set_pec(fd, 1);
  609. switch (mode) {
  610. case I2C_SMBUS_BYTE:
  611. status = i2c_smbus_write_byte(fd, data_addr);
  612. break;
  613. case I2C_SMBUS_WORD_DATA:
  614. status = i2c_smbus_write_word_data(fd, data_addr, val);
  615. break;
  616. case I2C_SMBUS_BLOCK_DATA:
  617. status = i2c_smbus_write_block_data(fd, data_addr,
  618. blen, block);
  619. break;
  620. case I2C_SMBUS_I2C_BLOCK_DATA:
  621. status = i2c_smbus_write_i2c_block_data(fd, data_addr,
  622. blen, block);
  623. break;
  624. default: /* I2C_SMBUS_BYTE_DATA */
  625. status = i2c_smbus_write_byte_data(fd, data_addr, val);
  626. break;
  627. }
  628. if (status < 0)
  629. bb_simple_perror_msg_and_die("write failed");
  630. if (pec)
  631. i2c_set_pec(fd, 0); /* Clear PEC. */
  632. /* No readback required - we're done. */
  633. if (!(opts & opt_r))
  634. return 0;
  635. switch (mode) {
  636. case I2C_SMBUS_BYTE:
  637. status = i2c_smbus_read_byte(fd);
  638. val = data_addr;
  639. break;
  640. case I2C_SMBUS_WORD_DATA:
  641. status = i2c_smbus_read_word_data(fd, data_addr);
  642. break;
  643. default: /* I2C_SMBUS_BYTE_DATA */
  644. status = i2c_smbus_read_byte_data(fd, data_addr);
  645. }
  646. if (status < 0) {
  647. puts("Warning - readback failed");
  648. } else
  649. if (status != val) {
  650. printf("Warning - data mismatch - wrote "
  651. "0x%0*x, read back 0x%0*x\n",
  652. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  653. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  654. } else {
  655. printf("Value 0x%0*x written, readback matched\n",
  656. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
  657. }
  658. return 0;
  659. }
  660. #endif /* ENABLE_I2CSET */
  661. #if ENABLE_I2CDUMP
  662. static int read_block_data(int buf_fd, int mode, int *block)
  663. {
  664. uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
  665. int res, blen = 0, tmp, i;
  666. if (mode == I2C_SMBUS_BLOCK_DATA) {
  667. blen = i2c_smbus_read_block_data(buf_fd, 0, cblock);
  668. if (blen <= 0)
  669. goto fail;
  670. } else {
  671. for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
  672. tmp = i2c_smbus_read_i2c_block_data(
  673. buf_fd, res, I2C_SMBUS_BLOCK_MAX,
  674. cblock + res);
  675. if (tmp <= 0) {
  676. blen = tmp;
  677. goto fail;
  678. }
  679. }
  680. if (res >= I2CDUMP_NUM_REGS)
  681. res = I2CDUMP_NUM_REGS;
  682. for (i = 0; i < res; i++)
  683. block[i] = cblock[i];
  684. if (mode != I2C_SMBUS_BLOCK_DATA)
  685. for (i = res; i < I2CDUMP_NUM_REGS; i++)
  686. block[i] = -1;
  687. }
  688. return blen;
  689. fail:
  690. bb_error_msg_and_die("block read failed: %d", blen);
  691. }
  692. /* Dump all but word data. */
  693. static void dump_data(int bus_fd, int mode, unsigned first,
  694. unsigned last, int *block, int blen)
  695. {
  696. int i, j, res;
  697. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
  698. " 0123456789abcdef");
  699. for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
  700. if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
  701. break;
  702. if (i/16 < first/16)
  703. continue;
  704. if (i/16 > last/16)
  705. break;
  706. printf("%02x: ", i);
  707. for (j = 0; j < 16; j++) {
  708. fflush_all();
  709. /* Skip unwanted registers */
  710. if (i+j < first || i+j > last) {
  711. printf(" ");
  712. if (mode == I2C_SMBUS_WORD_DATA) {
  713. printf(" ");
  714. j++;
  715. }
  716. continue;
  717. }
  718. switch (mode) {
  719. case I2C_SMBUS_BYTE_DATA:
  720. res = i2c_smbus_read_byte_data(bus_fd, i+j);
  721. block[i+j] = res;
  722. break;
  723. case I2C_SMBUS_WORD_DATA:
  724. res = i2c_smbus_read_word_data(bus_fd, i+j);
  725. if (res < 0) {
  726. block[i+j] = res;
  727. block[i+j+1] = res;
  728. } else {
  729. block[i+j] = res & 0xff;
  730. block[i+j+1] = res >> 8;
  731. }
  732. break;
  733. case I2C_SMBUS_BYTE:
  734. res = i2c_smbus_read_byte(bus_fd);
  735. block[i+j] = res;
  736. break;
  737. default:
  738. res = block[i+j];
  739. }
  740. if (mode == I2C_SMBUS_BLOCK_DATA &&
  741. i+j >= blen) {
  742. printf(" ");
  743. } else if (res < 0) {
  744. printf("XX ");
  745. if (mode == I2C_SMBUS_WORD_DATA)
  746. printf("XX ");
  747. } else {
  748. printf("%02x ", block[i+j]);
  749. if (mode == I2C_SMBUS_WORD_DATA)
  750. printf("%02x ", block[i+j+1]);
  751. }
  752. if (mode == I2C_SMBUS_WORD_DATA)
  753. j++;
  754. }
  755. printf(" ");
  756. for (j = 0; j < 16; j++) {
  757. if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
  758. break;
  759. /* Skip unwanted registers */
  760. if (i+j < first || i+j > last) {
  761. bb_putchar(' ');
  762. continue;
  763. }
  764. res = block[i+j];
  765. if (res < 0) {
  766. bb_putchar('X');
  767. } else if (res == 0x00 || res == 0xff) {
  768. bb_putchar('.');
  769. } else if (res < 32 || res >= 127) {
  770. bb_putchar('?');
  771. } else {
  772. bb_putchar(res);
  773. }
  774. }
  775. bb_putchar('\n');
  776. }
  777. }
  778. static void dump_word_data(int bus_fd, unsigned first, unsigned last)
  779. {
  780. int i, j, rv;
  781. /* Word data. */
  782. puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
  783. for (i = 0; i < 256; i += 8) {
  784. if (i/8 < first/8)
  785. continue;
  786. if (i/8 > last/8)
  787. break;
  788. printf("%02x: ", i);
  789. for (j = 0; j < 8; j++) {
  790. /* Skip unwanted registers. */
  791. if (i+j < first || i+j > last) {
  792. printf(" ");
  793. continue;
  794. }
  795. rv = i2c_smbus_read_word_data(bus_fd, i+j);
  796. if (rv < 0)
  797. printf("XXXX ");
  798. else
  799. printf("%04x ", rv & 0xffff);
  800. }
  801. bb_putchar('\n');
  802. }
  803. }
  804. //usage:#define i2cdump_trivial_usage
  805. //usage: "[-fy] [-r FIRST-LAST] BUS ADDR [MODE]"
  806. //usage:#define i2cdump_full_usage "\n\n"
  807. //usage: "Examine I2C registers"
  808. //usage: "\n"
  809. //usage: "\n I2CBUS I2C bus number"
  810. //usage: "\n ADDRESS 0x03-0x77"
  811. //usage: "\nMODE is:"
  812. //usage: "\n b Byte (default)"
  813. //usage: "\n w Word"
  814. //usage: "\n W Word on even register addresses"
  815. //usage: "\n i I2C block"
  816. //usage: "\n s SMBus block"
  817. //usage: "\n c Consecutive byte"
  818. //usage: "\n Append p for SMBus PEC"
  819. //usage: "\n"
  820. //usage: "\n -f Force access"
  821. //usage: "\n -y Disable interactive mode"
  822. //usage: "\n -r Limit the number of registers being accessed"
  823. int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  824. int i2cdump_main(int argc UNUSED_PARAM, char **argv)
  825. {
  826. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  827. opt_r = (1 << 2);
  828. int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
  829. unsigned first = 0x00, last = 0xff, opts;
  830. int block[I2CDUMP_NUM_REGS];
  831. char *opt_r_str, *dash;
  832. int fd, res;
  833. opts = getopt32(argv, "^"
  834. "fyr:"
  835. "\0" "-2:?3" /* from 2 to 3 args */,
  836. &opt_r_str
  837. );
  838. argv += optind;
  839. bus_num = i2c_bus_lookup(argv[0]);
  840. bus_addr = i2c_parse_bus_addr(argv[1]);
  841. if (argv[2]) {
  842. switch (argv[2][0]) {
  843. case 'b': /* Already set. */ break;
  844. case 'c': mode = I2C_SMBUS_BYTE; break;
  845. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  846. case 'W':
  847. mode = I2C_SMBUS_WORD_DATA;
  848. even = 1;
  849. break;
  850. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  851. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  852. default:
  853. bb_simple_error_msg_and_die("invalid mode");
  854. }
  855. if (argv[2][1] == 'p') {
  856. if (argv[2][0] == 'W' || argv[2][0] == 'i') {
  857. bb_simple_error_msg_and_die(
  858. "pec not supported for -W and -i");
  859. } else {
  860. pec = 1;
  861. }
  862. }
  863. }
  864. if (opts & opt_r) {
  865. first = strtol(opt_r_str, &dash, 0);
  866. if (dash == opt_r_str || *dash != '-' || first > 0xff)
  867. bb_simple_error_msg_and_die("invalid range");
  868. last = xstrtou_range(++dash, 0, first, 0xff);
  869. /* Range is not available for every mode. */
  870. switch (mode) {
  871. case I2C_SMBUS_BYTE:
  872. case I2C_SMBUS_BYTE_DATA:
  873. break;
  874. case I2C_SMBUS_WORD_DATA:
  875. if (!even || (!(first % 2) && last % 2))
  876. break;
  877. /* Fall through */
  878. default:
  879. bb_simple_error_msg_and_die(
  880. "range not compatible with selected mode");
  881. }
  882. }
  883. fd = i2c_dev_open(bus_num);
  884. check_read_funcs(fd, mode, -1 /* data_addr */, pec);
  885. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  886. if (pec)
  887. i2c_set_pec(fd, 1);
  888. if (!(opts & opt_y))
  889. confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
  890. /* All but word data. */
  891. if (mode != I2C_SMBUS_WORD_DATA || even) {
  892. int blen = 0;
  893. if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA)
  894. blen = read_block_data(fd, mode, block);
  895. if (mode == I2C_SMBUS_BYTE) {
  896. res = i2c_smbus_write_byte(fd, first);
  897. if (res < 0)
  898. bb_simple_perror_msg_and_die("write start address");
  899. }
  900. dump_data(fd, mode, first, last, block, blen);
  901. } else {
  902. dump_word_data(fd, first, last);
  903. }
  904. return 0;
  905. }
  906. #endif /* ENABLE_I2CDUMP */
  907. #if ENABLE_I2CDETECT
  908. enum adapter_type {
  909. ADT_DUMMY = 0,
  910. ADT_ISA,
  911. ADT_I2C,
  912. ADT_SMBUS,
  913. };
  914. struct adap_desc {
  915. const char *funcs;
  916. const char *algo;
  917. };
  918. static const struct adap_desc adap_descs[] = {
  919. { .funcs = "dummy",
  920. .algo = "Dummy bus", },
  921. { .funcs = "isa",
  922. .algo = "ISA bus", },
  923. { .funcs = "i2c",
  924. .algo = "I2C adapter", },
  925. { .funcs = "smbus",
  926. .algo = "SMBus adapter", },
  927. };
  928. struct i2c_func
  929. {
  930. long value;
  931. const char* name;
  932. };
  933. static const struct i2c_func i2c_funcs_tab[] = {
  934. { .value = I2C_FUNC_I2C,
  935. .name = "I2C" },
  936. { .value = I2C_FUNC_SMBUS_QUICK,
  937. .name = "SMBus quick command" },
  938. { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
  939. .name = "SMBus send byte" },
  940. { .value = I2C_FUNC_SMBUS_READ_BYTE,
  941. .name = "SMBus receive byte" },
  942. { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
  943. .name = "SMBus write byte" },
  944. { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
  945. .name = "SMBus read byte" },
  946. { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
  947. .name = "SMBus write word" },
  948. { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
  949. .name = "SMBus read word" },
  950. { .value = I2C_FUNC_SMBUS_PROC_CALL,
  951. .name = "SMBus process call" },
  952. { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
  953. .name = "SMBus block write" },
  954. { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
  955. .name = "SMBus block read" },
  956. { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
  957. .name = "SMBus block process call" },
  958. { .value = I2C_FUNC_SMBUS_PEC,
  959. .name = "SMBus PEC" },
  960. { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
  961. .name = "I2C block write" },
  962. { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
  963. .name = "I2C block read" },
  964. { .value = 0, .name = NULL }
  965. };
  966. static enum adapter_type i2cdetect_get_funcs(int bus)
  967. {
  968. enum adapter_type ret;
  969. unsigned long funcs;
  970. int fd;
  971. fd = i2c_dev_open(bus);
  972. get_funcs_matrix(fd, &funcs);
  973. if (funcs & I2C_FUNC_I2C)
  974. ret = ADT_I2C;
  975. else if (funcs & (I2C_FUNC_SMBUS_BYTE |
  976. I2C_FUNC_SMBUS_BYTE_DATA |
  977. I2C_FUNC_SMBUS_WORD_DATA))
  978. ret = ADT_SMBUS;
  979. else
  980. ret = ADT_DUMMY;
  981. close(fd);
  982. return ret;
  983. }
  984. static void NORETURN list_i2c_busses_and_exit(void)
  985. {
  986. const char *const i2cdev_path = "/sys/class/i2c-dev";
  987. char path[NAME_MAX], name[128];
  988. struct dirent *de, *subde;
  989. enum adapter_type adt;
  990. DIR *dir, *subdir;
  991. int rv, bus;
  992. char *pos;
  993. FILE *fp;
  994. /*
  995. * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
  996. * but we won't bother since it's only useful on older kernels (before
  997. * 2.6.5). We expect sysfs to be present and mounted at /sys/.
  998. */
  999. dir = xopendir(i2cdev_path);
  1000. while ((de = readdir(dir))) {
  1001. if (de->d_name[0] == '.')
  1002. continue;
  1003. /* Simple version for ISA chips. */
  1004. snprintf(path, NAME_MAX, "%s/%s/name",
  1005. i2cdev_path, de->d_name);
  1006. fp = fopen(path, "r");
  1007. if (fp == NULL) {
  1008. snprintf(path, NAME_MAX,
  1009. "%s/%s/device/name",
  1010. i2cdev_path, de->d_name);
  1011. fp = fopen(path, "r");
  1012. }
  1013. /* Non-ISA chips require the hard-way. */
  1014. if (fp == NULL) {
  1015. snprintf(path, NAME_MAX,
  1016. "%s/%s/device/name",
  1017. i2cdev_path, de->d_name);
  1018. subdir = opendir(path);
  1019. if (subdir == NULL)
  1020. continue;
  1021. while ((subde = readdir(subdir))) {
  1022. if (subde->d_name[0] == '.')
  1023. continue;
  1024. if (is_prefixed_with(subde->d_name, "i2c-")) {
  1025. snprintf(path, NAME_MAX,
  1026. "%s/%s/device/%s/name",
  1027. i2cdev_path, de->d_name,
  1028. subde->d_name);
  1029. fp = fopen(path, "r");
  1030. break;
  1031. }
  1032. }
  1033. }
  1034. if (fp != NULL) {
  1035. /*
  1036. * Get the rest of the info and display a line
  1037. * for a single bus.
  1038. */
  1039. memset(name, 0, sizeof(name));
  1040. pos = fgets(name, sizeof(name), fp);
  1041. fclose(fp);
  1042. if (pos == NULL)
  1043. continue;
  1044. pos = strchr(name, '\n');
  1045. if (pos != NULL)
  1046. *pos = '\0';
  1047. rv = sscanf(de->d_name, "i2c-%d", &bus);
  1048. if (rv != 1)
  1049. continue;
  1050. if (is_prefixed_with(name, "ISA"))
  1051. adt = ADT_ISA;
  1052. else
  1053. adt = i2cdetect_get_funcs(bus);
  1054. printf(
  1055. "i2c-%d\t%-10s\t%-32s\t%s\n",
  1056. bus, adap_descs[adt].funcs,
  1057. name, adap_descs[adt].algo);
  1058. }
  1059. }
  1060. exit(EXIT_SUCCESS);
  1061. }
  1062. static void NORETURN no_support(const char *cmd)
  1063. {
  1064. bb_error_msg_and_die("bus doesn't support %s", cmd);
  1065. }
  1066. static void will_skip(const char *cmd)
  1067. {
  1068. bb_error_msg(
  1069. "warning: can't use %s command, "
  1070. "will skip some addresses", cmd);
  1071. }
  1072. //usage:#define i2cdetect_trivial_usage
  1073. //usage: "-l | -F I2CBUS | [-ya] [-q|-r] I2CBUS [FIRST LAST]"
  1074. //usage:#define i2cdetect_full_usage "\n\n"
  1075. //usage: "Detect I2C chips"
  1076. //usage: "\n"
  1077. //usage: "\n -l List installed buses"
  1078. //usage: "\n -F BUS# List functionalities on this bus"
  1079. //usage: "\n -y Disable interactive mode"
  1080. //usage: "\n -a Force scanning of non-regular addresses"
  1081. //usage: "\n -q Use smbus quick write commands for probing (default)"
  1082. //usage: "\n -r Use smbus read byte commands for probing"
  1083. //usage: "\n FIRST and LAST limit probing range"
  1084. int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1085. int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
  1086. {
  1087. const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
  1088. opt_q = (1 << 2), opt_r = (1 << 3),
  1089. opt_F = (1 << 4), opt_l = (1 << 5);
  1090. int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status, cmd;
  1091. unsigned first = 0x03, last = 0x77, opts;
  1092. unsigned long funcs;
  1093. opts = getopt32(argv, "^"
  1094. "yaqrFl"
  1095. "\0"
  1096. "q--r:r--q:"/*mutually exclusive*/
  1097. "?3"/*up to 3 args*/
  1098. );
  1099. argv += optind;
  1100. if (opts & opt_l)
  1101. list_i2c_busses_and_exit();
  1102. if (!argv[0])
  1103. bb_show_usage();
  1104. bus_num = i2c_bus_lookup(argv[0]);
  1105. fd = i2c_dev_open(bus_num);
  1106. get_funcs_matrix(fd, &funcs);
  1107. if (opts & opt_F) {
  1108. /* Only list the functionalities. */
  1109. printf("Functionalities implemented by bus #%d\n", bus_num);
  1110. for (i = 0; i2c_funcs_tab[i].value; i++) {
  1111. printf("%-32s %s\n", i2c_funcs_tab[i].name,
  1112. funcs & i2c_funcs_tab[i].value ? "yes" : "no");
  1113. }
  1114. return EXIT_SUCCESS;
  1115. }
  1116. if (opts & opt_r)
  1117. mode = I2CDETECT_MODE_READ;
  1118. else if (opts & opt_q)
  1119. mode = I2CDETECT_MODE_QUICK;
  1120. if (opts & opt_a) {
  1121. first = 0x00;
  1122. last = 0x7f;
  1123. }
  1124. /* Read address range. */
  1125. if (argv[1]) {
  1126. first = xstrtou_range(argv[1], 16, first, last);
  1127. if (argv[2])
  1128. last = xstrtou_range(argv[2], 16, first, last);
  1129. }
  1130. if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
  1131. no_support("detection commands");
  1132. } else
  1133. if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
  1134. no_support("SMBus quick write");
  1135. } else
  1136. if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  1137. no_support("SMBus receive byte");
  1138. }
  1139. if (mode == I2CDETECT_MODE_AUTO) {
  1140. if (!(funcs & I2C_FUNC_SMBUS_QUICK))
  1141. will_skip("SMBus quick write");
  1142. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1143. will_skip("SMBus receive byte");
  1144. }
  1145. if (!(opts & opt_y))
  1146. confirm_action(-1, -1, -1, 0);
  1147. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
  1148. for (i = 0; i < 128; i += 16) {
  1149. printf("%02x: ", i);
  1150. for (j = 0; j < 16; j++) {
  1151. fflush_all();
  1152. cmd = mode;
  1153. if (mode == I2CDETECT_MODE_AUTO) {
  1154. if ((i+j >= 0x30 && i+j <= 0x37) ||
  1155. (i+j >= 0x50 && i+j <= 0x5F))
  1156. cmd = I2CDETECT_MODE_READ;
  1157. else
  1158. cmd = I2CDETECT_MODE_QUICK;
  1159. }
  1160. /* Skip unwanted addresses. */
  1161. if (i+j < first
  1162. || i+j > last
  1163. || (cmd == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1164. || (cmd == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
  1165. {
  1166. printf(" ");
  1167. continue;
  1168. }
  1169. status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
  1170. if (status < 0) {
  1171. if (errno == EBUSY) {
  1172. printf("UU ");
  1173. continue;
  1174. }
  1175. bb_perror_msg_and_die(
  1176. "can't set address to 0x%02x", i + j);
  1177. }
  1178. switch (cmd) {
  1179. case I2CDETECT_MODE_READ:
  1180. /*
  1181. * This is known to lock SMBus on various
  1182. * write-only chips (mainly clock chips).
  1183. */
  1184. status = i2c_smbus_read_byte(fd);
  1185. break;
  1186. default: /* I2CDETECT_MODE_QUICK: */
  1187. /*
  1188. * This is known to corrupt the Atmel
  1189. * AT24RF08 EEPROM.
  1190. */
  1191. status = i2c_smbus_write_quick(fd,
  1192. I2C_SMBUS_WRITE);
  1193. break;
  1194. }
  1195. if (status < 0)
  1196. printf("-- ");
  1197. else
  1198. printf("%02x ", i+j);
  1199. }
  1200. bb_putchar('\n');
  1201. }
  1202. return 0;
  1203. }
  1204. #endif /* ENABLE_I2CDETECT */
  1205. #if ENABLE_I2CTRANSFER
  1206. static void check_i2c_func(int fd)
  1207. {
  1208. unsigned long funcs;
  1209. get_funcs_matrix(fd, &funcs);
  1210. if (!(funcs & I2C_FUNC_I2C))
  1211. bb_simple_error_msg_and_die("adapter does not support I2C transfers");
  1212. }
  1213. //usage:#define i2ctransfer_trivial_usage
  1214. //usage: "[-fay] I2CBUS {rLENGTH[@ADDR] | wLENGTH[@ADDR] DATA...}..."
  1215. //usage:#define i2ctransfer_full_usage "\n\n"
  1216. //usage: "Read/write I2C data in one transfer"
  1217. //usage: "\n"
  1218. //usage: "\n -f Force access to busy addresses"
  1219. //usage: "\n -a Force access to non-regular addresses"
  1220. //usage: "\n -y Disable interactive mode"
  1221. int i2ctransfer_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1222. int i2ctransfer_main(int argc UNUSED_PARAM, char **argv)
  1223. {
  1224. enum {
  1225. opt_f = (1 << 0),
  1226. opt_y = (1 << 1),
  1227. opt_a = (1 << 2),
  1228. };
  1229. int bus_num, bus_addr;
  1230. int fd;
  1231. unsigned opts, first, last;
  1232. int nmsgs, nmsgs_sent, i;
  1233. struct i2c_msg msgs[I2C_RDWR_IOCTL_MAX_MSGS];
  1234. struct i2c_rdwr_ioctl_data rdwr;
  1235. memset(msgs, 0, sizeof(msgs));
  1236. opts = getopt32(argv, "^"
  1237. "fya"
  1238. "\0" "-2" /* minimum 2 args */
  1239. );
  1240. first = 0x03;
  1241. last = 0x77;
  1242. if (opts & opt_a) {
  1243. first = 0x00;
  1244. last = 0x7f;
  1245. }
  1246. argv += optind;
  1247. bus_num = i2c_bus_lookup(argv[0]);
  1248. fd = i2c_dev_open(bus_num);
  1249. check_i2c_func(fd);
  1250. bus_addr = -1;
  1251. nmsgs = 0;
  1252. while (*++argv) {
  1253. char *arg_ptr;
  1254. unsigned len;
  1255. uint16_t flags;
  1256. char *end;
  1257. if (nmsgs >= I2C_RDWR_IOCTL_MAX_MSGS)
  1258. bb_simple_error_msg_and_die("too many messages, max: "I2C_RDWR_IOCTL_MAX_MSGS_STR);
  1259. flags = 0;
  1260. arg_ptr = *argv;
  1261. switch (*arg_ptr++) {
  1262. case 'r': flags |= I2C_M_RD; break;
  1263. case 'w': break;
  1264. default:
  1265. bb_show_usage();
  1266. }
  1267. end = strchr(arg_ptr, '@');
  1268. if (end) *end = '\0';
  1269. len = xstrtou_range(arg_ptr, 0, 0, 0xffff);
  1270. if (end) {
  1271. bus_addr = xstrtou_range(end + 1, 0, first, last);
  1272. i2c_set_slave_addr(fd, bus_addr, (opts & opt_f));
  1273. } else {
  1274. /* Reuse last address if possible */
  1275. if (bus_addr < 0)
  1276. bb_error_msg_and_die("no address given in '%s'", *argv);
  1277. }
  1278. msgs[nmsgs].addr = bus_addr;
  1279. msgs[nmsgs].flags = flags;
  1280. msgs[nmsgs].len = len;
  1281. if (len)
  1282. msgs[nmsgs].buf = xzalloc(len);
  1283. if (!(flags & I2C_M_RD)) {
  1284. /* Consume DATA arg(s) */
  1285. unsigned buf_idx = 0;
  1286. while (buf_idx < len) {
  1287. uint8_t data8;
  1288. unsigned long data;
  1289. arg_ptr = *++argv;
  1290. if (!arg_ptr)
  1291. bb_show_usage();
  1292. data = strtoul(arg_ptr, &end, 0);
  1293. if (data > 0xff || arg_ptr == end)
  1294. bb_error_msg_and_die("invalid data byte '%s'", *argv);
  1295. data8 = data;
  1296. while (buf_idx < len) {
  1297. msgs[nmsgs].buf[buf_idx++] = data8;
  1298. if (!*end)
  1299. break;
  1300. switch (*end) {
  1301. /* Pseudo randomness (8 bit AXR with a=13 and b=27) */
  1302. case 'p':
  1303. data8 = (data8 ^ 27) + 13;
  1304. data8 = (data8 << 1) | (data8 >> 7);
  1305. break;
  1306. case '+': data8++; break;
  1307. case '-': data8--; break;
  1308. case '=': break;
  1309. default:
  1310. bb_error_msg_and_die("invalid data byte suffix: '%s'",
  1311. *argv);
  1312. }
  1313. }
  1314. }
  1315. }
  1316. nmsgs++;
  1317. }
  1318. if (!(opts & opt_y))
  1319. confirm_action(bus_addr, 0, 0, 0);
  1320. rdwr.msgs = msgs;
  1321. rdwr.nmsgs = nmsgs;
  1322. nmsgs_sent = ioctl_or_perror_and_die(fd, I2C_RDWR, &rdwr, "I2C_RDWR");
  1323. if (nmsgs_sent < nmsgs)
  1324. bb_error_msg("warning: only %u/%u messages sent", nmsgs_sent, nmsgs);
  1325. for (i = 0; i < nmsgs_sent; i++) {
  1326. if (msgs[i].len != 0 && (msgs[i].flags & I2C_M_RD)) {
  1327. int j;
  1328. for (j = 0; j < msgs[i].len - 1; j++)
  1329. printf("0x%02x ", msgs[i].buf[j]);
  1330. /* Print final byte with newline */
  1331. printf("0x%02x\n", msgs[i].buf[j]);
  1332. }
  1333. }
  1334. # if ENABLE_FEATURE_CLEAN_UP
  1335. close(fd);
  1336. for (i = 0; i < nmsgs; i++)
  1337. free(msgs[i].buf);
  1338. # endif
  1339. return 0;
  1340. }
  1341. #endif /* ENABLE_I2CTRANSFER */