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Makefile.build 10 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. src := $(obj)
  5. PHONY := __build
  6. __build:
  7. # Read .config if it exist, otherwise ignore
  8. -include .config
  9. include scripts/Kbuild.include
  10. # The filename Kbuild has precedence over Makefile
  11. # bbox: we also try to include Kbuild file in obj tree first
  12. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  13. include $(if $(wildcard $(src)/Kbuild), $(src)/Kbuild, \
  14. $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, \
  15. $(kbuild-dir)/Makefile \
  16. ) \
  17. )
  18. include scripts/Makefile.lib
  19. ifdef host-progs
  20. ifneq ($(hostprogs-y),$(host-progs))
  21. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  22. hostprogs-y += $(host-progs)
  23. endif
  24. endif
  25. # Do not include host rules unles needed
  26. ifneq ($(hostprogs-y)$(hostprogs-m),)
  27. include scripts/Makefile.host
  28. endif
  29. ifneq ($(KBUILD_SRC),)
  30. # Create output directory if not already present
  31. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  32. # Create directories for object files if directory does not exist
  33. # Needed when obj-y := dir/file.o syntax is used
  34. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  35. endif
  36. ifdef EXTRA_TARGETS
  37. $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
  38. endif
  39. ifdef build-targets
  40. $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
  41. endif
  42. ifdef export-objs
  43. $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
  44. endif
  45. ifdef O_TARGET
  46. $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
  47. endif
  48. ifdef L_TARGET
  49. $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
  50. endif
  51. ifdef list-multi
  52. $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
  53. endif
  54. ifndef obj
  55. $(warning kbuild: Makefile.build is included improperly)
  56. endif
  57. # ===========================================================================
  58. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  59. lib-target := $(obj)/lib.a
  60. endif
  61. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  62. builtin-target := $(obj)/built-in.o
  63. endif
  64. # We keep a list of all modules in $(MODVERDIR)
  65. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  66. $(if $(KBUILD_MODULES),$(obj-m)) \
  67. $(subdir-ym) $(always)
  68. @:
  69. # Linus' kernel sanity checking tool
  70. ifneq ($(KBUILD_CHECKSRC),0)
  71. ifeq ($(KBUILD_CHECKSRC),2)
  72. quiet_cmd_force_checksrc = CHECK $<
  73. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  74. else
  75. quiet_cmd_checksrc = CHECK $<
  76. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  77. endif
  78. endif
  79. # Compile C sources (.c)
  80. # ---------------------------------------------------------------------------
  81. # Default is built-in, unless we know otherwise
  82. modkern_cflags := $(CFLAGS_KERNEL)
  83. quiet_modtag := $(empty) $(empty)
  84. $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
  85. $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
  86. $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
  87. $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
  88. $(real-objs-m) : quiet_modtag := [M]
  89. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  90. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  91. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  92. $(obj-m) : quiet_modtag := [M]
  93. # Default for not multi-part modules
  94. modname = $(*F)
  95. $(multi-objs-m) : modname = $(modname-multi)
  96. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  97. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  98. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  99. $(multi-objs-y) : modname = $(modname-multi)
  100. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  101. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  102. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  103. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  104. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  105. %.s: %.c FORCE
  106. $(call if_changed_dep,cc_s_c)
  107. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  108. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  109. %.i: %.c FORCE
  110. $(call if_changed_dep,cc_i_c)
  111. # C (.c) files
  112. # The C file is compiled and updated dependency information is generated.
  113. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  114. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  115. ifndef CONFIG_MODVERSIONS
  116. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  117. else
  118. # When module versioning is enabled the following steps are executed:
  119. # o compile a .tmp_<file>.o from <file>.c
  120. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  121. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  122. # are done.
  123. # o otherwise, we calculate symbol versions using the good old
  124. # genksyms on the preprocessed source and postprocess them in a way
  125. # that they are usable as a linker script
  126. # o generate <file>.o from .tmp_<file>.o using the linker to
  127. # replace the unresolved symbols __crc_exported_symbol with
  128. # the actual value of the checksum generated by genksyms
  129. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  130. cmd_modversions = \
  131. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  132. $(CPP) -D__GENKSYMS__ $(c_flags) $< \
  133. | $(GENKSYMS) -a $(ARCH) \
  134. > $(@D)/.tmp_$(@F:.o=.ver); \
  135. \
  136. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  137. -T $(@D)/.tmp_$(@F:.o=.ver); \
  138. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  139. else \
  140. mv -f $(@D)/.tmp_$(@F) $@; \
  141. fi;
  142. endif
  143. define rule_cc_o_c
  144. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  145. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  146. $(cmd_modversions) \
  147. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
  148. rm -f $(depfile); \
  149. mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
  150. endef
  151. # Built-in and composite module parts
  152. %.o: %.c FORCE
  153. $(call cmd,force_checksrc)
  154. $(call if_changed_rule,cc_o_c)
  155. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  156. $(single-used-m): %.o: %.c FORCE
  157. $(call cmd,force_checksrc)
  158. $(call if_changed_rule,cc_o_c)
  159. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  160. quiet_cmd_cc_lst_c = MKLST $@
  161. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  162. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  163. System.map $(OBJDUMP) > $@
  164. %.lst: %.c FORCE
  165. $(call if_changed_dep,cc_lst_c)
  166. # Compile assembler sources (.S)
  167. # ---------------------------------------------------------------------------
  168. modkern_aflags := $(AFLAGS_KERNEL)
  169. $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
  170. $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
  171. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  172. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  173. %.s: %.S FORCE
  174. $(call if_changed_dep,as_s_S)
  175. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  176. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  177. %.o: %.S FORCE
  178. $(call if_changed_dep,as_o_S)
  179. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  180. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  181. # Linker scripts preprocessor (.lds.S -> .lds)
  182. # ---------------------------------------------------------------------------
  183. quiet_cmd_cpp_lds_S = LDS $@
  184. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
  185. %.lds: %.lds.S FORCE
  186. $(call if_changed_dep,cpp_lds_S)
  187. # Build the compiled-in targets
  188. # ---------------------------------------------------------------------------
  189. # To build objects in subdirs, we need to descend into the directories
  190. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  191. #
  192. # Rule to compile a set of .o files into one .o file
  193. #
  194. ifdef builtin-target
  195. quiet_cmd_link_o_target = LD $@
  196. # If the list of objects to link is empty, just create an empty built-in.o
  197. # -nostdlib is added to make "make LD=gcc ..." work (some people use that)
  198. cmd_link_o_target = $(if $(strip $(obj-y)),\
  199. $(LD) -nostdlib $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
  200. rm -f $@; $(AR) rcs $@)
  201. $(builtin-target): $(obj-y) FORCE
  202. $(call if_changed,link_o_target)
  203. targets += $(builtin-target)
  204. endif # builtin-target
  205. #
  206. # Rule to compile a set of .o files into one .a file
  207. #
  208. ifdef lib-target
  209. quiet_cmd_link_l_target = AR $@
  210. cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
  211. $(lib-target): $(lib-y) FORCE
  212. $(call if_changed,link_l_target)
  213. targets += $(lib-target)
  214. endif
  215. #
  216. # Rule to link composite objects
  217. #
  218. # Composite objects are specified in kbuild makefile as follows:
  219. # <composite-object>-objs := <list of .o files>
  220. # or
  221. # <composite-object>-y := <list of .o files>
  222. link_multi_deps = \
  223. $(filter $(addprefix $(obj)/, \
  224. $($(subst $(obj)/,,$(@:.o=-objs))) \
  225. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  226. quiet_cmd_link_multi-y = LD $@
  227. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
  228. quiet_cmd_link_multi-m = LD [M] $@
  229. cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
  230. # We would rather have a list of rules like
  231. # foo.o: $(foo-objs)
  232. # but that's not so easy, so we rather make all composite objects depend
  233. # on the set of all their parts
  234. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  235. $(call if_changed,link_multi-y)
  236. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  237. $(call if_changed,link_multi-m)
  238. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  239. targets += $(multi-used-y) $(multi-used-m)
  240. # Descending
  241. # ---------------------------------------------------------------------------
  242. PHONY += $(subdir-ym)
  243. $(subdir-ym):
  244. $(Q)$(MAKE) $(build)=$@
  245. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  246. # ---------------------------------------------------------------------------
  247. PHONY += FORCE
  248. FORCE:
  249. # Read all saved command lines and dependencies for the $(targets) we
  250. # may be building above, using $(if_changed{,_dep}). As an
  251. # optimization, we don't need to read them if the target does not
  252. # exist, we will rebuild anyway in that case.
  253. targets := $(wildcard $(sort $(targets)))
  254. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  255. ifneq ($(cmd_files),)
  256. include $(cmd_files)
  257. endif
  258. # Declare the contents of the .PHONY variable as phony. We keep that
  259. # information in a variable se we can use it in if_changed and friends.
  260. .PHONY: $(PHONY)