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i2c_tools.c 32 KB

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  1. /* vi: set sw=4 ts=4: */
  2. /*
  3. * Minimal i2c-tools implementation for busybox.
  4. * Parts of code ported from i2c-tools:
  5. * http://www.lm-sensors.org/wiki/I2CTools.
  6. *
  7. * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
  8. *
  9. * Licensed under GPLv2 or later, see file LICENSE in this source tree.
  10. */
  11. //config:config I2CGET
  12. //config: bool "i2cget"
  13. //config: default y
  14. //config: select PLATFORM_LINUX
  15. //config: help
  16. //config: Read from I2C/SMBus chip registers.
  17. //config:
  18. //config:config I2CSET
  19. //config: bool "i2cset"
  20. //config: default y
  21. //config: select PLATFORM_LINUX
  22. //config: help
  23. //config: Set I2C registers.
  24. //config:
  25. //config:config I2CDUMP
  26. //config: bool "i2cdump"
  27. //config: default y
  28. //config: select PLATFORM_LINUX
  29. //config: help
  30. //config: Examine I2C registers.
  31. //config:
  32. //config:config I2CDETECT
  33. //config: bool "i2cdetect"
  34. //config: default y
  35. //config: select PLATFORM_LINUX
  36. //config: help
  37. //config: Detect I2C chips.
  38. //config:
  39. //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
  40. //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
  41. //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
  42. //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
  43. //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
  44. //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
  45. //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
  46. //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
  47. /*
  48. * Unsupported stuff:
  49. *
  50. * - upstream i2c-tools can also look-up i2c busses by name, we only accept
  51. * numbers,
  52. * - bank and bankreg parameters for i2cdump are not supported because of
  53. * their limited usefulness (see i2cdump manual entry for more info),
  54. * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
  55. * it shouldn't be a problem in modern kernels.
  56. */
  57. #include "libbb.h"
  58. #include <linux/i2c.h>
  59. #include <linux/i2c-dev.h>
  60. #define I2CDUMP_NUM_REGS 256
  61. #define I2CDETECT_MODE_AUTO 0
  62. #define I2CDETECT_MODE_QUICK 1
  63. #define I2CDETECT_MODE_READ 2
  64. /*
  65. * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
  66. */
  67. static ALWAYS_INLINE void *itoptr(int i)
  68. {
  69. return (void*)(intptr_t)i;
  70. }
  71. static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
  72. int size, union i2c_smbus_data *data)
  73. {
  74. struct i2c_smbus_ioctl_data args;
  75. args.read_write = read_write;
  76. args.command = cmd;
  77. args.size = size;
  78. args.data = data;
  79. return ioctl(fd, I2C_SMBUS, &args);
  80. }
  81. static int32_t i2c_smbus_read_byte(int fd)
  82. {
  83. union i2c_smbus_data data;
  84. int err;
  85. err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
  86. if (err < 0)
  87. return err;
  88. return data.byte;
  89. }
  90. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  91. static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
  92. {
  93. return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
  94. val, I2C_SMBUS_BYTE, NULL);
  95. }
  96. static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
  97. {
  98. union i2c_smbus_data data;
  99. int err;
  100. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  101. I2C_SMBUS_BYTE_DATA, &data);
  102. if (err < 0)
  103. return err;
  104. return data.byte;
  105. }
  106. static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
  107. {
  108. union i2c_smbus_data data;
  109. int err;
  110. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  111. I2C_SMBUS_WORD_DATA, &data);
  112. if (err < 0)
  113. return err;
  114. return data.word;
  115. }
  116. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  117. #if ENABLE_I2CSET
  118. static int32_t i2c_smbus_write_byte_data(int file,
  119. uint8_t cmd, uint8_t value)
  120. {
  121. union i2c_smbus_data data;
  122. data.byte = value;
  123. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  124. I2C_SMBUS_BYTE_DATA, &data);
  125. }
  126. static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
  127. {
  128. union i2c_smbus_data data;
  129. data.word = value;
  130. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  131. I2C_SMBUS_WORD_DATA, &data);
  132. }
  133. static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
  134. uint8_t length, const uint8_t *values)
  135. {
  136. union i2c_smbus_data data;
  137. if (length > I2C_SMBUS_BLOCK_MAX)
  138. length = I2C_SMBUS_BLOCK_MAX;
  139. memcpy(data.block+1, values, length);
  140. data.block[0] = length;
  141. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  142. I2C_SMBUS_BLOCK_DATA, &data);
  143. }
  144. static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
  145. uint8_t length, const uint8_t *values)
  146. {
  147. union i2c_smbus_data data;
  148. if (length > I2C_SMBUS_BLOCK_MAX)
  149. length = I2C_SMBUS_BLOCK_MAX;
  150. memcpy(data.block+1, values, length);
  151. data.block[0] = length;
  152. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  153. I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
  154. }
  155. #endif /* ENABLE_I2CSET */
  156. #if ENABLE_I2CDUMP
  157. /*
  158. * Returns the number of bytes read, vals must hold at
  159. * least I2C_SMBUS_BLOCK_MAX bytes.
  160. */
  161. static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
  162. {
  163. union i2c_smbus_data data;
  164. int i, err;
  165. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  166. I2C_SMBUS_BLOCK_DATA, &data);
  167. if (err < 0)
  168. return err;
  169. for (i = 1; i <= data.block[0]; i++)
  170. *vals++ = data.block[i];
  171. return data.block[0];
  172. }
  173. static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
  174. uint8_t len, uint8_t *vals)
  175. {
  176. union i2c_smbus_data data;
  177. int i, err;
  178. if (len > I2C_SMBUS_BLOCK_MAX)
  179. len = I2C_SMBUS_BLOCK_MAX;
  180. data.block[0] = len;
  181. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  182. len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
  183. I2C_SMBUS_I2C_BLOCK_DATA, &data);
  184. if (err < 0)
  185. return err;
  186. for (i = 1; i <= data.block[0]; i++)
  187. *vals++ = data.block[i];
  188. return data.block[0];
  189. }
  190. #endif /* ENABLE_I2CDUMP */
  191. #if ENABLE_I2CDETECT
  192. static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
  193. {
  194. return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
  195. }
  196. #endif /* ENABLE_I2CDETECT */
  197. static int i2c_bus_lookup(const char *bus_str)
  198. {
  199. return xstrtou_range(bus_str, 10, 0, 0xfffff);
  200. }
  201. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  202. static int i2c_parse_bus_addr(const char *addr_str)
  203. {
  204. /* Slave address must be in range 0x03 - 0x77. */
  205. return xstrtou_range(addr_str, 16, 0x03, 0x77);
  206. }
  207. static void i2c_set_pec(int fd, int pec)
  208. {
  209. ioctl_or_perror_and_die(fd, I2C_PEC,
  210. itoptr(pec ? 1 : 0),
  211. "can't set PEC");
  212. }
  213. static void i2c_set_slave_addr(int fd, int addr, int force)
  214. {
  215. ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
  216. itoptr(addr),
  217. "can't set address to 0x%02x", addr);
  218. }
  219. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  220. #if ENABLE_I2CGET || ENABLE_I2CSET
  221. static int i2c_parse_data_addr(const char *data_addr)
  222. {
  223. /* Data address must be an 8 bit integer. */
  224. return xstrtou_range(data_addr, 16, 0, 0xff);
  225. }
  226. #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
  227. /*
  228. * Opens the device file associated with given i2c bus.
  229. *
  230. * Upstream i2c-tools also support opening devices by i2c bus name
  231. * but we drop it here for size reduction.
  232. */
  233. static int i2c_dev_open(int i2cbus)
  234. {
  235. char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
  236. int fd;
  237. sprintf(filename, "/dev/i2c-%d", i2cbus);
  238. fd = open(filename, O_RDWR);
  239. if (fd < 0) {
  240. if (errno == ENOENT) {
  241. filename[8] = '/'; /* change to "/dev/i2c/%d" */
  242. fd = xopen(filename, O_RDWR);
  243. } else {
  244. bb_perror_msg_and_die("can't open '%s'", filename);
  245. }
  246. }
  247. return fd;
  248. }
  249. /* Size reducing helpers for xxx_check_funcs(). */
  250. static void get_funcs_matrix(int fd, unsigned long *funcs)
  251. {
  252. ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
  253. "can't get adapter functionality matrix");
  254. }
  255. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  256. static void check_funcs_test_end(int funcs, int pec, const char *err)
  257. {
  258. if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
  259. bb_error_msg("warning: adapter does not support PEC");
  260. if (err)
  261. bb_error_msg_and_die(
  262. "adapter has no %s capability", err);
  263. }
  264. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  265. /*
  266. * The below functions emit an error message and exit if the adapter doesn't
  267. * support desired functionalities.
  268. */
  269. #if ENABLE_I2CGET || ENABLE_I2CDUMP
  270. static void check_read_funcs(int fd, int mode, int data_addr, int pec)
  271. {
  272. unsigned long funcs;
  273. const char *err = NULL;
  274. get_funcs_matrix(fd, &funcs);
  275. switch (mode) {
  276. case I2C_SMBUS_BYTE:
  277. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  278. err = "SMBus receive byte";
  279. break;
  280. }
  281. if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  282. err = "SMBus send byte";
  283. break;
  284. case I2C_SMBUS_BYTE_DATA:
  285. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
  286. err = "SMBus read byte";
  287. break;
  288. case I2C_SMBUS_WORD_DATA:
  289. if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
  290. err = "SMBus read word";
  291. break;
  292. #if ENABLE_I2CDUMP
  293. case I2C_SMBUS_BLOCK_DATA:
  294. if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
  295. err = "SMBus block read";
  296. break;
  297. case I2C_SMBUS_I2C_BLOCK_DATA:
  298. if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
  299. err = "I2C block read";
  300. break;
  301. #endif /* ENABLE_I2CDUMP */
  302. default:
  303. bb_error_msg_and_die("internal error");
  304. }
  305. check_funcs_test_end(funcs, pec, err);
  306. }
  307. #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
  308. #if ENABLE_I2CSET
  309. static void check_write_funcs(int fd, int mode, int pec)
  310. {
  311. unsigned long funcs;
  312. const char *err = NULL;
  313. get_funcs_matrix(fd, &funcs);
  314. switch (mode) {
  315. case I2C_SMBUS_BYTE:
  316. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  317. err = "SMBus send byte";
  318. break;
  319. case I2C_SMBUS_BYTE_DATA:
  320. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  321. err = "SMBus write byte";
  322. break;
  323. case I2C_SMBUS_WORD_DATA:
  324. if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
  325. err = "SMBus write word";
  326. break;
  327. case I2C_SMBUS_BLOCK_DATA:
  328. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
  329. err = "SMBus block write";
  330. break;
  331. case I2C_SMBUS_I2C_BLOCK_DATA:
  332. if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
  333. err = "I2C block write";
  334. break;
  335. }
  336. check_funcs_test_end(funcs, pec, err);
  337. }
  338. #endif /* ENABLE_I2CSET */
  339. static void confirm_or_abort(void)
  340. {
  341. fprintf(stderr, "Continue? [y/N] ");
  342. fflush_all();
  343. if (!bb_ask_confirmation())
  344. bb_error_msg_and_die("aborting");
  345. }
  346. /*
  347. * Return only if user confirms the action, abort otherwise.
  348. *
  349. * The messages displayed here are much less elaborate than their i2c-tools
  350. * counterparts - this is done for size reduction.
  351. */
  352. static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
  353. {
  354. bb_error_msg("WARNING! This program can confuse your I2C bus");
  355. /* Don't let the user break his/her EEPROMs */
  356. if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
  357. bb_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
  358. "devices may result in data loss, aborting");
  359. }
  360. if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
  361. bb_error_msg("WARNING! May interpret a write byte command "
  362. "with PEC as a write byte data command");
  363. if (pec)
  364. bb_error_msg("PEC checking enabled");
  365. confirm_or_abort();
  366. }
  367. #if ENABLE_I2CGET
  368. //usage:#define i2cget_trivial_usage
  369. //usage: "[-f] [-y] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
  370. //usage:#define i2cget_full_usage "\n\n"
  371. //usage: "Read from I2C/SMBus chip registers\n"
  372. //usage: "\n I2CBUS i2c bus number"
  373. //usage: "\n ADDRESS 0x03 - 0x77"
  374. //usage: "\nMODE is:"
  375. //usage: "\n b read byte data (default)"
  376. //usage: "\n w read word data"
  377. //usage: "\n c write byte/read byte"
  378. //usage: "\n Append p for SMBus PEC"
  379. //usage: "\n"
  380. //usage: "\n -f force access"
  381. //usage: "\n -y disable interactive mode"
  382. int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  383. int i2cget_main(int argc UNUSED_PARAM, char **argv)
  384. {
  385. const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
  386. const char *const optstr = "fy";
  387. int bus_num, bus_addr, data_addr = -1, status;
  388. int mode = I2C_SMBUS_BYTE, pec = 0, fd;
  389. unsigned opts;
  390. opt_complementary = "-2:?4"; /* from 2 to 4 args */
  391. opts = getopt32(argv, optstr);
  392. argv += optind;
  393. bus_num = i2c_bus_lookup(argv[0]);
  394. bus_addr = i2c_parse_bus_addr(argv[1]);
  395. if (argv[2]) {
  396. data_addr = i2c_parse_data_addr(argv[2]);
  397. mode = I2C_SMBUS_BYTE_DATA;
  398. if (argv[3]) {
  399. switch (argv[3][0]) {
  400. case 'b': /* Already set */ break;
  401. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  402. case 'c': mode = I2C_SMBUS_BYTE; break;
  403. default:
  404. bb_error_msg("invalid mode");
  405. bb_show_usage();
  406. }
  407. pec = argv[3][1] == 'p';
  408. }
  409. }
  410. fd = i2c_dev_open(bus_num);
  411. check_read_funcs(fd, mode, data_addr, pec);
  412. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  413. if (!(opts & opt_y))
  414. confirm_action(bus_addr, mode, data_addr, pec);
  415. if (pec)
  416. i2c_set_pec(fd, 1);
  417. switch (mode) {
  418. case I2C_SMBUS_BYTE:
  419. if (data_addr >= 0) {
  420. status = i2c_smbus_write_byte(fd, data_addr);
  421. if (status < 0)
  422. bb_error_msg("warning - write failed");
  423. }
  424. status = i2c_smbus_read_byte(fd);
  425. break;
  426. case I2C_SMBUS_WORD_DATA:
  427. status = i2c_smbus_read_word_data(fd, data_addr);
  428. break;
  429. default: /* I2C_SMBUS_BYTE_DATA */
  430. status = i2c_smbus_read_byte_data(fd, data_addr);
  431. }
  432. close(fd);
  433. if (status < 0)
  434. bb_perror_msg_and_die("read failed");
  435. printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  436. return 0;
  437. }
  438. #endif /* ENABLE_I2CGET */
  439. #if ENABLE_I2CSET
  440. //usage:#define i2cset_trivial_usage
  441. //usage: "[-f] [-y] [-m MASK] BUS CHIP-ADDR DATA-ADDR [VALUE] ... [MODE]"
  442. //usage:#define i2cset_full_usage "\n\n"
  443. //usage: "Set I2C registers\n"
  444. //usage: "\n I2CBUS i2c bus number"
  445. //usage: "\n ADDRESS 0x03 - 0x77"
  446. //usage: "\nMODE is:"
  447. //usage: "\n c byte, no value"
  448. //usage: "\n b byte data (default)"
  449. //usage: "\n w word data"
  450. //usage: "\n i I2C block data"
  451. //usage: "\n s SMBus block data"
  452. //usage: "\n Append p for SMBus PEC"
  453. //usage: "\n"
  454. //usage: "\n -f force access"
  455. //usage: "\n -y disable interactive mode"
  456. //usage: "\n -r read back and compare the result"
  457. //usage: "\n -m MASK mask specifying which bits to write"
  458. int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  459. int i2cset_main(int argc, char **argv)
  460. {
  461. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  462. opt_m = (1 << 2), opt_r = (1 << 3);
  463. const char *const optstr = "fym:r";
  464. int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
  465. int val, blen = 0, mask = 0, fd, status;
  466. unsigned char block[I2C_SMBUS_BLOCK_MAX];
  467. char *opt_m_arg = NULL;
  468. unsigned opts;
  469. opt_complementary = "-3"; /* from 3 to ? args */
  470. opts = getopt32(argv, optstr, &opt_m_arg);
  471. argv += optind;
  472. argc -= optind;
  473. bus_num = i2c_bus_lookup(argv[0]);
  474. bus_addr = i2c_parse_bus_addr(argv[1]);
  475. data_addr = i2c_parse_data_addr(argv[2]);
  476. if (argv[3]) {
  477. if (!argv[4] && argv[3][0] != 'c') {
  478. mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
  479. } else {
  480. switch (argv[argc-1][0]) {
  481. case 'c': /* Already set */ break;
  482. case 'b': mode = I2C_SMBUS_BYTE_DATA; break;
  483. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  484. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  485. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  486. default:
  487. bb_error_msg("invalid mode");
  488. bb_show_usage();
  489. }
  490. pec = argv[argc-1][1] == 'p';
  491. if (mode == I2C_SMBUS_BLOCK_DATA ||
  492. mode == I2C_SMBUS_I2C_BLOCK_DATA) {
  493. if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
  494. bb_error_msg_and_die(
  495. "PEC not supported for I2C "
  496. "block writes");
  497. if (opts & opt_m)
  498. bb_error_msg_and_die(
  499. "mask not supported for block "
  500. "writes");
  501. }
  502. }
  503. }
  504. /* Prepare the value(s) to be written according to current mode. */
  505. switch (mode) {
  506. case I2C_SMBUS_BYTE_DATA:
  507. val = xstrtou_range(argv[3], 0, 0, 0xff);
  508. break;
  509. case I2C_SMBUS_WORD_DATA:
  510. val = xstrtou_range(argv[3], 0, 0, 0xffff);
  511. break;
  512. case I2C_SMBUS_BLOCK_DATA:
  513. case I2C_SMBUS_I2C_BLOCK_DATA:
  514. for (blen = 3; blen < (argc - 1); blen++)
  515. block[blen] = xstrtou_range(argv[blen], 0, 0, 0xff);
  516. val = -1;
  517. break;
  518. default:
  519. val = -1;
  520. break;
  521. }
  522. if (opts & opt_m) {
  523. mask = xstrtou_range(opt_m_arg, 0, 0,
  524. (mode == I2C_SMBUS_BYTE ||
  525. mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
  526. }
  527. fd = i2c_dev_open(bus_num);
  528. check_write_funcs(fd, mode, pec);
  529. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  530. if (!(opts & opt_y))
  531. confirm_action(bus_addr, mode, data_addr, pec);
  532. /*
  533. * If we're using mask - read the current value here and adjust the
  534. * value to be written.
  535. */
  536. if (opts & opt_m) {
  537. int tmpval;
  538. switch (mode) {
  539. case I2C_SMBUS_BYTE:
  540. tmpval = i2c_smbus_read_byte(fd);
  541. break;
  542. case I2C_SMBUS_WORD_DATA:
  543. tmpval = i2c_smbus_read_word_data(fd, data_addr);
  544. break;
  545. default:
  546. tmpval = i2c_smbus_read_byte_data(fd, data_addr);
  547. }
  548. if (tmpval < 0)
  549. bb_perror_msg_and_die("can't read old value");
  550. val = (val & mask) | (tmpval & ~mask);
  551. if (!(opts & opt_y)) {
  552. bb_error_msg("old value 0x%0*x, write mask "
  553. "0x%0*x, will write 0x%0*x to register "
  554. "0x%02x",
  555. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
  556. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
  557. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  558. data_addr);
  559. confirm_or_abort();
  560. }
  561. }
  562. if (pec)
  563. i2c_set_pec(fd, 1);
  564. switch (mode) {
  565. case I2C_SMBUS_BYTE:
  566. status = i2c_smbus_write_byte(fd, data_addr);
  567. break;
  568. case I2C_SMBUS_WORD_DATA:
  569. status = i2c_smbus_write_word_data(fd, data_addr, val);
  570. break;
  571. case I2C_SMBUS_BLOCK_DATA:
  572. status = i2c_smbus_write_block_data(fd, data_addr,
  573. blen, block);
  574. break;
  575. case I2C_SMBUS_I2C_BLOCK_DATA:
  576. status = i2c_smbus_write_i2c_block_data(fd, data_addr,
  577. blen, block);
  578. break;
  579. default: /* I2C_SMBUS_BYTE_DATA */
  580. status = i2c_smbus_write_byte_data(fd, data_addr, val);
  581. break;
  582. }
  583. if (status < 0)
  584. bb_perror_msg_and_die("write failed");
  585. if (pec)
  586. i2c_set_pec(fd, 0); /* Clear PEC. */
  587. /* No readback required - we're done. */
  588. if (!(opts & opt_r))
  589. return 0;
  590. switch (mode) {
  591. case I2C_SMBUS_BYTE:
  592. status = i2c_smbus_read_byte(fd);
  593. val = data_addr;
  594. break;
  595. case I2C_SMBUS_WORD_DATA:
  596. status = i2c_smbus_read_word_data(fd, data_addr);
  597. break;
  598. default: /* I2C_SMBUS_BYTE_DATA */
  599. status = i2c_smbus_read_byte_data(fd, data_addr);
  600. }
  601. if (status < 0) {
  602. puts("Warning - readback failed");
  603. } else
  604. if (status != val) {
  605. printf("Warning - data mismatch - wrote "
  606. "0x%0*x, read back 0x%0*x\n",
  607. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  608. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  609. } else {
  610. printf("Value 0x%0*x written, readback matched\n",
  611. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
  612. }
  613. return 0;
  614. }
  615. #endif /* ENABLE_I2CSET */
  616. #if ENABLE_I2CDUMP
  617. static int read_block_data(int buf_fd, int mode, int *block)
  618. {
  619. uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
  620. int res, blen = 0, tmp, i;
  621. if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA) {
  622. res = i2c_smbus_read_block_data(buf_fd, 0, cblock);
  623. blen = res;
  624. } else {
  625. for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
  626. tmp = i2c_smbus_read_i2c_block_data(
  627. buf_fd, res, I2C_SMBUS_BLOCK_MAX,
  628. cblock + res);
  629. if (tmp < 0) {
  630. bb_error_msg_and_die("block read failed");
  631. }
  632. }
  633. if (res >= I2CDUMP_NUM_REGS)
  634. res = I2CDUMP_NUM_REGS;
  635. for (i = 0; i < res; i++)
  636. block[i] = cblock[i];
  637. if (mode != I2C_SMBUS_BLOCK_DATA)
  638. for (i = res; i < I2CDUMP_NUM_REGS; i++)
  639. block[i] = -1;
  640. }
  641. return blen;
  642. }
  643. /* Dump all but word data. */
  644. static void dump_data(int bus_fd, int mode, unsigned first,
  645. unsigned last, int *block, int blen)
  646. {
  647. int i, j, res;
  648. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
  649. " 0123456789abcdef");
  650. for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
  651. if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
  652. break;
  653. if (i/16 < first/16)
  654. continue;
  655. if (i/16 > last/16)
  656. break;
  657. printf("%02x: ", i);
  658. for (j = 0; j < 16; j++) {
  659. fflush_all();
  660. /* Skip unwanted registers */
  661. if (i+j < first || i+j > last) {
  662. printf(" ");
  663. if (mode == I2C_SMBUS_WORD_DATA) {
  664. printf(" ");
  665. j++;
  666. }
  667. continue;
  668. }
  669. switch (mode) {
  670. case I2C_SMBUS_BYTE_DATA:
  671. res = i2c_smbus_read_byte_data(bus_fd, i+j);
  672. block[i+j] = res;
  673. break;
  674. case I2C_SMBUS_WORD_DATA:
  675. res = i2c_smbus_read_word_data(bus_fd, i+j);
  676. if (res < 0) {
  677. block[i+j] = res;
  678. block[i+j+1] = res;
  679. } else {
  680. block[i+j] = res & 0xff;
  681. block[i+j+1] = res >> 8;
  682. }
  683. break;
  684. case I2C_SMBUS_BYTE:
  685. res = i2c_smbus_read_byte(bus_fd);
  686. block[i+j] = res;
  687. break;
  688. default:
  689. res = block[i+j];
  690. }
  691. if (mode == I2C_SMBUS_BLOCK_DATA &&
  692. i+j >= blen) {
  693. printf(" ");
  694. } else if (res < 0) {
  695. printf("XX ");
  696. if (mode == I2C_SMBUS_WORD_DATA)
  697. printf("XX ");
  698. } else {
  699. printf("%02x ", block[i+j]);
  700. if (mode == I2C_SMBUS_WORD_DATA)
  701. printf("%02x ", block[i+j+1]);
  702. }
  703. if (mode == I2C_SMBUS_WORD_DATA)
  704. j++;
  705. }
  706. printf(" ");
  707. for (j = 0; j < 16; j++) {
  708. if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
  709. break;
  710. /* Skip unwanted registers */
  711. if (i+j < first || i+j > last) {
  712. bb_putchar(' ');
  713. continue;
  714. }
  715. res = block[i+j];
  716. if (res < 0) {
  717. bb_putchar('X');
  718. } else if (res == 0x00 || res == 0xff) {
  719. bb_putchar('.');
  720. } else if (res < 32 || res >= 127) {
  721. bb_putchar('?');
  722. } else {
  723. bb_putchar(res);
  724. }
  725. }
  726. bb_putchar('\n');
  727. }
  728. }
  729. static void dump_word_data(int bus_fd, unsigned first, unsigned last)
  730. {
  731. int i, j, rv;
  732. /* Word data. */
  733. puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
  734. for (i = 0; i < 256; i += 8) {
  735. if (i/8 < first/8)
  736. continue;
  737. if (i/8 > last/8)
  738. break;
  739. printf("%02x: ", i);
  740. for (j = 0; j < 8; j++) {
  741. /* Skip unwanted registers. */
  742. if (i+j < first || i+j > last) {
  743. printf(" ");
  744. continue;
  745. }
  746. rv = i2c_smbus_read_word_data(bus_fd, i+j);
  747. if (rv < 0)
  748. printf("XXXX ");
  749. else
  750. printf("%04x ", rv & 0xffff);
  751. }
  752. bb_putchar('\n');
  753. }
  754. }
  755. //usage:#define i2cdump_trivial_usage
  756. //usage: "[-f] [-r FIRST-LAST] [-y] BUS ADDR [MODE]"
  757. //usage:#define i2cdump_full_usage "\n\n"
  758. //usage: "Examine I2C registers\n"
  759. //usage: "\n I2CBUS i2c bus number"
  760. //usage: "\n ADDRESS 0x03 - 0x77"
  761. //usage: "\nMODE is:"
  762. //usage: "\n b byte (default)"
  763. //usage: "\n w word"
  764. //usage: "\n W word on even register addresses"
  765. //usage: "\n i I2C block"
  766. //usage: "\n s SMBus block"
  767. //usage: "\n c consecutive byte"
  768. //usage: "\n Append p for SMBus PEC"
  769. //usage: "\n"
  770. //usage: "\n -f force access"
  771. //usage: "\n -y disable interactive mode"
  772. //usage: "\n -r limit the number of registers being accessed"
  773. int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  774. int i2cdump_main(int argc UNUSED_PARAM, char **argv)
  775. {
  776. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  777. opt_r = (1 << 2);
  778. const char *const optstr = "fyr:";
  779. int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
  780. unsigned first = 0x00, last = 0xff, opts;
  781. int *block = (int *)bb_common_bufsiz1;
  782. char *opt_r_str, *dash;
  783. int fd, res, blen;
  784. opt_complementary = "-2:?3"; /* from 2 to 3 args */
  785. opts = getopt32(argv, optstr, &opt_r_str);
  786. argv += optind;
  787. bus_num = i2c_bus_lookup(argv[0]);
  788. bus_addr = i2c_parse_bus_addr(argv[1]);
  789. if (argv[2]) {
  790. switch (argv[2][0]) {
  791. case 'b': /* Already set. */ break;
  792. case 'c': mode = I2C_SMBUS_BYTE; break;
  793. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  794. case 'W':
  795. mode = I2C_SMBUS_WORD_DATA;
  796. even = 1;
  797. break;
  798. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  799. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  800. default:
  801. bb_error_msg_and_die("invalid mode");
  802. }
  803. if (argv[2][1] == 'p') {
  804. if (argv[2][0] == 'W' || argv[2][0] == 'i') {
  805. bb_error_msg_and_die(
  806. "pec not supported for -W and -i");
  807. } else {
  808. pec = 1;
  809. }
  810. }
  811. }
  812. if (opts & opt_r) {
  813. first = strtol(opt_r_str, &dash, 0);
  814. if (dash == opt_r_str || *dash != '-' || first > 0xff)
  815. bb_error_msg_and_die("invalid range");
  816. last = xstrtou_range(++dash, 0, first, 0xff);
  817. /* Range is not available for every mode. */
  818. switch (mode) {
  819. case I2C_SMBUS_BYTE:
  820. case I2C_SMBUS_BYTE_DATA:
  821. break;
  822. case I2C_SMBUS_WORD_DATA:
  823. if (!even || (!(first % 2) && last % 2))
  824. break;
  825. /* Fall through */
  826. default:
  827. bb_error_msg_and_die(
  828. "range not compatible with selected mode");
  829. }
  830. }
  831. fd = i2c_dev_open(bus_num);
  832. check_read_funcs(fd, mode, -1 /* data_addr */, pec);
  833. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  834. if (pec)
  835. i2c_set_pec(fd, 1);
  836. if (!(opts & opt_y))
  837. confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
  838. /* All but word data. */
  839. if (mode != I2C_SMBUS_WORD_DATA || even) {
  840. blen = read_block_data(fd, mode, block);
  841. if (mode == I2C_SMBUS_BYTE) {
  842. res = i2c_smbus_write_byte(fd, first);
  843. if (res < 0)
  844. bb_perror_msg_and_die("write start address");
  845. }
  846. dump_data(fd, mode, first, last, block, blen);
  847. } else {
  848. dump_word_data(fd, first, last);
  849. }
  850. return 0;
  851. }
  852. #endif /* ENABLE_I2CDUMP */
  853. #if ENABLE_I2CDETECT
  854. enum adapter_type {
  855. ADT_DUMMY = 0,
  856. ADT_ISA,
  857. ADT_I2C,
  858. ADT_SMBUS,
  859. };
  860. struct adap_desc {
  861. const char *funcs;
  862. const char *algo;
  863. };
  864. static const struct adap_desc adap_descs[] = {
  865. { .funcs = "dummy",
  866. .algo = "Dummy bus", },
  867. { .funcs = "isa",
  868. .algo = "ISA bus", },
  869. { .funcs = "i2c",
  870. .algo = "I2C adapter", },
  871. { .funcs = "smbus",
  872. .algo = "SMBus adapter", },
  873. };
  874. struct i2c_func
  875. {
  876. long value;
  877. const char* name;
  878. };
  879. static const struct i2c_func i2c_funcs_tab[] = {
  880. { .value = I2C_FUNC_I2C,
  881. .name = "I2C" },
  882. { .value = I2C_FUNC_SMBUS_QUICK,
  883. .name = "SMBus quick command" },
  884. { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
  885. .name = "SMBus send byte" },
  886. { .value = I2C_FUNC_SMBUS_READ_BYTE,
  887. .name = "SMBus receive byte" },
  888. { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
  889. .name = "SMBus write byte" },
  890. { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
  891. .name = "SMBus read byte" },
  892. { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
  893. .name = "SMBus write word" },
  894. { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
  895. .name = "SMBus read word" },
  896. { .value = I2C_FUNC_SMBUS_PROC_CALL,
  897. .name = "SMBus process call" },
  898. { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
  899. .name = "SMBus block write" },
  900. { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
  901. .name = "SMBus block read" },
  902. { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
  903. .name = "SMBus block process call" },
  904. { .value = I2C_FUNC_SMBUS_PEC,
  905. .name = "SMBus PEC" },
  906. { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
  907. .name = "I2C block write" },
  908. { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
  909. .name = "I2C block read" },
  910. { .value = 0, .name = NULL }
  911. };
  912. static enum adapter_type i2cdetect_get_funcs(int bus)
  913. {
  914. enum adapter_type ret;
  915. unsigned long funcs;
  916. int fd;
  917. fd = i2c_dev_open(bus);
  918. get_funcs_matrix(fd, &funcs);
  919. if (funcs & I2C_FUNC_I2C)
  920. ret = ADT_I2C;
  921. else if (funcs & (I2C_FUNC_SMBUS_BYTE |
  922. I2C_FUNC_SMBUS_BYTE_DATA |
  923. I2C_FUNC_SMBUS_WORD_DATA))
  924. ret = ADT_SMBUS;
  925. else
  926. ret = ADT_DUMMY;
  927. close(fd);
  928. return ret;
  929. }
  930. static void NORETURN list_i2c_busses_and_exit(void)
  931. {
  932. const char *const i2cdev_path = "/sys/class/i2c-dev";
  933. char path[NAME_MAX], name[128];
  934. struct dirent *de, *subde;
  935. enum adapter_type adt;
  936. DIR *dir, *subdir;
  937. int rv, bus;
  938. char *pos;
  939. FILE *fp;
  940. /*
  941. * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
  942. * but we won't bother since it's only useful on older kernels (before
  943. * 2.6.5). We expect sysfs to be present and mounted at /sys/.
  944. */
  945. dir = xopendir(i2cdev_path);
  946. while ((de = readdir(dir))) {
  947. if (de->d_name[0] == '.')
  948. continue;
  949. /* Simple version for ISA chips. */
  950. snprintf(path, NAME_MAX, "%s/%s/name",
  951. i2cdev_path, de->d_name);
  952. fp = fopen(path, "r");
  953. if (fp == NULL) {
  954. snprintf(path, NAME_MAX,
  955. "%s/%s/device/name",
  956. i2cdev_path, de->d_name);
  957. fp = fopen(path, "r");
  958. }
  959. /* Non-ISA chips require the hard-way. */
  960. if (fp == NULL) {
  961. snprintf(path, NAME_MAX,
  962. "%s/%s/device/name",
  963. i2cdev_path, de->d_name);
  964. subdir = opendir(path);
  965. if (subdir == NULL)
  966. continue;
  967. while ((subde = readdir(subdir))) {
  968. if (subde->d_name[0] == '.')
  969. continue;
  970. if (is_prefixed_with(subde->d_name, "i2c-")) {
  971. snprintf(path, NAME_MAX,
  972. "%s/%s/device/%s/name",
  973. i2cdev_path, de->d_name,
  974. subde->d_name);
  975. fp = fopen(path, "r");
  976. break;
  977. }
  978. }
  979. }
  980. if (fp != NULL) {
  981. /*
  982. * Get the rest of the info and display a line
  983. * for a single bus.
  984. */
  985. memset(name, 0, sizeof(name));
  986. pos = fgets(name, sizeof(name), fp);
  987. fclose(fp);
  988. if (pos == NULL)
  989. continue;
  990. pos = strchr(name, '\n');
  991. if (pos != NULL)
  992. *pos = '\0';
  993. rv = sscanf(de->d_name, "i2c-%d", &bus);
  994. if (rv != 1)
  995. continue;
  996. if (is_prefixed_with(name, "ISA"))
  997. adt = ADT_ISA;
  998. else
  999. adt = i2cdetect_get_funcs(bus);
  1000. printf(
  1001. "i2c-%d\t%-10s\t%-32s\t%s\n",
  1002. bus, adap_descs[adt].funcs,
  1003. name, adap_descs[adt].algo);
  1004. }
  1005. }
  1006. exit(EXIT_SUCCESS);
  1007. }
  1008. static void NORETURN no_support(const char *cmd)
  1009. {
  1010. bb_error_msg_and_die("bus doesn't support %s", cmd);
  1011. }
  1012. static void will_skip(const char *cmd)
  1013. {
  1014. bb_error_msg(
  1015. "warning: can't use %s command, "
  1016. "will skip some addresses", cmd);
  1017. }
  1018. //usage:#define i2cdetect_trivial_usage
  1019. //usage: "[-F I2CBUS] [-l] [-y] [-a] [-q|-r] I2CBUS [FIRST LAST]"
  1020. //usage:#define i2cdetect_full_usage "\n\n"
  1021. //usage: "Detect I2C chips.\n"
  1022. //usage: "\n I2CBUS i2c bus number"
  1023. //usage: "\n FIRST and LAST limit the probing range"
  1024. //usage: "\n"
  1025. //usage: "\n -l output list of installed busses"
  1026. //usage: "\n -y disable interactive mode"
  1027. //usage: "\n -a force scanning of non-regular addresses"
  1028. //usage: "\n -q use smbus quick write commands for probing (default)"
  1029. //usage: "\n -r use smbus read byte commands for probing"
  1030. //usage: "\n -F display list of functionalities"
  1031. int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1032. int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
  1033. {
  1034. const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
  1035. opt_q = (1 << 2), opt_r = (1 << 3),
  1036. opt_F = (1 << 4), opt_l = (1 << 5);
  1037. const char *const optstr = "yaqrFl";
  1038. int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status;
  1039. unsigned first = 0x03, last = 0x77, opts;
  1040. unsigned long funcs;
  1041. opt_complementary = "q--r:r--q:" /* mutually exclusive */
  1042. "?3"; /* up to 3 args */
  1043. opts = getopt32(argv, optstr);
  1044. argv += optind;
  1045. if (opts & opt_l)
  1046. list_i2c_busses_and_exit();
  1047. if (!argv[0])
  1048. bb_show_usage();
  1049. bus_num = i2c_bus_lookup(argv[0]);
  1050. fd = i2c_dev_open(bus_num);
  1051. get_funcs_matrix(fd, &funcs);
  1052. if (opts & opt_F) {
  1053. /* Only list the functionalities. */
  1054. printf("Functionalities implemented by bus #%d\n", bus_num);
  1055. for (i = 0; i2c_funcs_tab[i].value; i++) {
  1056. printf("%-32s %s\n", i2c_funcs_tab[i].name,
  1057. funcs & i2c_funcs_tab[i].value ? "yes" : "no");
  1058. }
  1059. return EXIT_SUCCESS;
  1060. }
  1061. if (opts & opt_r)
  1062. mode = I2CDETECT_MODE_READ;
  1063. else if (opts & opt_q)
  1064. mode = I2CDETECT_MODE_QUICK;
  1065. if (opts & opt_a) {
  1066. first = 0x00;
  1067. last = 0x7f;
  1068. }
  1069. /* Read address range. */
  1070. if (argv[1]) {
  1071. first = xstrtou_range(argv[1], 16, first, last);
  1072. if (argv[2])
  1073. last = xstrtou_range(argv[2], 16, first, last);
  1074. }
  1075. if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
  1076. no_support("detection commands");
  1077. } else
  1078. if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
  1079. no_support("SMBus quick write");
  1080. } else
  1081. if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  1082. no_support("SMBus receive byte");
  1083. }
  1084. if (mode == I2CDETECT_MODE_AUTO) {
  1085. if (!(funcs & I2C_FUNC_SMBUS_QUICK))
  1086. will_skip("SMBus quick write");
  1087. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1088. will_skip("SMBus receive byte");
  1089. }
  1090. if (!(opts & opt_y))
  1091. confirm_action(-1, -1, -1, 0);
  1092. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
  1093. for (i = 0; i < 128; i += 16) {
  1094. printf("%02x: ", i);
  1095. for(j = 0; j < 16; j++) {
  1096. fflush_all();
  1097. if (mode == I2CDETECT_MODE_AUTO) {
  1098. if ((i+j >= 0x30 && i+j <= 0x37) ||
  1099. (i+j >= 0x50 && i+j <= 0x5F))
  1100. mode = I2CDETECT_MODE_READ;
  1101. else
  1102. mode = I2CDETECT_MODE_QUICK;
  1103. }
  1104. /* Skip unwanted addresses. */
  1105. if (i+j < first
  1106. || i+j > last
  1107. || (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1108. || (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
  1109. {
  1110. printf(" ");
  1111. continue;
  1112. }
  1113. status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
  1114. if (status < 0) {
  1115. if (errno == EBUSY) {
  1116. printf("UU ");
  1117. continue;
  1118. }
  1119. bb_perror_msg_and_die(
  1120. "can't set address to 0x%02x", i + j);
  1121. }
  1122. switch (mode) {
  1123. case I2CDETECT_MODE_READ:
  1124. /*
  1125. * This is known to lock SMBus on various
  1126. * write-only chips (mainly clock chips).
  1127. */
  1128. status = i2c_smbus_read_byte(fd);
  1129. break;
  1130. default: /* I2CDETECT_MODE_QUICK: */
  1131. /*
  1132. * This is known to corrupt the Atmel
  1133. * AT24RF08 EEPROM.
  1134. */
  1135. status = i2c_smbus_write_quick(fd,
  1136. I2C_SMBUS_WRITE);
  1137. break;
  1138. }
  1139. if (status < 0)
  1140. printf("-- ");
  1141. else
  1142. printf("%02x ", i+j);
  1143. }
  1144. bb_putchar('\n');
  1145. }
  1146. return 0;
  1147. }
  1148. #endif /* ENABLE_I2CDETECT */