i2c_tools.c 32 KB

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  1. /* vi: set sw=4 ts=4: */
  2. /*
  3. * Minimal i2c-tools implementation for busybox.
  4. * Parts of code ported from i2c-tools:
  5. * http://www.lm-sensors.org/wiki/I2CTools.
  6. *
  7. * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
  8. *
  9. * Licensed under GPLv2 or later, see file LICENSE in this source tree.
  10. */
  11. //config:config I2CGET
  12. //config: bool "i2cget"
  13. //config: default y
  14. //config: select PLATFORM_LINUX
  15. //config: help
  16. //config: Read from I2C/SMBus chip registers.
  17. //config:
  18. //config:config I2CSET
  19. //config: bool "i2cset"
  20. //config: default y
  21. //config: select PLATFORM_LINUX
  22. //config: help
  23. //config: Set I2C registers.
  24. //config:
  25. //config:config I2CDUMP
  26. //config: bool "i2cdump"
  27. //config: default y
  28. //config: select PLATFORM_LINUX
  29. //config: help
  30. //config: Examine I2C registers.
  31. //config:
  32. //config:config I2CDETECT
  33. //config: bool "i2cdetect"
  34. //config: default y
  35. //config: select PLATFORM_LINUX
  36. //config: help
  37. //config: Detect I2C chips.
  38. //config:
  39. //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
  40. //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
  41. //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
  42. //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
  43. //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
  44. //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
  45. //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
  46. //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
  47. /*
  48. * Unsupported stuff:
  49. *
  50. * - upstream i2c-tools can also look-up i2c busses by name, we only accept
  51. * numbers,
  52. * - bank and bankreg parameters for i2cdump are not supported because of
  53. * their limited usefulness (see i2cdump manual entry for more info),
  54. * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
  55. * it shouldn't be a problem in modern kernels.
  56. */
  57. #include "libbb.h"
  58. #include <linux/i2c.h>
  59. #include <linux/i2c-dev.h>
  60. #define I2CDUMP_NUM_REGS 256
  61. #define I2CDETECT_MODE_AUTO 0
  62. #define I2CDETECT_MODE_QUICK 1
  63. #define I2CDETECT_MODE_READ 2
  64. /*
  65. * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
  66. */
  67. static ALWAYS_INLINE void *itoptr(int i)
  68. {
  69. return (void*)(intptr_t)i;
  70. }
  71. static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
  72. int size, union i2c_smbus_data *data)
  73. {
  74. struct i2c_smbus_ioctl_data args;
  75. args.read_write = read_write;
  76. args.command = cmd;
  77. args.size = size;
  78. args.data = data;
  79. return ioctl(fd, I2C_SMBUS, &args);
  80. }
  81. static int32_t i2c_smbus_read_byte(int fd)
  82. {
  83. union i2c_smbus_data data;
  84. int err;
  85. err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
  86. if (err < 0)
  87. return err;
  88. return data.byte;
  89. }
  90. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  91. static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
  92. {
  93. return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
  94. val, I2C_SMBUS_BYTE, NULL);
  95. }
  96. static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
  97. {
  98. union i2c_smbus_data data;
  99. int err;
  100. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  101. I2C_SMBUS_BYTE_DATA, &data);
  102. if (err < 0)
  103. return err;
  104. return data.byte;
  105. }
  106. static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
  107. {
  108. union i2c_smbus_data data;
  109. int err;
  110. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  111. I2C_SMBUS_WORD_DATA, &data);
  112. if (err < 0)
  113. return err;
  114. return data.word;
  115. }
  116. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  117. #if ENABLE_I2CSET
  118. static int32_t i2c_smbus_write_byte_data(int file,
  119. uint8_t cmd, uint8_t value)
  120. {
  121. union i2c_smbus_data data;
  122. data.byte = value;
  123. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  124. I2C_SMBUS_BYTE_DATA, &data);
  125. }
  126. static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
  127. {
  128. union i2c_smbus_data data;
  129. data.word = value;
  130. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  131. I2C_SMBUS_WORD_DATA, &data);
  132. }
  133. static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
  134. uint8_t length, const uint8_t *values)
  135. {
  136. union i2c_smbus_data data;
  137. if (length > I2C_SMBUS_BLOCK_MAX)
  138. length = I2C_SMBUS_BLOCK_MAX;
  139. memcpy(data.block+1, values, length);
  140. data.block[0] = length;
  141. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  142. I2C_SMBUS_BLOCK_DATA, &data);
  143. }
  144. static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
  145. uint8_t length, const uint8_t *values)
  146. {
  147. union i2c_smbus_data data;
  148. if (length > I2C_SMBUS_BLOCK_MAX)
  149. length = I2C_SMBUS_BLOCK_MAX;
  150. memcpy(data.block+1, values, length);
  151. data.block[0] = length;
  152. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  153. I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
  154. }
  155. #endif /* ENABLE_I2CSET */
  156. #if ENABLE_I2CDUMP
  157. /*
  158. * Returns the number of bytes read, vals must hold at
  159. * least I2C_SMBUS_BLOCK_MAX bytes.
  160. */
  161. static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
  162. {
  163. union i2c_smbus_data data;
  164. int i, err;
  165. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  166. I2C_SMBUS_BLOCK_DATA, &data);
  167. if (err < 0)
  168. return err;
  169. for (i = 1; i <= data.block[0]; i++)
  170. *vals++ = data.block[i];
  171. return data.block[0];
  172. }
  173. static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
  174. uint8_t len, uint8_t *vals)
  175. {
  176. union i2c_smbus_data data;
  177. int i, err;
  178. if (len > I2C_SMBUS_BLOCK_MAX)
  179. len = I2C_SMBUS_BLOCK_MAX;
  180. data.block[0] = len;
  181. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  182. len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
  183. I2C_SMBUS_I2C_BLOCK_DATA, &data);
  184. if (err < 0)
  185. return err;
  186. for (i = 1; i <= data.block[0]; i++)
  187. *vals++ = data.block[i];
  188. return data.block[0];
  189. }
  190. #endif /* ENABLE_I2CDUMP */
  191. #if ENABLE_I2CDETECT
  192. static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
  193. {
  194. return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
  195. }
  196. #endif /* ENABLE_I2CDETECT */
  197. static int i2c_bus_lookup(const char *bus_str)
  198. {
  199. return xstrtou_range(bus_str, 10, 0, 0xfffff);
  200. }
  201. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  202. static int i2c_parse_bus_addr(const char *addr_str)
  203. {
  204. /* Slave address must be in range 0x03 - 0x77. */
  205. return xstrtou_range(addr_str, 16, 0x03, 0x77);
  206. }
  207. static void i2c_set_pec(int fd, int pec)
  208. {
  209. ioctl_or_perror_and_die(fd, I2C_PEC,
  210. itoptr(pec ? 1 : 0),
  211. "can't set PEC");
  212. }
  213. static void i2c_set_slave_addr(int fd, int addr, int force)
  214. {
  215. ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
  216. itoptr(addr),
  217. "can't set address to 0x%02x", addr);
  218. }
  219. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  220. #if ENABLE_I2CGET || ENABLE_I2CSET
  221. static int i2c_parse_data_addr(const char *data_addr)
  222. {
  223. /* Data address must be an 8 bit integer. */
  224. return xstrtou_range(data_addr, 16, 0, 0xff);
  225. }
  226. #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
  227. /*
  228. * Opens the device file associated with given i2c bus.
  229. *
  230. * Upstream i2c-tools also support opening devices by i2c bus name
  231. * but we drop it here for size reduction.
  232. */
  233. static int i2c_dev_open(int i2cbus)
  234. {
  235. char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
  236. int fd;
  237. sprintf(filename, "/dev/i2c-%d", i2cbus);
  238. fd = open(filename, O_RDWR);
  239. if (fd < 0) {
  240. if (errno == ENOENT) {
  241. filename[8] = '/'; /* change to "/dev/i2c/%d" */
  242. fd = xopen(filename, O_RDWR);
  243. } else {
  244. bb_perror_msg_and_die("can't open '%s'", filename);
  245. }
  246. }
  247. return fd;
  248. }
  249. /* Size reducing helpers for xxx_check_funcs(). */
  250. static void get_funcs_matrix(int fd, unsigned long *funcs)
  251. {
  252. ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
  253. "can't get adapter functionality matrix");
  254. }
  255. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  256. static void check_funcs_test_end(int funcs, int pec, const char *err)
  257. {
  258. if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
  259. bb_error_msg("warning: adapter does not support PEC");
  260. if (err)
  261. bb_error_msg_and_die(
  262. "adapter has no %s capability", err);
  263. }
  264. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  265. /*
  266. * The below functions emit an error message and exit if the adapter doesn't
  267. * support desired functionalities.
  268. */
  269. #if ENABLE_I2CGET || ENABLE_I2CDUMP
  270. static void check_read_funcs(int fd, int mode, int data_addr, int pec)
  271. {
  272. unsigned long funcs;
  273. const char *err = NULL;
  274. get_funcs_matrix(fd, &funcs);
  275. switch (mode) {
  276. case I2C_SMBUS_BYTE:
  277. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  278. err = "SMBus receive byte";
  279. break;
  280. }
  281. if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  282. err = "SMBus send byte";
  283. break;
  284. case I2C_SMBUS_BYTE_DATA:
  285. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
  286. err = "SMBus read byte";
  287. break;
  288. case I2C_SMBUS_WORD_DATA:
  289. if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
  290. err = "SMBus read word";
  291. break;
  292. #if ENABLE_I2CDUMP
  293. case I2C_SMBUS_BLOCK_DATA:
  294. if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
  295. err = "SMBus block read";
  296. break;
  297. case I2C_SMBUS_I2C_BLOCK_DATA:
  298. if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
  299. err = "I2C block read";
  300. break;
  301. #endif /* ENABLE_I2CDUMP */
  302. default:
  303. bb_error_msg_and_die("internal error");
  304. }
  305. check_funcs_test_end(funcs, pec, err);
  306. }
  307. #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
  308. #if ENABLE_I2CSET
  309. static void check_write_funcs(int fd, int mode, int pec)
  310. {
  311. unsigned long funcs;
  312. const char *err = NULL;
  313. get_funcs_matrix(fd, &funcs);
  314. switch (mode) {
  315. case I2C_SMBUS_BYTE:
  316. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  317. err = "SMBus send byte";
  318. break;
  319. case I2C_SMBUS_BYTE_DATA:
  320. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  321. err = "SMBus write byte";
  322. break;
  323. case I2C_SMBUS_WORD_DATA:
  324. if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
  325. err = "SMBus write word";
  326. break;
  327. case I2C_SMBUS_BLOCK_DATA:
  328. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
  329. err = "SMBus block write";
  330. break;
  331. case I2C_SMBUS_I2C_BLOCK_DATA:
  332. if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
  333. err = "I2C block write";
  334. break;
  335. }
  336. check_funcs_test_end(funcs, pec, err);
  337. }
  338. #endif /* ENABLE_I2CSET */
  339. static void confirm_or_abort(void)
  340. {
  341. fprintf(stderr, "Continue? [y/N] ");
  342. fflush_all();
  343. if (!bb_ask_confirmation())
  344. bb_error_msg_and_die("aborting");
  345. }
  346. /*
  347. * Return only if user confirms the action, abort otherwise.
  348. *
  349. * The messages displayed here are much less elaborate than their i2c-tools
  350. * counterparts - this is done for size reduction.
  351. */
  352. static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
  353. {
  354. bb_error_msg("WARNING! This program can confuse your I2C bus");
  355. /* Don't let the user break his/her EEPROMs */
  356. if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
  357. bb_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
  358. "devices may result in data loss, aborting");
  359. }
  360. if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
  361. bb_error_msg("WARNING! May interpret a write byte command "
  362. "with PEC as a write byte data command");
  363. if (pec)
  364. bb_error_msg("PEC checking enabled");
  365. confirm_or_abort();
  366. }
  367. #if ENABLE_I2CGET
  368. //usage:#define i2cget_trivial_usage
  369. //usage: "[-f] [-y] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
  370. //usage:#define i2cget_full_usage "\n\n"
  371. //usage: "Read from I2C/SMBus chip registers\n"
  372. //usage: "\n I2CBUS i2c bus number"
  373. //usage: "\n ADDRESS 0x03 - 0x77"
  374. //usage: "\nMODE is:"
  375. //usage: "\n b read byte data (default)"
  376. //usage: "\n w read word data"
  377. //usage: "\n c write byte/read byte"
  378. //usage: "\n Append p for SMBus PEC"
  379. //usage: "\n"
  380. //usage: "\n -f force access"
  381. //usage: "\n -y disable interactive mode"
  382. int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  383. int i2cget_main(int argc UNUSED_PARAM, char **argv)
  384. {
  385. const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
  386. const char *const optstr = "fy";
  387. int bus_num, bus_addr, data_addr = -1, status;
  388. int mode = I2C_SMBUS_BYTE, pec = 0, fd;
  389. unsigned opts;
  390. opt_complementary = "-2:?4"; /* from 2 to 4 args */
  391. opts = getopt32(argv, optstr);
  392. argv += optind;
  393. bus_num = i2c_bus_lookup(argv[0]);
  394. bus_addr = i2c_parse_bus_addr(argv[1]);
  395. if (argv[2]) {
  396. data_addr = i2c_parse_data_addr(argv[2]);
  397. mode = I2C_SMBUS_BYTE_DATA;
  398. if (argv[3]) {
  399. switch (argv[3][0]) {
  400. case 'b': /* Already set */ break;
  401. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  402. case 'c': mode = I2C_SMBUS_BYTE; break;
  403. default:
  404. bb_error_msg("invalid mode");
  405. bb_show_usage();
  406. }
  407. pec = argv[3][1] == 'p';
  408. }
  409. }
  410. fd = i2c_dev_open(bus_num);
  411. check_read_funcs(fd, mode, data_addr, pec);
  412. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  413. if (!(opts & opt_y))
  414. confirm_action(bus_addr, mode, data_addr, pec);
  415. if (pec)
  416. i2c_set_pec(fd, 1);
  417. switch (mode) {
  418. case I2C_SMBUS_BYTE:
  419. if (data_addr >= 0) {
  420. status = i2c_smbus_write_byte(fd, data_addr);
  421. if (status < 0)
  422. bb_error_msg("warning - write failed");
  423. }
  424. status = i2c_smbus_read_byte(fd);
  425. break;
  426. case I2C_SMBUS_WORD_DATA:
  427. status = i2c_smbus_read_word_data(fd, data_addr);
  428. break;
  429. default: /* I2C_SMBUS_BYTE_DATA */
  430. status = i2c_smbus_read_byte_data(fd, data_addr);
  431. }
  432. close(fd);
  433. if (status < 0)
  434. bb_perror_msg_and_die("read failed");
  435. printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  436. return 0;
  437. }
  438. #endif /* ENABLE_I2CGET */
  439. #if ENABLE_I2CSET
  440. //usage:#define i2cset_trivial_usage
  441. //usage: "[-f] [-y] [-m MASK] BUS CHIP-ADDR DATA-ADDR [VALUE] ... [MODE]"
  442. //usage:#define i2cset_full_usage "\n\n"
  443. //usage: "Set I2C registers\n"
  444. //usage: "\n I2CBUS i2c bus number"
  445. //usage: "\n ADDRESS 0x03 - 0x77"
  446. //usage: "\nMODE is:"
  447. //usage: "\n c byte, no value"
  448. //usage: "\n b byte data (default)"
  449. //usage: "\n w word data"
  450. //usage: "\n i I2C block data"
  451. //usage: "\n s SMBus block data"
  452. //usage: "\n Append p for SMBus PEC"
  453. //usage: "\n"
  454. //usage: "\n -f force access"
  455. //usage: "\n -y disable interactive mode"
  456. //usage: "\n -r read back and compare the result"
  457. //usage: "\n -m MASK mask specifying which bits to write"
  458. int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  459. int i2cset_main(int argc, char **argv)
  460. {
  461. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  462. opt_m = (1 << 2), opt_r = (1 << 3);
  463. const char *const optstr = "fym:r";
  464. int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
  465. int val, blen = 0, mask = 0, fd, status;
  466. unsigned char block[I2C_SMBUS_BLOCK_MAX];
  467. char *opt_m_arg = NULL;
  468. unsigned opts;
  469. opt_complementary = "-3"; /* from 3 to ? args */
  470. opts = getopt32(argv, optstr, &opt_m_arg);
  471. argv += optind;
  472. argc -= optind;
  473. bus_num = i2c_bus_lookup(argv[0]);
  474. bus_addr = i2c_parse_bus_addr(argv[1]);
  475. data_addr = i2c_parse_data_addr(argv[2]);
  476. if (argv[3]) {
  477. if (!argv[4] && argv[3][0] != 'c') {
  478. mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
  479. } else {
  480. switch (argv[argc-1][0]) {
  481. case 'c': /* Already set */ break;
  482. case 'b': mode = I2C_SMBUS_BYTE_DATA; break;
  483. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  484. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  485. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  486. default:
  487. bb_error_msg("invalid mode");
  488. bb_show_usage();
  489. }
  490. pec = argv[argc-1][1] == 'p';
  491. if (mode == I2C_SMBUS_BLOCK_DATA ||
  492. mode == I2C_SMBUS_I2C_BLOCK_DATA) {
  493. if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
  494. bb_error_msg_and_die(
  495. "PEC not supported for I2C "
  496. "block writes");
  497. if (opts & opt_m)
  498. bb_error_msg_and_die(
  499. "mask not supported for block "
  500. "writes");
  501. }
  502. }
  503. }
  504. /* Prepare the value(s) to be written according to current mode. */
  505. switch (mode) {
  506. case I2C_SMBUS_BYTE_DATA:
  507. val = xstrtou_range(argv[3], 0, 0, 0xff);
  508. break;
  509. case I2C_SMBUS_WORD_DATA:
  510. val = xstrtou_range(argv[3], 0, 0, 0xffff);
  511. break;
  512. case I2C_SMBUS_BLOCK_DATA:
  513. case I2C_SMBUS_I2C_BLOCK_DATA:
  514. for (blen = 3; blen < (argc - 1); blen++)
  515. block[blen] = xstrtou_range(argv[blen], 0, 0, 0xff);
  516. val = -1;
  517. break;
  518. default:
  519. val = -1;
  520. break;
  521. }
  522. if (opts & opt_m) {
  523. mask = xstrtou_range(opt_m_arg, 0, 0,
  524. (mode == I2C_SMBUS_BYTE ||
  525. mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
  526. }
  527. fd = i2c_dev_open(bus_num);
  528. check_write_funcs(fd, mode, pec);
  529. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  530. if (!(opts & opt_y))
  531. confirm_action(bus_addr, mode, data_addr, pec);
  532. /*
  533. * If we're using mask - read the current value here and adjust the
  534. * value to be written.
  535. */
  536. if (opts & opt_m) {
  537. int tmpval;
  538. switch (mode) {
  539. case I2C_SMBUS_BYTE:
  540. tmpval = i2c_smbus_read_byte(fd);
  541. break;
  542. case I2C_SMBUS_WORD_DATA:
  543. tmpval = i2c_smbus_read_word_data(fd, data_addr);
  544. break;
  545. default:
  546. tmpval = i2c_smbus_read_byte_data(fd, data_addr);
  547. }
  548. if (tmpval < 0)
  549. bb_perror_msg_and_die("can't read old value");
  550. val = (val & mask) | (tmpval & ~mask);
  551. if (!(opts & opt_y)) {
  552. bb_error_msg("old value 0x%0*x, write mask "
  553. "0x%0*x, will write 0x%0*x to register "
  554. "0x%02x",
  555. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
  556. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
  557. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  558. data_addr);
  559. confirm_or_abort();
  560. }
  561. }
  562. if (pec)
  563. i2c_set_pec(fd, 1);
  564. switch (mode) {
  565. case I2C_SMBUS_BYTE:
  566. status = i2c_smbus_write_byte(fd, data_addr);
  567. break;
  568. case I2C_SMBUS_WORD_DATA:
  569. status = i2c_smbus_write_word_data(fd, data_addr, val);
  570. break;
  571. case I2C_SMBUS_BLOCK_DATA:
  572. status = i2c_smbus_write_block_data(fd, data_addr,
  573. blen, block);
  574. break;
  575. case I2C_SMBUS_I2C_BLOCK_DATA:
  576. status = i2c_smbus_write_i2c_block_data(fd, data_addr,
  577. blen, block);
  578. break;
  579. default: /* I2C_SMBUS_BYTE_DATA */
  580. status = i2c_smbus_write_byte_data(fd, data_addr, val);
  581. break;
  582. }
  583. if (status < 0)
  584. bb_perror_msg_and_die("write failed");
  585. if (pec)
  586. i2c_set_pec(fd, 0); /* Clear PEC. */
  587. /* No readback required - we're done. */
  588. if (!(opts & opt_r))
  589. return 0;
  590. switch (mode) {
  591. case I2C_SMBUS_BYTE:
  592. status = i2c_smbus_read_byte(fd);
  593. val = data_addr;
  594. break;
  595. case I2C_SMBUS_WORD_DATA:
  596. status = i2c_smbus_read_word_data(fd, data_addr);
  597. break;
  598. default: /* I2C_SMBUS_BYTE_DATA */
  599. status = i2c_smbus_read_byte_data(fd, data_addr);
  600. }
  601. if (status < 0) {
  602. puts("Warning - readback failed");
  603. } else
  604. if (status != val) {
  605. printf("Warning - data mismatch - wrote "
  606. "0x%0*x, read back 0x%0*x\n",
  607. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  608. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  609. } else {
  610. printf("Value 0x%0*x written, readback matched\n",
  611. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
  612. }
  613. return 0;
  614. }
  615. #endif /* ENABLE_I2CSET */
  616. #if ENABLE_I2CDUMP
  617. static int read_block_data(int buf_fd, int mode, int *block)
  618. {
  619. uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
  620. int res, blen = 0, tmp, i;
  621. if (mode == I2C_SMBUS_BLOCK_DATA) {
  622. blen = i2c_smbus_read_block_data(buf_fd, 0, cblock);
  623. if (blen <= 0)
  624. goto fail;
  625. } else {
  626. for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
  627. tmp = i2c_smbus_read_i2c_block_data(
  628. buf_fd, res, I2C_SMBUS_BLOCK_MAX,
  629. cblock + res);
  630. if (tmp <= 0) {
  631. blen = tmp;
  632. goto fail;
  633. }
  634. }
  635. if (res >= I2CDUMP_NUM_REGS)
  636. res = I2CDUMP_NUM_REGS;
  637. for (i = 0; i < res; i++)
  638. block[i] = cblock[i];
  639. if (mode != I2C_SMBUS_BLOCK_DATA)
  640. for (i = res; i < I2CDUMP_NUM_REGS; i++)
  641. block[i] = -1;
  642. }
  643. return blen;
  644. fail:
  645. bb_error_msg_and_die("block read failed: %d", blen);
  646. }
  647. /* Dump all but word data. */
  648. static void dump_data(int bus_fd, int mode, unsigned first,
  649. unsigned last, int *block, int blen)
  650. {
  651. int i, j, res;
  652. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
  653. " 0123456789abcdef");
  654. for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
  655. if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
  656. break;
  657. if (i/16 < first/16)
  658. continue;
  659. if (i/16 > last/16)
  660. break;
  661. printf("%02x: ", i);
  662. for (j = 0; j < 16; j++) {
  663. fflush_all();
  664. /* Skip unwanted registers */
  665. if (i+j < first || i+j > last) {
  666. printf(" ");
  667. if (mode == I2C_SMBUS_WORD_DATA) {
  668. printf(" ");
  669. j++;
  670. }
  671. continue;
  672. }
  673. switch (mode) {
  674. case I2C_SMBUS_BYTE_DATA:
  675. res = i2c_smbus_read_byte_data(bus_fd, i+j);
  676. block[i+j] = res;
  677. break;
  678. case I2C_SMBUS_WORD_DATA:
  679. res = i2c_smbus_read_word_data(bus_fd, i+j);
  680. if (res < 0) {
  681. block[i+j] = res;
  682. block[i+j+1] = res;
  683. } else {
  684. block[i+j] = res & 0xff;
  685. block[i+j+1] = res >> 8;
  686. }
  687. break;
  688. case I2C_SMBUS_BYTE:
  689. res = i2c_smbus_read_byte(bus_fd);
  690. block[i+j] = res;
  691. break;
  692. default:
  693. res = block[i+j];
  694. }
  695. if (mode == I2C_SMBUS_BLOCK_DATA &&
  696. i+j >= blen) {
  697. printf(" ");
  698. } else if (res < 0) {
  699. printf("XX ");
  700. if (mode == I2C_SMBUS_WORD_DATA)
  701. printf("XX ");
  702. } else {
  703. printf("%02x ", block[i+j]);
  704. if (mode == I2C_SMBUS_WORD_DATA)
  705. printf("%02x ", block[i+j+1]);
  706. }
  707. if (mode == I2C_SMBUS_WORD_DATA)
  708. j++;
  709. }
  710. printf(" ");
  711. for (j = 0; j < 16; j++) {
  712. if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
  713. break;
  714. /* Skip unwanted registers */
  715. if (i+j < first || i+j > last) {
  716. bb_putchar(' ');
  717. continue;
  718. }
  719. res = block[i+j];
  720. if (res < 0) {
  721. bb_putchar('X');
  722. } else if (res == 0x00 || res == 0xff) {
  723. bb_putchar('.');
  724. } else if (res < 32 || res >= 127) {
  725. bb_putchar('?');
  726. } else {
  727. bb_putchar(res);
  728. }
  729. }
  730. bb_putchar('\n');
  731. }
  732. }
  733. static void dump_word_data(int bus_fd, unsigned first, unsigned last)
  734. {
  735. int i, j, rv;
  736. /* Word data. */
  737. puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
  738. for (i = 0; i < 256; i += 8) {
  739. if (i/8 < first/8)
  740. continue;
  741. if (i/8 > last/8)
  742. break;
  743. printf("%02x: ", i);
  744. for (j = 0; j < 8; j++) {
  745. /* Skip unwanted registers. */
  746. if (i+j < first || i+j > last) {
  747. printf(" ");
  748. continue;
  749. }
  750. rv = i2c_smbus_read_word_data(bus_fd, i+j);
  751. if (rv < 0)
  752. printf("XXXX ");
  753. else
  754. printf("%04x ", rv & 0xffff);
  755. }
  756. bb_putchar('\n');
  757. }
  758. }
  759. //usage:#define i2cdump_trivial_usage
  760. //usage: "[-f] [-r FIRST-LAST] [-y] BUS ADDR [MODE]"
  761. //usage:#define i2cdump_full_usage "\n\n"
  762. //usage: "Examine I2C registers\n"
  763. //usage: "\n I2CBUS i2c bus number"
  764. //usage: "\n ADDRESS 0x03 - 0x77"
  765. //usage: "\nMODE is:"
  766. //usage: "\n b byte (default)"
  767. //usage: "\n w word"
  768. //usage: "\n W word on even register addresses"
  769. //usage: "\n i I2C block"
  770. //usage: "\n s SMBus block"
  771. //usage: "\n c consecutive byte"
  772. //usage: "\n Append p for SMBus PEC"
  773. //usage: "\n"
  774. //usage: "\n -f force access"
  775. //usage: "\n -y disable interactive mode"
  776. //usage: "\n -r limit the number of registers being accessed"
  777. int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  778. int i2cdump_main(int argc UNUSED_PARAM, char **argv)
  779. {
  780. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  781. opt_r = (1 << 2);
  782. const char *const optstr = "fyr:";
  783. int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
  784. unsigned first = 0x00, last = 0xff, opts;
  785. int *block = (int *)bb_common_bufsiz1;
  786. char *opt_r_str, *dash;
  787. int fd, res;
  788. opt_complementary = "-2:?3"; /* from 2 to 3 args */
  789. opts = getopt32(argv, optstr, &opt_r_str);
  790. argv += optind;
  791. bus_num = i2c_bus_lookup(argv[0]);
  792. bus_addr = i2c_parse_bus_addr(argv[1]);
  793. if (argv[2]) {
  794. switch (argv[2][0]) {
  795. case 'b': /* Already set. */ break;
  796. case 'c': mode = I2C_SMBUS_BYTE; break;
  797. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  798. case 'W':
  799. mode = I2C_SMBUS_WORD_DATA;
  800. even = 1;
  801. break;
  802. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  803. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  804. default:
  805. bb_error_msg_and_die("invalid mode");
  806. }
  807. if (argv[2][1] == 'p') {
  808. if (argv[2][0] == 'W' || argv[2][0] == 'i') {
  809. bb_error_msg_and_die(
  810. "pec not supported for -W and -i");
  811. } else {
  812. pec = 1;
  813. }
  814. }
  815. }
  816. if (opts & opt_r) {
  817. first = strtol(opt_r_str, &dash, 0);
  818. if (dash == opt_r_str || *dash != '-' || first > 0xff)
  819. bb_error_msg_and_die("invalid range");
  820. last = xstrtou_range(++dash, 0, first, 0xff);
  821. /* Range is not available for every mode. */
  822. switch (mode) {
  823. case I2C_SMBUS_BYTE:
  824. case I2C_SMBUS_BYTE_DATA:
  825. break;
  826. case I2C_SMBUS_WORD_DATA:
  827. if (!even || (!(first % 2) && last % 2))
  828. break;
  829. /* Fall through */
  830. default:
  831. bb_error_msg_and_die(
  832. "range not compatible with selected mode");
  833. }
  834. }
  835. fd = i2c_dev_open(bus_num);
  836. check_read_funcs(fd, mode, -1 /* data_addr */, pec);
  837. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  838. if (pec)
  839. i2c_set_pec(fd, 1);
  840. if (!(opts & opt_y))
  841. confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
  842. /* All but word data. */
  843. if (mode != I2C_SMBUS_WORD_DATA || even) {
  844. int blen = 0;
  845. if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA)
  846. blen = read_block_data(fd, mode, block);
  847. if (mode == I2C_SMBUS_BYTE) {
  848. res = i2c_smbus_write_byte(fd, first);
  849. if (res < 0)
  850. bb_perror_msg_and_die("write start address");
  851. }
  852. dump_data(fd, mode, first, last, block, blen);
  853. } else {
  854. dump_word_data(fd, first, last);
  855. }
  856. return 0;
  857. }
  858. #endif /* ENABLE_I2CDUMP */
  859. #if ENABLE_I2CDETECT
  860. enum adapter_type {
  861. ADT_DUMMY = 0,
  862. ADT_ISA,
  863. ADT_I2C,
  864. ADT_SMBUS,
  865. };
  866. struct adap_desc {
  867. const char *funcs;
  868. const char *algo;
  869. };
  870. static const struct adap_desc adap_descs[] = {
  871. { .funcs = "dummy",
  872. .algo = "Dummy bus", },
  873. { .funcs = "isa",
  874. .algo = "ISA bus", },
  875. { .funcs = "i2c",
  876. .algo = "I2C adapter", },
  877. { .funcs = "smbus",
  878. .algo = "SMBus adapter", },
  879. };
  880. struct i2c_func
  881. {
  882. long value;
  883. const char* name;
  884. };
  885. static const struct i2c_func i2c_funcs_tab[] = {
  886. { .value = I2C_FUNC_I2C,
  887. .name = "I2C" },
  888. { .value = I2C_FUNC_SMBUS_QUICK,
  889. .name = "SMBus quick command" },
  890. { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
  891. .name = "SMBus send byte" },
  892. { .value = I2C_FUNC_SMBUS_READ_BYTE,
  893. .name = "SMBus receive byte" },
  894. { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
  895. .name = "SMBus write byte" },
  896. { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
  897. .name = "SMBus read byte" },
  898. { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
  899. .name = "SMBus write word" },
  900. { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
  901. .name = "SMBus read word" },
  902. { .value = I2C_FUNC_SMBUS_PROC_CALL,
  903. .name = "SMBus process call" },
  904. { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
  905. .name = "SMBus block write" },
  906. { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
  907. .name = "SMBus block read" },
  908. { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
  909. .name = "SMBus block process call" },
  910. { .value = I2C_FUNC_SMBUS_PEC,
  911. .name = "SMBus PEC" },
  912. { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
  913. .name = "I2C block write" },
  914. { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
  915. .name = "I2C block read" },
  916. { .value = 0, .name = NULL }
  917. };
  918. static enum adapter_type i2cdetect_get_funcs(int bus)
  919. {
  920. enum adapter_type ret;
  921. unsigned long funcs;
  922. int fd;
  923. fd = i2c_dev_open(bus);
  924. get_funcs_matrix(fd, &funcs);
  925. if (funcs & I2C_FUNC_I2C)
  926. ret = ADT_I2C;
  927. else if (funcs & (I2C_FUNC_SMBUS_BYTE |
  928. I2C_FUNC_SMBUS_BYTE_DATA |
  929. I2C_FUNC_SMBUS_WORD_DATA))
  930. ret = ADT_SMBUS;
  931. else
  932. ret = ADT_DUMMY;
  933. close(fd);
  934. return ret;
  935. }
  936. static void NORETURN list_i2c_busses_and_exit(void)
  937. {
  938. const char *const i2cdev_path = "/sys/class/i2c-dev";
  939. char path[NAME_MAX], name[128];
  940. struct dirent *de, *subde;
  941. enum adapter_type adt;
  942. DIR *dir, *subdir;
  943. int rv, bus;
  944. char *pos;
  945. FILE *fp;
  946. /*
  947. * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
  948. * but we won't bother since it's only useful on older kernels (before
  949. * 2.6.5). We expect sysfs to be present and mounted at /sys/.
  950. */
  951. dir = xopendir(i2cdev_path);
  952. while ((de = readdir(dir))) {
  953. if (de->d_name[0] == '.')
  954. continue;
  955. /* Simple version for ISA chips. */
  956. snprintf(path, NAME_MAX, "%s/%s/name",
  957. i2cdev_path, de->d_name);
  958. fp = fopen(path, "r");
  959. if (fp == NULL) {
  960. snprintf(path, NAME_MAX,
  961. "%s/%s/device/name",
  962. i2cdev_path, de->d_name);
  963. fp = fopen(path, "r");
  964. }
  965. /* Non-ISA chips require the hard-way. */
  966. if (fp == NULL) {
  967. snprintf(path, NAME_MAX,
  968. "%s/%s/device/name",
  969. i2cdev_path, de->d_name);
  970. subdir = opendir(path);
  971. if (subdir == NULL)
  972. continue;
  973. while ((subde = readdir(subdir))) {
  974. if (subde->d_name[0] == '.')
  975. continue;
  976. if (is_prefixed_with(subde->d_name, "i2c-")) {
  977. snprintf(path, NAME_MAX,
  978. "%s/%s/device/%s/name",
  979. i2cdev_path, de->d_name,
  980. subde->d_name);
  981. fp = fopen(path, "r");
  982. break;
  983. }
  984. }
  985. }
  986. if (fp != NULL) {
  987. /*
  988. * Get the rest of the info and display a line
  989. * for a single bus.
  990. */
  991. memset(name, 0, sizeof(name));
  992. pos = fgets(name, sizeof(name), fp);
  993. fclose(fp);
  994. if (pos == NULL)
  995. continue;
  996. pos = strchr(name, '\n');
  997. if (pos != NULL)
  998. *pos = '\0';
  999. rv = sscanf(de->d_name, "i2c-%d", &bus);
  1000. if (rv != 1)
  1001. continue;
  1002. if (is_prefixed_with(name, "ISA"))
  1003. adt = ADT_ISA;
  1004. else
  1005. adt = i2cdetect_get_funcs(bus);
  1006. printf(
  1007. "i2c-%d\t%-10s\t%-32s\t%s\n",
  1008. bus, adap_descs[adt].funcs,
  1009. name, adap_descs[adt].algo);
  1010. }
  1011. }
  1012. exit(EXIT_SUCCESS);
  1013. }
  1014. static void NORETURN no_support(const char *cmd)
  1015. {
  1016. bb_error_msg_and_die("bus doesn't support %s", cmd);
  1017. }
  1018. static void will_skip(const char *cmd)
  1019. {
  1020. bb_error_msg(
  1021. "warning: can't use %s command, "
  1022. "will skip some addresses", cmd);
  1023. }
  1024. //usage:#define i2cdetect_trivial_usage
  1025. //usage: "[-F I2CBUS] [-l] [-y] [-a] [-q|-r] I2CBUS [FIRST LAST]"
  1026. //usage:#define i2cdetect_full_usage "\n\n"
  1027. //usage: "Detect I2C chips.\n"
  1028. //usage: "\n I2CBUS i2c bus number"
  1029. //usage: "\n FIRST and LAST limit the probing range"
  1030. //usage: "\n"
  1031. //usage: "\n -l output list of installed busses"
  1032. //usage: "\n -y disable interactive mode"
  1033. //usage: "\n -a force scanning of non-regular addresses"
  1034. //usage: "\n -q use smbus quick write commands for probing (default)"
  1035. //usage: "\n -r use smbus read byte commands for probing"
  1036. //usage: "\n -F display list of functionalities"
  1037. int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1038. int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
  1039. {
  1040. const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
  1041. opt_q = (1 << 2), opt_r = (1 << 3),
  1042. opt_F = (1 << 4), opt_l = (1 << 5);
  1043. const char *const optstr = "yaqrFl";
  1044. int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status, cmd;
  1045. unsigned first = 0x03, last = 0x77, opts;
  1046. unsigned long funcs;
  1047. opt_complementary = "q--r:r--q:" /* mutually exclusive */
  1048. "?3"; /* up to 3 args */
  1049. opts = getopt32(argv, optstr);
  1050. argv += optind;
  1051. if (opts & opt_l)
  1052. list_i2c_busses_and_exit();
  1053. if (!argv[0])
  1054. bb_show_usage();
  1055. bus_num = i2c_bus_lookup(argv[0]);
  1056. fd = i2c_dev_open(bus_num);
  1057. get_funcs_matrix(fd, &funcs);
  1058. if (opts & opt_F) {
  1059. /* Only list the functionalities. */
  1060. printf("Functionalities implemented by bus #%d\n", bus_num);
  1061. for (i = 0; i2c_funcs_tab[i].value; i++) {
  1062. printf("%-32s %s\n", i2c_funcs_tab[i].name,
  1063. funcs & i2c_funcs_tab[i].value ? "yes" : "no");
  1064. }
  1065. return EXIT_SUCCESS;
  1066. }
  1067. if (opts & opt_r)
  1068. mode = I2CDETECT_MODE_READ;
  1069. else if (opts & opt_q)
  1070. mode = I2CDETECT_MODE_QUICK;
  1071. if (opts & opt_a) {
  1072. first = 0x00;
  1073. last = 0x7f;
  1074. }
  1075. /* Read address range. */
  1076. if (argv[1]) {
  1077. first = xstrtou_range(argv[1], 16, first, last);
  1078. if (argv[2])
  1079. last = xstrtou_range(argv[2], 16, first, last);
  1080. }
  1081. if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
  1082. no_support("detection commands");
  1083. } else
  1084. if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
  1085. no_support("SMBus quick write");
  1086. } else
  1087. if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  1088. no_support("SMBus receive byte");
  1089. }
  1090. if (mode == I2CDETECT_MODE_AUTO) {
  1091. if (!(funcs & I2C_FUNC_SMBUS_QUICK))
  1092. will_skip("SMBus quick write");
  1093. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1094. will_skip("SMBus receive byte");
  1095. }
  1096. if (!(opts & opt_y))
  1097. confirm_action(-1, -1, -1, 0);
  1098. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
  1099. for (i = 0; i < 128; i += 16) {
  1100. printf("%02x: ", i);
  1101. for (j = 0; j < 16; j++) {
  1102. fflush_all();
  1103. cmd = mode;
  1104. if (mode == I2CDETECT_MODE_AUTO) {
  1105. if ((i+j >= 0x30 && i+j <= 0x37) ||
  1106. (i+j >= 0x50 && i+j <= 0x5F))
  1107. cmd = I2CDETECT_MODE_READ;
  1108. else
  1109. cmd = I2CDETECT_MODE_QUICK;
  1110. }
  1111. /* Skip unwanted addresses. */
  1112. if (i+j < first
  1113. || i+j > last
  1114. || (cmd == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1115. || (cmd == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
  1116. {
  1117. printf(" ");
  1118. continue;
  1119. }
  1120. status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
  1121. if (status < 0) {
  1122. if (errno == EBUSY) {
  1123. printf("UU ");
  1124. continue;
  1125. }
  1126. bb_perror_msg_and_die(
  1127. "can't set address to 0x%02x", i + j);
  1128. }
  1129. switch (cmd) {
  1130. case I2CDETECT_MODE_READ:
  1131. /*
  1132. * This is known to lock SMBus on various
  1133. * write-only chips (mainly clock chips).
  1134. */
  1135. status = i2c_smbus_read_byte(fd);
  1136. break;
  1137. default: /* I2CDETECT_MODE_QUICK: */
  1138. /*
  1139. * This is known to corrupt the Atmel
  1140. * AT24RF08 EEPROM.
  1141. */
  1142. status = i2c_smbus_write_quick(fd,
  1143. I2C_SMBUS_WRITE);
  1144. break;
  1145. }
  1146. if (status < 0)
  1147. printf("-- ");
  1148. else
  1149. printf("%02x ", i+j);
  1150. }
  1151. bb_putchar('\n');
  1152. }
  1153. return 0;
  1154. }
  1155. #endif /* ENABLE_I2CDETECT */