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i2c_tools.c 37 KB

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  1. /* vi: set sw=4 ts=4: */
  2. /*
  3. * Minimal i2c-tools implementation for busybox.
  4. * Parts of code ported from i2c-tools:
  5. * http://www.lm-sensors.org/wiki/I2CTools.
  6. *
  7. * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
  8. *
  9. * Licensed under GPLv2 or later, see file LICENSE in this source tree.
  10. */
  11. //config:config I2CGET
  12. //config: bool "i2cget (5.7 kb)"
  13. //config: default y
  14. //config: help
  15. //config: Read from I2C/SMBus chip registers.
  16. //config:
  17. //config:config I2CSET
  18. //config: bool "i2cset (6.9 kb)"
  19. //config: default y
  20. //config: help
  21. //config: Set I2C registers.
  22. //config:
  23. //config:config I2CDUMP
  24. //config: bool "i2cdump (7.2 kb)"
  25. //config: default y
  26. //config: help
  27. //config: Examine I2C registers.
  28. //config:
  29. //config:config I2CDETECT
  30. //config: bool "i2cdetect (7.3 kb)"
  31. //config: default y
  32. //config: help
  33. //config: Detect I2C chips.
  34. //config:
  35. //config:config I2CTRANSFER
  36. //config: bool "i2ctransfer (5.5 kb)"
  37. //config: default y
  38. //config: help
  39. //config: Send user-defined I2C messages in one transfer.
  40. //config:
  41. //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
  42. //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
  43. //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
  44. //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
  45. //applet:IF_I2CTRANSFER(APPLET(i2ctransfer, BB_DIR_USR_SBIN, BB_SUID_DROP))
  46. /* not NOEXEC: if hw operation stalls, use less memory in "hung" process */
  47. //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
  48. //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
  49. //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
  50. //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
  51. //kbuild:lib-$(CONFIG_I2CTRANSFER) += i2c_tools.o
  52. /*
  53. * Unsupported stuff:
  54. *
  55. * - upstream i2c-tools can also look-up i2c busses by name, we only accept
  56. * numbers,
  57. * - bank and bankreg parameters for i2cdump are not supported because of
  58. * their limited usefulness (see i2cdump manual entry for more info),
  59. * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
  60. * it shouldn't be a problem in modern kernels.
  61. */
  62. #include "libbb.h"
  63. #include <linux/i2c.h>
  64. #define I2CDUMP_NUM_REGS 256
  65. #define I2CDETECT_MODE_AUTO 0
  66. #define I2CDETECT_MODE_QUICK 1
  67. #define I2CDETECT_MODE_READ 2
  68. /* linux/i2c-dev.h from i2c-tools overwrites the one from linux uapi
  69. * and defines symbols already defined by linux/i2c.h.
  70. * Also, it defines a bunch of static inlines which we would rather NOT
  71. * inline. What a mess.
  72. * We need only these definitions from linux/i2c-dev.h:
  73. */
  74. #define I2C_SLAVE 0x0703
  75. #define I2C_SLAVE_FORCE 0x0706
  76. #define I2C_FUNCS 0x0705
  77. #define I2C_PEC 0x0708
  78. #define I2C_SMBUS 0x0720
  79. #define I2C_RDWR 0x0707
  80. #define I2C_RDWR_IOCTL_MAX_MSGS 42
  81. #define I2C_RDWR_IOCTL_MAX_MSGS_STR "42"
  82. struct i2c_smbus_ioctl_data {
  83. __u8 read_write;
  84. __u8 command;
  85. __u32 size;
  86. union i2c_smbus_data *data;
  87. };
  88. struct i2c_rdwr_ioctl_data {
  89. struct i2c_msg *msgs; /* pointers to i2c_msgs */
  90. __u32 nmsgs; /* number of i2c_msgs */
  91. };
  92. /* end linux/i2c-dev.h */
  93. /*
  94. * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
  95. */
  96. static ALWAYS_INLINE void *itoptr(int i)
  97. {
  98. return (void*)(intptr_t)i;
  99. }
  100. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP || ENABLE_I2CDETECT
  101. static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
  102. int size, union i2c_smbus_data *data)
  103. {
  104. struct i2c_smbus_ioctl_data args;
  105. args.read_write = read_write;
  106. args.command = cmd;
  107. args.size = size;
  108. args.data = data;
  109. return ioctl(fd, I2C_SMBUS, &args);
  110. }
  111. static int32_t i2c_smbus_read_byte(int fd)
  112. {
  113. union i2c_smbus_data data;
  114. int err;
  115. err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
  116. if (err < 0)
  117. return err;
  118. return data.byte;
  119. }
  120. #endif
  121. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  122. static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
  123. {
  124. return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
  125. val, I2C_SMBUS_BYTE, NULL);
  126. }
  127. static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
  128. {
  129. union i2c_smbus_data data;
  130. int err;
  131. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  132. I2C_SMBUS_BYTE_DATA, &data);
  133. if (err < 0)
  134. return err;
  135. return data.byte;
  136. }
  137. static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
  138. {
  139. union i2c_smbus_data data;
  140. int err;
  141. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  142. I2C_SMBUS_WORD_DATA, &data);
  143. if (err < 0)
  144. return err;
  145. return data.word;
  146. }
  147. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  148. #if ENABLE_I2CSET
  149. static int32_t i2c_smbus_write_byte_data(int file,
  150. uint8_t cmd, uint8_t value)
  151. {
  152. union i2c_smbus_data data;
  153. data.byte = value;
  154. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  155. I2C_SMBUS_BYTE_DATA, &data);
  156. }
  157. static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
  158. {
  159. union i2c_smbus_data data;
  160. data.word = value;
  161. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  162. I2C_SMBUS_WORD_DATA, &data);
  163. }
  164. static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
  165. uint8_t length, const uint8_t *values)
  166. {
  167. union i2c_smbus_data data;
  168. if (length > I2C_SMBUS_BLOCK_MAX)
  169. length = I2C_SMBUS_BLOCK_MAX;
  170. memcpy(data.block+1, values, length);
  171. data.block[0] = length;
  172. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  173. I2C_SMBUS_BLOCK_DATA, &data);
  174. }
  175. static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
  176. uint8_t length, const uint8_t *values)
  177. {
  178. union i2c_smbus_data data;
  179. if (length > I2C_SMBUS_BLOCK_MAX)
  180. length = I2C_SMBUS_BLOCK_MAX;
  181. memcpy(data.block+1, values, length);
  182. data.block[0] = length;
  183. return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
  184. I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
  185. }
  186. #endif /* ENABLE_I2CSET */
  187. #if ENABLE_I2CDUMP
  188. /*
  189. * Returns the number of bytes read, vals must hold at
  190. * least I2C_SMBUS_BLOCK_MAX bytes.
  191. */
  192. static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
  193. {
  194. union i2c_smbus_data data;
  195. int i, err;
  196. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  197. I2C_SMBUS_BLOCK_DATA, &data);
  198. if (err < 0)
  199. return err;
  200. for (i = 1; i <= data.block[0]; i++)
  201. *vals++ = data.block[i];
  202. return data.block[0];
  203. }
  204. static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
  205. uint8_t len, uint8_t *vals)
  206. {
  207. union i2c_smbus_data data;
  208. int i, err;
  209. if (len > I2C_SMBUS_BLOCK_MAX)
  210. len = I2C_SMBUS_BLOCK_MAX;
  211. data.block[0] = len;
  212. err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
  213. len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
  214. I2C_SMBUS_I2C_BLOCK_DATA, &data);
  215. if (err < 0)
  216. return err;
  217. for (i = 1; i <= data.block[0]; i++)
  218. *vals++ = data.block[i];
  219. return data.block[0];
  220. }
  221. #endif /* ENABLE_I2CDUMP */
  222. #if ENABLE_I2CDETECT
  223. static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
  224. {
  225. return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
  226. }
  227. #endif /* ENABLE_I2CDETECT */
  228. static int i2c_bus_lookup(const char *bus_str)
  229. {
  230. return xstrtou_range(bus_str, 10, 0, 0xfffff);
  231. }
  232. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  233. static int i2c_parse_bus_addr(const char *addr_str)
  234. {
  235. /* Slave address must be in range 0x03 - 0x77. */
  236. return xstrtou_range(addr_str, 16, 0x03, 0x77);
  237. }
  238. static void i2c_set_pec(int fd, int pec)
  239. {
  240. ioctl_or_perror_and_die(fd, I2C_PEC,
  241. itoptr(pec ? 1 : 0),
  242. "can't set PEC");
  243. }
  244. #endif
  245. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP || ENABLE_I2CTRANSFER
  246. static void i2c_set_slave_addr(int fd, int addr, int force)
  247. {
  248. ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
  249. itoptr(addr),
  250. "can't set address to 0x%02x", addr);
  251. }
  252. #endif
  253. #if ENABLE_I2CGET || ENABLE_I2CSET
  254. static int i2c_parse_data_addr(const char *data_addr)
  255. {
  256. /* Data address must be an 8 bit integer. */
  257. return xstrtou_range(data_addr, 16, 0, 0xff);
  258. }
  259. #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
  260. /*
  261. * Opens the device file associated with given i2c bus.
  262. *
  263. * Upstream i2c-tools also support opening devices by i2c bus name
  264. * but we drop it here for size reduction.
  265. */
  266. static int i2c_dev_open(int i2cbus)
  267. {
  268. char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
  269. int fd;
  270. sprintf(filename, "/dev/i2c-%d", i2cbus);
  271. fd = open(filename, O_RDWR);
  272. if (fd < 0) {
  273. if (errno == ENOENT) {
  274. filename[8] = '/'; /* change to "/dev/i2c/%d" */
  275. fd = xopen(filename, O_RDWR);
  276. } else {
  277. bb_perror_msg_and_die("can't open '%s'", filename);
  278. }
  279. }
  280. return fd;
  281. }
  282. /* Size reducing helpers for xxx_check_funcs(). */
  283. static void get_funcs_matrix(int fd, unsigned long *funcs)
  284. {
  285. ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
  286. "can't get adapter functionality matrix");
  287. }
  288. #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
  289. static void check_funcs_test_end(int funcs, int pec, const char *err)
  290. {
  291. if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
  292. bb_simple_error_msg("warning: adapter does not support PEC");
  293. if (err)
  294. bb_error_msg_and_die(
  295. "adapter has no %s capability", err);
  296. }
  297. #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
  298. /*
  299. * The below functions emit an error message and exit if the adapter doesn't
  300. * support desired functionalities.
  301. */
  302. #if ENABLE_I2CGET || ENABLE_I2CDUMP
  303. static void check_read_funcs(int fd, int mode, int data_addr, int pec)
  304. {
  305. unsigned long funcs;
  306. const char *err = NULL;
  307. get_funcs_matrix(fd, &funcs);
  308. switch (mode) {
  309. case I2C_SMBUS_BYTE:
  310. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  311. err = "SMBus receive byte";
  312. break;
  313. }
  314. if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  315. err = "SMBus send byte";
  316. break;
  317. case I2C_SMBUS_BYTE_DATA:
  318. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
  319. err = "SMBus read byte";
  320. break;
  321. case I2C_SMBUS_WORD_DATA:
  322. if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
  323. err = "SMBus read word";
  324. break;
  325. #if ENABLE_I2CDUMP
  326. case I2C_SMBUS_BLOCK_DATA:
  327. if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
  328. err = "SMBus block read";
  329. break;
  330. case I2C_SMBUS_I2C_BLOCK_DATA:
  331. if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
  332. err = "I2C block read";
  333. break;
  334. #endif /* ENABLE_I2CDUMP */
  335. default:
  336. bb_simple_error_msg_and_die("internal error");
  337. }
  338. check_funcs_test_end(funcs, pec, err);
  339. }
  340. #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
  341. #if ENABLE_I2CSET
  342. static void check_write_funcs(int fd, int mode, int pec)
  343. {
  344. unsigned long funcs;
  345. const char *err = NULL;
  346. get_funcs_matrix(fd, &funcs);
  347. switch (mode) {
  348. case I2C_SMBUS_BYTE:
  349. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
  350. err = "SMBus send byte";
  351. break;
  352. case I2C_SMBUS_BYTE_DATA:
  353. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  354. err = "SMBus write byte";
  355. break;
  356. case I2C_SMBUS_WORD_DATA:
  357. if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
  358. err = "SMBus write word";
  359. break;
  360. case I2C_SMBUS_BLOCK_DATA:
  361. if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
  362. err = "SMBus block write";
  363. break;
  364. case I2C_SMBUS_I2C_BLOCK_DATA:
  365. if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
  366. err = "I2C block write";
  367. break;
  368. }
  369. check_funcs_test_end(funcs, pec, err);
  370. }
  371. #endif /* ENABLE_I2CSET */
  372. static void confirm_or_abort(void)
  373. {
  374. fprintf(stderr, "Continue? [y/N] ");
  375. if (!bb_ask_y_confirmation())
  376. bb_simple_error_msg_and_die("aborting");
  377. }
  378. /*
  379. * Return only if user confirms the action, abort otherwise.
  380. *
  381. * The messages displayed here are much less elaborate than their i2c-tools
  382. * counterparts - this is done for size reduction.
  383. */
  384. static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
  385. {
  386. bb_simple_error_msg("WARNING! This program can confuse your I2C bus");
  387. /* Don't let the user break his/her EEPROMs */
  388. if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
  389. bb_simple_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
  390. "devices may result in data loss, aborting");
  391. }
  392. if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
  393. bb_simple_error_msg("WARNING! May interpret a write byte command "
  394. "with PEC as a write byte data command");
  395. if (pec)
  396. bb_simple_error_msg("PEC checking enabled");
  397. confirm_or_abort();
  398. }
  399. #if ENABLE_I2CGET
  400. //usage:#define i2cget_trivial_usage
  401. //usage: "[-fy] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
  402. //usage:#define i2cget_full_usage "\n\n"
  403. //usage: "Read from I2C/SMBus chip registers"
  404. //usage: "\n"
  405. //usage: "\n I2CBUS I2C bus number"
  406. //usage: "\n ADDRESS 0x03-0x77"
  407. //usage: "\nMODE is:"
  408. //usage: "\n b Read byte data (default)"
  409. //usage: "\n w Read word data"
  410. //usage: "\n c Write byte/read byte"
  411. //usage: "\n Append p for SMBus PEC"
  412. //usage: "\n"
  413. //usage: "\n -f Force access"
  414. //usage: "\n -y Disable interactive mode"
  415. int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  416. int i2cget_main(int argc UNUSED_PARAM, char **argv)
  417. {
  418. const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
  419. int bus_num, bus_addr, data_addr = -1, status;
  420. int mode = I2C_SMBUS_BYTE, pec = 0, fd;
  421. unsigned opts;
  422. opts = getopt32(argv, "^" "fy" "\0" "-2:?4"/*from 2 to 4 args*/);
  423. argv += optind;
  424. bus_num = i2c_bus_lookup(argv[0]);
  425. bus_addr = i2c_parse_bus_addr(argv[1]);
  426. if (argv[2]) {
  427. data_addr = i2c_parse_data_addr(argv[2]);
  428. mode = I2C_SMBUS_BYTE_DATA;
  429. if (argv[3]) {
  430. switch (argv[3][0]) {
  431. case 'b': /* Already set */ break;
  432. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  433. case 'c': mode = I2C_SMBUS_BYTE; break;
  434. default:
  435. bb_simple_error_msg("invalid mode");
  436. bb_show_usage();
  437. }
  438. pec = argv[3][1] == 'p';
  439. }
  440. }
  441. fd = i2c_dev_open(bus_num);
  442. check_read_funcs(fd, mode, data_addr, pec);
  443. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  444. if (!(opts & opt_y))
  445. confirm_action(bus_addr, mode, data_addr, pec);
  446. if (pec)
  447. i2c_set_pec(fd, 1);
  448. switch (mode) {
  449. case I2C_SMBUS_BYTE:
  450. if (data_addr >= 0) {
  451. status = i2c_smbus_write_byte(fd, data_addr);
  452. if (status < 0)
  453. bb_simple_error_msg("warning - write failed");
  454. }
  455. status = i2c_smbus_read_byte(fd);
  456. break;
  457. case I2C_SMBUS_WORD_DATA:
  458. status = i2c_smbus_read_word_data(fd, data_addr);
  459. break;
  460. default: /* I2C_SMBUS_BYTE_DATA */
  461. status = i2c_smbus_read_byte_data(fd, data_addr);
  462. }
  463. close(fd);
  464. if (status < 0)
  465. bb_simple_perror_msg_and_die("read failed");
  466. printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  467. return 0;
  468. }
  469. #endif /* ENABLE_I2CGET */
  470. #if ENABLE_I2CSET
  471. //usage:#define i2cset_trivial_usage
  472. //usage: "[-fy] [-m MASK] BUS CHIP-ADDRESS DATA-ADDRESS [VALUE] ... [MODE]"
  473. //usage:#define i2cset_full_usage "\n\n"
  474. //usage: "Set I2C registers"
  475. //usage: "\n"
  476. //usage: "\n I2CBUS I2C bus number"
  477. //usage: "\n ADDRESS 0x03-0x77"
  478. //usage: "\nMODE is:"
  479. //usage: "\n c Byte, no value"
  480. //usage: "\n b Byte data (default)"
  481. //usage: "\n w Word data"
  482. //usage: "\n i I2C block data"
  483. //usage: "\n s SMBus block data"
  484. //usage: "\n Append p for SMBus PEC"
  485. //usage: "\n"
  486. //usage: "\n -f Force access"
  487. //usage: "\n -y Disable interactive mode"
  488. //usage: "\n -r Read back and compare the result"
  489. //usage: "\n -m MASK Mask specifying which bits to write"
  490. int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  491. int i2cset_main(int argc, char **argv)
  492. {
  493. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  494. opt_m = (1 << 2), opt_r = (1 << 3);
  495. int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
  496. int val, blen, mask, fd, status;
  497. unsigned char block[I2C_SMBUS_BLOCK_MAX];
  498. char *opt_m_arg = NULL;
  499. unsigned opts;
  500. opts = getopt32(argv, "^"
  501. "fym:r"
  502. "\0" "-3", /* minimum 3 args */
  503. &opt_m_arg
  504. );
  505. argv += optind;
  506. argc -= optind;
  507. argc--; /* now argv[argc] is last arg */
  508. bus_num = i2c_bus_lookup(argv[0]);
  509. bus_addr = i2c_parse_bus_addr(argv[1]);
  510. data_addr = i2c_parse_data_addr(argv[2]);
  511. if (argv[3]) {
  512. if (!argv[4] && argv[3][0] != 'c') {
  513. mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
  514. } else {
  515. switch (argv[argc][0]) {
  516. case 'c': /* Already set */
  517. break;
  518. case 'b': mode = I2C_SMBUS_BYTE_DATA;
  519. break;
  520. case 'w': mode = I2C_SMBUS_WORD_DATA;
  521. break;
  522. case 's': mode = I2C_SMBUS_BLOCK_DATA;
  523. break;
  524. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA;
  525. break;
  526. default:
  527. bb_simple_error_msg("invalid mode");
  528. bb_show_usage();
  529. }
  530. pec = (argv[argc][1] == 'p');
  531. if (mode == I2C_SMBUS_BLOCK_DATA
  532. || mode == I2C_SMBUS_I2C_BLOCK_DATA
  533. ) {
  534. if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
  535. bb_simple_error_msg_and_die(
  536. "PEC not supported for I2C "
  537. "block writes");
  538. if (opts & opt_m)
  539. bb_simple_error_msg_and_die(
  540. "mask not supported for block "
  541. "writes");
  542. }
  543. }
  544. }
  545. /* Prepare the value(s) to be written according to current mode. */
  546. mask = 0;
  547. blen = 0;
  548. switch (mode) {
  549. case I2C_SMBUS_BYTE_DATA:
  550. val = xstrtou_range(argv[3], 0, 0, 0xff);
  551. break;
  552. case I2C_SMBUS_WORD_DATA:
  553. val = xstrtou_range(argv[3], 0, 0, 0xffff);
  554. break;
  555. case I2C_SMBUS_BLOCK_DATA:
  556. case I2C_SMBUS_I2C_BLOCK_DATA:
  557. for (blen = 3; blen < argc; blen++)
  558. block[blen - 3] = xstrtou_range(argv[blen], 0, 0, 0xff);
  559. blen -= 3;
  560. val = -1;
  561. break;
  562. default:
  563. val = -1;
  564. break;
  565. }
  566. if (opts & opt_m) {
  567. mask = xstrtou_range(opt_m_arg, 0, 0,
  568. (mode == I2C_SMBUS_BYTE ||
  569. mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
  570. }
  571. fd = i2c_dev_open(bus_num);
  572. check_write_funcs(fd, mode, pec);
  573. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  574. if (!(opts & opt_y))
  575. confirm_action(bus_addr, mode, data_addr, pec);
  576. /*
  577. * If we're using mask - read the current value here and adjust the
  578. * value to be written.
  579. */
  580. if (opts & opt_m) {
  581. int tmpval;
  582. switch (mode) {
  583. case I2C_SMBUS_BYTE:
  584. tmpval = i2c_smbus_read_byte(fd);
  585. break;
  586. case I2C_SMBUS_WORD_DATA:
  587. tmpval = i2c_smbus_read_word_data(fd, data_addr);
  588. break;
  589. default:
  590. tmpval = i2c_smbus_read_byte_data(fd, data_addr);
  591. }
  592. if (tmpval < 0)
  593. bb_simple_perror_msg_and_die("can't read old value");
  594. val = (val & mask) | (tmpval & ~mask);
  595. if (!(opts & opt_y)) {
  596. bb_error_msg("old value 0x%0*x, write mask "
  597. "0x%0*x, will write 0x%0*x to register "
  598. "0x%02x",
  599. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
  600. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
  601. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  602. data_addr);
  603. confirm_or_abort();
  604. }
  605. }
  606. if (pec)
  607. i2c_set_pec(fd, 1);
  608. switch (mode) {
  609. case I2C_SMBUS_BYTE:
  610. status = i2c_smbus_write_byte(fd, data_addr);
  611. break;
  612. case I2C_SMBUS_WORD_DATA:
  613. status = i2c_smbus_write_word_data(fd, data_addr, val);
  614. break;
  615. case I2C_SMBUS_BLOCK_DATA:
  616. status = i2c_smbus_write_block_data(fd, data_addr,
  617. blen, block);
  618. break;
  619. case I2C_SMBUS_I2C_BLOCK_DATA:
  620. status = i2c_smbus_write_i2c_block_data(fd, data_addr,
  621. blen, block);
  622. break;
  623. default: /* I2C_SMBUS_BYTE_DATA */
  624. status = i2c_smbus_write_byte_data(fd, data_addr, val);
  625. break;
  626. }
  627. if (status < 0)
  628. bb_simple_perror_msg_and_die("write failed");
  629. if (pec)
  630. i2c_set_pec(fd, 0); /* Clear PEC. */
  631. /* No readback required - we're done. */
  632. if (!(opts & opt_r))
  633. return 0;
  634. switch (mode) {
  635. case I2C_SMBUS_BYTE:
  636. status = i2c_smbus_read_byte(fd);
  637. val = data_addr;
  638. break;
  639. case I2C_SMBUS_WORD_DATA:
  640. status = i2c_smbus_read_word_data(fd, data_addr);
  641. break;
  642. default: /* I2C_SMBUS_BYTE_DATA */
  643. status = i2c_smbus_read_byte_data(fd, data_addr);
  644. }
  645. if (status < 0) {
  646. puts("Warning - readback failed");
  647. } else
  648. if (status != val) {
  649. printf("Warning - data mismatch - wrote "
  650. "0x%0*x, read back 0x%0*x\n",
  651. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
  652. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
  653. } else {
  654. printf("Value 0x%0*x written, readback matched\n",
  655. mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
  656. }
  657. return 0;
  658. }
  659. #endif /* ENABLE_I2CSET */
  660. #if ENABLE_I2CDUMP
  661. static int read_block_data(int buf_fd, int mode, int *block)
  662. {
  663. uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
  664. int res, blen = 0, tmp, i;
  665. if (mode == I2C_SMBUS_BLOCK_DATA) {
  666. blen = i2c_smbus_read_block_data(buf_fd, 0, cblock);
  667. if (blen <= 0)
  668. goto fail;
  669. } else {
  670. for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
  671. tmp = i2c_smbus_read_i2c_block_data(
  672. buf_fd, res, I2C_SMBUS_BLOCK_MAX,
  673. cblock + res);
  674. if (tmp <= 0) {
  675. blen = tmp;
  676. goto fail;
  677. }
  678. }
  679. if (res >= I2CDUMP_NUM_REGS)
  680. res = I2CDUMP_NUM_REGS;
  681. for (i = 0; i < res; i++)
  682. block[i] = cblock[i];
  683. if (mode != I2C_SMBUS_BLOCK_DATA)
  684. for (i = res; i < I2CDUMP_NUM_REGS; i++)
  685. block[i] = -1;
  686. }
  687. return blen;
  688. fail:
  689. bb_error_msg_and_die("block read failed: %d", blen);
  690. }
  691. /* Dump all but word data. */
  692. static void dump_data(int bus_fd, int mode, unsigned first,
  693. unsigned last, int *block, int blen)
  694. {
  695. int i, j, res;
  696. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
  697. " 0123456789abcdef");
  698. for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
  699. if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
  700. break;
  701. if (i/16 < first/16)
  702. continue;
  703. if (i/16 > last/16)
  704. break;
  705. printf("%02x: ", i);
  706. for (j = 0; j < 16; j++) {
  707. fflush_all();
  708. /* Skip unwanted registers */
  709. if (i+j < first || i+j > last) {
  710. printf(" ");
  711. if (mode == I2C_SMBUS_WORD_DATA) {
  712. printf(" ");
  713. j++;
  714. }
  715. continue;
  716. }
  717. switch (mode) {
  718. case I2C_SMBUS_BYTE_DATA:
  719. res = i2c_smbus_read_byte_data(bus_fd, i+j);
  720. block[i+j] = res;
  721. break;
  722. case I2C_SMBUS_WORD_DATA:
  723. res = i2c_smbus_read_word_data(bus_fd, i+j);
  724. if (res < 0) {
  725. block[i+j] = res;
  726. block[i+j+1] = res;
  727. } else {
  728. block[i+j] = res & 0xff;
  729. block[i+j+1] = res >> 8;
  730. }
  731. break;
  732. case I2C_SMBUS_BYTE:
  733. res = i2c_smbus_read_byte(bus_fd);
  734. block[i+j] = res;
  735. break;
  736. default:
  737. res = block[i+j];
  738. }
  739. if (mode == I2C_SMBUS_BLOCK_DATA &&
  740. i+j >= blen) {
  741. printf(" ");
  742. } else if (res < 0) {
  743. printf("XX ");
  744. if (mode == I2C_SMBUS_WORD_DATA)
  745. printf("XX ");
  746. } else {
  747. printf("%02x ", block[i+j]);
  748. if (mode == I2C_SMBUS_WORD_DATA)
  749. printf("%02x ", block[i+j+1]);
  750. }
  751. if (mode == I2C_SMBUS_WORD_DATA)
  752. j++;
  753. }
  754. printf(" ");
  755. for (j = 0; j < 16; j++) {
  756. if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
  757. break;
  758. /* Skip unwanted registers */
  759. if (i+j < first || i+j > last) {
  760. bb_putchar(' ');
  761. continue;
  762. }
  763. res = block[i+j];
  764. if (res < 0) {
  765. bb_putchar('X');
  766. } else if (res == 0x00 || res == 0xff) {
  767. bb_putchar('.');
  768. } else if (res < 32 || res >= 127) {
  769. bb_putchar('?');
  770. } else {
  771. bb_putchar(res);
  772. }
  773. }
  774. bb_putchar('\n');
  775. }
  776. }
  777. static void dump_word_data(int bus_fd, unsigned first, unsigned last)
  778. {
  779. int i, j, rv;
  780. /* Word data. */
  781. puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
  782. for (i = 0; i < 256; i += 8) {
  783. if (i/8 < first/8)
  784. continue;
  785. if (i/8 > last/8)
  786. break;
  787. printf("%02x: ", i);
  788. for (j = 0; j < 8; j++) {
  789. /* Skip unwanted registers. */
  790. if (i+j < first || i+j > last) {
  791. printf(" ");
  792. continue;
  793. }
  794. rv = i2c_smbus_read_word_data(bus_fd, i+j);
  795. if (rv < 0)
  796. printf("XXXX ");
  797. else
  798. printf("%04x ", rv & 0xffff);
  799. }
  800. bb_putchar('\n');
  801. }
  802. }
  803. //usage:#define i2cdump_trivial_usage
  804. //usage: "[-fy] [-r FIRST-LAST] BUS ADDR [MODE]"
  805. //usage:#define i2cdump_full_usage "\n\n"
  806. //usage: "Examine I2C registers"
  807. //usage: "\n"
  808. //usage: "\n I2CBUS I2C bus number"
  809. //usage: "\n ADDRESS 0x03-0x77"
  810. //usage: "\nMODE is:"
  811. //usage: "\n b Byte (default)"
  812. //usage: "\n w Word"
  813. //usage: "\n W Word on even register addresses"
  814. //usage: "\n i I2C block"
  815. //usage: "\n s SMBus block"
  816. //usage: "\n c Consecutive byte"
  817. //usage: "\n Append p for SMBus PEC"
  818. //usage: "\n"
  819. //usage: "\n -f Force access"
  820. //usage: "\n -y Disable interactive mode"
  821. //usage: "\n -r Limit the number of registers being accessed"
  822. int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  823. int i2cdump_main(int argc UNUSED_PARAM, char **argv)
  824. {
  825. const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
  826. opt_r = (1 << 2);
  827. int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
  828. unsigned first = 0x00, last = 0xff, opts;
  829. int block[I2CDUMP_NUM_REGS];
  830. char *opt_r_str, *dash;
  831. int fd, res;
  832. opts = getopt32(argv, "^"
  833. "fyr:"
  834. "\0" "-2:?3" /* from 2 to 3 args */,
  835. &opt_r_str
  836. );
  837. argv += optind;
  838. bus_num = i2c_bus_lookup(argv[0]);
  839. bus_addr = i2c_parse_bus_addr(argv[1]);
  840. if (argv[2]) {
  841. switch (argv[2][0]) {
  842. case 'b': /* Already set. */ break;
  843. case 'c': mode = I2C_SMBUS_BYTE; break;
  844. case 'w': mode = I2C_SMBUS_WORD_DATA; break;
  845. case 'W':
  846. mode = I2C_SMBUS_WORD_DATA;
  847. even = 1;
  848. break;
  849. case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
  850. case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
  851. default:
  852. bb_simple_error_msg_and_die("invalid mode");
  853. }
  854. if (argv[2][1] == 'p') {
  855. if (argv[2][0] == 'W' || argv[2][0] == 'i') {
  856. bb_simple_error_msg_and_die(
  857. "pec not supported for -W and -i");
  858. } else {
  859. pec = 1;
  860. }
  861. }
  862. }
  863. if (opts & opt_r) {
  864. first = strtol(opt_r_str, &dash, 0);
  865. if (dash == opt_r_str || *dash != '-' || first > 0xff)
  866. bb_simple_error_msg_and_die("invalid range");
  867. last = xstrtou_range(++dash, 0, first, 0xff);
  868. /* Range is not available for every mode. */
  869. switch (mode) {
  870. case I2C_SMBUS_BYTE:
  871. case I2C_SMBUS_BYTE_DATA:
  872. break;
  873. case I2C_SMBUS_WORD_DATA:
  874. if (!even || (!(first % 2) && last % 2))
  875. break;
  876. /* Fall through */
  877. default:
  878. bb_simple_error_msg_and_die(
  879. "range not compatible with selected mode");
  880. }
  881. }
  882. fd = i2c_dev_open(bus_num);
  883. check_read_funcs(fd, mode, -1 /* data_addr */, pec);
  884. i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
  885. if (pec)
  886. i2c_set_pec(fd, 1);
  887. if (!(opts & opt_y))
  888. confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
  889. /* All but word data. */
  890. if (mode != I2C_SMBUS_WORD_DATA || even) {
  891. int blen = 0;
  892. if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA)
  893. blen = read_block_data(fd, mode, block);
  894. if (mode == I2C_SMBUS_BYTE) {
  895. res = i2c_smbus_write_byte(fd, first);
  896. if (res < 0)
  897. bb_simple_perror_msg_and_die("write start address");
  898. }
  899. dump_data(fd, mode, first, last, block, blen);
  900. } else {
  901. dump_word_data(fd, first, last);
  902. }
  903. return 0;
  904. }
  905. #endif /* ENABLE_I2CDUMP */
  906. #if ENABLE_I2CDETECT
  907. enum adapter_type {
  908. ADT_DUMMY = 0,
  909. ADT_ISA,
  910. ADT_I2C,
  911. ADT_SMBUS,
  912. };
  913. struct adap_desc {
  914. const char *funcs;
  915. const char *algo;
  916. };
  917. static const struct adap_desc adap_descs[] ALIGN_PTR = {
  918. { .funcs = "dummy", .algo = "Dummy bus", },
  919. { .funcs = "isa", .algo = "ISA bus", },
  920. { .funcs = "i2c", .algo = "I2C adapter", },
  921. { .funcs = "smbus", .algo = "SMBus adapter", },
  922. };
  923. struct i2c_func {
  924. long value;
  925. const char* name;
  926. };
  927. static const struct i2c_func i2c_funcs_tab[] ALIGN_PTR = {
  928. { .value = I2C_FUNC_I2C,
  929. .name = "I2C" },
  930. { .value = I2C_FUNC_SMBUS_QUICK,
  931. .name = "SMBus quick command" },
  932. { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
  933. .name = "SMBus send byte" },
  934. { .value = I2C_FUNC_SMBUS_READ_BYTE,
  935. .name = "SMBus receive byte" },
  936. { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
  937. .name = "SMBus write byte" },
  938. { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
  939. .name = "SMBus read byte" },
  940. { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
  941. .name = "SMBus write word" },
  942. { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
  943. .name = "SMBus read word" },
  944. { .value = I2C_FUNC_SMBUS_PROC_CALL,
  945. .name = "SMBus process call" },
  946. { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
  947. .name = "SMBus block write" },
  948. { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
  949. .name = "SMBus block read" },
  950. { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
  951. .name = "SMBus block process call" },
  952. { .value = I2C_FUNC_SMBUS_PEC,
  953. .name = "SMBus PEC" },
  954. { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
  955. .name = "I2C block write" },
  956. { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
  957. .name = "I2C block read" },
  958. { .value = 0, .name = NULL }
  959. };
  960. static enum adapter_type i2cdetect_get_funcs(int bus)
  961. {
  962. enum adapter_type ret;
  963. unsigned long funcs;
  964. int fd;
  965. fd = i2c_dev_open(bus);
  966. get_funcs_matrix(fd, &funcs);
  967. if (funcs & I2C_FUNC_I2C)
  968. ret = ADT_I2C;
  969. else if (funcs & (I2C_FUNC_SMBUS_BYTE |
  970. I2C_FUNC_SMBUS_BYTE_DATA |
  971. I2C_FUNC_SMBUS_WORD_DATA))
  972. ret = ADT_SMBUS;
  973. else
  974. ret = ADT_DUMMY;
  975. close(fd);
  976. return ret;
  977. }
  978. static void NORETURN list_i2c_busses_and_exit(void)
  979. {
  980. const char *const i2cdev_path = "/sys/class/i2c-dev";
  981. char path[NAME_MAX], name[128];
  982. struct dirent *de, *subde;
  983. enum adapter_type adt;
  984. DIR *dir, *subdir;
  985. int rv, bus;
  986. char *pos;
  987. FILE *fp;
  988. /*
  989. * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
  990. * but we won't bother since it's only useful on older kernels (before
  991. * 2.6.5). We expect sysfs to be present and mounted at /sys/.
  992. */
  993. dir = xopendir(i2cdev_path);
  994. while ((de = readdir(dir))) {
  995. if (de->d_name[0] == '.')
  996. continue;
  997. /* Simple version for ISA chips. */
  998. snprintf(path, NAME_MAX, "%s/%s/name",
  999. i2cdev_path, de->d_name);
  1000. fp = fopen_for_read(path);
  1001. if (fp == NULL) {
  1002. snprintf(path, NAME_MAX,
  1003. "%s/%s/device/name",
  1004. i2cdev_path, de->d_name);
  1005. fp = fopen_for_read(path);
  1006. }
  1007. /* Non-ISA chips require the hard-way. */
  1008. if (fp == NULL) {
  1009. snprintf(path, NAME_MAX,
  1010. "%s/%s/device/name",
  1011. i2cdev_path, de->d_name);
  1012. subdir = opendir(path);
  1013. if (subdir == NULL)
  1014. continue;
  1015. while ((subde = readdir(subdir))) {
  1016. if (subde->d_name[0] == '.')
  1017. continue;
  1018. if (is_prefixed_with(subde->d_name, "i2c-")) {
  1019. snprintf(path, NAME_MAX,
  1020. "%s/%s/device/%s/name",
  1021. i2cdev_path, de->d_name,
  1022. subde->d_name);
  1023. fp = fopen_for_read(path);
  1024. break;
  1025. }
  1026. }
  1027. }
  1028. if (fp != NULL) {
  1029. /*
  1030. * Get the rest of the info and display a line
  1031. * for a single bus.
  1032. */
  1033. memset(name, 0, sizeof(name));
  1034. pos = fgets(name, sizeof(name), fp);
  1035. fclose(fp);
  1036. if (pos == NULL)
  1037. continue;
  1038. pos = strchr(name, '\n');
  1039. if (pos != NULL)
  1040. *pos = '\0';
  1041. rv = sscanf(de->d_name, "i2c-%d", &bus);
  1042. if (rv != 1)
  1043. continue;
  1044. if (is_prefixed_with(name, "ISA"))
  1045. adt = ADT_ISA;
  1046. else
  1047. adt = i2cdetect_get_funcs(bus);
  1048. printf(
  1049. "i2c-%d\t%-10s\t%-32s\t%s\n",
  1050. bus, adap_descs[adt].funcs,
  1051. name, adap_descs[adt].algo);
  1052. }
  1053. }
  1054. exit_SUCCESS();
  1055. }
  1056. static void NORETURN no_support(const char *cmd)
  1057. {
  1058. bb_error_msg_and_die("bus doesn't support %s", cmd);
  1059. }
  1060. static void will_skip(const char *cmd)
  1061. {
  1062. bb_error_msg(
  1063. "warning: can't use %s command, "
  1064. "will skip some addresses", cmd);
  1065. }
  1066. //usage:#define i2cdetect_trivial_usage
  1067. //usage: "-l | -F I2CBUS | [-ya] [-q|-r] I2CBUS [FIRST LAST]"
  1068. //usage:#define i2cdetect_full_usage "\n\n"
  1069. //usage: "Detect I2C chips"
  1070. //usage: "\n"
  1071. //usage: "\n -l List installed buses"
  1072. //usage: "\n -F BUS# List functionalities on this bus"
  1073. //usage: "\n -y Disable interactive mode"
  1074. //usage: "\n -a Force scanning of non-regular addresses"
  1075. //usage: "\n -q Use smbus quick write commands for probing (default)"
  1076. //usage: "\n -r Use smbus read byte commands for probing"
  1077. //usage: "\n FIRST and LAST limit probing range"
  1078. int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1079. int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
  1080. {
  1081. const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
  1082. opt_q = (1 << 2), opt_r = (1 << 3),
  1083. opt_F = (1 << 4), opt_l = (1 << 5);
  1084. int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status, cmd;
  1085. unsigned first = 0x03, last = 0x77, opts;
  1086. unsigned long funcs;
  1087. opts = getopt32(argv, "^"
  1088. "yaqrFl"
  1089. "\0"
  1090. "q--r:r--q:"/*mutually exclusive*/
  1091. "?3"/*up to 3 args*/
  1092. );
  1093. argv += optind;
  1094. if (opts & opt_l)
  1095. list_i2c_busses_and_exit();
  1096. if (!argv[0])
  1097. bb_show_usage();
  1098. bus_num = i2c_bus_lookup(argv[0]);
  1099. fd = i2c_dev_open(bus_num);
  1100. get_funcs_matrix(fd, &funcs);
  1101. if (opts & opt_F) {
  1102. /* Only list the functionalities. */
  1103. printf("Functionalities implemented by bus #%d\n", bus_num);
  1104. for (i = 0; i2c_funcs_tab[i].value; i++) {
  1105. printf("%-32s %s\n", i2c_funcs_tab[i].name,
  1106. funcs & i2c_funcs_tab[i].value ? "yes" : "no");
  1107. }
  1108. return EXIT_SUCCESS;
  1109. }
  1110. if (opts & opt_r)
  1111. mode = I2CDETECT_MODE_READ;
  1112. else if (opts & opt_q)
  1113. mode = I2CDETECT_MODE_QUICK;
  1114. if (opts & opt_a) {
  1115. first = 0x00;
  1116. last = 0x7f;
  1117. }
  1118. /* Read address range. */
  1119. if (argv[1]) {
  1120. first = xstrtou_range(argv[1], 16, first, last);
  1121. if (argv[2])
  1122. last = xstrtou_range(argv[2], 16, first, last);
  1123. }
  1124. if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
  1125. no_support("detection commands");
  1126. } else
  1127. if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
  1128. no_support("SMBus quick write");
  1129. } else
  1130. if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
  1131. no_support("SMBus receive byte");
  1132. }
  1133. if (mode == I2CDETECT_MODE_AUTO) {
  1134. if (!(funcs & I2C_FUNC_SMBUS_QUICK))
  1135. will_skip("SMBus quick write");
  1136. if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1137. will_skip("SMBus receive byte");
  1138. }
  1139. if (!(opts & opt_y))
  1140. confirm_action(-1, -1, -1, 0);
  1141. puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
  1142. for (i = 0; i < 128; i += 16) {
  1143. printf("%02x: ", i);
  1144. for (j = 0; j < 16; j++) {
  1145. fflush_all();
  1146. cmd = mode;
  1147. if (mode == I2CDETECT_MODE_AUTO) {
  1148. if ((i+j >= 0x30 && i+j <= 0x37) ||
  1149. (i+j >= 0x50 && i+j <= 0x5F))
  1150. cmd = I2CDETECT_MODE_READ;
  1151. else
  1152. cmd = I2CDETECT_MODE_QUICK;
  1153. }
  1154. /* Skip unwanted addresses. */
  1155. if (i+j < first
  1156. || i+j > last
  1157. || (cmd == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
  1158. || (cmd == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
  1159. {
  1160. printf(" ");
  1161. continue;
  1162. }
  1163. status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
  1164. if (status < 0) {
  1165. if (errno == EBUSY) {
  1166. printf("UU ");
  1167. continue;
  1168. }
  1169. bb_perror_msg_and_die(
  1170. "can't set address to 0x%02x", i + j);
  1171. }
  1172. switch (cmd) {
  1173. case I2CDETECT_MODE_READ:
  1174. /*
  1175. * This is known to lock SMBus on various
  1176. * write-only chips (mainly clock chips).
  1177. */
  1178. status = i2c_smbus_read_byte(fd);
  1179. break;
  1180. default: /* I2CDETECT_MODE_QUICK: */
  1181. /*
  1182. * This is known to corrupt the Atmel
  1183. * AT24RF08 EEPROM.
  1184. */
  1185. status = i2c_smbus_write_quick(fd,
  1186. I2C_SMBUS_WRITE);
  1187. break;
  1188. }
  1189. if (status < 0)
  1190. printf("-- ");
  1191. else
  1192. printf("%02x ", i+j);
  1193. }
  1194. bb_putchar('\n');
  1195. }
  1196. return 0;
  1197. }
  1198. #endif /* ENABLE_I2CDETECT */
  1199. #if ENABLE_I2CTRANSFER
  1200. static void check_i2c_func(int fd)
  1201. {
  1202. unsigned long funcs;
  1203. get_funcs_matrix(fd, &funcs);
  1204. if (!(funcs & I2C_FUNC_I2C))
  1205. bb_simple_error_msg_and_die("adapter does not support I2C transfers");
  1206. }
  1207. //usage:#define i2ctransfer_trivial_usage
  1208. //usage: "[-fay] I2CBUS { rLENGTH[@ADDR] | wLENGTH[@ADDR] DATA...}..."
  1209. //usage:#define i2ctransfer_full_usage "\n\n"
  1210. //usage: "Read/write I2C data in one transfer"
  1211. //usage: "\n"
  1212. //usage: "\n -f Force access to busy addresses"
  1213. //usage: "\n -a Force access to non-regular addresses"
  1214. //usage: "\n -y Disable interactive mode"
  1215. int i2ctransfer_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
  1216. int i2ctransfer_main(int argc UNUSED_PARAM, char **argv)
  1217. {
  1218. enum {
  1219. opt_f = (1 << 0),
  1220. opt_y = (1 << 1),
  1221. opt_a = (1 << 2),
  1222. };
  1223. int bus_num, bus_addr;
  1224. int fd;
  1225. unsigned opts, first, last;
  1226. int nmsgs, nmsgs_sent, i;
  1227. struct i2c_msg msgs[I2C_RDWR_IOCTL_MAX_MSGS];
  1228. struct i2c_rdwr_ioctl_data rdwr;
  1229. memset(msgs, 0, sizeof(msgs));
  1230. opts = getopt32(argv, "^"
  1231. "fya"
  1232. "\0" "-2" /* minimum 2 args */
  1233. );
  1234. first = 0x03;
  1235. last = 0x77;
  1236. if (opts & opt_a) {
  1237. first = 0x00;
  1238. last = 0x7f;
  1239. }
  1240. argv += optind;
  1241. bus_num = i2c_bus_lookup(argv[0]);
  1242. fd = i2c_dev_open(bus_num);
  1243. check_i2c_func(fd);
  1244. bus_addr = -1;
  1245. nmsgs = 0;
  1246. while (*++argv) {
  1247. char *arg_ptr;
  1248. unsigned len;
  1249. uint16_t flags;
  1250. char *end;
  1251. if (nmsgs >= I2C_RDWR_IOCTL_MAX_MSGS)
  1252. bb_simple_error_msg_and_die("too many messages, max: "I2C_RDWR_IOCTL_MAX_MSGS_STR);
  1253. flags = 0;
  1254. arg_ptr = *argv;
  1255. switch (*arg_ptr++) {
  1256. case 'r': flags |= I2C_M_RD; break;
  1257. case 'w': break;
  1258. default:
  1259. bb_show_usage();
  1260. }
  1261. end = strchr(arg_ptr, '@');
  1262. if (end) *end = '\0';
  1263. len = xstrtou_range(arg_ptr, 0, 0, 0xffff);
  1264. if (end) {
  1265. bus_addr = xstrtou_range(end + 1, 0, first, last);
  1266. i2c_set_slave_addr(fd, bus_addr, (opts & opt_f));
  1267. } else {
  1268. /* Reuse last address if possible */
  1269. if (bus_addr < 0)
  1270. bb_error_msg_and_die("no address given in '%s'", *argv);
  1271. }
  1272. msgs[nmsgs].addr = bus_addr;
  1273. msgs[nmsgs].flags = flags;
  1274. msgs[nmsgs].len = len;
  1275. if (len)
  1276. msgs[nmsgs].buf = xzalloc(len);
  1277. if (!(flags & I2C_M_RD)) {
  1278. /* Consume DATA arg(s) */
  1279. unsigned buf_idx = 0;
  1280. while (buf_idx < len) {
  1281. uint8_t data8;
  1282. unsigned long data;
  1283. arg_ptr = *++argv;
  1284. if (!arg_ptr)
  1285. bb_show_usage();
  1286. data = strtoul(arg_ptr, &end, 0);
  1287. if (data > 0xff || arg_ptr == end)
  1288. bb_error_msg_and_die("invalid data byte '%s'", *argv);
  1289. data8 = data;
  1290. while (buf_idx < len) {
  1291. msgs[nmsgs].buf[buf_idx++] = data8;
  1292. if (!*end)
  1293. break;
  1294. switch (*end) {
  1295. /* Pseudo randomness (8 bit AXR with a=13 and b=27) */
  1296. case 'p':
  1297. data8 = (data8 ^ 27) + 13;
  1298. data8 = (data8 << 1) | (data8 >> 7);
  1299. break;
  1300. case '+': data8++; break;
  1301. case '-': data8--; break;
  1302. case '=': break;
  1303. default:
  1304. bb_error_msg_and_die("invalid data byte suffix: '%s'",
  1305. *argv);
  1306. }
  1307. }
  1308. }
  1309. }
  1310. nmsgs++;
  1311. }
  1312. if (!(opts & opt_y))
  1313. confirm_action(bus_addr, 0, 0, 0);
  1314. rdwr.msgs = msgs;
  1315. rdwr.nmsgs = nmsgs;
  1316. nmsgs_sent = ioctl_or_perror_and_die(fd, I2C_RDWR, &rdwr, "I2C_RDWR");
  1317. if (nmsgs_sent < nmsgs)
  1318. bb_error_msg("warning: only %u/%u messages sent", nmsgs_sent, nmsgs);
  1319. for (i = 0; i < nmsgs_sent; i++) {
  1320. if (msgs[i].len != 0 && (msgs[i].flags & I2C_M_RD)) {
  1321. int j;
  1322. for (j = 0; j < msgs[i].len - 1; j++)
  1323. printf("0x%02x ", msgs[i].buf[j]);
  1324. /* Print final byte with newline */
  1325. printf("0x%02x\n", msgs[i].buf[j]);
  1326. }
  1327. }
  1328. # if ENABLE_FEATURE_CLEAN_UP
  1329. close(fd);
  1330. for (i = 0; i < nmsgs; i++)
  1331. free(msgs[i].buf);
  1332. # endif
  1333. return 0;
  1334. }
  1335. #endif /* ENABLE_I2CTRANSFER */