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7be59733d7
When the soft-float ABI for PowerPC was added in commit
5a92dd95c7, with Freescale cpus using
the alternative SPE FPU as the main use case, it was noted that we
could probably support hard float on them, but that it would involve
determining some difficult ABI constraints. This commit is the
completion of that work.
The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed
ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility
are problematic for the same reason they're problematic on ARM, where
optional float-related parts of the register file are "call-saved if
present". This requires testing __hwcap, which is now done.
In keeping with the existing powerpc-sf subarch definition, which did
not have fenv, the fenv macros are not defined for SPE and the SPEFSCR
control register is left (and assumed to start in) the default mode.
36 lines
883 B
C
36 lines
883 B
C
#if defined(_SOFT_FLOAT) || defined(__NO_FPRS__)
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#define FE_ALL_EXCEPT 0
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#define FE_TONEAREST 0
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#else
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#define FE_TONEAREST 0
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#define FE_TOWARDZERO 1
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#define FE_UPWARD 2
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#define FE_DOWNWARD 3
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#define FE_INEXACT 0x02000000
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#define FE_DIVBYZERO 0x04000000
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#define FE_UNDERFLOW 0x08000000
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#define FE_OVERFLOW 0x10000000
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#define FE_INVALID 0x20000000
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#define FE_ALL_EXCEPT 0x3e000000
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#ifdef _GNU_SOURCE
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#define FE_INVALID_SNAN 0x01000000
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#define FE_INVALID_ISI 0x00800000
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#define FE_INVALID_IDI 0x00400000
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#define FE_INVALID_ZDZ 0x00200000
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#define FE_INVALID_IMZ 0x00100000
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#define FE_INVALID_COMPARE 0x00080000
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#define FE_INVALID_SOFTWARE 0x00000400
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#define FE_INVALID_SQRT 0x00000200
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#define FE_INVALID_INTEGER_CONVERSION 0x00000100
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#define FE_ALL_INVALID 0x01f80700
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#endif
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#endif
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typedef unsigned fexcept_t;
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typedef double fenv_t;
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#define FE_DFL_ENV ((const fenv_t *)-1)
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