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@@ -97,11 +97,13 @@ extern unsigned int OPENSSL_armv8_rsa_neonized;
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*/
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*/
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# define ARM_CPU_IMP_ARM 0x41
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# define ARM_CPU_IMP_ARM 0x41
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+# define HISI_CPU_IMP 0x48
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# define ARM_CPU_PART_CORTEX_A72 0xD08
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# define ARM_CPU_PART_CORTEX_A72 0xD08
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# define ARM_CPU_PART_N1 0xD0C
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# define ARM_CPU_PART_N1 0xD0C
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# define ARM_CPU_PART_V1 0xD40
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# define ARM_CPU_PART_V1 0xD40
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# define ARM_CPU_PART_N2 0xD49
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# define ARM_CPU_PART_N2 0xD49
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+# define HISI_CPU_PART_KP920 0xD01
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# define MIDR_PARTNUM_SHIFT 4
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# define MIDR_PARTNUM_SHIFT 4
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# define MIDR_PARTNUM_MASK (0xfffU << MIDR_PARTNUM_SHIFT)
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# define MIDR_PARTNUM_MASK (0xfffU << MIDR_PARTNUM_SHIFT)
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