sha512-mips.pl 14 KB

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  1. #! /usr/bin/env perl
  2. # Copyright 2010-2018 The OpenSSL Project Authors. All Rights Reserved.
  3. #
  4. # Licensed under the Apache License 2.0 (the "License"). You may not use
  5. # this file except in compliance with the License. You can obtain a copy
  6. # in the file LICENSE in the source distribution or at
  7. # https://www.openssl.org/source/license.html
  8. # ====================================================================
  9. # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  10. # project. The module is, however, dual licensed under OpenSSL and
  11. # CRYPTOGAMS licenses depending on where you obtain it. For further
  12. # details see http://www.openssl.org/~appro/cryptogams/.
  13. # ====================================================================
  14. # SHA2 block procedures for MIPS.
  15. # October 2010.
  16. #
  17. # SHA256 performance improvement on MIPS R5000 CPU is ~27% over gcc-
  18. # generated code in o32 build and ~55% in n32/64 build. SHA512 [which
  19. # for now can only be compiled for MIPS64 ISA] improvement is modest
  20. # ~17%, but it comes for free, because it's same instruction sequence.
  21. # Improvement coefficients are for aligned input.
  22. # September 2012.
  23. #
  24. # Add MIPS[32|64]R2 code (>25% less instructions).
  25. ######################################################################
  26. # There is a number of MIPS ABI in use, O32 and N32/64 are most
  27. # widely used. Then there is a new contender: NUBI. It appears that if
  28. # one picks the latter, it's possible to arrange code in ABI neutral
  29. # manner. Therefore let's stick to NUBI register layout:
  30. #
  31. ($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
  32. ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
  33. ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
  34. ($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
  35. #
  36. # The return value is placed in $a0. Following coding rules facilitate
  37. # interoperability:
  38. #
  39. # - never ever touch $tp, "thread pointer", former $gp [o32 can be
  40. # excluded from the rule, because it's specified volatile];
  41. # - copy return value to $t0, former $v0 [or to $a0 if you're adapting
  42. # old code];
  43. # - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
  44. #
  45. # For reference here is register layout for N32/64 MIPS ABIs:
  46. #
  47. # ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
  48. # ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
  49. # ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
  50. # ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
  51. # ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
  52. #
  53. $flavour = shift || "o32"; # supported flavours are o32,n32,64,nubi32,nubi64
  54. if ($flavour =~ /64|n32/i) {
  55. $PTR_LA="dla";
  56. $PTR_ADD="daddu"; # incidentally works even on n32
  57. $PTR_SUB="dsubu"; # incidentally works even on n32
  58. $REG_S="sd";
  59. $REG_L="ld";
  60. $PTR_SLL="dsll"; # incidentally works even on n32
  61. $SZREG=8;
  62. } else {
  63. $PTR_LA="la";
  64. $PTR_ADD="addu";
  65. $PTR_SUB="subu";
  66. $REG_S="sw";
  67. $REG_L="lw";
  68. $PTR_SLL="sll";
  69. $SZREG=4;
  70. }
  71. $pf = ($flavour =~ /nubi/i) ? $t0 : $t2;
  72. #
  73. # <appro@openssl.org>
  74. #
  75. ######################################################################
  76. $big_endian=(`echo MIPSEB | $ENV{CC} -E -`=~/MIPSEB/)?0:1 if ($ENV{CC});
  77. for (@ARGV) { $output=$_ if (/\w[\w\-]*\.\w+$/); }
  78. open STDOUT,">$output";
  79. if (!defined($big_endian)) { $big_endian=(unpack('L',pack('N',1))==1); }
  80. if ($output =~ /512/) {
  81. $label="512";
  82. $SZ=8;
  83. $LD="ld"; # load from memory
  84. $ST="sd"; # store to memory
  85. $SLL="dsll"; # shift left logical
  86. $SRL="dsrl"; # shift right logical
  87. $ADDU="daddu";
  88. $ROTR="drotr";
  89. @Sigma0=(28,34,39);
  90. @Sigma1=(14,18,41);
  91. @sigma0=( 7, 1, 8); # right shift first
  92. @sigma1=( 6,19,61); # right shift first
  93. $lastK=0x817;
  94. $rounds=80;
  95. } else {
  96. $label="256";
  97. $SZ=4;
  98. $LD="lw"; # load from memory
  99. $ST="sw"; # store to memory
  100. $SLL="sll"; # shift left logical
  101. $SRL="srl"; # shift right logical
  102. $ADDU="addu";
  103. $ROTR="rotr";
  104. @Sigma0=( 2,13,22);
  105. @Sigma1=( 6,11,25);
  106. @sigma0=( 3, 7,18); # right shift first
  107. @sigma1=(10,17,19); # right shift first
  108. $lastK=0x8f2;
  109. $rounds=64;
  110. }
  111. $MSB = $big_endian ? 0 : ($SZ-1);
  112. $LSB = ($SZ-1)&~$MSB;
  113. @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("\$$_",(1,2,3,7,24,25,30,31));
  114. @X=map("\$$_",(8..23));
  115. $ctx=$a0;
  116. $inp=$a1;
  117. $len=$a2; $Ktbl=$len;
  118. sub BODY_00_15 {
  119. my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
  120. my ($T1,$tmp0,$tmp1,$tmp2)=(@X[4],@X[5],@X[6],@X[7]);
  121. $code.=<<___ if ($i<15);
  122. #if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
  123. ${LD} @X[1],`($i+1)*$SZ`($inp)
  124. #else
  125. ${LD}l @X[1],`($i+1)*$SZ+$MSB`($inp)
  126. ${LD}r @X[1],`($i+1)*$SZ+$LSB`($inp)
  127. #endif
  128. ___
  129. $code.=<<___ if (!$big_endian && $i<16 && $SZ==4);
  130. #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
  131. wsbh @X[0],@X[0] # byte swap($i)
  132. rotr @X[0],@X[0],16
  133. #else
  134. srl $tmp0,@X[0],24 # byte swap($i)
  135. srl $tmp1,@X[0],8
  136. andi $tmp2,@X[0],0xFF00
  137. sll @X[0],@X[0],24
  138. andi $tmp1,0xFF00
  139. sll $tmp2,$tmp2,8
  140. or @X[0],$tmp0
  141. or $tmp1,$tmp2
  142. or @X[0],$tmp1
  143. #endif
  144. ___
  145. $code.=<<___ if (!$big_endian && $i<16 && $SZ==8);
  146. #if defined(_MIPS_ARCH_MIPS64R2)
  147. dsbh @X[0],@X[0] # byte swap($i)
  148. dshd @X[0],@X[0]
  149. #else
  150. ori $tmp0,$zero,0xFF
  151. dsll $tmp2,$tmp0,32
  152. or $tmp0,$tmp2 # 0x000000FF000000FF
  153. and $tmp1,@X[0],$tmp0 # byte swap($i)
  154. dsrl $tmp2,@X[0],24
  155. dsll $tmp1,24
  156. and $tmp2,$tmp0
  157. dsll $tmp0,8 # 0x0000FF000000FF00
  158. or $tmp1,$tmp2
  159. and $tmp2,@X[0],$tmp0
  160. dsrl @X[0],8
  161. dsll $tmp2,8
  162. and @X[0],$tmp0
  163. or $tmp1,$tmp2
  164. or @X[0],$tmp1
  165. dsrl $tmp1,@X[0],32
  166. dsll @X[0],32
  167. or @X[0],$tmp1
  168. #endif
  169. ___
  170. $code.=<<___;
  171. #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
  172. xor $tmp2,$f,$g # $i
  173. $ROTR $tmp0,$e,@Sigma1[0]
  174. $ADDU $T1,$X[0],$h
  175. $ROTR $tmp1,$e,@Sigma1[1]
  176. and $tmp2,$e
  177. $ROTR $h,$e,@Sigma1[2]
  178. xor $tmp0,$tmp1
  179. $ROTR $tmp1,$a,@Sigma0[0]
  180. xor $tmp2,$g # Ch(e,f,g)
  181. xor $tmp0,$h # Sigma1(e)
  182. $ROTR $h,$a,@Sigma0[1]
  183. $ADDU $T1,$tmp2
  184. $LD $tmp2,`$i*$SZ`($Ktbl) # K[$i]
  185. xor $h,$tmp1
  186. $ROTR $tmp1,$a,@Sigma0[2]
  187. $ADDU $T1,$tmp0
  188. and $tmp0,$b,$c
  189. xor $h,$tmp1 # Sigma0(a)
  190. xor $tmp1,$b,$c
  191. #else
  192. $ADDU $T1,$X[0],$h # $i
  193. $SRL $h,$e,@Sigma1[0]
  194. xor $tmp2,$f,$g
  195. $SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
  196. and $tmp2,$e
  197. $SRL $tmp0,$e,@Sigma1[1]
  198. xor $h,$tmp1
  199. $SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
  200. xor $h,$tmp0
  201. $SRL $tmp0,$e,@Sigma1[2]
  202. xor $h,$tmp1
  203. $SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
  204. xor $h,$tmp0
  205. xor $tmp2,$g # Ch(e,f,g)
  206. xor $tmp0,$tmp1,$h # Sigma1(e)
  207. $SRL $h,$a,@Sigma0[0]
  208. $ADDU $T1,$tmp2
  209. $LD $tmp2,`$i*$SZ`($Ktbl) # K[$i]
  210. $SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
  211. $ADDU $T1,$tmp0
  212. $SRL $tmp0,$a,@Sigma0[1]
  213. xor $h,$tmp1
  214. $SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
  215. xor $h,$tmp0
  216. $SRL $tmp0,$a,@Sigma0[2]
  217. xor $h,$tmp1
  218. $SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
  219. xor $h,$tmp0
  220. and $tmp0,$b,$c
  221. xor $h,$tmp1 # Sigma0(a)
  222. xor $tmp1,$b,$c
  223. #endif
  224. $ST @X[0],`($i%16)*$SZ`($sp) # offload to ring buffer
  225. $ADDU $h,$tmp0
  226. and $tmp1,$a
  227. $ADDU $T1,$tmp2 # +=K[$i]
  228. $ADDU $h,$tmp1 # +=Maj(a,b,c)
  229. $ADDU $d,$T1
  230. $ADDU $h,$T1
  231. ___
  232. $code.=<<___ if ($i>=13);
  233. $LD @X[3],`(($i+3)%16)*$SZ`($sp) # prefetch from ring buffer
  234. ___
  235. }
  236. sub BODY_16_XX {
  237. my $i=@_[0];
  238. my ($tmp0,$tmp1,$tmp2,$tmp3)=(@X[4],@X[5],@X[6],@X[7]);
  239. $code.=<<___;
  240. #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
  241. $SRL $tmp2,@X[1],@sigma0[0] # Xupdate($i)
  242. $ROTR $tmp0,@X[1],@sigma0[1]
  243. $ADDU @X[0],@X[9] # +=X[i+9]
  244. xor $tmp2,$tmp0
  245. $ROTR $tmp0,@X[1],@sigma0[2]
  246. $SRL $tmp3,@X[14],@sigma1[0]
  247. $ROTR $tmp1,@X[14],@sigma1[1]
  248. xor $tmp2,$tmp0 # sigma0(X[i+1])
  249. $ROTR $tmp0,@X[14],@sigma1[2]
  250. xor $tmp3,$tmp1
  251. $ADDU @X[0],$tmp2
  252. #else
  253. $SRL $tmp2,@X[1],@sigma0[0] # Xupdate($i)
  254. $ADDU @X[0],@X[9] # +=X[i+9]
  255. $SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
  256. $SRL $tmp0,@X[1],@sigma0[1]
  257. xor $tmp2,$tmp1
  258. $SLL $tmp1,`@sigma0[2]-@sigma0[1]`
  259. xor $tmp2,$tmp0
  260. $SRL $tmp0,@X[1],@sigma0[2]
  261. xor $tmp2,$tmp1
  262. $SRL $tmp3,@X[14],@sigma1[0]
  263. xor $tmp2,$tmp0 # sigma0(X[i+1])
  264. $SLL $tmp1,@X[14],`$SZ*8-@sigma1[2]`
  265. $ADDU @X[0],$tmp2
  266. $SRL $tmp0,@X[14],@sigma1[1]
  267. xor $tmp3,$tmp1
  268. $SLL $tmp1,`@sigma1[2]-@sigma1[1]`
  269. xor $tmp3,$tmp0
  270. $SRL $tmp0,@X[14],@sigma1[2]
  271. xor $tmp3,$tmp1
  272. #endif
  273. xor $tmp3,$tmp0 # sigma1(X[i+14])
  274. $ADDU @X[0],$tmp3
  275. ___
  276. &BODY_00_15(@_);
  277. }
  278. $FRAMESIZE=16*$SZ+16*$SZREG;
  279. $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? "0xc0fff008" : "0xc0ff0000";
  280. $code.=<<___;
  281. #include "mips_arch.h"
  282. .text
  283. .set noat
  284. #if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
  285. .option pic2
  286. #endif
  287. .align 5
  288. .globl sha${label}_block_data_order
  289. .ent sha${label}_block_data_order
  290. sha${label}_block_data_order:
  291. .frame $sp,$FRAMESIZE,$ra
  292. .mask $SAVED_REGS_MASK,-$SZREG
  293. .set noreorder
  294. ___
  295. $code.=<<___ if ($flavour =~ /o32/i); # o32 PIC-ification
  296. .cpload $pf
  297. ___
  298. $code.=<<___;
  299. $PTR_SUB $sp,$FRAMESIZE
  300. $REG_S $ra,$FRAMESIZE-1*$SZREG($sp)
  301. $REG_S $fp,$FRAMESIZE-2*$SZREG($sp)
  302. $REG_S $s11,$FRAMESIZE-3*$SZREG($sp)
  303. $REG_S $s10,$FRAMESIZE-4*$SZREG($sp)
  304. $REG_S $s9,$FRAMESIZE-5*$SZREG($sp)
  305. $REG_S $s8,$FRAMESIZE-6*$SZREG($sp)
  306. $REG_S $s7,$FRAMESIZE-7*$SZREG($sp)
  307. $REG_S $s6,$FRAMESIZE-8*$SZREG($sp)
  308. $REG_S $s5,$FRAMESIZE-9*$SZREG($sp)
  309. $REG_S $s4,$FRAMESIZE-10*$SZREG($sp)
  310. ___
  311. $code.=<<___ if ($flavour =~ /nubi/i); # optimize non-nubi prologue
  312. $REG_S $s3,$FRAMESIZE-11*$SZREG($sp)
  313. $REG_S $s2,$FRAMESIZE-12*$SZREG($sp)
  314. $REG_S $s1,$FRAMESIZE-13*$SZREG($sp)
  315. $REG_S $s0,$FRAMESIZE-14*$SZREG($sp)
  316. $REG_S $gp,$FRAMESIZE-15*$SZREG($sp)
  317. ___
  318. $code.=<<___;
  319. $PTR_SLL @X[15],$len,`log(16*$SZ)/log(2)`
  320. ___
  321. $code.=<<___ if ($flavour !~ /o32/i); # non-o32 PIC-ification
  322. .cplocal $Ktbl
  323. .cpsetup $pf,$zero,sha${label}_block_data_order
  324. ___
  325. $code.=<<___;
  326. .set reorder
  327. $PTR_LA $Ktbl,K${label} # PIC-ified 'load address'
  328. $LD $A,0*$SZ($ctx) # load context
  329. $LD $B,1*$SZ($ctx)
  330. $LD $C,2*$SZ($ctx)
  331. $LD $D,3*$SZ($ctx)
  332. $LD $E,4*$SZ($ctx)
  333. $LD $F,5*$SZ($ctx)
  334. $LD $G,6*$SZ($ctx)
  335. $LD $H,7*$SZ($ctx)
  336. $PTR_ADD @X[15],$inp # pointer to the end of input
  337. $REG_S @X[15],16*$SZ($sp)
  338. b .Loop
  339. .align 5
  340. .Loop:
  341. #if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
  342. ${LD} @X[0],($inp)
  343. #else
  344. ${LD}l @X[0],$MSB($inp)
  345. ${LD}r @X[0],$LSB($inp)
  346. #endif
  347. ___
  348. for ($i=0;$i<16;$i++)
  349. { &BODY_00_15($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
  350. $code.=<<___;
  351. b .L16_xx
  352. .align 4
  353. .L16_xx:
  354. ___
  355. for (;$i<32;$i++)
  356. { &BODY_16_XX($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
  357. $code.=<<___;
  358. and @X[6],0xfff
  359. li @X[7],$lastK
  360. .set noreorder
  361. bne @X[6],@X[7],.L16_xx
  362. $PTR_ADD $Ktbl,16*$SZ # Ktbl+=16
  363. $REG_L @X[15],16*$SZ($sp) # restore pointer to the end of input
  364. $LD @X[0],0*$SZ($ctx)
  365. $LD @X[1],1*$SZ($ctx)
  366. $LD @X[2],2*$SZ($ctx)
  367. $PTR_ADD $inp,16*$SZ
  368. $LD @X[3],3*$SZ($ctx)
  369. $ADDU $A,@X[0]
  370. $LD @X[4],4*$SZ($ctx)
  371. $ADDU $B,@X[1]
  372. $LD @X[5],5*$SZ($ctx)
  373. $ADDU $C,@X[2]
  374. $LD @X[6],6*$SZ($ctx)
  375. $ADDU $D,@X[3]
  376. $LD @X[7],7*$SZ($ctx)
  377. $ADDU $E,@X[4]
  378. $ST $A,0*$SZ($ctx)
  379. $ADDU $F,@X[5]
  380. $ST $B,1*$SZ($ctx)
  381. $ADDU $G,@X[6]
  382. $ST $C,2*$SZ($ctx)
  383. $ADDU $H,@X[7]
  384. $ST $D,3*$SZ($ctx)
  385. $ST $E,4*$SZ($ctx)
  386. $ST $F,5*$SZ($ctx)
  387. $ST $G,6*$SZ($ctx)
  388. $ST $H,7*$SZ($ctx)
  389. bne $inp,@X[15],.Loop
  390. $PTR_SUB $Ktbl,`($rounds-16)*$SZ` # rewind $Ktbl
  391. $REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
  392. $REG_L $fp,$FRAMESIZE-2*$SZREG($sp)
  393. $REG_L $s11,$FRAMESIZE-3*$SZREG($sp)
  394. $REG_L $s10,$FRAMESIZE-4*$SZREG($sp)
  395. $REG_L $s9,$FRAMESIZE-5*$SZREG($sp)
  396. $REG_L $s8,$FRAMESIZE-6*$SZREG($sp)
  397. $REG_L $s7,$FRAMESIZE-7*$SZREG($sp)
  398. $REG_L $s6,$FRAMESIZE-8*$SZREG($sp)
  399. $REG_L $s5,$FRAMESIZE-9*$SZREG($sp)
  400. $REG_L $s4,$FRAMESIZE-10*$SZREG($sp)
  401. ___
  402. $code.=<<___ if ($flavour =~ /nubi/i);
  403. $REG_L $s3,$FRAMESIZE-11*$SZREG($sp)
  404. $REG_L $s2,$FRAMESIZE-12*$SZREG($sp)
  405. $REG_L $s1,$FRAMESIZE-13*$SZREG($sp)
  406. $REG_L $s0,$FRAMESIZE-14*$SZREG($sp)
  407. $REG_L $gp,$FRAMESIZE-15*$SZREG($sp)
  408. ___
  409. $code.=<<___;
  410. jr $ra
  411. $PTR_ADD $sp,$FRAMESIZE
  412. .end sha${label}_block_data_order
  413. .rdata
  414. .align 5
  415. K${label}:
  416. ___
  417. if ($SZ==4) {
  418. $code.=<<___;
  419. .word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
  420. .word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
  421. .word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
  422. .word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
  423. .word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
  424. .word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
  425. .word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
  426. .word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
  427. .word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
  428. .word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
  429. .word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3
  430. .word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
  431. .word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5
  432. .word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
  433. .word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
  434. .word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
  435. ___
  436. } else {
  437. $code.=<<___;
  438. .dword 0x428a2f98d728ae22, 0x7137449123ef65cd
  439. .dword 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
  440. .dword 0x3956c25bf348b538, 0x59f111f1b605d019
  441. .dword 0x923f82a4af194f9b, 0xab1c5ed5da6d8118
  442. .dword 0xd807aa98a3030242, 0x12835b0145706fbe
  443. .dword 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2
  444. .dword 0x72be5d74f27b896f, 0x80deb1fe3b1696b1
  445. .dword 0x9bdc06a725c71235, 0xc19bf174cf692694
  446. .dword 0xe49b69c19ef14ad2, 0xefbe4786384f25e3
  447. .dword 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65
  448. .dword 0x2de92c6f592b0275, 0x4a7484aa6ea6e483
  449. .dword 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5
  450. .dword 0x983e5152ee66dfab, 0xa831c66d2db43210
  451. .dword 0xb00327c898fb213f, 0xbf597fc7beef0ee4
  452. .dword 0xc6e00bf33da88fc2, 0xd5a79147930aa725
  453. .dword 0x06ca6351e003826f, 0x142929670a0e6e70
  454. .dword 0x27b70a8546d22ffc, 0x2e1b21385c26c926
  455. .dword 0x4d2c6dfc5ac42aed, 0x53380d139d95b3df
  456. .dword 0x650a73548baf63de, 0x766a0abb3c77b2a8
  457. .dword 0x81c2c92e47edaee6, 0x92722c851482353b
  458. .dword 0xa2bfe8a14cf10364, 0xa81a664bbc423001
  459. .dword 0xc24b8b70d0f89791, 0xc76c51a30654be30
  460. .dword 0xd192e819d6ef5218, 0xd69906245565a910
  461. .dword 0xf40e35855771202a, 0x106aa07032bbd1b8
  462. .dword 0x19a4c116b8d2d0c8, 0x1e376c085141ab53
  463. .dword 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8
  464. .dword 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb
  465. .dword 0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3
  466. .dword 0x748f82ee5defb2fc, 0x78a5636f43172f60
  467. .dword 0x84c87814a1f0ab72, 0x8cc702081a6439ec
  468. .dword 0x90befffa23631e28, 0xa4506cebde82bde9
  469. .dword 0xbef9a3f7b2c67915, 0xc67178f2e372532b
  470. .dword 0xca273eceea26619c, 0xd186b8c721c0c207
  471. .dword 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178
  472. .dword 0x06f067aa72176fba, 0x0a637dc5a2c898a6
  473. .dword 0x113f9804bef90dae, 0x1b710b35131c471b
  474. .dword 0x28db77f523047d84, 0x32caab7b40c72493
  475. .dword 0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c
  476. .dword 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a
  477. .dword 0x5fcb6fab3ad6faec, 0x6c44198c4a475817
  478. ___
  479. }
  480. $code.=<<___;
  481. .asciiz "SHA${label} for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
  482. .align 5
  483. ___
  484. $code =~ s/\`([^\`]*)\`/eval $1/gem;
  485. print $code;
  486. close STDOUT;