x86_64cpuid.pl 2.2 KB

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  1. #!/usr/bin/env perl
  2. $output=shift;
  3. $win64a=1 if ($output =~ /win64a\.[s|asm]/);
  4. open STDOUT,">$output" || die "can't open $output: $!";
  5. print<<___ if(defined($win64a));
  6. _TEXT SEGMENT
  7. PUBLIC OPENSSL_rdtsc
  8. ALIGN 16
  9. OPENSSL_rdtsc PROC
  10. rdtsc
  11. shl rdx,32
  12. or rax,rdx
  13. ret
  14. OPENSSL_rdtsc ENDP
  15. PUBLIC OPENSSL_atomic_add
  16. ALIGN 16
  17. OPENSSL_atomic_add PROC
  18. mov eax,DWORD PTR[rcx]
  19. \$Lspin: lea r8,DWORD PTR[rdx+rax]
  20. lock cmpxchg DWORD PTR[rcx],r8d
  21. jne \$Lspin
  22. mov eax,r8d
  23. cdqe
  24. ret
  25. OPENSSL_atomic_add ENDP
  26. PUBLIC OPENSSL_wipe_cpu
  27. ALIGN 16
  28. OPENSSL_wipe_cpu PROC
  29. pxor xmm0,xmm0
  30. pxor xmm1,xmm1
  31. pxor xmm2,xmm2
  32. pxor xmm3,xmm3
  33. pxor xmm4,xmm4
  34. pxor xmm5,xmm5
  35. xor rcx,rcx
  36. xor rdx,rdx
  37. xor r8,r8
  38. xor r9,r9
  39. xor r10,r10
  40. xor r11,r11
  41. lea rax,QWORD PTR[rsp+8]
  42. ret
  43. OPENSSL_wipe_cpu ENDP
  44. OPENSSL_ia32_cpuid PROC
  45. mov r8,rbx
  46. mov eax,1
  47. cpuid
  48. shl rcx,32
  49. mov eax,edx
  50. mov rbx,r8
  51. or rax,rcx
  52. ret
  53. OPENSSL_ia32_cpuid ENDP
  54. _TEXT ENDS
  55. CRT\$XIU SEGMENT
  56. EXTRN OPENSSL_cpuid_setup:PROC
  57. DQ OPENSSL_cpuid_setup
  58. CRT\$XIU ENDS
  59. END
  60. ___
  61. print<<___ if(!defined($win64a));
  62. .text
  63. .globl OPENSSL_rdtsc
  64. .align 16
  65. OPENSSL_rdtsc:
  66. rdtsc
  67. shlq \$32,%rdx
  68. orq %rdx,%rax
  69. ret
  70. .size OPENSSL_rdtsc,.-OPENSSL_rdtsc
  71. .globl OPENSSL_atomic_add
  72. .type OPENSSL_atomic_add,\@function
  73. .align 16
  74. OPENSSL_atomic_add:
  75. movl (%rdi),%eax
  76. .Lspin: leaq (%rsi,%rax),%r8
  77. lock; cmpxchgl %r8d,(%rdi)
  78. jne .Lspin
  79. movl %r8d,%eax
  80. .byte 0x48,0x98
  81. ret
  82. .size OPENSSL_atomic_add,.-OPENSSL_atomic_add
  83. .globl OPENSSL_wipe_cpu
  84. .type OPENSSL_wipe_cpu,\@function
  85. .align 16
  86. OPENSSL_wipe_cpu:
  87. pxor %xmm0,%xmm0
  88. pxor %xmm1,%xmm1
  89. pxor %xmm2,%xmm2
  90. pxor %xmm3,%xmm3
  91. pxor %xmm4,%xmm4
  92. pxor %xmm5,%xmm5
  93. pxor %xmm6,%xmm6
  94. pxor %xmm7,%xmm7
  95. pxor %xmm8,%xmm8
  96. pxor %xmm9,%xmm9
  97. pxor %xmm10,%xmm10
  98. pxor %xmm11,%xmm11
  99. pxor %xmm12,%xmm12
  100. pxor %xmm13,%xmm13
  101. pxor %xmm14,%xmm14
  102. pxor %xmm15,%xmm15
  103. xorq %rcx,%rcx
  104. xorq %rdx,%rdx
  105. xorq %rsi,%rsi
  106. xorq %rdi,%rdi
  107. xorq %r8,%r8
  108. xorq %r9,%r9
  109. xorq %r10,%r10
  110. xorq %r11,%r11
  111. leaq 8(%rsp),%rax
  112. ret
  113. .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
  114. .globl OPENSSL_ia32_cpuid
  115. .align 16
  116. OPENSSL_ia32_cpuid:
  117. movq %rbx,%r8
  118. movl \$1,%eax
  119. cpuid
  120. shlq \$32,%rcx
  121. movl %edx,%eax
  122. movq %r8,%rbx
  123. orq %rcx,%rax
  124. ret
  125. .size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid
  126. .section .init
  127. call OPENSSL_cpuid_setup
  128. ___