rc4-586.pl 12 KB

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  1. #! /usr/bin/env perl
  2. # Copyright 1998-2020 The OpenSSL Project Authors. All Rights Reserved.
  3. #
  4. # Licensed under the Apache License 2.0 (the "License"). You may not use
  5. # this file except in compliance with the License. You can obtain a copy
  6. # in the file LICENSE in the source distribution or at
  7. # https://www.openssl.org/source/license.html
  8. # ====================================================================
  9. # [Re]written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  10. # project. The module is, however, dual licensed under OpenSSL and
  11. # CRYPTOGAMS licenses depending on where you obtain it. For further
  12. # details see http://www.openssl.org/~appro/cryptogams/.
  13. # ====================================================================
  14. # At some point it became apparent that the original SSLeay RC4
  15. # assembler implementation performs suboptimally on latest IA-32
  16. # microarchitectures. After re-tuning performance has changed as
  17. # following:
  18. #
  19. # Pentium -10%
  20. # Pentium III +12%
  21. # AMD +50%(*)
  22. # P4 +250%(**)
  23. #
  24. # (*) This number is actually a trade-off:-) It's possible to
  25. # achieve +72%, but at the cost of -48% off PIII performance.
  26. # In other words code performing further 13% faster on AMD
  27. # would perform almost 2 times slower on Intel PIII...
  28. # For reference! This code delivers ~80% of rc4-amd64.pl
  29. # performance on the same Opteron machine.
  30. # (**) This number requires compressed key schedule set up by
  31. # RC4_set_key [see commentary below for further details].
  32. # May 2011
  33. #
  34. # Optimize for Core2 and Westmere [and incidentally Opteron]. Current
  35. # performance in cycles per processed byte (less is better) and
  36. # improvement relative to previous version of this module is:
  37. #
  38. # Pentium 10.2 # original numbers
  39. # Pentium III 7.8(*)
  40. # Intel P4 7.5
  41. #
  42. # Opteron 6.1/+20% # new MMX numbers
  43. # Core2 5.3/+67%(**)
  44. # Westmere 5.1/+94%(**)
  45. # Sandy Bridge 5.0/+8%
  46. # Atom 12.6/+6%
  47. # VIA Nano 6.4/+9%
  48. # Ivy Bridge 4.9/±0%
  49. # Bulldozer 4.9/+15%
  50. #
  51. # (*) PIII can actually deliver 6.6 cycles per byte with MMX code,
  52. # but this specific code performs poorly on Core2. And vice
  53. # versa, below MMX/SSE code delivering 5.8/7.1 on Core2 performs
  54. # poorly on PIII, at 8.0/14.5:-( As PIII is not a "hot" CPU
  55. # [anymore], I chose to discard PIII-specific code path and opt
  56. # for original IALU-only code, which is why MMX/SSE code path
  57. # is guarded by SSE2 bit (see below), not MMX/SSE.
  58. # (**) Performance vs. block size on Core2 and Westmere had a maximum
  59. # at ... 64 bytes block size. And it was quite a maximum, 40-60%
  60. # in comparison to largest 8KB block size. Above improvement
  61. # coefficients are for the largest block size.
  62. $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  63. push(@INC,"${dir}","${dir}../../perlasm");
  64. require "x86asm.pl";
  65. $output = pop and open STDOUT,">$output";
  66. &asm_init($ARGV[0],$x86only = $ARGV[$#ARGV] eq "386");
  67. $xx="eax";
  68. $yy="ebx";
  69. $tx="ecx";
  70. $ty="edx";
  71. $inp="esi";
  72. $out="ebp";
  73. $dat="edi";
  74. sub RC4_loop {
  75. my $i=shift;
  76. my $func = ($i==0)?*mov:*or;
  77. &add (&LB($yy),&LB($tx));
  78. &mov ($ty,&DWP(0,$dat,$yy,4));
  79. &mov (&DWP(0,$dat,$yy,4),$tx);
  80. &mov (&DWP(0,$dat,$xx,4),$ty);
  81. &add ($ty,$tx);
  82. &inc (&LB($xx));
  83. &and ($ty,0xff);
  84. &ror ($out,8) if ($i!=0);
  85. if ($i<3) {
  86. &mov ($tx,&DWP(0,$dat,$xx,4));
  87. } else {
  88. &mov ($tx,&wparam(3)); # reload [re-biased] out
  89. }
  90. &$func ($out,&DWP(0,$dat,$ty,4));
  91. }
  92. if ($alt=0) {
  93. # >20% faster on Atom and Sandy Bridge[!], 8% faster on Opteron,
  94. # but ~40% slower on Core2 and Westmere... Attempt to add movz
  95. # brings down Opteron by 25%, Atom and Sandy Bridge by 15%, yet
  96. # on Core2 with movz it's almost 20% slower than below alternative
  97. # code... Yes, it's a total mess...
  98. my @XX=($xx,$out);
  99. $RC4_loop_mmx = sub { # SSE actually...
  100. my $i=shift;
  101. my $j=$i<=0?0:$i>>1;
  102. my $mm=$i<=0?"mm0":"mm".($i&1);
  103. &add (&LB($yy),&LB($tx));
  104. &lea (@XX[1],&DWP(1,@XX[0]));
  105. &pxor ("mm2","mm0") if ($i==0);
  106. &psllq ("mm1",8) if ($i==0);
  107. &and (@XX[1],0xff);
  108. &pxor ("mm0","mm0") if ($i<=0);
  109. &mov ($ty,&DWP(0,$dat,$yy,4));
  110. &mov (&DWP(0,$dat,$yy,4),$tx);
  111. &pxor ("mm1","mm2") if ($i==0);
  112. &mov (&DWP(0,$dat,$XX[0],4),$ty);
  113. &add (&LB($ty),&LB($tx));
  114. &movd (@XX[0],"mm7") if ($i==0);
  115. &mov ($tx,&DWP(0,$dat,@XX[1],4));
  116. &pxor ("mm1","mm1") if ($i==1);
  117. &movq ("mm2",&QWP(0,$inp)) if ($i==1);
  118. &movq (&QWP(-8,(@XX[0],$inp)),"mm1") if ($i==0);
  119. &pinsrw ($mm,&DWP(0,$dat,$ty,4),$j);
  120. push (@XX,shift(@XX)) if ($i>=0);
  121. }
  122. } else {
  123. # Using pinsrw here improves performance on Intel CPUs by 2-3%, but
  124. # brings down AMD by 7%...
  125. $RC4_loop_mmx = sub {
  126. my $i=shift;
  127. &add (&LB($yy),&LB($tx));
  128. &psllq ("mm1",8*(($i-1)&7)) if (abs($i)!=1);
  129. &mov ($ty,&DWP(0,$dat,$yy,4));
  130. &mov (&DWP(0,$dat,$yy,4),$tx);
  131. &mov (&DWP(0,$dat,$xx,4),$ty);
  132. &inc ($xx);
  133. &add ($ty,$tx);
  134. &movz ($xx,&LB($xx)); # (*)
  135. &movz ($ty,&LB($ty)); # (*)
  136. &pxor ("mm2",$i==1?"mm0":"mm1") if ($i>=0);
  137. &movq ("mm0",&QWP(0,$inp)) if ($i<=0);
  138. &movq (&QWP(-8,($out,$inp)),"mm2") if ($i==0);
  139. &mov ($tx,&DWP(0,$dat,$xx,4));
  140. &movd ($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
  141. # (*) This is the key to Core2 and Westmere performance.
  142. # Without movz out-of-order execution logic confuses
  143. # itself and fails to reorder loads and stores. Problem
  144. # appears to be fixed in Sandy Bridge...
  145. }
  146. }
  147. &external_label("OPENSSL_ia32cap_P");
  148. # void RC4(RC4_KEY *key,size_t len,const unsigned char *inp,unsigned char *out);
  149. &function_begin("RC4");
  150. &mov ($dat,&wparam(0)); # load key schedule pointer
  151. &mov ($ty, &wparam(1)); # load len
  152. &mov ($inp,&wparam(2)); # load inp
  153. &mov ($out,&wparam(3)); # load out
  154. &xor ($xx,$xx); # avoid partial register stalls
  155. &xor ($yy,$yy);
  156. &cmp ($ty,0); # safety net
  157. &je (&label("abort"));
  158. &mov (&LB($xx),&BP(0,$dat)); # load key->x
  159. &mov (&LB($yy),&BP(4,$dat)); # load key->y
  160. &add ($dat,8);
  161. &lea ($tx,&DWP(0,$inp,$ty));
  162. &sub ($out,$inp); # re-bias out
  163. &mov (&wparam(1),$tx); # save input+len
  164. &inc (&LB($xx));
  165. # detect compressed key schedule...
  166. &cmp (&DWP(256,$dat),-1);
  167. &je (&label("RC4_CHAR"));
  168. &mov ($tx,&DWP(0,$dat,$xx,4));
  169. &and ($ty,-4); # how many 4-byte chunks?
  170. &jz (&label("loop1"));
  171. &mov (&wparam(3),$out); # $out as accumulator in these loops
  172. if ($x86only) {
  173. &jmp (&label("go4loop4"));
  174. } else {
  175. &test ($ty,-8);
  176. &jz (&label("go4loop4"));
  177. &picmeup($out,"OPENSSL_ia32cap_P");
  178. &bt (&DWP(0,$out),26); # check SSE2 bit [could have been MMX]
  179. &jnc (&label("go4loop4"));
  180. &mov ($out,&wparam(3)) if (!$alt);
  181. &movd ("mm7",&wparam(3)) if ($alt);
  182. &and ($ty,-8);
  183. &lea ($ty,&DWP(-8,$inp,$ty));
  184. &mov (&DWP(-4,$dat),$ty); # save input+(len/8)*8-8
  185. &$RC4_loop_mmx(-1);
  186. &jmp(&label("loop_mmx_enter"));
  187. &set_label("loop_mmx",16);
  188. &$RC4_loop_mmx(0);
  189. &set_label("loop_mmx_enter");
  190. for ($i=1;$i<8;$i++) { &$RC4_loop_mmx($i); }
  191. &mov ($ty,$yy);
  192. &xor ($yy,$yy); # this is second key to Core2
  193. &mov (&LB($yy),&LB($ty)); # and Westmere performance...
  194. &cmp ($inp,&DWP(-4,$dat));
  195. &lea ($inp,&DWP(8,$inp));
  196. &jb (&label("loop_mmx"));
  197. if ($alt) {
  198. &movd ($out,"mm7");
  199. &pxor ("mm2","mm0");
  200. &psllq ("mm1",8);
  201. &pxor ("mm1","mm2");
  202. &movq (&QWP(-8,$out,$inp),"mm1");
  203. } else {
  204. &psllq ("mm1",56);
  205. &pxor ("mm2","mm1");
  206. &movq (&QWP(-8,$out,$inp),"mm2");
  207. }
  208. &emms ();
  209. &cmp ($inp,&wparam(1)); # compare to input+len
  210. &je (&label("done"));
  211. &jmp (&label("loop1"));
  212. }
  213. &set_label("go4loop4",16);
  214. &lea ($ty,&DWP(-4,$inp,$ty));
  215. &mov (&wparam(2),$ty); # save input+(len/4)*4-4
  216. &set_label("loop4");
  217. for ($i=0;$i<4;$i++) { RC4_loop($i); }
  218. &ror ($out,8);
  219. &xor ($out,&DWP(0,$inp));
  220. &cmp ($inp,&wparam(2)); # compare to input+(len/4)*4-4
  221. &mov (&DWP(0,$tx,$inp),$out);# $tx holds re-biased out here
  222. &lea ($inp,&DWP(4,$inp));
  223. &mov ($tx,&DWP(0,$dat,$xx,4));
  224. &jb (&label("loop4"));
  225. &cmp ($inp,&wparam(1)); # compare to input+len
  226. &je (&label("done"));
  227. &mov ($out,&wparam(3)); # restore $out
  228. &set_label("loop1",16);
  229. &add (&LB($yy),&LB($tx));
  230. &mov ($ty,&DWP(0,$dat,$yy,4));
  231. &mov (&DWP(0,$dat,$yy,4),$tx);
  232. &mov (&DWP(0,$dat,$xx,4),$ty);
  233. &add ($ty,$tx);
  234. &inc (&LB($xx));
  235. &and ($ty,0xff);
  236. &mov ($ty,&DWP(0,$dat,$ty,4));
  237. &xor (&LB($ty),&BP(0,$inp));
  238. &lea ($inp,&DWP(1,$inp));
  239. &mov ($tx,&DWP(0,$dat,$xx,4));
  240. &cmp ($inp,&wparam(1)); # compare to input+len
  241. &mov (&BP(-1,$out,$inp),&LB($ty));
  242. &jb (&label("loop1"));
  243. &jmp (&label("done"));
  244. # this is essentially Intel P4 specific codepath...
  245. &set_label("RC4_CHAR",16);
  246. &movz ($tx,&BP(0,$dat,$xx));
  247. # strangely enough unrolled loop performs over 20% slower...
  248. &set_label("cloop1");
  249. &add (&LB($yy),&LB($tx));
  250. &movz ($ty,&BP(0,$dat,$yy));
  251. &mov (&BP(0,$dat,$yy),&LB($tx));
  252. &mov (&BP(0,$dat,$xx),&LB($ty));
  253. &add (&LB($ty),&LB($tx));
  254. &movz ($ty,&BP(0,$dat,$ty));
  255. &add (&LB($xx),1);
  256. &xor (&LB($ty),&BP(0,$inp));
  257. &lea ($inp,&DWP(1,$inp));
  258. &movz ($tx,&BP(0,$dat,$xx));
  259. &cmp ($inp,&wparam(1));
  260. &mov (&BP(-1,$out,$inp),&LB($ty));
  261. &jb (&label("cloop1"));
  262. &set_label("done");
  263. &dec (&LB($xx));
  264. &mov (&DWP(-4,$dat),$yy); # save key->y
  265. &mov (&BP(-8,$dat),&LB($xx)); # save key->x
  266. &set_label("abort");
  267. &function_end("RC4");
  268. ########################################################################
  269. $inp="esi";
  270. $out="edi";
  271. $idi="ebp";
  272. $ido="ecx";
  273. $idx="edx";
  274. # void RC4_set_key(RC4_KEY *key,int len,const unsigned char *data);
  275. &function_begin("RC4_set_key");
  276. &mov ($out,&wparam(0)); # load key
  277. &mov ($idi,&wparam(1)); # load len
  278. &mov ($inp,&wparam(2)); # load data
  279. &picmeup($idx,"OPENSSL_ia32cap_P");
  280. &lea ($out,&DWP(2*4,$out)); # &key->data
  281. &lea ($inp,&DWP(0,$inp,$idi)); # $inp to point at the end
  282. &neg ($idi);
  283. &xor ("eax","eax");
  284. &mov (&DWP(-4,$out),$idi); # borrow key->y
  285. &bt (&DWP(0,$idx),20); # check for bit#20
  286. &jc (&label("c1stloop"));
  287. &set_label("w1stloop",16);
  288. &mov (&DWP(0,$out,"eax",4),"eax"); # key->data[i]=i;
  289. &add (&LB("eax"),1); # i++;
  290. &jnc (&label("w1stloop"));
  291. &xor ($ido,$ido);
  292. &xor ($idx,$idx);
  293. &set_label("w2ndloop",16);
  294. &mov ("eax",&DWP(0,$out,$ido,4));
  295. &add (&LB($idx),&BP(0,$inp,$idi));
  296. &add (&LB($idx),&LB("eax"));
  297. &add ($idi,1);
  298. &mov ("ebx",&DWP(0,$out,$idx,4));
  299. &jnz (&label("wnowrap"));
  300. &mov ($idi,&DWP(-4,$out));
  301. &set_label("wnowrap");
  302. &mov (&DWP(0,$out,$idx,4),"eax");
  303. &mov (&DWP(0,$out,$ido,4),"ebx");
  304. &add (&LB($ido),1);
  305. &jnc (&label("w2ndloop"));
  306. &jmp (&label("exit"));
  307. # Unlike all other x86 [and x86_64] implementations, Intel P4 core
  308. # [including EM64T] was found to perform poorly with above "32-bit" key
  309. # schedule, a.k.a. RC4_INT. Performance improvement for IA-32 hand-coded
  310. # assembler turned out to be 3.5x if re-coded for compressed 8-bit one,
  311. # a.k.a. RC4_CHAR! It's however inappropriate to just switch to 8-bit
  312. # schedule for x86[_64], because non-P4 implementations suffer from
  313. # significant performance losses then, e.g. PIII exhibits >2x
  314. # deterioration, and so does Opteron. In order to assure optimal
  315. # all-round performance, we detect P4 at run-time and set up compressed
  316. # key schedule, which is recognized by RC4 procedure.
  317. &set_label("c1stloop",16);
  318. &mov (&BP(0,$out,"eax"),&LB("eax")); # key->data[i]=i;
  319. &add (&LB("eax"),1); # i++;
  320. &jnc (&label("c1stloop"));
  321. &xor ($ido,$ido);
  322. &xor ($idx,$idx);
  323. &xor ("ebx","ebx");
  324. &set_label("c2ndloop",16);
  325. &mov (&LB("eax"),&BP(0,$out,$ido));
  326. &add (&LB($idx),&BP(0,$inp,$idi));
  327. &add (&LB($idx),&LB("eax"));
  328. &add ($idi,1);
  329. &mov (&LB("ebx"),&BP(0,$out,$idx));
  330. &jnz (&label("cnowrap"));
  331. &mov ($idi,&DWP(-4,$out));
  332. &set_label("cnowrap");
  333. &mov (&BP(0,$out,$idx),&LB("eax"));
  334. &mov (&BP(0,$out,$ido),&LB("ebx"));
  335. &add (&LB($ido),1);
  336. &jnc (&label("c2ndloop"));
  337. &mov (&DWP(256,$out),-1); # mark schedule as compressed
  338. &set_label("exit");
  339. &xor ("eax","eax");
  340. &mov (&DWP(-8,$out),"eax"); # key->x=0;
  341. &mov (&DWP(-4,$out),"eax"); # key->y=0;
  342. &function_end("RC4_set_key");
  343. # const char *RC4_options(void);
  344. &function_begin_B("RC4_options");
  345. &call (&label("pic_point"));
  346. &set_label("pic_point");
  347. &blindpop("eax");
  348. &lea ("eax",&DWP(&label("opts")."-".&label("pic_point"),"eax"));
  349. &picmeup("edx","OPENSSL_ia32cap_P");
  350. &mov ("edx",&DWP(0,"edx"));
  351. &bt ("edx",20);
  352. &jc (&label("1xchar"));
  353. &bt ("edx",26);
  354. &jnc (&label("ret"));
  355. &add ("eax",25);
  356. &ret ();
  357. &set_label("1xchar");
  358. &add ("eax",12);
  359. &set_label("ret");
  360. &ret ();
  361. &set_label("opts",64);
  362. &asciz ("rc4(4x,int)");
  363. &asciz ("rc4(1x,char)");
  364. &asciz ("rc4(8x,mmx)");
  365. &asciz ("RC4 for x86, CRYPTOGAMS by <appro\@openssl.org>");
  366. &align (64);
  367. &function_end_B("RC4_options");
  368. &asm_finish();
  369. close STDOUT or die "error closing STDOUT: $!";