ia64cpuid.S 6.3 KB

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  1. // Copyright 2004-2017 The OpenSSL Project Authors. All Rights Reserved.
  2. //
  3. // Licensed under the Apache License 2.0 (the "License"). You may not use
  4. // this file except in compliance with the License. You can obtain a copy
  5. // in the file LICENSE in the source distribution or at
  6. // https://www.openssl.org/source/license.html
  7. // Works on all IA-64 platforms: Linux, HP-UX, Win64i...
  8. // On Win64i compile with ias.exe.
  9. .text
  10. #if defined(_HPUX_SOURCE) && !defined(_LP64)
  11. #define ADDP addp4
  12. #else
  13. #define ADDP add
  14. #endif
  15. .global OPENSSL_cpuid_setup#
  16. .proc OPENSSL_cpuid_setup#
  17. OPENSSL_cpuid_setup:
  18. { .mib; br.ret.sptk.many b0 };;
  19. .endp OPENSSL_cpuid_setup#
  20. .global OPENSSL_rdtsc#
  21. .proc OPENSSL_rdtsc#
  22. OPENSSL_rdtsc:
  23. { .mib; mov r8=ar.itc
  24. br.ret.sptk.many b0 };;
  25. .endp OPENSSL_rdtsc#
  26. .global OPENSSL_atomic_add#
  27. .proc OPENSSL_atomic_add#
  28. .align 32
  29. OPENSSL_atomic_add:
  30. { .mii; ld4 r2=[r32]
  31. nop.i 0
  32. nop.i 0 };;
  33. .Lspin:
  34. { .mii; mov ar.ccv=r2
  35. add r8=r2,r33
  36. mov r3=r2 };;
  37. { .mmi; mf;;
  38. cmpxchg4.acq r2=[r32],r8,ar.ccv
  39. nop.i 0 };;
  40. { .mib; cmp.ne p6,p0=r2,r3
  41. nop.i 0
  42. (p6) br.dpnt .Lspin };;
  43. { .mib; nop.m 0
  44. sxt4 r8=r8
  45. br.ret.sptk.many b0 };;
  46. .endp OPENSSL_atomic_add#
  47. // Returns a structure comprising pointer to the top of stack of
  48. // the caller and pointer beyond backing storage for the current
  49. // register frame. The latter is required, because it might be
  50. // insufficient to wipe backing storage for the current frame
  51. // (as this procedure does), one might have to go further, toward
  52. // higher addresses to reach for whole "retroactively" saved
  53. // context...
  54. .global OPENSSL_wipe_cpu#
  55. .proc OPENSSL_wipe_cpu#
  56. .align 32
  57. OPENSSL_wipe_cpu:
  58. .prologue
  59. .fframe 0
  60. .save ar.pfs,r2
  61. .save ar.lc,r3
  62. { .mib; alloc r2=ar.pfs,0,96,0,96
  63. mov r3=ar.lc
  64. brp.loop.imp .L_wipe_top,.L_wipe_end-16
  65. };;
  66. { .mii; mov r9=ar.bsp
  67. mov r8=pr
  68. mov ar.lc=96 };;
  69. .body
  70. { .mii; add r9=96*8-8,r9
  71. mov ar.ec=1 };;
  72. // One can sweep double as fast, but then we can't guarantee
  73. // that backing storage is wiped...
  74. .L_wipe_top:
  75. { .mfi; st8 [r9]=r0,-8
  76. mov f127=f0
  77. mov r127=r0 }
  78. { .mfb; nop.m 0
  79. nop.f 0
  80. br.ctop.sptk .L_wipe_top };;
  81. .L_wipe_end:
  82. { .mfi; mov r11=r0
  83. mov f6=f0
  84. mov r14=r0 }
  85. { .mfi; mov r15=r0
  86. mov f7=f0
  87. mov r16=r0 }
  88. { .mfi; mov r17=r0
  89. mov f8=f0
  90. mov r18=r0 }
  91. { .mfi; mov r19=r0
  92. mov f9=f0
  93. mov r20=r0 }
  94. { .mfi; mov r21=r0
  95. mov f10=f0
  96. mov r22=r0 }
  97. { .mfi; mov r23=r0
  98. mov f11=f0
  99. mov r24=r0 }
  100. { .mfi; mov r25=r0
  101. mov f12=f0
  102. mov r26=r0 }
  103. { .mfi; mov r27=r0
  104. mov f13=f0
  105. mov r28=r0 }
  106. { .mfi; mov r29=r0
  107. mov f14=f0
  108. mov r30=r0 }
  109. { .mfi; mov r31=r0
  110. mov f15=f0
  111. nop.i 0 }
  112. { .mfi; mov f16=f0 }
  113. { .mfi; mov f17=f0 }
  114. { .mfi; mov f18=f0 }
  115. { .mfi; mov f19=f0 }
  116. { .mfi; mov f20=f0 }
  117. { .mfi; mov f21=f0 }
  118. { .mfi; mov f22=f0 }
  119. { .mfi; mov f23=f0 }
  120. { .mfi; mov f24=f0 }
  121. { .mfi; mov f25=f0 }
  122. { .mfi; mov f26=f0 }
  123. { .mfi; mov f27=f0 }
  124. { .mfi; mov f28=f0 }
  125. { .mfi; mov f29=f0 }
  126. { .mfi; mov f30=f0 }
  127. { .mfi; add r9=96*8+8,r9
  128. mov f31=f0
  129. mov pr=r8,0x1ffff }
  130. { .mib; mov r8=sp
  131. mov ar.lc=r3
  132. br.ret.sptk b0 };;
  133. .endp OPENSSL_wipe_cpu#
  134. .global OPENSSL_cleanse#
  135. .proc OPENSSL_cleanse#
  136. OPENSSL_cleanse:
  137. { .mib; cmp.eq p6,p0=0,r33 // len==0
  138. ADDP r32=0,r32
  139. (p6) br.ret.spnt b0 };;
  140. { .mib; and r2=7,r32
  141. cmp.leu p6,p0=15,r33 // len>=15
  142. (p6) br.cond.dptk .Lot };;
  143. .Little:
  144. { .mib; st1 [r32]=r0,1
  145. cmp.ltu p6,p7=1,r33 } // len>1
  146. { .mbb; add r33=-1,r33 // len--
  147. (p6) br.cond.dptk .Little
  148. (p7) br.ret.sptk.many b0 };;
  149. .Lot:
  150. { .mib; cmp.eq p6,p0=0,r2
  151. (p6) br.cond.dptk .Laligned };;
  152. { .mmi; st1 [r32]=r0,1;;
  153. and r2=7,r32 }
  154. { .mib; add r33=-1,r33
  155. br .Lot };;
  156. .Laligned:
  157. { .mmi; st8 [r32]=r0,8
  158. and r2=-8,r33 // len&~7
  159. add r33=-8,r33 };; // len-=8
  160. { .mib; cmp.ltu p6,p0=8,r2 // ((len+8)&~7)>8
  161. (p6) br.cond.dptk .Laligned };;
  162. { .mbb; cmp.eq p6,p7=r0,r33
  163. (p7) br.cond.dpnt .Little
  164. (p6) br.ret.sptk.many b0 };;
  165. .endp OPENSSL_cleanse#
  166. .global CRYPTO_memcmp#
  167. .proc CRYPTO_memcmp#
  168. .align 32
  169. .skip 16
  170. CRYPTO_memcmp:
  171. .prologue
  172. { .mib; mov r8=0
  173. cmp.eq p6,p0=0,r34 // len==0?
  174. (p6) br.ret.spnt b0 };;
  175. .save ar.pfs,r2
  176. { .mib; alloc r2=ar.pfs,3,5,0,8
  177. .save ar.lc,r3
  178. mov r3=ar.lc
  179. brp.loop.imp .Loop_cmp_ctop,.Loop_cmp_cend-16
  180. }
  181. { .mib; sub r10=r34,r0,1
  182. .save pr,r9
  183. mov r9=pr };;
  184. { .mii; ADDP r16=0,r32
  185. mov ar.lc=r10
  186. mov ar.ec=4 }
  187. { .mib; ADDP r17=0,r33
  188. mov pr.rot=1<<16 };;
  189. .Loop_cmp_ctop:
  190. { .mib; (p16) ld1 r32=[r16],1
  191. (p18) xor r34=r34,r38 }
  192. { .mib; (p16) ld1 r36=[r17],1
  193. (p19) or r8=r8,r35
  194. br.ctop.sptk .Loop_cmp_ctop };;
  195. .Loop_cmp_cend:
  196. { .mib; cmp.ne p6,p0=0,r8
  197. mov ar.lc=r3 };;
  198. { .mib;
  199. (p6) mov r8=1
  200. mov pr=r9,0x1ffff
  201. br.ret.sptk.many b0 };;
  202. .endp CRYPTO_memcmp#
  203. .global OPENSSL_instrument_bus#
  204. .proc OPENSSL_instrument_bus#
  205. OPENSSL_instrument_bus:
  206. { .mmi; mov r2=r33
  207. ADDP r32=0,r32 }
  208. { .mmi; mov r8=ar.itc;;
  209. mov r10=r0
  210. mov r9=r8 };;
  211. { .mmi; fc r32;;
  212. ld4 r8=[r32] };;
  213. { .mmi; mf
  214. mov ar.ccv=r8
  215. add r8=r8,r10 };;
  216. { .mmi; cmpxchg4.acq r3=[r32],r8,ar.ccv
  217. };;
  218. .Loop:
  219. { .mmi; mov r8=ar.itc;;
  220. sub r10=r8,r9 // diff=tick-lasttick
  221. mov r9=r8 };; // lasttick=tick
  222. { .mmi; fc r32;;
  223. ld4 r8=[r32] };;
  224. { .mmi; mf
  225. mov ar.ccv=r8
  226. add r8=r8,r10 };;
  227. { .mmi; cmpxchg4.acq r3=[r32],r8,ar.ccv
  228. add r33=-1,r33
  229. add r32=4,r32 };;
  230. { .mib; cmp4.ne p6,p0=0,r33
  231. (p6) br.cond.dptk .Loop };;
  232. { .mib; sub r8=r2,r33
  233. br.ret.sptk.many b0 };;
  234. .endp OPENSSL_instrument_bus#
  235. .global OPENSSL_instrument_bus2#
  236. .proc OPENSSL_instrument_bus2#
  237. OPENSSL_instrument_bus2:
  238. { .mmi; mov r2=r33 // put aside cnt
  239. ADDP r32=0,r32 }
  240. { .mmi; mov r8=ar.itc;;
  241. mov r10=r0
  242. mov r9=r8 };;
  243. { .mmi; fc r32;;
  244. ld4 r8=[r32] };;
  245. { .mmi; mf
  246. mov ar.ccv=r8
  247. add r8=r8,r10 };;
  248. { .mmi; cmpxchg4.acq r3=[r32],r8,ar.ccv
  249. };;
  250. { .mmi; mov r8=ar.itc;;
  251. sub r10=r8,r9
  252. mov r9=r8 };;
  253. .Loop2:
  254. { .mmi; mov r11=r10 // lastdiff=diff
  255. add r34=-1,r34 };; // --max
  256. { .mmi; fc r32;;
  257. ld4 r8=[r32]
  258. cmp4.eq p6,p0=0,r34 };;
  259. { .mmi; mf
  260. mov ar.ccv=r8
  261. add r8=r8,r10 };;
  262. { .mmb; cmpxchg4.acq r3=[r32],r8,ar.ccv
  263. (p6) br.cond.spnt .Ldone2 };;
  264. { .mmi; mov r8=ar.itc;;
  265. sub r10=r8,r9 // diff=tick-lasttick
  266. mov r9=r8 };; // lasttick=tick
  267. { .mmi; cmp.ne p6,p0=r10,r11;; // diff!=lastdiff
  268. (p6) add r33=-1,r33 };; // conditional --cnt
  269. { .mib; cmp4.ne p7,p0=0,r33
  270. (p6) add r32=4,r32 // conditional ++out
  271. (p7) br.cond.dptk .Loop2 };;
  272. .Ldone2:
  273. { .mib; sub r8=r2,r33
  274. br.ret.sptk.many b0 };;
  275. .endp OPENSSL_instrument_bus2#