md5-sparcv9.pl 9.9 KB

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  1. #! /usr/bin/env perl
  2. # Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
  3. #
  4. # Licensed under the OpenSSL license (the "License"). You may not use
  5. # this file except in compliance with the License. You can obtain a copy
  6. # in the file LICENSE in the source distribution or at
  7. # https://www.openssl.org/source/license.html
  8. # ====================================================================
  9. # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  10. # project. The module is, however, dual licensed under OpenSSL and
  11. # CRYPTOGAMS licenses depending on where you obtain it. For further
  12. # details see http://www.openssl.org/~appro/cryptogams/.
  13. #
  14. # Hardware SPARC T4 support by David S. Miller <davem@davemloft.net>.
  15. # ====================================================================
  16. # MD5 for SPARCv9, 6.9 cycles per byte on UltraSPARC, >40% faster than
  17. # code generated by Sun C 5.2.
  18. # SPARC T4 MD5 hardware achieves 3.20 cycles per byte, which is 2.1x
  19. # faster than software. Multi-process benchmark saturates at 12x
  20. # single-process result on 8-core processor, or ~11GBps per 2.85GHz
  21. # socket.
  22. $output=pop;
  23. open STDOUT,">$output";
  24. use integer;
  25. ($ctx,$inp,$len)=("%i0","%i1","%i2"); # input arguments
  26. # 64-bit values
  27. @X=("%o0","%o1","%o2","%o3","%o4","%o5","%o7","%g1","%g2");
  28. $tx="%g3";
  29. ($AB,$CD)=("%g4","%g5");
  30. # 32-bit values
  31. @V=($A,$B,$C,$D)=map("%l$_",(0..3));
  32. ($t1,$t2,$t3,$saved_asi)=map("%l$_",(4..7));
  33. ($shr,$shl1,$shl2)=("%i3","%i4","%i5");
  34. my @K=( 0xd76aa478,0xe8c7b756,0x242070db,0xc1bdceee,
  35. 0xf57c0faf,0x4787c62a,0xa8304613,0xfd469501,
  36. 0x698098d8,0x8b44f7af,0xffff5bb1,0x895cd7be,
  37. 0x6b901122,0xfd987193,0xa679438e,0x49b40821,
  38. 0xf61e2562,0xc040b340,0x265e5a51,0xe9b6c7aa,
  39. 0xd62f105d,0x02441453,0xd8a1e681,0xe7d3fbc8,
  40. 0x21e1cde6,0xc33707d6,0xf4d50d87,0x455a14ed,
  41. 0xa9e3e905,0xfcefa3f8,0x676f02d9,0x8d2a4c8a,
  42. 0xfffa3942,0x8771f681,0x6d9d6122,0xfde5380c,
  43. 0xa4beea44,0x4bdecfa9,0xf6bb4b60,0xbebfbc70,
  44. 0x289b7ec6,0xeaa127fa,0xd4ef3085,0x04881d05,
  45. 0xd9d4d039,0xe6db99e5,0x1fa27cf8,0xc4ac5665,
  46. 0xf4292244,0x432aff97,0xab9423a7,0xfc93a039,
  47. 0x655b59c3,0x8f0ccc92,0xffeff47d,0x85845dd1,
  48. 0x6fa87e4f,0xfe2ce6e0,0xa3014314,0x4e0811a1,
  49. 0xf7537e82,0xbd3af235,0x2ad7d2bb,0xeb86d391, 0 );
  50. sub R0 {
  51. my ($i,$a,$b,$c,$d) = @_;
  52. my $rot = (7,12,17,22)[$i%4];
  53. my $j = ($i+1)/2;
  54. if ($i&1) {
  55. $code.=<<___;
  56. srlx @X[$j],$shr,@X[$j] ! align X[`$i+1`]
  57. and $b,$t1,$t1 ! round $i
  58. sllx @X[$j+1],$shl1,$tx
  59. add $t2,$a,$a
  60. sllx $tx,$shl2,$tx
  61. xor $d,$t1,$t1
  62. or $tx,@X[$j],@X[$j]
  63. sethi %hi(@K[$i+1]),$t2
  64. add $t1,$a,$a
  65. or $t2,%lo(@K[$i+1]),$t2
  66. sll $a,$rot,$t3
  67. add @X[$j],$t2,$t2 ! X[`$i+1`]+K[`$i+1`]
  68. srl $a,32-$rot,$a
  69. add $b,$t3,$t3
  70. xor $b,$c,$t1
  71. add $t3,$a,$a
  72. ___
  73. } else {
  74. $code.=<<___;
  75. srlx @X[$j],32,$tx ! extract X[`2*$j+1`]
  76. and $b,$t1,$t1 ! round $i
  77. add $t2,$a,$a
  78. xor $d,$t1,$t1
  79. sethi %hi(@K[$i+1]),$t2
  80. add $t1,$a,$a
  81. or $t2,%lo(@K[$i+1]),$t2
  82. sll $a,$rot,$t3
  83. add $tx,$t2,$t2 ! X[`2*$j+1`]+K[`$i+1`]
  84. srl $a,32-$rot,$a
  85. add $b,$t3,$t3
  86. xor $b,$c,$t1
  87. add $t3,$a,$a
  88. ___
  89. }
  90. }
  91. sub R0_1 {
  92. my ($i,$a,$b,$c,$d) = @_;
  93. my $rot = (7,12,17,22)[$i%4];
  94. $code.=<<___;
  95. srlx @X[0],32,$tx ! extract X[1]
  96. and $b,$t1,$t1 ! round $i
  97. add $t2,$a,$a
  98. xor $d,$t1,$t1
  99. sethi %hi(@K[$i+1]),$t2
  100. add $t1,$a,$a
  101. or $t2,%lo(@K[$i+1]),$t2
  102. sll $a,$rot,$t3
  103. add $tx,$t2,$t2 ! X[1]+K[`$i+1`]
  104. srl $a,32-$rot,$a
  105. add $b,$t3,$t3
  106. andn $b,$c,$t1
  107. add $t3,$a,$a
  108. ___
  109. }
  110. sub R1 {
  111. my ($i,$a,$b,$c,$d) = @_;
  112. my $rot = (5,9,14,20)[$i%4];
  113. my $j = $i<31 ? (1+5*($i+1))%16 : (5+3*($i+1))%16;
  114. my $xi = @X[$j/2];
  115. $code.=<<___ if ($j&1 && ($xi=$tx));
  116. srlx @X[$j/2],32,$xi ! extract X[$j]
  117. ___
  118. $code.=<<___;
  119. and $b,$d,$t3 ! round $i
  120. add $t2,$a,$a
  121. or $t3,$t1,$t1
  122. sethi %hi(@K[$i+1]),$t2
  123. add $t1,$a,$a
  124. or $t2,%lo(@K[$i+1]),$t2
  125. sll $a,$rot,$t3
  126. add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
  127. srl $a,32-$rot,$a
  128. add $b,$t3,$t3
  129. `$i<31?"andn":"xor"` $b,$c,$t1
  130. add $t3,$a,$a
  131. ___
  132. }
  133. sub R2 {
  134. my ($i,$a,$b,$c,$d) = @_;
  135. my $rot = (4,11,16,23)[$i%4];
  136. my $j = $i<47 ? (5+3*($i+1))%16 : (0+7*($i+1))%16;
  137. my $xi = @X[$j/2];
  138. $code.=<<___ if ($j&1 && ($xi=$tx));
  139. srlx @X[$j/2],32,$xi ! extract X[$j]
  140. ___
  141. $code.=<<___;
  142. add $t2,$a,$a ! round $i
  143. xor $b,$t1,$t1
  144. sethi %hi(@K[$i+1]),$t2
  145. add $t1,$a,$a
  146. or $t2,%lo(@K[$i+1]),$t2
  147. sll $a,$rot,$t3
  148. add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
  149. srl $a,32-$rot,$a
  150. add $b,$t3,$t3
  151. xor $b,$c,$t1
  152. add $t3,$a,$a
  153. ___
  154. }
  155. sub R3 {
  156. my ($i,$a,$b,$c,$d) = @_;
  157. my $rot = (6,10,15,21)[$i%4];
  158. my $j = (0+7*($i+1))%16;
  159. my $xi = @X[$j/2];
  160. $code.=<<___;
  161. add $t2,$a,$a ! round $i
  162. ___
  163. $code.=<<___ if ($j&1 && ($xi=$tx));
  164. srlx @X[$j/2],32,$xi ! extract X[$j]
  165. ___
  166. $code.=<<___;
  167. orn $b,$d,$t1
  168. sethi %hi(@K[$i+1]),$t2
  169. xor $c,$t1,$t1
  170. or $t2,%lo(@K[$i+1]),$t2
  171. add $t1,$a,$a
  172. sll $a,$rot,$t3
  173. add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
  174. srl $a,32-$rot,$a
  175. add $b,$t3,$t3
  176. add $t3,$a,$a
  177. ___
  178. }
  179. $code.=<<___;
  180. #include "sparc_arch.h"
  181. #ifdef __arch64__
  182. .register %g2,#scratch
  183. .register %g3,#scratch
  184. #endif
  185. .section ".text",#alloc,#execinstr
  186. #ifdef __PIC__
  187. SPARC_PIC_THUNK(%g1)
  188. #endif
  189. .globl md5_block_asm_data_order
  190. .align 32
  191. md5_block_asm_data_order:
  192. SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5)
  193. ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1]
  194. andcc %g1, CFR_MD5, %g0
  195. be .Lsoftware
  196. nop
  197. mov 4, %g1
  198. andcc %o1, 0x7, %g0
  199. lda [%o0 + %g0]0x88, %f0 ! load context
  200. lda [%o0 + %g1]0x88, %f1
  201. add %o0, 8, %o0
  202. lda [%o0 + %g0]0x88, %f2
  203. lda [%o0 + %g1]0x88, %f3
  204. bne,pn %icc, .Lhwunaligned
  205. sub %o0, 8, %o0
  206. .Lhw_loop:
  207. ldd [%o1 + 0x00], %f8
  208. ldd [%o1 + 0x08], %f10
  209. ldd [%o1 + 0x10], %f12
  210. ldd [%o1 + 0x18], %f14
  211. ldd [%o1 + 0x20], %f16
  212. ldd [%o1 + 0x28], %f18
  213. ldd [%o1 + 0x30], %f20
  214. subcc %o2, 1, %o2 ! done yet?
  215. ldd [%o1 + 0x38], %f22
  216. add %o1, 0x40, %o1
  217. prefetch [%o1 + 63], 20
  218. .word 0x81b02800 ! MD5
  219. bne,pt SIZE_T_CC, .Lhw_loop
  220. nop
  221. .Lhwfinish:
  222. sta %f0, [%o0 + %g0]0x88 ! store context
  223. sta %f1, [%o0 + %g1]0x88
  224. add %o0, 8, %o0
  225. sta %f2, [%o0 + %g0]0x88
  226. sta %f3, [%o0 + %g1]0x88
  227. retl
  228. nop
  229. .align 8
  230. .Lhwunaligned:
  231. alignaddr %o1, %g0, %o1
  232. ldd [%o1 + 0x00], %f10
  233. .Lhwunaligned_loop:
  234. ldd [%o1 + 0x08], %f12
  235. ldd [%o1 + 0x10], %f14
  236. ldd [%o1 + 0x18], %f16
  237. ldd [%o1 + 0x20], %f18
  238. ldd [%o1 + 0x28], %f20
  239. ldd [%o1 + 0x30], %f22
  240. ldd [%o1 + 0x38], %f24
  241. subcc %o2, 1, %o2 ! done yet?
  242. ldd [%o1 + 0x40], %f26
  243. add %o1, 0x40, %o1
  244. prefetch [%o1 + 63], 20
  245. faligndata %f10, %f12, %f8
  246. faligndata %f12, %f14, %f10
  247. faligndata %f14, %f16, %f12
  248. faligndata %f16, %f18, %f14
  249. faligndata %f18, %f20, %f16
  250. faligndata %f20, %f22, %f18
  251. faligndata %f22, %f24, %f20
  252. faligndata %f24, %f26, %f22
  253. .word 0x81b02800 ! MD5
  254. bne,pt SIZE_T_CC, .Lhwunaligned_loop
  255. for %f26, %f26, %f10 ! %f10=%f26
  256. ba .Lhwfinish
  257. nop
  258. .align 16
  259. .Lsoftware:
  260. save %sp,-STACK_FRAME,%sp
  261. rd %asi,$saved_asi
  262. wr %g0,0x88,%asi ! ASI_PRIMARY_LITTLE
  263. and $inp,7,$shr
  264. andn $inp,7,$inp
  265. sll $shr,3,$shr ! *=8
  266. mov 56,$shl2
  267. ld [$ctx+0],$A
  268. sub $shl2,$shr,$shl2
  269. ld [$ctx+4],$B
  270. and $shl2,32,$shl1
  271. add $shl2,8,$shl2
  272. ld [$ctx+8],$C
  273. sub $shl2,$shl1,$shl2 ! shr+shl1+shl2==64
  274. ld [$ctx+12],$D
  275. nop
  276. .Loop:
  277. cmp $shr,0 ! was inp aligned?
  278. ldxa [$inp+0]%asi,@X[0] ! load little-endian input
  279. ldxa [$inp+8]%asi,@X[1]
  280. ldxa [$inp+16]%asi,@X[2]
  281. ldxa [$inp+24]%asi,@X[3]
  282. ldxa [$inp+32]%asi,@X[4]
  283. sllx $A,32,$AB ! pack A,B
  284. ldxa [$inp+40]%asi,@X[5]
  285. sllx $C,32,$CD ! pack C,D
  286. ldxa [$inp+48]%asi,@X[6]
  287. or $B,$AB,$AB
  288. ldxa [$inp+56]%asi,@X[7]
  289. or $D,$CD,$CD
  290. bnz,a,pn %icc,.+8
  291. ldxa [$inp+64]%asi,@X[8]
  292. srlx @X[0],$shr,@X[0] ! align X[0]
  293. sllx @X[1],$shl1,$tx
  294. sethi %hi(@K[0]),$t2
  295. sllx $tx,$shl2,$tx
  296. or $t2,%lo(@K[0]),$t2
  297. or $tx,@X[0],@X[0]
  298. xor $C,$D,$t1
  299. add @X[0],$t2,$t2 ! X[0]+K[0]
  300. ___
  301. for ($i=0;$i<15;$i++) { &R0($i,@V); unshift(@V,pop(@V)); }
  302. for (;$i<16;$i++) { &R0_1($i,@V); unshift(@V,pop(@V)); }
  303. for (;$i<32;$i++) { &R1($i,@V); unshift(@V,pop(@V)); }
  304. for (;$i<48;$i++) { &R2($i,@V); unshift(@V,pop(@V)); }
  305. for (;$i<64;$i++) { &R3($i,@V); unshift(@V,pop(@V)); }
  306. $code.=<<___;
  307. srlx $AB,32,$t1 ! unpack A,B,C,D and accumulate
  308. add $inp,64,$inp ! advance inp
  309. srlx $CD,32,$t2
  310. add $t1,$A,$A
  311. subcc $len,1,$len ! done yet?
  312. add $AB,$B,$B
  313. add $t2,$C,$C
  314. add $CD,$D,$D
  315. srl $B,0,$B ! clruw $B
  316. bne SIZE_T_CC,.Loop
  317. srl $D,0,$D ! clruw $D
  318. st $A,[$ctx+0] ! write out ctx
  319. st $B,[$ctx+4]
  320. st $C,[$ctx+8]
  321. st $D,[$ctx+12]
  322. wr %g0,$saved_asi,%asi
  323. ret
  324. restore
  325. .type md5_block_asm_data_order,#function
  326. .size md5_block_asm_data_order,(.-md5_block_asm_data_order)
  327. .asciz "MD5 block transform for SPARCv9, CRYPTOGAMS by <appro\@openssl.org>"
  328. .align 4
  329. ___
  330. # Purpose of these subroutines is to explicitly encode VIS instructions,
  331. # so that one can compile the module without having to specify VIS
  332. # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
  333. # Idea is to reserve for option to produce "universal" binary and let
  334. # programmer detect if current CPU is VIS capable at run-time.
  335. sub unvis {
  336. my ($mnemonic,$rs1,$rs2,$rd)=@_;
  337. my $ref,$opf;
  338. my %visopf = ( "faligndata" => 0x048,
  339. "for" => 0x07c );
  340. $ref = "$mnemonic\t$rs1,$rs2,$rd";
  341. if ($opf=$visopf{$mnemonic}) {
  342. foreach ($rs1,$rs2,$rd) {
  343. return $ref if (!/%f([0-9]{1,2})/);
  344. $_=$1;
  345. if ($1>=32) {
  346. return $ref if ($1&1);
  347. # re-encode for upper double register addressing
  348. $_=($1|$1>>5)&31;
  349. }
  350. }
  351. return sprintf ".word\t0x%08x !%s",
  352. 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
  353. $ref;
  354. } else {
  355. return $ref;
  356. }
  357. }
  358. sub unalignaddr {
  359. my ($mnemonic,$rs1,$rs2,$rd)=@_;
  360. my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
  361. my $ref="$mnemonic\t$rs1,$rs2,$rd";
  362. foreach ($rs1,$rs2,$rd) {
  363. if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; }
  364. else { return $ref; }
  365. }
  366. return sprintf ".word\t0x%08x !%s",
  367. 0x81b00300|$rd<<25|$rs1<<14|$rs2,
  368. $ref;
  369. }
  370. foreach (split("\n",$code)) {
  371. s/\`([^\`]*)\`/eval $1/ge;
  372. s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
  373. &unvis($1,$2,$3,$4)
  374. /ge;
  375. s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
  376. &unalignaddr($1,$2,$3,$4)
  377. /ge;
  378. print $_,"\n";
  379. }
  380. close STDOUT;