sha512-c64x.pl 13 KB

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  1. #!/usr/bin/env perl
  2. #
  3. # ====================================================================
  4. # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
  5. # project. The module is, however, dual licensed under OpenSSL and
  6. # CRYPTOGAMS licenses depending on where you obtain it. For further
  7. # details see http://www.openssl.org/~appro/cryptogams/.
  8. # ====================================================================
  9. #
  10. # SHA512 for C64x.
  11. #
  12. # November 2016
  13. #
  14. # Performance is ~19 cycles per processed byte. Compared to block
  15. # transform function from sha512.c compiled with cl6x with -mv6400+
  16. # -o2 -DOPENSSL_SMALL_FOOTPRINT it's almost 7x faster and 2x smaller.
  17. # Loop unroll won't make it, this implementation, any faster, because
  18. # it's effectively dominated by SHRU||SHL pairs and you can't schedule
  19. # more of them.
  20. #
  21. # !!! Note that this module uses AMR, which means that all interrupt
  22. # service routines are expected to preserve it and for own well-being
  23. # zero it upon entry.
  24. while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {}
  25. open STDOUT,">$output";
  26. ($CTXA,$INP,$NUM) = ("A4","B4","A6"); # arguments
  27. $K512="A3";
  28. ($Ahi,$Actxhi,$Bhi,$Bctxhi,$Chi,$Cctxhi,$Dhi,$Dctxhi,
  29. $Ehi,$Ectxhi,$Fhi,$Fctxhi,$Ghi,$Gctxhi,$Hhi,$Hctxhi)=map("A$_",(16..31));
  30. ($Alo,$Actxlo,$Blo,$Bctxlo,$Clo,$Cctxlo,$Dlo,$Dctxlo,
  31. $Elo,$Ectxlo,$Flo,$Fctxlo,$Glo,$Gctxlo,$Hlo,$Hctxlo)=map("B$_",(16..31));
  32. ($S1hi,$CHhi,$S0hi,$t0hi)=map("A$_",(10..13));
  33. ($S1lo,$CHlo,$S0lo,$t0lo)=map("B$_",(10..13));
  34. ($T1hi, $T2hi)= ("A6","A7");
  35. ($T1lo,$T1carry,$T2lo,$T2carry)=("B6","B7","B8","B9");
  36. ($Khi,$Klo)=("A9","A8");
  37. ($MAJhi,$MAJlo)=($T2hi,$T2lo);
  38. ($t1hi,$t1lo)=($Khi,"B2");
  39. $CTXB=$t1lo;
  40. ($Xihi,$Xilo)=("A5","B5"); # circular/ring buffer
  41. $code.=<<___;
  42. .text
  43. .if .ASSEMBLER_VERSION<7000000
  44. .asg 0,__TI_EABI__
  45. .endif
  46. .if __TI_EABI__
  47. .nocmp
  48. .asg sha512_block_data_order,_sha512_block_data_order
  49. .endif
  50. .asg B3,RA
  51. .asg A15,FP
  52. .asg B15,SP
  53. .if .BIG_ENDIAN
  54. .asg $Khi,KHI
  55. .asg $Klo,KLO
  56. .else
  57. .asg $Khi,KLO
  58. .asg $Klo,KHI
  59. .endif
  60. .global _sha512_block_data_order
  61. _sha512_block_data_order:
  62. __sha512_block:
  63. .asmfunc stack_usage(40+128)
  64. MV $NUM,A0 ; reassign $NUM
  65. || MVK -128,B0
  66. [!A0] BNOP RA ; if ($NUM==0) return;
  67. || [A0] STW FP,*SP--(40) ; save frame pointer
  68. || [A0] MV SP,FP
  69. [A0] STDW B13:B12,*SP[4]
  70. || [A0] MVK 0x00404,B1
  71. [A0] STDW B11:B10,*SP[3]
  72. || [A0] STDW A13:A12,*FP[-3]
  73. || [A0] MVKH 0x60000,B1
  74. [A0] STDW A11:A10,*SP[1]
  75. || [A0] MVC B1,AMR ; setup circular addressing
  76. || [A0] ADD B0,SP,SP ; alloca(128)
  77. .if __TI_EABI__
  78. [A0] AND B0,SP,SP ; align stack at 128 bytes
  79. || [A0] ADDKPC __sha512_block,B1
  80. || [A0] MVKL \$PCR_OFFSET(K512,__sha512_block),$K512
  81. [A0] MVKH \$PCR_OFFSET(K512,__sha512_block),$K512
  82. || [A0] SUBAW SP,2,SP ; reserve two words above buffer
  83. .else
  84. [A0] AND B0,SP,SP ; align stack at 128 bytes
  85. || [A0] ADDKPC __sha512_block,B1
  86. || [A0] MVKL (K512-__sha512_block),$K512
  87. [A0] MVKH (K512-__sha512_block),$K512
  88. || [A0] SUBAW SP,2,SP ; reserve two words above buffer
  89. .endif
  90. ADDAW SP,3,$Xilo
  91. ADD SP,4*2,$Xihi ; ADDAW SP,2,$Xihi
  92. || MV $CTXA,$CTXB
  93. LDW *${CTXA}[0^.LITTLE_ENDIAN],$Ahi ; load ctx
  94. || LDW *${CTXB}[1^.LITTLE_ENDIAN],$Alo
  95. || ADD B1,$K512,$K512
  96. LDW *${CTXA}[2^.LITTLE_ENDIAN],$Bhi
  97. || LDW *${CTXB}[3^.LITTLE_ENDIAN],$Blo
  98. LDW *${CTXA}[4^.LITTLE_ENDIAN],$Chi
  99. || LDW *${CTXB}[5^.LITTLE_ENDIAN],$Clo
  100. LDW *${CTXA}[6^.LITTLE_ENDIAN],$Dhi
  101. || LDW *${CTXB}[7^.LITTLE_ENDIAN],$Dlo
  102. LDW *${CTXA}[8^.LITTLE_ENDIAN],$Ehi
  103. || LDW *${CTXB}[9^.LITTLE_ENDIAN],$Elo
  104. LDW *${CTXA}[10^.LITTLE_ENDIAN],$Fhi
  105. || LDW *${CTXB}[11^.LITTLE_ENDIAN],$Flo
  106. LDW *${CTXA}[12^.LITTLE_ENDIAN],$Ghi
  107. || LDW *${CTXB}[13^.LITTLE_ENDIAN],$Glo
  108. LDW *${CTXA}[14^.LITTLE_ENDIAN],$Hhi
  109. || LDW *${CTXB}[15^.LITTLE_ENDIAN],$Hlo
  110. LDNDW *$INP++,B11:B10 ; pre-fetch input
  111. LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[0]
  112. outerloop?:
  113. MVK 15,B0 ; loop counters
  114. || MVK 64,B1
  115. || SUB A0,1,A0
  116. MV $Ahi,$Actxhi
  117. || MV $Alo,$Actxlo
  118. || MV $Bhi,$Bctxhi
  119. || MV $Blo,$Bctxlo
  120. || MV $Chi,$Cctxhi
  121. || MV $Clo,$Cctxlo
  122. || MVD $Dhi,$Dctxhi
  123. || MVD $Dlo,$Dctxlo
  124. MV $Ehi,$Ectxhi
  125. || MV $Elo,$Ectxlo
  126. || MV $Fhi,$Fctxhi
  127. || MV $Flo,$Fctxlo
  128. || MV $Ghi,$Gctxhi
  129. || MV $Glo,$Gctxlo
  130. || MVD $Hhi,$Hctxhi
  131. || MVD $Hlo,$Hctxlo
  132. loop0_15?:
  133. .if .BIG_ENDIAN
  134. MV B11,$T1hi
  135. || MV B10,$T1lo
  136. .else
  137. SWAP4 B10,$T1hi
  138. || SWAP4 B11,$T1lo
  139. SWAP2 $T1hi,$T1hi
  140. || SWAP2 $T1lo,$T1lo
  141. .endif
  142. STW $T1hi,*$Xihi++[2] ; original loop16_79?
  143. || STW $T1lo,*$Xilo++[2] ; X[i] = T1
  144. || ADD $Hhi,$T1hi,$T1hi
  145. || ADDU $Hlo,$T1lo,$T1carry:$T1lo ; T1 += h
  146. || SHRU $Ehi,14,$S1hi
  147. || SHL $Ehi,32-14,$S1lo
  148. loop16_79?:
  149. XOR $Fhi,$Ghi,$CHhi
  150. || XOR $Flo,$Glo,$CHlo
  151. || ADD KHI,$T1hi,$T1hi
  152. || ADDU KLO,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += K512[i]
  153. || SHRU $Elo,14,$t0lo
  154. || SHL $Elo,32-14,$t0hi
  155. XOR $t0hi,$S1hi,$S1hi
  156. || XOR $t0lo,$S1lo,$S1lo
  157. || AND $Ehi,$CHhi,$CHhi
  158. || AND $Elo,$CHlo,$CHlo
  159. || ROTL $Ghi,0,$Hhi
  160. || ROTL $Glo,0,$Hlo ; h = g
  161. || SHRU $Ehi,18,$t0hi
  162. || SHL $Ehi,32-18,$t0lo
  163. XOR $t0hi,$S1hi,$S1hi
  164. || XOR $t0lo,$S1lo,$S1lo
  165. || XOR $Ghi,$CHhi,$CHhi
  166. || XOR $Glo,$CHlo,$CHlo ; Ch(e,f,g) = ((f^g)&e)^g
  167. || ROTL $Fhi,0,$Ghi
  168. || ROTL $Flo,0,$Glo ; g = f
  169. || SHRU $Elo,18,$t0lo
  170. || SHL $Elo,32-18,$t0hi
  171. XOR $t0hi,$S1hi,$S1hi
  172. || XOR $t0lo,$S1lo,$S1lo
  173. || OR $Ahi,$Bhi,$MAJhi
  174. || OR $Alo,$Blo,$MAJlo
  175. || ROTL $Ehi,0,$Fhi
  176. || ROTL $Elo,0,$Flo ; f = e
  177. || SHRU $Ehi,41-32,$t0lo
  178. || SHL $Ehi,64-41,$t0hi
  179. XOR $t0hi,$S1hi,$S1hi
  180. || XOR $t0lo,$S1lo,$S1lo
  181. || AND $Chi,$MAJhi,$MAJhi
  182. || AND $Clo,$MAJlo,$MAJlo
  183. || ROTL $Dhi,0,$Ehi
  184. || ROTL $Dlo,0,$Elo ; e = d
  185. || SHRU $Elo,41-32,$t0hi
  186. || SHL $Elo,64-41,$t0lo
  187. XOR $t0hi,$S1hi,$S1hi
  188. || XOR $t0lo,$S1lo,$S1lo ; Sigma1(e)
  189. || AND $Ahi,$Bhi,$t1hi
  190. || AND $Alo,$Blo,$t1lo
  191. || ROTL $Chi,0,$Dhi
  192. || ROTL $Clo,0,$Dlo ; d = c
  193. || SHRU $Ahi,28,$S0hi
  194. || SHL $Ahi,32-28,$S0lo
  195. OR $t1hi,$MAJhi,$MAJhi
  196. || OR $t1lo,$MAJlo,$MAJlo ; Maj(a,b,c) = ((a|b)&c)|(a&b)
  197. || ADD $CHhi,$T1hi,$T1hi
  198. || ADDU $CHlo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += Ch(e,f,g)
  199. || ROTL $Bhi,0,$Chi
  200. || ROTL $Blo,0,$Clo ; c = b
  201. || SHRU $Alo,28,$t0lo
  202. || SHL $Alo,32-28,$t0hi
  203. XOR $t0hi,$S0hi,$S0hi
  204. || XOR $t0lo,$S0lo,$S0lo
  205. || ADD $S1hi,$T1hi,$T1hi
  206. || ADDU $S1lo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += Sigma1(e)
  207. || ROTL $Ahi,0,$Bhi
  208. || ROTL $Alo,0,$Blo ; b = a
  209. || SHRU $Ahi,34-32,$t0lo
  210. || SHL $Ahi,64-34,$t0hi
  211. XOR $t0hi,$S0hi,$S0hi
  212. || XOR $t0lo,$S0lo,$S0lo
  213. || ADD $MAJhi,$T1hi,$T2hi
  214. || ADDU $MAJlo,$T1carry:$T1lo,$T2carry:$T2lo ; T2 = T1+Maj(a,b,c)
  215. || SHRU $Alo,34-32,$t0hi
  216. || SHL $Alo,64-34,$t0lo
  217. XOR $t0hi,$S0hi,$S0hi
  218. || XOR $t0lo,$S0lo,$S0lo
  219. || ADD $Ehi,$T1hi,$T1hi
  220. || ADDU $Elo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += e
  221. || SHRU $Ahi,39-32,$t0lo
  222. || SHL $Ahi,64-39,$t0hi
  223. [B0] BNOP loop0_15?
  224. || [B0] LDNDW *$INP++,B11:B10 ; pre-fetch input
  225. XOR $t0hi,$S0hi,$S0hi
  226. || XOR $t0lo,$S0lo,$S0lo
  227. || SHRU $Alo,39-32,$t0hi
  228. || SHL $Alo,64-39,$t0lo
  229. ||[!B0] LDW *${Xihi}[28],$T1hi
  230. ||[!B0] LDW *${Xilo}[28],$T1lo ; X[i+14]
  231. XOR $t0hi,$S0hi,$S0hi
  232. || XOR $t0lo,$S0lo,$S0lo ; Sigma0(a)
  233. || ADD $T1carry,$T1hi,$Ehi
  234. || ROTL $T1lo,0,$Elo ; e = T1, "ghost" value
  235. ||[!B1] BNOP break?
  236. ADD $S0hi,$T2hi,$T2hi
  237. || ADDU $S0lo,$T2carry:$T2lo,$T2carry:$T2lo ; T2 += Sigma0(a)
  238. || [B1] LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[i]
  239. NOP ; avoid cross-path stall
  240. ADD $T2carry,$T2hi,$Ahi
  241. || MV $T2lo,$Alo ; a = T2
  242. || [B0] SUB B0,1,B0
  243. ;;===== branch to loop00_15? is taken here
  244. [B1] LDW *${Xihi}[2],$T2hi
  245. || [B1] LDW *${Xilo}[2],$T2lo ; X[i+1]
  246. || [B1] SHRU $T1hi,19,$S1hi
  247. || [B1] SHL $T1hi,32-19,$S1lo
  248. [B1] SHRU $T1lo,19,$t0lo
  249. || [B1] SHL $T1lo,32-19,$t0hi
  250. ;;===== branch to break? is taken here
  251. XOR $t0hi,$S1hi,$S1hi
  252. || XOR $t0lo,$S1lo,$S1lo
  253. || SHRU $T1hi,61-32,$t0lo
  254. || SHL $T1hi,64-61,$t0hi
  255. XOR $t0hi,$S1hi,$S1hi
  256. || XOR $t0lo,$S1lo,$S1lo
  257. || SHRU $T1lo,61-32,$t0hi
  258. || SHL $T1lo,64-61,$t0lo
  259. XOR $t0hi,$S1hi,$S1hi
  260. || XOR $t0lo,$S1lo,$S1lo
  261. || SHRU $T1hi,6,$t0hi
  262. || SHL $T1hi,32-6,$t0lo
  263. XOR $t0hi,$S1hi,$S1hi
  264. || XOR $t0lo,$S1lo,$S1lo
  265. || SHRU $T1lo,6,$t0lo
  266. || LDW *${Xihi}[18],$T1hi
  267. || LDW *${Xilo}[18],$T1lo ; X[i+9]
  268. XOR $t0lo,$S1lo,$S1lo ; sigma1(Xi[i+14])
  269. || LDW *${Xihi}[0],$CHhi
  270. || LDW *${Xilo}[0],$CHlo ; X[i]
  271. || SHRU $T2hi,1,$S0hi
  272. || SHL $T2hi,32-1,$S0lo
  273. SHRU $T2lo,1,$t0lo
  274. || SHL $T2lo,32-1,$t0hi
  275. XOR $t0hi,$S0hi,$S0hi
  276. || XOR $t0lo,$S0lo,$S0lo
  277. || SHRU $T2hi,8,$t0hi
  278. || SHL $T2hi,32-8,$t0lo
  279. XOR $t0hi,$S0hi,$S0hi
  280. || XOR $t0lo,$S0lo,$S0lo
  281. || SHRU $T2lo,8,$t0lo
  282. || SHL $T2lo,32-8,$t0hi
  283. XOR $t0hi,$S0hi,$S0hi
  284. || XOR $t0lo,$S0lo,$S0lo
  285. || ADD $S1hi,$T1hi,$T1hi
  286. || ADDU $S1lo,$T1lo,$T1carry:$T1lo ; T1 = X[i+9]+sigma1()
  287. || SHRU $T2hi,7,$t0hi
  288. || SHL $T2hi,32-7,$t0lo
  289. XOR $t0hi,$S0hi,$S0hi
  290. || XOR $t0lo,$S0lo,$S0lo
  291. || ADD $CHhi,$T1hi,$T1hi
  292. || ADDU $CHlo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += X[i]
  293. || SHRU $T2lo,7,$t0lo
  294. || [B1] BNOP loop16_79?
  295. XOR $t0lo,$S0lo,$S0lo ; sigma0(Xi[i+1]
  296. ADD $S0hi,$T1hi,$T1hi
  297. || ADDU $S0lo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += sigma0()
  298. || [B1] SUB B1,1,B1
  299. NOP ; avoid cross-path stall
  300. ADD $T1carry,$T1hi,$T1hi
  301. STW $T1hi,*$Xihi++[2] ; copied "top" bundle
  302. || STW $T1lo,*$Xilo++[2] ; X[i] = T1
  303. || ADD $Hhi,$T1hi,$T1hi
  304. || ADDU $Hlo,$T1lo,$T1carry:$T1lo ; T1 += h
  305. || SHRU $Ehi,14,$S1hi
  306. || SHL $Ehi,32-14,$S1lo
  307. ;;===== branch to loop16_79? is taken here
  308. break?:
  309. ADD $Ahi,$Actxhi,$Ahi ; accumulate ctx
  310. || ADDU $Alo,$Actxlo,$Actxlo:$Alo
  311. || [A0] LDNDW *$INP++,B11:B10 ; pre-fetch input
  312. || [A0] ADDK -640,$K512 ; rewind pointer to K512
  313. ADD $Bhi,$Bctxhi,$Bhi
  314. || ADDU $Blo,$Bctxlo,$Bctxlo:$Blo
  315. || [A0] LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[0]
  316. ADD $Chi,$Cctxhi,$Chi
  317. || ADDU $Clo,$Cctxlo,$Cctxlo:$Clo
  318. || ADD $Actxlo,$Ahi,$Ahi
  319. ||[!A0] MV $CTXA,$CTXB
  320. ADD $Dhi,$Dctxhi,$Dhi
  321. || ADDU $Dlo,$Dctxlo,$Dctxlo:$Dlo
  322. || ADD $Bctxlo,$Bhi,$Bhi
  323. ||[!A0] STW $Ahi,*${CTXA}[0^.LITTLE_ENDIAN] ; save ctx
  324. ||[!A0] STW $Alo,*${CTXB}[1^.LITTLE_ENDIAN]
  325. ADD $Ehi,$Ectxhi,$Ehi
  326. || ADDU $Elo,$Ectxlo,$Ectxlo:$Elo
  327. || ADD $Cctxlo,$Chi,$Chi
  328. || [A0] BNOP outerloop?
  329. ||[!A0] STW $Bhi,*${CTXA}[2^.LITTLE_ENDIAN]
  330. ||[!A0] STW $Blo,*${CTXB}[3^.LITTLE_ENDIAN]
  331. ADD $Fhi,$Fctxhi,$Fhi
  332. || ADDU $Flo,$Fctxlo,$Fctxlo:$Flo
  333. || ADD $Dctxlo,$Dhi,$Dhi
  334. ||[!A0] STW $Chi,*${CTXA}[4^.LITTLE_ENDIAN]
  335. ||[!A0] STW $Clo,*${CTXB}[5^.LITTLE_ENDIAN]
  336. ADD $Ghi,$Gctxhi,$Ghi
  337. || ADDU $Glo,$Gctxlo,$Gctxlo:$Glo
  338. || ADD $Ectxlo,$Ehi,$Ehi
  339. ||[!A0] STW $Dhi,*${CTXA}[6^.LITTLE_ENDIAN]
  340. ||[!A0] STW $Dlo,*${CTXB}[7^.LITTLE_ENDIAN]
  341. ADD $Hhi,$Hctxhi,$Hhi
  342. || ADDU $Hlo,$Hctxlo,$Hctxlo:$Hlo
  343. || ADD $Fctxlo,$Fhi,$Fhi
  344. ||[!A0] STW $Ehi,*${CTXA}[8^.LITTLE_ENDIAN]
  345. ||[!A0] STW $Elo,*${CTXB}[9^.LITTLE_ENDIAN]
  346. ADD $Gctxlo,$Ghi,$Ghi
  347. ||[!A0] STW $Fhi,*${CTXA}[10^.LITTLE_ENDIAN]
  348. ||[!A0] STW $Flo,*${CTXB}[11^.LITTLE_ENDIAN]
  349. ADD $Hctxlo,$Hhi,$Hhi
  350. ||[!A0] STW $Ghi,*${CTXA}[12^.LITTLE_ENDIAN]
  351. ||[!A0] STW $Glo,*${CTXB}[13^.LITTLE_ENDIAN]
  352. ;;===== branch to outerloop? is taken here
  353. STW $Hhi,*${CTXA}[14^.LITTLE_ENDIAN]
  354. || STW $Hlo,*${CTXB}[15^.LITTLE_ENDIAN]
  355. || MVK -40,B0
  356. ADD FP,B0,SP ; destroy circular buffer
  357. || LDDW *FP[-4],A11:A10
  358. LDDW *SP[2],A13:A12
  359. || LDDW *FP[-2],B11:B10
  360. LDDW *SP[4],B13:B12
  361. || BNOP RA
  362. LDW *++SP(40),FP ; restore frame pointer
  363. MVK 0,B0
  364. MVC B0,AMR ; clear AMR
  365. NOP 2 ; wait till FP is committed
  366. .endasmfunc
  367. .if __TI_EABI__
  368. .sect ".text:sha_asm.const"
  369. .else
  370. .sect ".const:sha_asm"
  371. .endif
  372. .align 128
  373. K512:
  374. .uword 0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd
  375. .uword 0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc
  376. .uword 0x3956c25b,0xf348b538, 0x59f111f1,0xb605d019
  377. .uword 0x923f82a4,0xaf194f9b, 0xab1c5ed5,0xda6d8118
  378. .uword 0xd807aa98,0xa3030242, 0x12835b01,0x45706fbe
  379. .uword 0x243185be,0x4ee4b28c, 0x550c7dc3,0xd5ffb4e2
  380. .uword 0x72be5d74,0xf27b896f, 0x80deb1fe,0x3b1696b1
  381. .uword 0x9bdc06a7,0x25c71235, 0xc19bf174,0xcf692694
  382. .uword 0xe49b69c1,0x9ef14ad2, 0xefbe4786,0x384f25e3
  383. .uword 0x0fc19dc6,0x8b8cd5b5, 0x240ca1cc,0x77ac9c65
  384. .uword 0x2de92c6f,0x592b0275, 0x4a7484aa,0x6ea6e483
  385. .uword 0x5cb0a9dc,0xbd41fbd4, 0x76f988da,0x831153b5
  386. .uword 0x983e5152,0xee66dfab, 0xa831c66d,0x2db43210
  387. .uword 0xb00327c8,0x98fb213f, 0xbf597fc7,0xbeef0ee4
  388. .uword 0xc6e00bf3,0x3da88fc2, 0xd5a79147,0x930aa725
  389. .uword 0x06ca6351,0xe003826f, 0x14292967,0x0a0e6e70
  390. .uword 0x27b70a85,0x46d22ffc, 0x2e1b2138,0x5c26c926
  391. .uword 0x4d2c6dfc,0x5ac42aed, 0x53380d13,0x9d95b3df
  392. .uword 0x650a7354,0x8baf63de, 0x766a0abb,0x3c77b2a8
  393. .uword 0x81c2c92e,0x47edaee6, 0x92722c85,0x1482353b
  394. .uword 0xa2bfe8a1,0x4cf10364, 0xa81a664b,0xbc423001
  395. .uword 0xc24b8b70,0xd0f89791, 0xc76c51a3,0x0654be30
  396. .uword 0xd192e819,0xd6ef5218, 0xd6990624,0x5565a910
  397. .uword 0xf40e3585,0x5771202a, 0x106aa070,0x32bbd1b8
  398. .uword 0x19a4c116,0xb8d2d0c8, 0x1e376c08,0x5141ab53
  399. .uword 0x2748774c,0xdf8eeb99, 0x34b0bcb5,0xe19b48a8
  400. .uword 0x391c0cb3,0xc5c95a63, 0x4ed8aa4a,0xe3418acb
  401. .uword 0x5b9cca4f,0x7763e373, 0x682e6ff3,0xd6b2b8a3
  402. .uword 0x748f82ee,0x5defb2fc, 0x78a5636f,0x43172f60
  403. .uword 0x84c87814,0xa1f0ab72, 0x8cc70208,0x1a6439ec
  404. .uword 0x90befffa,0x23631e28, 0xa4506ceb,0xde82bde9
  405. .uword 0xbef9a3f7,0xb2c67915, 0xc67178f2,0xe372532b
  406. .uword 0xca273ece,0xea26619c, 0xd186b8c7,0x21c0c207
  407. .uword 0xeada7dd6,0xcde0eb1e, 0xf57d4f7f,0xee6ed178
  408. .uword 0x06f067aa,0x72176fba, 0x0a637dc5,0xa2c898a6
  409. .uword 0x113f9804,0xbef90dae, 0x1b710b35,0x131c471b
  410. .uword 0x28db77f5,0x23047d84, 0x32caab7b,0x40c72493
  411. .uword 0x3c9ebe0a,0x15c9bebc, 0x431d67c4,0x9c100d4c
  412. .uword 0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a
  413. .uword 0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817
  414. .cstring "SHA512 block transform for C64x, CRYPTOGAMS by <appro\@openssl.org>"
  415. .align 4
  416. ___
  417. print $code;
  418. close STDOUT;