arm_arch.h 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128
  1. /*
  2. * Copyright 2011-2018 The OpenSSL Project Authors. All Rights Reserved.
  3. *
  4. * Licensed under the Apache License 2.0 (the "License"). You may not use
  5. * this file except in compliance with the License. You can obtain a copy
  6. * in the file LICENSE in the source distribution or at
  7. * https://www.openssl.org/source/license.html
  8. */
  9. #ifndef OSSL_CRYPTO_ARM_ARCH_H
  10. # define OSSL_CRYPTO_ARM_ARCH_H
  11. # if !defined(__ARM_ARCH__)
  12. # if defined(__CC_ARM)
  13. # define __ARM_ARCH__ __TARGET_ARCH_ARM
  14. # if defined(__BIG_ENDIAN)
  15. # define __ARMEB__
  16. # else
  17. # define __ARMEL__
  18. # endif
  19. # elif defined(__GNUC__)
  20. # if defined(__aarch64__)
  21. # define __ARM_ARCH__ 8
  22. # if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
  23. # define __ARMEB__
  24. # else
  25. # define __ARMEL__
  26. # endif
  27. /*
  28. * Why doesn't gcc define __ARM_ARCH__? Instead it defines
  29. * bunch of below macros. See all_architectures[] table in
  30. * gcc/config/arm/arm.c. On a side note it defines
  31. * __ARMEL__/__ARMEB__ for little-/big-endian.
  32. */
  33. # elif defined(__ARM_ARCH)
  34. # define __ARM_ARCH__ __ARM_ARCH
  35. # elif defined(__ARM_ARCH_8A__)
  36. # define __ARM_ARCH__ 8
  37. # elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \
  38. defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__) || \
  39. defined(__ARM_ARCH_7EM__)
  40. # define __ARM_ARCH__ 7
  41. # elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \
  42. defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__) || \
  43. defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__) || \
  44. defined(__ARM_ARCH_6T2__)
  45. # define __ARM_ARCH__ 6
  46. # elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || \
  47. defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__) || \
  48. defined(__ARM_ARCH_5TEJ__)
  49. # define __ARM_ARCH__ 5
  50. # elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
  51. # define __ARM_ARCH__ 4
  52. # else
  53. # error "unsupported ARM architecture"
  54. # endif
  55. # endif
  56. # endif
  57. # if !defined(__ARM_MAX_ARCH__)
  58. # define __ARM_MAX_ARCH__ __ARM_ARCH__
  59. # endif
  60. # if __ARM_MAX_ARCH__<__ARM_ARCH__
  61. # error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
  62. # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
  63. # if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
  64. # error "can't build universal big-endian binary"
  65. # endif
  66. # endif
  67. # ifndef __ASSEMBLER__
  68. extern unsigned int OPENSSL_armcap_P;
  69. extern unsigned int OPENSSL_arm_midr;
  70. # endif
  71. # define ARMV7_NEON (1<<0)
  72. # define ARMV7_TICK (1<<1)
  73. # define ARMV8_AES (1<<2)
  74. # define ARMV8_SHA1 (1<<3)
  75. # define ARMV8_SHA256 (1<<4)
  76. # define ARMV8_PMULL (1<<5)
  77. # define ARMV8_SHA512 (1<<6)
  78. # define ARMV8_CPUID (1<<7)
  79. /*
  80. * MIDR_EL1 system register
  81. *
  82. * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
  83. * | | | | | | |
  84. * |RES0 | Implementer | Variant | Arch | PartNum |Revision|
  85. * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
  86. *
  87. */
  88. # define ARM_CPU_IMP_ARM 0x41
  89. # define ARM_CPU_PART_CORTEX_A72 0xD08
  90. # define ARM_CPU_PART_N1 0xD0C
  91. # define MIDR_PARTNUM_SHIFT 4
  92. # define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT)
  93. # define MIDR_PARTNUM(midr) \
  94. (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
  95. # define MIDR_IMPLEMENTER_SHIFT 24
  96. # define MIDR_IMPLEMENTER_MASK (0xff << MIDR_IMPLEMENTER_SHIFT)
  97. # define MIDR_IMPLEMENTER(midr) \
  98. (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
  99. # define MIDR_ARCHITECTURE_SHIFT 16
  100. # define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
  101. # define MIDR_ARCHITECTURE(midr) \
  102. (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
  103. # define MIDR_CPU_MODEL_MASK \
  104. (MIDR_IMPLEMENTER_MASK | \
  105. MIDR_PARTNUM_MASK | \
  106. MIDR_ARCHITECTURE_MASK)
  107. # define MIDR_CPU_MODEL(imp, partnum) \
  108. (((imp) << MIDR_IMPLEMENTER_SHIFT) | \
  109. (0xf << MIDR_ARCHITECTURE_SHIFT) | \
  110. ((partnum) << MIDR_PARTNUM_SHIFT))
  111. # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
  112. (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
  113. #endif