fips_canister.c 7.2 KB

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  1. /* ====================================================================
  2. * Copyright (c) 2005 The OpenSSL Project. Rights for redistribution
  3. * and usage in source and binary forms are granted according to the
  4. * OpenSSL license.
  5. */
  6. #include <stdio.h>
  7. #if defined(__DECC)
  8. # include <c_asm.h>
  9. # pragma __nostandard
  10. #endif
  11. #include "e_os.h"
  12. #if !defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
  13. # if (defined(__sun) && (defined(__sparc) || defined(__sparcv9))) || \
  14. (defined(__sgi) && (defined(__mips) || defined(mips))) || \
  15. (defined(__osf__) && defined(__alpha)) || \
  16. (defined(__linux) && (defined(__arm) || defined(__arm__))) || \
  17. (defined(__i386) || defined(__i386__)) || \
  18. (defined(__x86_64) || defined(__x86_64__)) || \
  19. defined(__ANDROID__) || \
  20. (defined(vax) || defined(__vax__))
  21. # define POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION
  22. # endif
  23. #endif
  24. #if defined(__xlC__) && __xlC__>=0x600 && (defined(_POWER) || defined(_ARCH_PPC))
  25. static void *instruction_pointer_xlc(void);
  26. # pragma mc_func instruction_pointer_xlc {\
  27. "7c0802a6" /* mflr r0 */ \
  28. "48000005" /* bl $+4 */ \
  29. "7c6802a6" /* mflr r3 */ \
  30. "7c0803a6" /* mtlr r0 */ }
  31. # pragma reg_killed_by instruction_pointer_xlc gr0 gr3
  32. # define INSTRUCTION_POINTER_IMPLEMENTED(ret) (ret=instruction_pointer_xlc());
  33. #endif
  34. #ifdef FIPS_START
  35. # define FIPS_ref_point FIPS_text_start
  36. /*
  37. * Some compilers put string literals into a separate segment. As we are
  38. * mostly interested to hash AES tables in .rodata, we declare reference
  39. * points accordingly. In case you wonder, the values are big-endian encoded
  40. * variable names, just to prevent these arrays from being merged by linker.
  41. */
  42. const unsigned int FIPS_rodata_start[] =
  43. { 0x46495053, 0x5f726f64, 0x6174615f, 0x73746172 };
  44. #else
  45. # define FIPS_ref_point FIPS_text_end
  46. const unsigned int FIPS_rodata_end[] =
  47. { 0x46495053, 0x5f726f64, 0x6174615f, 0x656e645b };
  48. #endif
  49. /*
  50. * I declare reference function as static in order to avoid certain
  51. * pitfalls in -dynamic linker behaviour...
  52. */
  53. static void *instruction_pointer(void)
  54. {
  55. void *ret = NULL;
  56. /*
  57. * These are ABI-neutral CPU-specific snippets. ABI-neutrality means that
  58. * they are designed to work under any OS running on particular CPU,
  59. * which is why you don't find any #ifdef THIS_OR_THAT_OS in this
  60. * function.
  61. */
  62. #if defined(INSTRUCTION_POINTER_IMPLEMENTED)
  63. INSTRUCTION_POINTER_IMPLEMENTED(ret);
  64. #elif defined(__GNUC__) && __GNUC__>=2
  65. # if defined(__alpha) || defined(__alpha__)
  66. # define INSTRUCTION_POINTER_IMPLEMENTED
  67. __asm __volatile("br %0,1f\n1:":"=r"(ret));
  68. # elif defined(__i386) || defined(__i386__)
  69. # define INSTRUCTION_POINTER_IMPLEMENTED
  70. __asm __volatile("call 1f\n1: popl %0":"=r"(ret));
  71. ret = (void *)((size_t)ret & ~3UL); /* align for better performance */
  72. # elif defined(__ia64) || defined(__ia64__)
  73. # define INSTRUCTION_POINTER_IMPLEMENTED
  74. __asm __volatile("mov %0=ip":"=r"(ret));
  75. # elif defined(__hppa) || defined(__hppa__) || defined(__pa_risc)
  76. # define INSTRUCTION_POINTER_IMPLEMENTED
  77. __asm __volatile("blr %%r0,%0\n\tnop":"=r"(ret));
  78. ret = (void *)((size_t)ret & ~3UL); /* mask privilege level */
  79. # elif defined(__mips) || defined(__mips__)
  80. # define INSTRUCTION_POINTER_IMPLEMENTED
  81. void *scratch;
  82. __asm __volatile("move %1,$31\n\t" /* save ra */
  83. "bal .+8; nop\n\t" "move %0,$31\n\t"
  84. /* restore ra */
  85. "move $31,%1":"=r"(ret), "=r"(scratch));
  86. # elif defined(__ppc__) || defined(__powerpc) || defined(__powerpc__) || \
  87. defined(__POWERPC__) || defined(_POWER) || defined(__PPC__) || \
  88. defined(__PPC64__) || defined(__powerpc64__)
  89. # define INSTRUCTION_POINTER_IMPLEMENTED
  90. void *scratch;
  91. __asm __volatile("mfspr %1,8\n\t" /* save lr */
  92. "bl $+4\n\t" "mfspr %0,8\n\t" /* mflr ret */
  93. "mtspr 8,%1" /* restore lr */
  94. :"=r"(ret), "=r"(scratch));
  95. # elif defined(__s390__) || defined(__s390x__)
  96. # define INSTRUCTION_POINTER_IMPLEMENTED
  97. __asm __volatile("bras %0,1f\n1:":"=r"(ret));
  98. ret = (void *)((size_t)ret & ~3UL);
  99. # elif defined(__sparc) || defined(__sparc__) || defined(__sparcv9)
  100. # define INSTRUCTION_POINTER_IMPLEMENTED
  101. void *scratch;
  102. __asm __volatile("mov %%o7,%1\n\t"
  103. "call .+8; nop\n\t"
  104. "mov %%o7,%0\n\t"
  105. "mov %1,%%o7":"=r"(ret), "=r"(scratch));
  106. # elif defined(__x86_64) || defined(__x86_64__)
  107. # define INSTRUCTION_POINTER_IMPLEMENTED
  108. __asm __volatile("leaq 0(%%rip),%0":"=r"(ret));
  109. ret = (void *)((size_t)ret & ~3UL); /* align for better performance */
  110. # endif
  111. #elif defined(__DECC) && defined(__alpha)
  112. # define INSTRUCTION_POINTER_IMPLEMENTED
  113. ret = (void *)(size_t)asm("br %v0,1f\n1:");
  114. #elif defined(_MSC_VER) && defined(_M_IX86)
  115. # define INSTRUCTION_POINTER_IMPLEMENTED
  116. void *scratch;
  117. _asm {
  118. call self
  119. self:pop eax
  120. mov scratch, eax} ret = (void *)((size_t)scratch & ~3UL);
  121. #endif
  122. return ret;
  123. }
  124. /*
  125. * This function returns pointer to an instruction in the vicinity of
  126. * its entry point, but not outside this object module. This guarantees
  127. * that sequestered code is covered...
  128. */
  129. void *FIPS_ref_point()
  130. {
  131. #if defined(INSTRUCTION_POINTER_IMPLEMENTED)
  132. return instruction_pointer();
  133. /*
  134. * Below we essentially cover vendor compilers which do not support
  135. * inline assembler...
  136. */
  137. #elif defined(_AIX)
  138. struct {
  139. void *ip, *gp, *env;
  140. } *p = (void *)instruction_pointer;
  141. return p->ip;
  142. #elif defined(_HPUX_SOURCE)
  143. # if defined(__hppa) || defined(__hppa__)
  144. struct {
  145. void *i[4];
  146. } *p = (void *)FIPS_ref_point;
  147. if (sizeof(p) == 8) /* 64-bit */
  148. return p->i[2];
  149. else if ((size_t)p & 2) {
  150. p = (void *)((size_t)p & ~3UL);
  151. return p->i[0];
  152. } else
  153. return (void *)p;
  154. # elif defined(__ia64) || defined(__ia64__)
  155. struct {
  156. unsigned long long ip, gp;
  157. } *p = (void *)instruction_pointer;
  158. return (void *)(size_t)p->ip;
  159. # endif
  160. #elif (defined(__VMS) || defined(VMS)) && !(defined(vax) || defined(__vax__))
  161. /* applies to both alpha and ia64 */
  162. struct {
  163. unsigned __int64 opaque, ip;
  164. } *p = (void *)instruction_pointer;
  165. return (void *)(size_t)p->ip;
  166. #elif defined(__VOS__)
  167. /* applies to both pa-risc and ia32 */
  168. struct {
  169. void *dp, *ip, *gp;
  170. } *p = (void *)instruction_pointer;
  171. return p->ip;
  172. #elif defined(_WIN32)
  173. # if defined(_WIN64) && defined(_M_IA64)
  174. struct {
  175. void *ip, *gp;
  176. } *p = (void *)FIPS_ref_point;
  177. return p->ip;
  178. # else
  179. return (void *)FIPS_ref_point;
  180. # endif
  181. /*
  182. * In case you wonder why there is no #ifdef __linux. All Linux targets
  183. * are GCC-based and therefore are covered by instruction_pointer above
  184. * [well, some are covered by by the one below]...
  185. */
  186. #elif defined(POINTER_TO_FUNCTION_IS_POINTER_TO_1ST_INSTRUCTION)
  187. return (void *)instruction_pointer;
  188. #else
  189. return NULL;
  190. #endif
  191. }