rsaz-4k-avx512.pl 29 KB

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  1. # Copyright 2021-2022 The OpenSSL Project Authors. All Rights Reserved.
  2. # Copyright (c) 2021, Intel Corporation. All Rights Reserved.
  3. #
  4. # Licensed under the Apache License 2.0 (the "License"). You may not use
  5. # this file except in compliance with the License. You can obtain a copy
  6. # in the file LICENSE in the source distribution or at
  7. # https://www.openssl.org/source/license.html
  8. #
  9. #
  10. # Originally written by Sergey Kirillov and Andrey Matyukov
  11. # Intel Corporation
  12. #
  13. # March 2021
  14. #
  15. # Initial release.
  16. #
  17. # Implementation utilizes 256-bit (ymm) registers to avoid frequency scaling issues.
  18. #
  19. # IceLake-Client @ 1.3GHz
  20. # |---------+-----------------------+---------------+-------------|
  21. # | | OpenSSL 3.0.0-alpha15 | this | Unit |
  22. # |---------+-----------------------+---------------+-------------|
  23. # | rsa4096 | 14 301 4300 | 5 813 953 | cycles/sign |
  24. # | | 90.9 | 223.6 / +146% | sign/s |
  25. # |---------+-----------------------+---------------+-------------|
  26. #
  27. # $output is the last argument if it looks like a file (it has an extension)
  28. # $flavour is the first argument if it doesn't look like a file
  29. $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
  30. $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
  31. $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
  32. $avx512ifma=0;
  33. $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  34. ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
  35. ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
  36. die "can't locate x86_64-xlate.pl";
  37. if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
  38. =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
  39. $avx512ifma = ($1>=2.26);
  40. }
  41. if (!$avx512 && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
  42. `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
  43. $avx512ifma = ($1==2.11 && $2>=8) + ($1>=2.12);
  44. }
  45. if (!$avx512 && `$ENV{CC} -v 2>&1` =~ /((?:clang|LLVM) version|.*based on LLVM) ([0-9]+\.[0-9]+)/) {
  46. $avx512ifma = ($2>=7.0);
  47. }
  48. open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""
  49. or die "can't call $xlate: $!";
  50. *STDOUT=*OUT;
  51. if ($avx512ifma>0) {{{
  52. @_6_args_universal_ABI = ("%rdi","%rsi","%rdx","%rcx","%r8","%r9");
  53. ###############################################################################
  54. # Almost Montgomery Multiplication (AMM) for 40-digit number in radix 2^52.
  55. #
  56. # AMM is defined as presented in the paper [1].
  57. #
  58. # The input and output are presented in 2^52 radix domain, i.e.
  59. # |res|, |a|, |b|, |m| are arrays of 40 64-bit qwords with 12 high bits zeroed.
  60. # |k0| is a Montgomery coefficient, which is here k0 = -1/m mod 2^64
  61. #
  62. # NB: the AMM implementation does not perform "conditional" subtraction step
  63. # specified in the original algorithm as according to the Lemma 1 from the paper
  64. # [2], the result will be always < 2*m and can be used as a direct input to
  65. # the next AMM iteration. This post-condition is true, provided the correct
  66. # parameter |s| (notion of the Lemma 1 from [2]) is chosen, i.e. s >= n + 2 * k,
  67. # which matches our case: 2080 > 2048 + 2 * 1.
  68. #
  69. # [1] Gueron, S. Efficient software implementations of modular exponentiation.
  70. # DOI: 10.1007/s13389-012-0031-5
  71. # [2] Gueron, S. Enhanced Montgomery Multiplication.
  72. # DOI: 10.1007/3-540-36400-5_5
  73. #
  74. # void ossl_rsaz_amm52x40_x1_ifma256(BN_ULONG *res,
  75. # const BN_ULONG *a,
  76. # const BN_ULONG *b,
  77. # const BN_ULONG *m,
  78. # BN_ULONG k0);
  79. ###############################################################################
  80. {
  81. # input parameters ("%rdi","%rsi","%rdx","%rcx","%r8")
  82. my ($res,$a,$b,$m,$k0) = @_6_args_universal_ABI;
  83. my $mask52 = "%rax";
  84. my $acc0_0 = "%r9";
  85. my $acc0_0_low = "%r9d";
  86. my $acc0_1 = "%r15";
  87. my $acc0_1_low = "%r15d";
  88. my $b_ptr = "%r11";
  89. my $iter = "%ebx";
  90. my $zero = "%ymm0";
  91. my $Bi = "%ymm1";
  92. my $Yi = "%ymm2";
  93. my ($R0_0,$R0_0h,$R1_0,$R1_0h,$R2_0,$R2_0h,$R3_0,$R3_0h,$R4_0,$R4_0h) = map("%ymm$_",(3..12));
  94. my ($R0_1,$R0_1h,$R1_1,$R1_1h,$R2_1,$R2_1h,$R3_1,$R3_1h,$R4_1,$R4_1h) = map("%ymm$_",(13..22));
  95. # Registers mapping for normalization
  96. my ($T0,$T0h,$T1,$T1h,$T2,$T2h,$T3,$T3h,$T4,$T4h) = ("$zero", "$Bi", "$Yi", map("%ymm$_", (23..29)));
  97. sub amm52x40_x1() {
  98. # _data_offset - offset in the |a| or |m| arrays pointing to the beginning
  99. # of data for corresponding AMM operation;
  100. # _b_offset - offset in the |b| array pointing to the next qword digit;
  101. my ($_data_offset,$_b_offset,$_acc,$_R0,$_R0h,$_R1,$_R1h,$_R2,$_R2h,$_R3,$_R3h,$_R4,$_R4h,$_k0) = @_;
  102. my $_R0_xmm = $_R0;
  103. $_R0_xmm =~ s/%y/%x/;
  104. $code.=<<___;
  105. movq $_b_offset($b_ptr), %r13 # b[i]
  106. vpbroadcastq %r13, $Bi # broadcast b[i]
  107. movq $_data_offset($a), %rdx
  108. mulx %r13, %r13, %r12 # a[0]*b[i] = (t0,t2)
  109. addq %r13, $_acc # acc += t0
  110. movq %r12, %r10
  111. adcq \$0, %r10 # t2 += CF
  112. movq $_k0, %r13
  113. imulq $_acc, %r13 # acc * k0
  114. andq $mask52, %r13 # yi = (acc * k0) & mask52
  115. vpbroadcastq %r13, $Yi # broadcast y[i]
  116. movq $_data_offset($m), %rdx
  117. mulx %r13, %r13, %r12 # yi * m[0] = (t0,t1)
  118. addq %r13, $_acc # acc += t0
  119. adcq %r12, %r10 # t2 += (t1 + CF)
  120. shrq \$52, $_acc
  121. salq \$12, %r10
  122. or %r10, $_acc # acc = ((acc >> 52) | (t2 << 12))
  123. vpmadd52luq `$_data_offset+64*0`($a), $Bi, $_R0
  124. vpmadd52luq `$_data_offset+64*0+32`($a), $Bi, $_R0h
  125. vpmadd52luq `$_data_offset+64*1`($a), $Bi, $_R1
  126. vpmadd52luq `$_data_offset+64*1+32`($a), $Bi, $_R1h
  127. vpmadd52luq `$_data_offset+64*2`($a), $Bi, $_R2
  128. vpmadd52luq `$_data_offset+64*2+32`($a), $Bi, $_R2h
  129. vpmadd52luq `$_data_offset+64*3`($a), $Bi, $_R3
  130. vpmadd52luq `$_data_offset+64*3+32`($a), $Bi, $_R3h
  131. vpmadd52luq `$_data_offset+64*4`($a), $Bi, $_R4
  132. vpmadd52luq `$_data_offset+64*4+32`($a), $Bi, $_R4h
  133. vpmadd52luq `$_data_offset+64*0`($m), $Yi, $_R0
  134. vpmadd52luq `$_data_offset+64*0+32`($m), $Yi, $_R0h
  135. vpmadd52luq `$_data_offset+64*1`($m), $Yi, $_R1
  136. vpmadd52luq `$_data_offset+64*1+32`($m), $Yi, $_R1h
  137. vpmadd52luq `$_data_offset+64*2`($m), $Yi, $_R2
  138. vpmadd52luq `$_data_offset+64*2+32`($m), $Yi, $_R2h
  139. vpmadd52luq `$_data_offset+64*3`($m), $Yi, $_R3
  140. vpmadd52luq `$_data_offset+64*3+32`($m), $Yi, $_R3h
  141. vpmadd52luq `$_data_offset+64*4`($m), $Yi, $_R4
  142. vpmadd52luq `$_data_offset+64*4+32`($m), $Yi, $_R4h
  143. # Shift accumulators right by 1 qword, zero extending the highest one
  144. valignq \$1, $_R0, $_R0h, $_R0
  145. valignq \$1, $_R0h, $_R1, $_R0h
  146. valignq \$1, $_R1, $_R1h, $_R1
  147. valignq \$1, $_R1h, $_R2, $_R1h
  148. valignq \$1, $_R2, $_R2h, $_R2
  149. valignq \$1, $_R2h, $_R3, $_R2h
  150. valignq \$1, $_R3, $_R3h, $_R3
  151. valignq \$1, $_R3h, $_R4, $_R3h
  152. valignq \$1, $_R4, $_R4h, $_R4
  153. valignq \$1, $_R4h, $zero, $_R4h
  154. vmovq $_R0_xmm, %r13
  155. addq %r13, $_acc # acc += R0[0]
  156. vpmadd52huq `$_data_offset+64*0`($a), $Bi, $_R0
  157. vpmadd52huq `$_data_offset+64*0+32`($a), $Bi, $_R0h
  158. vpmadd52huq `$_data_offset+64*1`($a), $Bi, $_R1
  159. vpmadd52huq `$_data_offset+64*1+32`($a), $Bi, $_R1h
  160. vpmadd52huq `$_data_offset+64*2`($a), $Bi, $_R2
  161. vpmadd52huq `$_data_offset+64*2+32`($a), $Bi, $_R2h
  162. vpmadd52huq `$_data_offset+64*3`($a), $Bi, $_R3
  163. vpmadd52huq `$_data_offset+64*3+32`($a), $Bi, $_R3h
  164. vpmadd52huq `$_data_offset+64*4`($a), $Bi, $_R4
  165. vpmadd52huq `$_data_offset+64*4+32`($a), $Bi, $_R4h
  166. vpmadd52huq `$_data_offset+64*0`($m), $Yi, $_R0
  167. vpmadd52huq `$_data_offset+64*0+32`($m), $Yi, $_R0h
  168. vpmadd52huq `$_data_offset+64*1`($m), $Yi, $_R1
  169. vpmadd52huq `$_data_offset+64*1+32`($m), $Yi, $_R1h
  170. vpmadd52huq `$_data_offset+64*2`($m), $Yi, $_R2
  171. vpmadd52huq `$_data_offset+64*2+32`($m), $Yi, $_R2h
  172. vpmadd52huq `$_data_offset+64*3`($m), $Yi, $_R3
  173. vpmadd52huq `$_data_offset+64*3+32`($m), $Yi, $_R3h
  174. vpmadd52huq `$_data_offset+64*4`($m), $Yi, $_R4
  175. vpmadd52huq `$_data_offset+64*4+32`($m), $Yi, $_R4h
  176. ___
  177. }
  178. # Normalization routine: handles carry bits and gets bignum qwords to normalized
  179. # 2^52 representation.
  180. #
  181. # Uses %r8-14,%e[abcd]x
  182. sub amm52x40_x1_norm {
  183. my ($_acc,$_R0,$_R0h,$_R1,$_R1h,$_R2,$_R2h,$_R3,$_R3h,$_R4,$_R4h) = @_;
  184. $code.=<<___;
  185. # Put accumulator to low qword in R0
  186. vpbroadcastq $_acc, $T0
  187. vpblendd \$3, $T0, $_R0, $_R0
  188. # Extract "carries" (12 high bits) from each QW of the bignum
  189. # Save them to LSB of QWs in T0..Tn
  190. vpsrlq \$52, $_R0, $T0
  191. vpsrlq \$52, $_R0h, $T0h
  192. vpsrlq \$52, $_R1, $T1
  193. vpsrlq \$52, $_R1h, $T1h
  194. vpsrlq \$52, $_R2, $T2
  195. vpsrlq \$52, $_R2h, $T2h
  196. vpsrlq \$52, $_R3, $T3
  197. vpsrlq \$52, $_R3h, $T3h
  198. vpsrlq \$52, $_R4, $T4
  199. vpsrlq \$52, $_R4h, $T4h
  200. # "Shift left" T0..Tn by 1 QW
  201. valignq \$3, $T4, $T4h, $T4h
  202. valignq \$3, $T3h, $T4, $T4
  203. valignq \$3, $T3, $T3h, $T3h
  204. valignq \$3, $T2h, $T3, $T3
  205. valignq \$3, $T2, $T2h, $T2h
  206. valignq \$3, $T1h, $T2, $T2
  207. valignq \$3, $T1, $T1h, $T1h
  208. valignq \$3, $T0h, $T1, $T1
  209. valignq \$3, $T0, $T0h, $T0h
  210. valignq \$3, .Lzeros(%rip), $T0, $T0
  211. # Drop "carries" from R0..Rn QWs
  212. vpandq .Lmask52x4(%rip), $_R0, $_R0
  213. vpandq .Lmask52x4(%rip), $_R0h, $_R0h
  214. vpandq .Lmask52x4(%rip), $_R1, $_R1
  215. vpandq .Lmask52x4(%rip), $_R1h, $_R1h
  216. vpandq .Lmask52x4(%rip), $_R2, $_R2
  217. vpandq .Lmask52x4(%rip), $_R2h, $_R2h
  218. vpandq .Lmask52x4(%rip), $_R3, $_R3
  219. vpandq .Lmask52x4(%rip), $_R3h, $_R3h
  220. vpandq .Lmask52x4(%rip), $_R4, $_R4
  221. vpandq .Lmask52x4(%rip), $_R4h, $_R4h
  222. # Sum R0..Rn with corresponding adjusted carries
  223. vpaddq $T0, $_R0, $_R0
  224. vpaddq $T0h, $_R0h, $_R0h
  225. vpaddq $T1, $_R1, $_R1
  226. vpaddq $T1h, $_R1h, $_R1h
  227. vpaddq $T2, $_R2, $_R2
  228. vpaddq $T2h, $_R2h, $_R2h
  229. vpaddq $T3, $_R3, $_R3
  230. vpaddq $T3h, $_R3h, $_R3h
  231. vpaddq $T4, $_R4, $_R4
  232. vpaddq $T4h, $_R4h, $_R4h
  233. # Now handle carry bits from this addition
  234. # Get mask of QWs whose 52-bit parts overflow
  235. vpcmpuq \$6,.Lmask52x4(%rip),${_R0},%k1 # OP=nle (i.e. gt)
  236. vpcmpuq \$6,.Lmask52x4(%rip),${_R0h},%k2
  237. kmovb %k1,%r14d
  238. kmovb %k2,%r13d
  239. shl \$4,%r13b
  240. or %r13b,%r14b
  241. vpcmpuq \$6,.Lmask52x4(%rip),${_R1},%k1
  242. vpcmpuq \$6,.Lmask52x4(%rip),${_R1h},%k2
  243. kmovb %k1,%r13d
  244. kmovb %k2,%r12d
  245. shl \$4,%r12b
  246. or %r12b,%r13b
  247. vpcmpuq \$6,.Lmask52x4(%rip),${_R2},%k1
  248. vpcmpuq \$6,.Lmask52x4(%rip),${_R2h},%k2
  249. kmovb %k1,%r12d
  250. kmovb %k2,%r11d
  251. shl \$4,%r11b
  252. or %r11b,%r12b
  253. vpcmpuq \$6,.Lmask52x4(%rip),${_R3},%k1
  254. vpcmpuq \$6,.Lmask52x4(%rip),${_R3h},%k2
  255. kmovb %k1,%r11d
  256. kmovb %k2,%r10d
  257. shl \$4,%r10b
  258. or %r10b,%r11b
  259. vpcmpuq \$6,.Lmask52x4(%rip),${_R4},%k1
  260. vpcmpuq \$6,.Lmask52x4(%rip),${_R4h},%k2
  261. kmovb %k1,%r10d
  262. kmovb %k2,%r9d
  263. shl \$4,%r9b
  264. or %r9b,%r10b
  265. addb %r14b,%r14b
  266. adcb %r13b,%r13b
  267. adcb %r12b,%r12b
  268. adcb %r11b,%r11b
  269. adcb %r10b,%r10b
  270. # Get mask of QWs whose 52-bit parts saturated
  271. vpcmpuq \$0,.Lmask52x4(%rip),${_R0},%k1 # OP=eq
  272. vpcmpuq \$0,.Lmask52x4(%rip),${_R0h},%k2
  273. kmovb %k1,%r9d
  274. kmovb %k2,%r8d
  275. shl \$4,%r8b
  276. or %r8b,%r9b
  277. vpcmpuq \$0,.Lmask52x4(%rip),${_R1},%k1
  278. vpcmpuq \$0,.Lmask52x4(%rip),${_R1h},%k2
  279. kmovb %k1,%r8d
  280. kmovb %k2,%edx
  281. shl \$4,%dl
  282. or %dl,%r8b
  283. vpcmpuq \$0,.Lmask52x4(%rip),${_R2},%k1
  284. vpcmpuq \$0,.Lmask52x4(%rip),${_R2h},%k2
  285. kmovb %k1,%edx
  286. kmovb %k2,%ecx
  287. shl \$4,%cl
  288. or %cl,%dl
  289. vpcmpuq \$0,.Lmask52x4(%rip),${_R3},%k1
  290. vpcmpuq \$0,.Lmask52x4(%rip),${_R3h},%k2
  291. kmovb %k1,%ecx
  292. kmovb %k2,%ebx
  293. shl \$4,%bl
  294. or %bl,%cl
  295. vpcmpuq \$0,.Lmask52x4(%rip),${_R4},%k1
  296. vpcmpuq \$0,.Lmask52x4(%rip),${_R4h},%k2
  297. kmovb %k1,%ebx
  298. kmovb %k2,%eax
  299. shl \$4,%al
  300. or %al,%bl
  301. addb %r9b,%r14b
  302. adcb %r8b,%r13b
  303. adcb %dl,%r12b
  304. adcb %cl,%r11b
  305. adcb %bl,%r10b
  306. xor %r9b,%r14b
  307. xor %r8b,%r13b
  308. xor %dl,%r12b
  309. xor %cl,%r11b
  310. xor %bl,%r10b
  311. kmovb %r14d,%k1
  312. shr \$4,%r14b
  313. kmovb %r14d,%k2
  314. kmovb %r13d,%k3
  315. shr \$4,%r13b
  316. kmovb %r13d,%k4
  317. kmovb %r12d,%k5
  318. shr \$4,%r12b
  319. kmovb %r12d,%k6
  320. kmovb %r11d,%k7
  321. vpsubq .Lmask52x4(%rip), $_R0, ${_R0}{%k1}
  322. vpsubq .Lmask52x4(%rip), $_R0h, ${_R0h}{%k2}
  323. vpsubq .Lmask52x4(%rip), $_R1, ${_R1}{%k3}
  324. vpsubq .Lmask52x4(%rip), $_R1h, ${_R1h}{%k4}
  325. vpsubq .Lmask52x4(%rip), $_R2, ${_R2}{%k5}
  326. vpsubq .Lmask52x4(%rip), $_R2h, ${_R2h}{%k6}
  327. vpsubq .Lmask52x4(%rip), $_R3, ${_R3}{%k7}
  328. vpandq .Lmask52x4(%rip), $_R0, $_R0
  329. vpandq .Lmask52x4(%rip), $_R0h, $_R0h
  330. vpandq .Lmask52x4(%rip), $_R1, $_R1
  331. vpandq .Lmask52x4(%rip), $_R1h, $_R1h
  332. vpandq .Lmask52x4(%rip), $_R2, $_R2
  333. vpandq .Lmask52x4(%rip), $_R2h, $_R2h
  334. vpandq .Lmask52x4(%rip), $_R3, $_R3
  335. shr \$4,%r11b
  336. kmovb %r11d,%k1
  337. kmovb %r10d,%k2
  338. shr \$4,%r10b
  339. kmovb %r10d,%k3
  340. vpsubq .Lmask52x4(%rip), $_R3h, ${_R3h}{%k1}
  341. vpsubq .Lmask52x4(%rip), $_R4, ${_R4}{%k2}
  342. vpsubq .Lmask52x4(%rip), $_R4h, ${_R4h}{%k3}
  343. vpandq .Lmask52x4(%rip), $_R3h, $_R3h
  344. vpandq .Lmask52x4(%rip), $_R4, $_R4
  345. vpandq .Lmask52x4(%rip), $_R4h, $_R4h
  346. ___
  347. }
  348. $code.=<<___;
  349. .text
  350. .globl ossl_rsaz_amm52x40_x1_ifma256
  351. .type ossl_rsaz_amm52x40_x1_ifma256,\@function,5
  352. .align 32
  353. ossl_rsaz_amm52x40_x1_ifma256:
  354. .cfi_startproc
  355. endbranch
  356. push %rbx
  357. .cfi_push %rbx
  358. push %rbp
  359. .cfi_push %rbp
  360. push %r12
  361. .cfi_push %r12
  362. push %r13
  363. .cfi_push %r13
  364. push %r14
  365. .cfi_push %r14
  366. push %r15
  367. .cfi_push %r15
  368. ___
  369. $code.=<<___ if ($win64);
  370. lea -168(%rsp),%rsp # 16*10 + (8 bytes to get correct 16-byte SIMD alignment)
  371. vmovdqa64 %xmm6, `0*16`(%rsp) # save non-volatile registers
  372. vmovdqa64 %xmm7, `1*16`(%rsp)
  373. vmovdqa64 %xmm8, `2*16`(%rsp)
  374. vmovdqa64 %xmm9, `3*16`(%rsp)
  375. vmovdqa64 %xmm10,`4*16`(%rsp)
  376. vmovdqa64 %xmm11,`5*16`(%rsp)
  377. vmovdqa64 %xmm12,`6*16`(%rsp)
  378. vmovdqa64 %xmm13,`7*16`(%rsp)
  379. vmovdqa64 %xmm14,`8*16`(%rsp)
  380. vmovdqa64 %xmm15,`9*16`(%rsp)
  381. .Lossl_rsaz_amm52x40_x1_ifma256_body:
  382. ___
  383. $code.=<<___;
  384. # Zeroing accumulators
  385. vpxord $zero, $zero, $zero
  386. vmovdqa64 $zero, $R0_0
  387. vmovdqa64 $zero, $R0_0h
  388. vmovdqa64 $zero, $R1_0
  389. vmovdqa64 $zero, $R1_0h
  390. vmovdqa64 $zero, $R2_0
  391. vmovdqa64 $zero, $R2_0h
  392. vmovdqa64 $zero, $R3_0
  393. vmovdqa64 $zero, $R3_0h
  394. vmovdqa64 $zero, $R4_0
  395. vmovdqa64 $zero, $R4_0h
  396. xorl $acc0_0_low, $acc0_0_low
  397. movq $b, $b_ptr # backup address of b
  398. movq \$0xfffffffffffff, $mask52 # 52-bit mask
  399. # Loop over 40 digits unrolled by 4
  400. mov \$10, $iter
  401. .align 32
  402. .Lloop10:
  403. ___
  404. foreach my $idx (0..3) {
  405. &amm52x40_x1(0,8*$idx,$acc0_0,$R0_0,$R0_0h,$R1_0,$R1_0h,$R2_0,$R2_0h,$R3_0,$R3_0h,$R4_0,$R4_0h,$k0);
  406. }
  407. $code.=<<___;
  408. lea `4*8`($b_ptr), $b_ptr
  409. dec $iter
  410. jne .Lloop10
  411. ___
  412. &amm52x40_x1_norm($acc0_0,$R0_0,$R0_0h,$R1_0,$R1_0h,$R2_0,$R2_0h,$R3_0,$R3_0h,$R4_0,$R4_0h);
  413. $code.=<<___;
  414. vmovdqu64 $R0_0, `0*32`($res)
  415. vmovdqu64 $R0_0h, `1*32`($res)
  416. vmovdqu64 $R1_0, `2*32`($res)
  417. vmovdqu64 $R1_0h, `3*32`($res)
  418. vmovdqu64 $R2_0, `4*32`($res)
  419. vmovdqu64 $R2_0h, `5*32`($res)
  420. vmovdqu64 $R3_0, `6*32`($res)
  421. vmovdqu64 $R3_0h, `7*32`($res)
  422. vmovdqu64 $R4_0, `8*32`($res)
  423. vmovdqu64 $R4_0h, `9*32`($res)
  424. vzeroupper
  425. lea (%rsp),%rax
  426. .cfi_def_cfa_register %rax
  427. ___
  428. $code.=<<___ if ($win64);
  429. vmovdqa64 `0*16`(%rax),%xmm6
  430. vmovdqa64 `1*16`(%rax),%xmm7
  431. vmovdqa64 `2*16`(%rax),%xmm8
  432. vmovdqa64 `3*16`(%rax),%xmm9
  433. vmovdqa64 `4*16`(%rax),%xmm10
  434. vmovdqa64 `5*16`(%rax),%xmm11
  435. vmovdqa64 `6*16`(%rax),%xmm12
  436. vmovdqa64 `7*16`(%rax),%xmm13
  437. vmovdqa64 `8*16`(%rax),%xmm14
  438. vmovdqa64 `9*16`(%rax),%xmm15
  439. lea 168(%rsp),%rax
  440. ___
  441. $code.=<<___;
  442. mov 0(%rax),%r15
  443. .cfi_restore %r15
  444. mov 8(%rax),%r14
  445. .cfi_restore %r14
  446. mov 16(%rax),%r13
  447. .cfi_restore %r13
  448. mov 24(%rax),%r12
  449. .cfi_restore %r12
  450. mov 32(%rax),%rbp
  451. .cfi_restore %rbp
  452. mov 40(%rax),%rbx
  453. .cfi_restore %rbx
  454. lea 48(%rax),%rsp # restore rsp
  455. .cfi_def_cfa %rsp,8
  456. .Lossl_rsaz_amm52x40_x1_ifma256_epilogue:
  457. ret
  458. .cfi_endproc
  459. .size ossl_rsaz_amm52x40_x1_ifma256, .-ossl_rsaz_amm52x40_x1_ifma256
  460. ___
  461. $code.=<<___;
  462. .data
  463. .align 32
  464. .Lmask52x4:
  465. .quad 0xfffffffffffff
  466. .quad 0xfffffffffffff
  467. .quad 0xfffffffffffff
  468. .quad 0xfffffffffffff
  469. ___
  470. ###############################################################################
  471. # Dual Almost Montgomery Multiplication for 40-digit number in radix 2^52
  472. #
  473. # See description of ossl_rsaz_amm52x40_x1_ifma256() above for details about Almost
  474. # Montgomery Multiplication algorithm and function input parameters description.
  475. #
  476. # This function does two AMMs for two independent inputs, hence dual.
  477. #
  478. # void ossl_rsaz_amm52x40_x2_ifma256(BN_ULONG out[2][40],
  479. # const BN_ULONG a[2][40],
  480. # const BN_ULONG b[2][40],
  481. # const BN_ULONG m[2][40],
  482. # const BN_ULONG k0[2]);
  483. ###############################################################################
  484. $code.=<<___;
  485. .text
  486. .globl ossl_rsaz_amm52x40_x2_ifma256
  487. .type ossl_rsaz_amm52x40_x2_ifma256,\@function,5
  488. .align 32
  489. ossl_rsaz_amm52x40_x2_ifma256:
  490. .cfi_startproc
  491. endbranch
  492. push %rbx
  493. .cfi_push %rbx
  494. push %rbp
  495. .cfi_push %rbp
  496. push %r12
  497. .cfi_push %r12
  498. push %r13
  499. .cfi_push %r13
  500. push %r14
  501. .cfi_push %r14
  502. push %r15
  503. .cfi_push %r15
  504. ___
  505. $code.=<<___ if ($win64);
  506. lea -168(%rsp),%rsp
  507. vmovdqa64 %xmm6, `0*16`(%rsp) # save non-volatile registers
  508. vmovdqa64 %xmm7, `1*16`(%rsp)
  509. vmovdqa64 %xmm8, `2*16`(%rsp)
  510. vmovdqa64 %xmm9, `3*16`(%rsp)
  511. vmovdqa64 %xmm10,`4*16`(%rsp)
  512. vmovdqa64 %xmm11,`5*16`(%rsp)
  513. vmovdqa64 %xmm12,`6*16`(%rsp)
  514. vmovdqa64 %xmm13,`7*16`(%rsp)
  515. vmovdqa64 %xmm14,`8*16`(%rsp)
  516. vmovdqa64 %xmm15,`9*16`(%rsp)
  517. .Lossl_rsaz_amm52x40_x2_ifma256_body:
  518. ___
  519. $code.=<<___;
  520. # Zeroing accumulators
  521. vpxord $zero, $zero, $zero
  522. vmovdqa64 $zero, $R0_0
  523. vmovdqa64 $zero, $R0_0h
  524. vmovdqa64 $zero, $R1_0
  525. vmovdqa64 $zero, $R1_0h
  526. vmovdqa64 $zero, $R2_0
  527. vmovdqa64 $zero, $R2_0h
  528. vmovdqa64 $zero, $R3_0
  529. vmovdqa64 $zero, $R3_0h
  530. vmovdqa64 $zero, $R4_0
  531. vmovdqa64 $zero, $R4_0h
  532. vmovdqa64 $zero, $R0_1
  533. vmovdqa64 $zero, $R0_1h
  534. vmovdqa64 $zero, $R1_1
  535. vmovdqa64 $zero, $R1_1h
  536. vmovdqa64 $zero, $R2_1
  537. vmovdqa64 $zero, $R2_1h
  538. vmovdqa64 $zero, $R3_1
  539. vmovdqa64 $zero, $R3_1h
  540. vmovdqa64 $zero, $R4_1
  541. vmovdqa64 $zero, $R4_1h
  542. xorl $acc0_0_low, $acc0_0_low
  543. xorl $acc0_1_low, $acc0_1_low
  544. movq $b, $b_ptr # backup address of b
  545. movq \$0xfffffffffffff, $mask52 # 52-bit mask
  546. mov \$40, $iter
  547. .align 32
  548. .Lloop40:
  549. ___
  550. &amm52x40_x1( 0, 0,$acc0_0,$R0_0,$R0_0h,$R1_0,$R1_0h,$R2_0,$R2_0h,$R3_0,$R3_0h,$R4_0,$R4_0h,"($k0)");
  551. # 40*8 = offset of the next dimension in two-dimension array
  552. &amm52x40_x1(40*8,40*8,$acc0_1,$R0_1,$R0_1h,$R1_1,$R1_1h,$R2_1,$R2_1h,$R3_1,$R3_1h,$R4_1,$R4_1h,"8($k0)");
  553. $code.=<<___;
  554. lea 8($b_ptr), $b_ptr
  555. dec $iter
  556. jne .Lloop40
  557. ___
  558. &amm52x40_x1_norm($acc0_0,$R0_0,$R0_0h,$R1_0,$R1_0h,$R2_0,$R2_0h,$R3_0,$R3_0h,$R4_0,$R4_0h);
  559. &amm52x40_x1_norm($acc0_1,$R0_1,$R0_1h,$R1_1,$R1_1h,$R2_1,$R2_1h,$R3_1,$R3_1h,$R4_1,$R4_1h);
  560. $code.=<<___;
  561. vmovdqu64 $R0_0, `0*32`($res)
  562. vmovdqu64 $R0_0h, `1*32`($res)
  563. vmovdqu64 $R1_0, `2*32`($res)
  564. vmovdqu64 $R1_0h, `3*32`($res)
  565. vmovdqu64 $R2_0, `4*32`($res)
  566. vmovdqu64 $R2_0h, `5*32`($res)
  567. vmovdqu64 $R3_0, `6*32`($res)
  568. vmovdqu64 $R3_0h, `7*32`($res)
  569. vmovdqu64 $R4_0, `8*32`($res)
  570. vmovdqu64 $R4_0h, `9*32`($res)
  571. vmovdqu64 $R0_1, `10*32`($res)
  572. vmovdqu64 $R0_1h, `11*32`($res)
  573. vmovdqu64 $R1_1, `12*32`($res)
  574. vmovdqu64 $R1_1h, `13*32`($res)
  575. vmovdqu64 $R2_1, `14*32`($res)
  576. vmovdqu64 $R2_1h, `15*32`($res)
  577. vmovdqu64 $R3_1, `16*32`($res)
  578. vmovdqu64 $R3_1h, `17*32`($res)
  579. vmovdqu64 $R4_1, `18*32`($res)
  580. vmovdqu64 $R4_1h, `19*32`($res)
  581. vzeroupper
  582. lea (%rsp),%rax
  583. .cfi_def_cfa_register %rax
  584. ___
  585. $code.=<<___ if ($win64);
  586. vmovdqa64 `0*16`(%rax),%xmm6
  587. vmovdqa64 `1*16`(%rax),%xmm7
  588. vmovdqa64 `2*16`(%rax),%xmm8
  589. vmovdqa64 `3*16`(%rax),%xmm9
  590. vmovdqa64 `4*16`(%rax),%xmm10
  591. vmovdqa64 `5*16`(%rax),%xmm11
  592. vmovdqa64 `6*16`(%rax),%xmm12
  593. vmovdqa64 `7*16`(%rax),%xmm13
  594. vmovdqa64 `8*16`(%rax),%xmm14
  595. vmovdqa64 `9*16`(%rax),%xmm15
  596. lea 168(%rsp),%rax
  597. ___
  598. $code.=<<___;
  599. mov 0(%rax),%r15
  600. .cfi_restore %r15
  601. mov 8(%rax),%r14
  602. .cfi_restore %r14
  603. mov 16(%rax),%r13
  604. .cfi_restore %r13
  605. mov 24(%rax),%r12
  606. .cfi_restore %r12
  607. mov 32(%rax),%rbp
  608. .cfi_restore %rbp
  609. mov 40(%rax),%rbx
  610. .cfi_restore %rbx
  611. lea 48(%rax),%rsp
  612. .cfi_def_cfa %rsp,8
  613. .Lossl_rsaz_amm52x40_x2_ifma256_epilogue:
  614. ret
  615. .cfi_endproc
  616. .size ossl_rsaz_amm52x40_x2_ifma256, .-ossl_rsaz_amm52x40_x2_ifma256
  617. ___
  618. }
  619. ###############################################################################
  620. # Constant time extraction from the precomputed table of powers base^i, where
  621. # i = 0..2^EXP_WIN_SIZE-1
  622. #
  623. # The input |red_table| contains precomputations for two independent base values.
  624. # |red_table_idx1| and |red_table_idx2| are corresponding power indexes.
  625. #
  626. # Extracted value (output) is 2 40 digits numbers in 2^52 radix.
  627. #
  628. # void ossl_extract_multiplier_2x40_win5(BN_ULONG *red_Y,
  629. # const BN_ULONG red_table[1 << EXP_WIN_SIZE][2][40],
  630. # int red_table_idx1, int red_table_idx2);
  631. #
  632. # EXP_WIN_SIZE = 5
  633. ###############################################################################
  634. {
  635. # input parameters
  636. my ($out,$red_tbl,$red_tbl_idx1,$red_tbl_idx2)=$win64 ? ("%rcx","%rdx","%r8", "%r9") : # Win64 order
  637. ("%rdi","%rsi","%rdx","%rcx"); # Unix order
  638. my ($t0,$t1,$t2,$t3,$t4,$t5) = map("%ymm$_", (0..5));
  639. my ($t6,$t7,$t8,$t9) = map("%ymm$_", (16..19));
  640. my ($tmp,$cur_idx,$idx1,$idx2,$ones) = map("%ymm$_", (20..24));
  641. my @t = ($t0,$t1,$t2,$t3,$t4,$t5,$t6,$t7,$t8,$t9);
  642. my $t0xmm = $t0;
  643. $t0xmm =~ s/%y/%x/;
  644. sub get_table_value_consttime() {
  645. my ($_idx,$_offset) = @_;
  646. $code.=<<___;
  647. vpxorq $cur_idx, $cur_idx, $cur_idx
  648. .align 32
  649. .Lloop_$_offset:
  650. vpcmpq \$0, $cur_idx, $_idx, %k1 # mask of (idx == cur_idx)
  651. ___
  652. foreach (0..9) {
  653. $code.=<<___;
  654. vmovdqu64 `$_offset+${_}*32`($red_tbl), $tmp # load data from red_tbl
  655. vpblendmq $tmp, $t[$_], ${t[$_]}{%k1} # extract data when mask is not zero
  656. ___
  657. }
  658. $code.=<<___;
  659. vpaddq $ones, $cur_idx, $cur_idx # increment cur_idx
  660. addq \$`2*40*8`, $red_tbl
  661. cmpq $red_tbl, %rax
  662. jne .Lloop_$_offset
  663. ___
  664. }
  665. $code.=<<___;
  666. .text
  667. .align 32
  668. .globl ossl_extract_multiplier_2x40_win5
  669. .type ossl_extract_multiplier_2x40_win5,\@abi-omnipotent
  670. ossl_extract_multiplier_2x40_win5:
  671. .cfi_startproc
  672. endbranch
  673. vmovdqa64 .Lones(%rip), $ones # broadcast ones
  674. vpbroadcastq $red_tbl_idx1, $idx1
  675. vpbroadcastq $red_tbl_idx2, $idx2
  676. leaq `(1<<5)*2*40*8`($red_tbl), %rax # holds end of the tbl
  677. # backup red_tbl address
  678. movq $red_tbl, %r10
  679. # zeroing t0..n, cur_idx
  680. vpxor $t0xmm, $t0xmm, $t0xmm
  681. ___
  682. foreach (1..9) {
  683. $code.="vmovdqa64 $t0, $t[$_] \n";
  684. }
  685. &get_table_value_consttime($idx1, 0);
  686. foreach (0..9) {
  687. $code.="vmovdqu64 $t[$_], `(0+$_)*32`($out) \n";
  688. }
  689. $code.="movq %r10, $red_tbl \n";
  690. &get_table_value_consttime($idx2, 40*8);
  691. foreach (0..9) {
  692. $code.="vmovdqu64 $t[$_], `(10+$_)*32`($out) \n";
  693. }
  694. $code.=<<___;
  695. ret
  696. .cfi_endproc
  697. .size ossl_extract_multiplier_2x40_win5, .-ossl_extract_multiplier_2x40_win5
  698. ___
  699. $code.=<<___;
  700. .data
  701. .align 32
  702. .Lones:
  703. .quad 1,1,1,1
  704. .Lzeros:
  705. .quad 0,0,0,0
  706. ___
  707. }
  708. if ($win64) {
  709. $rec="%rcx";
  710. $frame="%rdx";
  711. $context="%r8";
  712. $disp="%r9";
  713. $code.=<<___;
  714. .extern __imp_RtlVirtualUnwind
  715. .type rsaz_avx_handler,\@abi-omnipotent
  716. .align 16
  717. rsaz_avx_handler:
  718. push %rsi
  719. push %rdi
  720. push %rbx
  721. push %rbp
  722. push %r12
  723. push %r13
  724. push %r14
  725. push %r15
  726. pushfq
  727. sub \$64,%rsp
  728. mov 120($context),%rax # pull context->Rax
  729. mov 248($context),%rbx # pull context->Rip
  730. mov 8($disp),%rsi # disp->ImageBase
  731. mov 56($disp),%r11 # disp->HandlerData
  732. mov 0(%r11),%r10d # HandlerData[0]
  733. lea (%rsi,%r10),%r10 # prologue label
  734. cmp %r10,%rbx # context->Rip<.Lprologue
  735. jb .Lcommon_seh_tail
  736. mov 4(%r11),%r10d # HandlerData[1]
  737. lea (%rsi,%r10),%r10 # epilogue label
  738. cmp %r10,%rbx # context->Rip>=.Lepilogue
  739. jae .Lcommon_seh_tail
  740. mov 152($context),%rax # pull context->Rsp
  741. lea (%rax),%rsi # %xmm save area
  742. lea 512($context),%rdi # & context.Xmm6
  743. mov \$20,%ecx # 10*sizeof(%xmm0)/sizeof(%rax)
  744. .long 0xa548f3fc # cld; rep movsq
  745. lea `48+168`(%rax),%rax
  746. mov -8(%rax),%rbx
  747. mov -16(%rax),%rbp
  748. mov -24(%rax),%r12
  749. mov -32(%rax),%r13
  750. mov -40(%rax),%r14
  751. mov -48(%rax),%r15
  752. mov %rbx,144($context) # restore context->Rbx
  753. mov %rbp,160($context) # restore context->Rbp
  754. mov %r12,216($context) # restore context->R12
  755. mov %r13,224($context) # restore context->R13
  756. mov %r14,232($context) # restore context->R14
  757. mov %r15,240($context) # restore context->R14
  758. .Lcommon_seh_tail:
  759. mov 8(%rax),%rdi
  760. mov 16(%rax),%rsi
  761. mov %rax,152($context) # restore context->Rsp
  762. mov %rsi,168($context) # restore context->Rsi
  763. mov %rdi,176($context) # restore context->Rdi
  764. mov 40($disp),%rdi # disp->ContextRecord
  765. mov $context,%rsi # context
  766. mov \$154,%ecx # sizeof(CONTEXT)
  767. .long 0xa548f3fc # cld; rep movsq
  768. mov $disp,%rsi
  769. xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
  770. mov 8(%rsi),%rdx # arg2, disp->ImageBase
  771. mov 0(%rsi),%r8 # arg3, disp->ControlPc
  772. mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
  773. mov 40(%rsi),%r10 # disp->ContextRecord
  774. lea 56(%rsi),%r11 # &disp->HandlerData
  775. lea 24(%rsi),%r12 # &disp->EstablisherFrame
  776. mov %r10,32(%rsp) # arg5
  777. mov %r11,40(%rsp) # arg6
  778. mov %r12,48(%rsp) # arg7
  779. mov %rcx,56(%rsp) # arg8, (NULL)
  780. call *__imp_RtlVirtualUnwind(%rip)
  781. mov \$1,%eax # ExceptionContinueSearch
  782. add \$64,%rsp
  783. popfq
  784. pop %r15
  785. pop %r14
  786. pop %r13
  787. pop %r12
  788. pop %rbp
  789. pop %rbx
  790. pop %rdi
  791. pop %rsi
  792. ret
  793. .size rsaz_avx_handler,.-rsaz_avx_handler
  794. .section .pdata
  795. .align 4
  796. .rva .LSEH_begin_ossl_rsaz_amm52x40_x1_ifma256
  797. .rva .LSEH_end_ossl_rsaz_amm52x40_x1_ifma256
  798. .rva .LSEH_info_ossl_rsaz_amm52x40_x1_ifma256
  799. .rva .LSEH_begin_ossl_rsaz_amm52x40_x2_ifma256
  800. .rva .LSEH_end_ossl_rsaz_amm52x40_x2_ifma256
  801. .rva .LSEH_info_ossl_rsaz_amm52x40_x2_ifma256
  802. .section .xdata
  803. .align 8
  804. .LSEH_info_ossl_rsaz_amm52x40_x1_ifma256:
  805. .byte 9,0,0,0
  806. .rva rsaz_avx_handler
  807. .rva .Lossl_rsaz_amm52x40_x1_ifma256_body,.Lossl_rsaz_amm52x40_x1_ifma256_epilogue
  808. .LSEH_info_ossl_rsaz_amm52x40_x2_ifma256:
  809. .byte 9,0,0,0
  810. .rva rsaz_avx_handler
  811. .rva .Lossl_rsaz_amm52x40_x2_ifma256_body,.Lossl_rsaz_amm52x40_x2_ifma256_epilogue
  812. ___
  813. }
  814. }}} else {{{ # fallback for old assembler
  815. $code.=<<___;
  816. .text
  817. .globl ossl_rsaz_amm52x40_x1_ifma256
  818. .globl ossl_rsaz_amm52x40_x2_ifma256
  819. .globl ossl_extract_multiplier_2x40_win5
  820. .type ossl_rsaz_amm52x40_x1_ifma256,\@abi-omnipotent
  821. ossl_rsaz_amm52x40_x1_ifma256:
  822. ossl_rsaz_amm52x40_x2_ifma256:
  823. ossl_extract_multiplier_2x40_win5:
  824. .byte 0x0f,0x0b # ud2
  825. ret
  826. .size ossl_rsaz_amm52x40_x1_ifma256, .-ossl_rsaz_amm52x40_x1_ifma256
  827. ___
  828. }}}
  829. $code =~ s/\`([^\`]*)\`/eval $1/gem;
  830. print $code;
  831. close STDOUT or die "error closing STDOUT: $!";