Browse Source

Plan 9 from Bell Labs 2007-05-12

David du Colombier 14 years ago
parent
commit
19a1ce130b

+ 50 - 24
dist/replica/_plan9.db

@@ -53,7 +53,7 @@
 386/bin/auth/debug - 775 sys sys 1168402268 101566
 386/bin/auth/disable - 775 sys sys 1020319057 146
 386/bin/auth/enable - 775 sys sys 1020319057 134
-386/bin/auth/factotum - 775 sys sys 1178568247 321180
+386/bin/auth/factotum - 775 sys sys 1178853707 321175
 386/bin/auth/fgui - 775 sys sys 1176520475 218973
 386/bin/auth/guard.srv - 775 sys sys 1178568248 143650
 386/bin/auth/iam - 775 sys sys 1085076981 50791
@@ -194,7 +194,7 @@
 386/bin/crop - 775 sys sys 1168402298 116374
 386/bin/cwfs - 775 sys sys 1178568265 365217
 386/bin/date - 775 sys sys 1178568265 41845
-386/bin/db - 775 sys sys 1172203054 346003
+386/bin/db - 775 sys sys 1178908092 345933
 386/bin/dc - 775 sys sys 1168402299 99260
 386/bin/dd - 775 sys sys 1159039156 45991
 386/bin/deroff - 775 sys sys 1168402299 74474
@@ -440,7 +440,7 @@
 386/bin/tprof - 775 sys sys 1172203056 297762
 386/bin/tr - 775 sys sys 1168402355 62088
 386/bin/trace - 775 sys sys 1178568308 180414
-386/bin/troff - 775 sys sys 1176520503 360243
+386/bin/troff - 775 sys sys 1178853709 361158
 386/bin/troff2html - 775 sys sys 1178568308 84524
 386/bin/tweak - 775 sys sys 1168402356 193256
 386/bin/unicode - 775 sys sys 1168402356 62747
@@ -482,7 +482,7 @@
 386/bin/usb - 20000000775 sys sys 1019538890 0
 386/bin/usb/usbaudio - 775 sys sys 1178568318 188012
 386/bin/usb/usbd - 775 sys sys 1176520513 130769
-386/bin/usb/usbmouse - 775 sys sys 1176520514 109605
+386/bin/usb/usbmouse - 775 sys sys 1178853709 109673
 386/bin/usb/usbprinter - 775 sys sys 1089408719 222
 386/bin/vac - 775 sys sys 1178568318 169885
 386/bin/vacfs - 775 sys sys 1178568319 174693
@@ -563,7 +563,7 @@
 386/lib/libhttpd.a - 664 sys sys 1177283321 99734
 386/lib/libip.a - 664 sys sys 1178826954 34710
 386/lib/libl.a - 664 sys sys 1168402367 5372
-386/lib/libmach.a - 664 sys sys 1173410637 785440
+386/lib/libmach.a - 664 sys sys 1178892112 809418
 386/lib/libmemdraw.a - 664 sys sys 1168402369 284092
 386/lib/libmemlayer.a - 664 sys sys 1168402369 47360
 386/lib/libmp.a - 664 sys sys 1176520528 79978
@@ -884,7 +884,7 @@ dist/replica - 20000000775 sys sys 1166743907 0
 dist/replica/cd - 664 sys sys 1149084099 922
 dist/replica/kfs - 664 sys sys 1019527929 237
 dist/replica/network - 775 sys sys 1139499513 956
-dist/replica/plan9.proto - 664 sys sys 1177628403 2840
+dist/replica/plan9.proto - 664 sys sys 1178910941 2871
 env - 20000000775 sys sys 1104813586 0
 fd - 20000000775 sys sys 1020896384 0
 lib - 20000000775 sys sys 1161442421 0
@@ -5442,6 +5442,13 @@ power/include/ureg.h - 664 sys sys 1032057837 997
 power/lib - 20000000775 sys sys 1039727909 0
 power/lib/ape - 20000000775 sys sys 1020896376 0
 power/mkfile - 664 sys sys 948141304 46
+power64 - 20000000775 sys sys 1178892028 0
+power64/bin - 20000000775 sys sys 1178891955 0
+power64/include - 20000000775 sys sys 1178892069 0
+power64/include/u.h - 664 sys sys 1178892069 2886
+power64/include/ureg.h - 664 sys sys 1178892069 915
+power64/lib - 20000000775 sys sys 1178891973 0
+power64/mkfile - 664 sys sys 1178892028 46
 rc - 20000000775 sys sys 1039727911 0
 rc/bin - 20000000775 sys sys 1158798931 0
 rc/bin/0a - 775 sys sys 1143293821 24
@@ -5985,7 +5992,7 @@ sys/games/lib/sudoku/images/9.bit - 664 sys sys 1117226542 537
 sys/include - 20000000775 sys sys 1072904891 0
 sys/include/9p.h - 664 sys sys 1134337548 4759
 sys/include/String.h - 664 sys sys 1091904425 1319
-sys/include/a.out.h - 664 sys sys 1148106925 1418
+sys/include/a.out.h - 664 sys sys 1178892101 1473
 sys/include/ape - 20000000775 sys sys 1070327361 0
 sys/include/ape/Plan9libnet.h - 664 sys sys 944948760 487
 sys/include/ape/ar.h - 664 sys sys 944948759 354
@@ -6072,7 +6079,7 @@ sys/include/ip.h - 664 sys sys 1178768502 2597
 sys/include/keyboard.h - 664 sys sys 1131637696 865
 sys/include/libc.h - 664 sys sys 1168306860 19851
 sys/include/libsec.h - 664 sys sys 1124709121 9345
-sys/include/mach.h - 664 sys sys 1143814376 8641
+sys/include/mach.h - 664 sys sys 1178892102 8758
 sys/include/memdraw.h - 664 sys sys 1091904419 5645
 sys/include/memlayer.h - 664 sys sys 1051031022 1851
 sys/include/mouse.h - 664 sys sys 1035232010 1003
@@ -8036,6 +8043,7 @@ sys/src/9/pc/ether8139.c - 664 sys sys 1175019929 18584
 sys/src/9/pc/ether8169.c - 664 sys sys 1172259757 25466
 sys/src/9/pc/ether82543gc.c - 664 sys sys 1131290377 32294
 sys/src/9/pc/ether82557.c - 664 sys sys 1153082663 30197
+sys/src/9/pc/ether82563.c - 664 sys sys 1178932992 32729
 sys/src/9/pc/ether83815.c - 664 sys sys 1172259521 26346
 sys/src/9/pc/ether8390.c - 664 sys sys 1131290377 17702
 sys/src/9/pc/ether8390.h - 664 sys sys 1015014517 1511
@@ -8150,7 +8158,7 @@ sys/src/9/port/debugalloc.c - 664 sys sys 1014931171 10402
 sys/src/9/port/dev.c - 664 sys sys 1146151714 8177
 sys/src/9/port/devaudio.c - 664 sys sys 1170456648 21199
 sys/src/9/port/devbridge.c - 664 sys sys 1055688301 24308
-sys/src/9/port/devcap.c - 664 sys sys 1178320320 4160
+sys/src/9/port/devcap.c - 664 sys sys 1178886040 4141
 sys/src/9/port/devcons.c - 664 sys sys 1176658321 22943
 sys/src/9/port/devdraw.c - 664 sys sys 1147023550 44447
 sys/src/9/port/devdup.c - 664 sys sys 1014931172 2332
@@ -9097,7 +9105,7 @@ sys/src/boot/pc/dosboot.c - 664 sys sys 1097716791 11240
 sys/src/boot/pc/dosfs.h - 664 sys sys 1032215924 1467
 sys/src/boot/pc/eoffs - 664 sys sys 1015007950 0
 sys/src/boot/pc/error.h - 664 sys sys 1015007950 3081
-sys/src/boot/pc/ether.c - 664 sys sys 1174077249 5326
+sys/src/boot/pc/ether.c - 664 sys sys 1178926685 5380
 sys/src/boot/pc/ether2000.c - 664 sys sys 1015007950 2609
 sys/src/boot/pc/ether2114x.c - 664 sys sys 1144977462 38028
 sys/src/boot/pc/ether589.c - 664 sys sys 1144961189 4624
@@ -9106,9 +9114,11 @@ sys/src/boot/pc/ether8003.c - 664 sys sys 1015007950 6446
 sys/src/boot/pc/ether8139.c - 664 sys sys 1121393459 14823
 sys/src/boot/pc/ether8169.c - 664 sys sys 1156429147 21582
 sys/src/boot/pc/ether82557.c - 664 sys sys 1140802406 19090
+sys/src/boot/pc/ether82563.c - 664 sys sys 1178926666 24957
 sys/src/boot/pc/ether83815.c - 664 sys sys 1144961190 21993
 sys/src/boot/pc/ether8390.c - 664 sys sys 1112382847 16209
 sys/src/boot/pc/ether8390.h - 664 sys sys 1015007951 1392
+sys/src/boot/pc/etherdp83820.c - 664 sys sys 1178926667 28729
 sys/src/boot/pc/etherec2t.c - 664 sys sys 1015007951 3598
 sys/src/boot/pc/etherelnk3.c - 664 sys sys 1158012439 44736
 sys/src/boot/pc/etherelnk3x.c - 664 sys sys 1015007951 24989
@@ -9135,7 +9145,7 @@ sys/src/boot/pc/load.c - 664 sys sys 1175289729 9410
 sys/src/boot/pc/mbr.s - 664 sys sys 1015007953 6234
 sys/src/boot/pc/mem.h - 664 sys sys 1130887225 3371
 sys/src/boot/pc/memory.c - 664 sys sys 1019533021 10272
-sys/src/boot/pc/mkfile - 664 sys sys 1174077157 3132
+sys/src/boot/pc/mkfile - 664 sys sys 1178926615 3166
 sys/src/boot/pc/noether.c - 664 sys sys 1094674488 358
 sys/src/boot/pc/part.c - 664 sys sys 1114697151 7153
 sys/src/boot/pc/pbs.s - 664 sys sys 1143465387 8291
@@ -14524,14 +14534,14 @@ sys/src/fs/fs/dat.h - 664 sys sys 1140168010 611
 sys/src/fs/fs/fns.h - 664 sys sys 1172679929 2168
 sys/src/fs/fs/io.h - 664 sys sys 1157939329 6720
 sys/src/fs/fs/mem.h - 664 sys sys 1140168013 2909
-sys/src/fs/fs/mkfile - 664 sys sys 1157939040 1692
+sys/src/fs/fs/mkfile - 664 sys sys 1178933399 1708
 sys/src/fs/fs64 - 20000000775 sys sys 1157943044 0
 sys/src/fs/fs64/9fsfs64.c - 664 sys sys 1151399221 3612
 sys/src/fs/fs64/dat.h - 664 sys sys 1140168005 611
 sys/src/fs/fs64/fns.h - 664 sys sys 1172679929 2330
 sys/src/fs/fs64/io.h - 664 sys sys 1157939329 6720
 sys/src/fs/fs64/mem.h - 664 sys sys 1151398965 3041
-sys/src/fs/fs64/mkfile - 664 sys sys 1157938677 1632
+sys/src/fs/fs64/mkfile - 664 sys sys 1178933399 1648
 sys/src/fs/ip - 20000000775 sys sys 1140167931 0
 sys/src/fs/ip/arp.c - 664 sys sys 1097578954 8696
 sys/src/fs/ip/icmp.c - 664 sys sys 1015109981 991
@@ -14556,6 +14566,7 @@ sys/src/fs/pc/ether2114x.c - 664 sys sys 1015110044 31874
 sys/src/fs/pc/ether8139.c - 664 sys sys 1086569718 18552
 sys/src/fs/pc/ether8169.c - 664 sys sys 1157939501 25385
 sys/src/fs/pc/ether82557.c - 664 sys sys 1154067789 30710
+sys/src/fs/pc/ether82563.c - 664 sys sys 1178933417 26994
 sys/src/fs/pc/ether83815.c - 664 sys sys 1140335463 26764
 sys/src/fs/pc/ether83815.mii.c - 664 sys sys 1049156663 31622
 sys/src/fs/pc/etherdat.h - 664 sys sys 1157938367 72
@@ -14563,7 +14574,7 @@ sys/src/fs/pc/etherdp83820.c - 664 sys sys 1146355081 32045
 sys/src/fs/pc/etherelnk3.c - 664 sys sys 1015110054 42732
 sys/src/fs/pc/etherga620.c - 664 sys sys 1146785153 24748
 sys/src/fs/pc/etherga620fw.h - 664 sys sys 1032126775 222295
-sys/src/fs/pc/etherif.c - 664 sys sys 1157938488 6605
+sys/src/fs/pc/etherif.c - 664 sys sys 1178933411 6667
 sys/src/fs/pc/etherif.h - 664 sys sys 1015110057 730
 sys/src/fs/pc/etherigbe.c - 664 sys sys 1141208695 46676
 sys/src/fs/pc/etherm10g.c - 664 sys sys 1174594317 25743
@@ -14585,7 +14596,7 @@ sys/src/fs/pc/script.i - 664 sys sys 1015110072 27323
 sys/src/fs/pc/scsi.c - 664 sys sys 1151385561 8701
 sys/src/fs/pc/scsibuslogic.c - 664 sys sys 1015110077 28645
 sys/src/fs/pc/scsincr53c8xx.c - 664 sys sys 1146798658 53619
-sys/src/fs/pc/sdata.c - 664 sys sys 1151726802 64709
+sys/src/fs/pc/sdata.c - 664 sys sys 1178933365 64719
 sys/src/fs/pc/sdmv50xx.c - 664 sys sys 1151486130 39434
 sys/src/fs/pc/sdscsi.c - 664 sys sys 1146786984 7017
 sys/src/fs/pc/toy.c - 664 sys sys 1140167948 2166
@@ -14605,7 +14616,7 @@ sys/src/fs/port/console.c - 664 sys sys 1101627646 4886
 sys/src/fs/port/data.c - 664 sys sys 1140167986 4510
 sys/src/fs/port/dentry.c - 664 sys sys 1098156404 6345
 sys/src/fs/port/devcons.c - 664 sys sys 1157942528 4896
-sys/src/fs/port/devsd.c - 664 sys sys 1174081262 15110
+sys/src/fs/port/devsd.c - 664 sys sys 1178933380 15116
 sys/src/fs/port/fcmd.c - 664 sys sys 1146785267 1255
 sys/src/fs/port/fs.h - 664 sys sys 1140168001 682
 sys/src/fs/port/iobuf.c - 664 sys sys 1140167988 4956
@@ -15400,22 +15411,26 @@ sys/src/libmach/7obj.c - 664 sys sys 1148106912 2425
 sys/src/libmach/8.c - 664 sys sys 1168034569 2071
 sys/src/libmach/8db.c - 664 sys sys 1136322405 50889
 sys/src/libmach/8obj.c - 664 sys sys 1148106912 2258
+sys/src/libmach/9.c - 664 sys sys 1178892114 3625
+sys/src/libmach/9c - 20000000775 sys sys 1178892193 0
+sys/src/libmach/9c/9.out.h - 664 sys sys 1178892193 4669
+sys/src/libmach/9obj.c - 664 sys sys 1178892115 2747
 sys/src/libmach/access.c - 664 sys sys 1131289377 4588
 sys/src/libmach/elf.h - 664 sys sys 1131292881 2301
-sys/src/libmach/executable.c - 664 sys sys 1172172965 16228
+sys/src/libmach/executable.c - 664 sys sys 1178892113 16424
 sys/src/libmach/k.c - 664 sys sys 1138471021 3381
 sys/src/libmach/kdb.c - 664 sys sys 1136322404 21222
 sys/src/libmach/kobj.c - 664 sys sys 1148106912 2275
 sys/src/libmach/machdata.c - 664 sys sys 1131289377 8799
 sys/src/libmach/map.c - 664 sys sys 1131289376 3056
 sys/src/libmach/mips2ureg.h - 664 sys sys 1143821483 886
-sys/src/libmach/mkfile - 664 sys sys 1144151016 482
-sys/src/libmach/obj.c - 664 sys sys 1148106918 5986
+sys/src/libmach/mkfile - 664 sys sys 1178892111 493
+sys/src/libmach/obj.c - 664 sys sys 1178892113 6067
 sys/src/libmach/obj.h - 664 sys sys 1148170078 648
 sys/src/libmach/q.c - 664 sys sys 1158071179 3641
-sys/src/libmach/qdb.c - 664 sys sys 1136322404 27544
+sys/src/libmach/qdb.c - 664 sys sys 1178892114 30360
 sys/src/libmach/qobj.c - 664 sys sys 1148106912 2368
-sys/src/libmach/setmach.c - 664 sys sys 1172172965 2911
+sys/src/libmach/setmach.c - 664 sys sys 1178892113 3016
 sys/src/libmach/swap.c - 664 sys sys 1131289376 1056
 sys/src/libmach/sym.c - 664 sys sys 1138471012 26745
 sys/src/libmach/u.c - 664 sys sys 1138471017 3447
@@ -15816,6 +15831,17 @@ usr/glenda/lib/profile - 664 glenda glenda 1105128663 890
 usr/glenda/readme.acme - 664 glenda glenda 1019860628 4753
 usr/glenda/readme.rio - 664 glenda glenda 1019860628 6370
 usr/glenda/tmp - 20000000775 glenda glenda 1018802620 0
-386/bin/usb/usbmouse - 775 sys sys 1178853709 109673
-386/bin/auth/factotum - 775 sys sys 1178853707 321175
-386/bin/troff - 775 sys sys 1178853709 361158
+386/bin/acid - 775 sys sys 1178939750 405146
+386/bin/ar - 775 sys sys 1178939751 114363
+386/bin/snap - 775 sys sys 1178939753 316147
+386/bin/snapfs - 775 sys sys 1178939754 390312
+386/bin/file - 775 sys sys 1178939751 128125
+386/bin/kprof - 775 sys sys 1178939752 106496
+386/bin/ktrace - 775 sys sys 1178939752 124176
+386/bin/nm - 775 sys sys 1178939752 130155
+386/bin/prof - 775 sys sys 1178939753 111959
+386/bin/size - 775 sys sys 1178939753 79772
+386/bin/strip - 775 sys sys 1178939754 81761
+386/bin/aux/ms2 - 775 sys sys 1178939751 88464
+386/bin/tprof - 775 sys sys 1178939755 300947
+386/lib/libmach.a - 664 sys sys 1178939757 807390

+ 46 - 31
dist/replica/plan9.db

@@ -19,7 +19,7 @@
 386/bin/8l - 775 sys sys 1148500567 115711
 386/bin/9660srv - 775 sys sys 1168402261 104975
 386/bin/aan - 775 sys sys 1178568241 129834
-386/bin/acid - 775 sys sys 1172808055 401961
+386/bin/acid - 775 sys sys 1178939750 405146
 386/bin/acme - 775 sys sys 1178568242 430826
 386/bin/ape - 20000000775 sys sys 1016944144 0
 386/bin/ape/basename - 775 sys sys 1173754547 134719
@@ -38,7 +38,7 @@
 386/bin/ape/tar - 775 sys sys 1168402264 62184
 386/bin/ape/uname - 775 sys sys 1173754552 134895
 386/bin/aquarela - 775 sys sys 1178568243 337616
-386/bin/ar - 775 sys sys 1178568244 112312
+386/bin/ar - 775 sys sys 1178939751 114363
 386/bin/archfs - 775 sys sys 1178568244 146734
 386/bin/ascii - 775 sys sys 1168402265 64884
 386/bin/astro - 775 sys sys 1178568245 137403
@@ -118,7 +118,7 @@
 386/bin/aux/mklatinkbd - 775 sys sys 1168402282 64407
 386/bin/aux/mnihongo - 775 sys sys 1168402283 140020
 386/bin/aux/mouse - 775 sys sys 1148500597 44061
-386/bin/aux/ms2 - 775 sys sys 1172203053 87397
+386/bin/aux/ms2 - 775 sys sys 1178939751 88464
 386/bin/aux/msexceltables - 775 sys sys 1168402283 82921
 386/bin/aux/mswordstrings - 775 sys sys 1168402283 65541
 386/bin/aux/na - 775 sys sys 1168402284 154423
@@ -194,7 +194,7 @@
 386/bin/crop - 775 sys sys 1168402298 116374
 386/bin/cwfs - 775 sys sys 1178568265 365217
 386/bin/date - 775 sys sys 1178568265 41845
-386/bin/db - 775 sys sys 1172203054 346003
+386/bin/db - 775 sys sys 1178908092 345933
 386/bin/dc - 775 sys sys 1168402299 99260
 386/bin/dd - 775 sys sys 1159039156 45991
 386/bin/deroff - 775 sys sys 1168402299 74474
@@ -231,7 +231,7 @@
 386/bin/faces - 775 sys sys 1178568269 193152
 386/bin/factor - 775 sys sys 1168402307 61699
 386/bin/fcp - 775 sys sys 1168402307 82433
-386/bin/file - 775 sys sys 1172203054 125007
+386/bin/file - 775 sys sys 1178939751 128125
 386/bin/fmt - 775 sys sys 1168402307 65567
 386/bin/fortune - 775 sys sys 1168402308 67356
 386/bin/fossil - 20000000775 sys sys 1042005470 0
@@ -320,8 +320,8 @@
 386/bin/join - 775 sys sys 1168402330 114382
 386/bin/jpg - 775 sys sys 1168402330 174923
 386/bin/kbmap - 775 sys sys 1168402330 144015
-386/bin/kprof - 775 sys sys 1172203054 105429
-386/bin/ktrace - 775 sys sys 1172203054 123109
+386/bin/kprof - 775 sys sys 1178939752 106496
+386/bin/ktrace - 775 sys sys 1178939752 124176
 386/bin/lens - 775 sys sys 1168402332 151119
 386/bin/lex - 775 sys sys 1168402332 99261
 386/bin/lnfs - 775 sys sys 1168402333 99675
@@ -354,7 +354,7 @@
 386/bin/netstat - 775 sys sys 1169612032 85184
 386/bin/news - 775 sys sys 1168402341 71956
 386/bin/nfs - 775 sys sys 1178568297 320109
-386/bin/nm - 775 sys sys 1172203055 127037
+386/bin/nm - 775 sys sys 1178939752 130155
 386/bin/nntpfs - 775 sys sys 1178568298 165231
 386/bin/ns - 775 sys sys 1168402343 65492
 386/bin/p - 775 sys sys 1168402343 65220
@@ -372,7 +372,7 @@
 386/bin/ppm - 775 sys sys 1168402345 149765
 386/bin/pr - 775 sys sys 1178568298 76251
 386/bin/primes - 775 sys sys 1172289653 63329
-386/bin/prof - 775 sys sys 1172203055 110892
+386/bin/prof - 775 sys sys 1178939753 111959
 386/bin/proof - 775 sys sys 1176520492 179040
 386/bin/ps - 775 sys sys 1168402346 68812
 386/bin/pwd - 775 sys sys 1148500685 36932
@@ -401,10 +401,10 @@
 386/bin/sed - 775 sys sys 1168402348 89763
 386/bin/seq - 775 sys sys 1162241047 38441
 386/bin/sha1sum - 775 sys sys 1168402348 61366
-386/bin/size - 775 sys sys 1172203055 78705
+386/bin/size - 775 sys sys 1178939753 79772
 386/bin/sleep - 775 sys sys 1158088708 3875
-386/bin/snap - 775 sys sys 1178568301 312892
-386/bin/snapfs - 775 sys sys 1178568302 387057
+386/bin/snap - 775 sys sys 1178939753 316147
+386/bin/snapfs - 775 sys sys 1178939754 390312
 386/bin/sniffer - 775 sys sys 1038443185 99028
 386/bin/snoopy - 775 sys sys 1178568303 185244
 386/bin/sort - 775 sys sys 1178568303 81057
@@ -417,7 +417,7 @@
 386/bin/sshnet - 775 sys sys 1178568305 288132
 386/bin/stats - 775 sys sys 1168402350 190989
 386/bin/strings - 775 sys sys 1168402350 62855
-386/bin/strip - 775 sys sys 1172203055 80694
+386/bin/strip - 775 sys sys 1178939754 81761
 386/bin/sum - 775 sys sys 1148500691 39505
 386/bin/swap - 775 sys sys 1168402350 62373
 386/bin/syscall - 775 sys sys 1178568305 73944
@@ -437,7 +437,7 @@
 386/bin/topng - 775 sys sys 1178568307 137219
 386/bin/toppm - 775 sys sys 1168402354 165616
 386/bin/touch - 775 sys sys 1178568308 62586
-386/bin/tprof - 775 sys sys 1172203056 297762
+386/bin/tprof - 775 sys sys 1178939755 300947
 386/bin/tr - 775 sys sys 1168402355 62088
 386/bin/trace - 775 sys sys 1178568308 180414
 386/bin/troff - 775 sys sys 1178853709 361158
@@ -563,7 +563,7 @@
 386/lib/libhttpd.a - 664 sys sys 1177283321 99734
 386/lib/libip.a - 664 sys sys 1178826954 34710
 386/lib/libl.a - 664 sys sys 1168402367 5372
-386/lib/libmach.a - 664 sys sys 1173410637 785440
+386/lib/libmach.a - 664 sys sys 1178939757 807390
 386/lib/libmemdraw.a - 664 sys sys 1168402369 284092
 386/lib/libmemlayer.a - 664 sys sys 1168402369 47360
 386/lib/libmp.a - 664 sys sys 1176520528 79978
@@ -884,7 +884,7 @@ dist/replica - 20000000775 sys sys 1166743907 0
 dist/replica/cd - 664 sys sys 1149084099 922
 dist/replica/kfs - 664 sys sys 1019527929 237
 dist/replica/network - 775 sys sys 1139499513 956
-dist/replica/plan9.proto - 664 sys sys 1177628403 2840
+dist/replica/plan9.proto - 664 sys sys 1178910941 2871
 env - 20000000775 sys sys 1104813586 0
 fd - 20000000775 sys sys 1020896384 0
 lib - 20000000775 sys sys 1161442421 0
@@ -5442,6 +5442,13 @@ power/include/ureg.h - 664 sys sys 1032057837 997
 power/lib - 20000000775 sys sys 1039727909 0
 power/lib/ape - 20000000775 sys sys 1020896376 0
 power/mkfile - 664 sys sys 948141304 46
+power64 - 20000000775 sys sys 1178892028 0
+power64/bin - 20000000775 sys sys 1178891955 0
+power64/include - 20000000775 sys sys 1178892069 0
+power64/include/u.h - 664 sys sys 1178892069 2886
+power64/include/ureg.h - 664 sys sys 1178892069 915
+power64/lib - 20000000775 sys sys 1178891973 0
+power64/mkfile - 664 sys sys 1178892028 46
 rc - 20000000775 sys sys 1039727911 0
 rc/bin - 20000000775 sys sys 1158798931 0
 rc/bin/0a - 775 sys sys 1143293821 24
@@ -5985,7 +5992,7 @@ sys/games/lib/sudoku/images/9.bit - 664 sys sys 1117226542 537
 sys/include - 20000000775 sys sys 1072904891 0
 sys/include/9p.h - 664 sys sys 1134337548 4759
 sys/include/String.h - 664 sys sys 1091904425 1319
-sys/include/a.out.h - 664 sys sys 1148106925 1418
+sys/include/a.out.h - 664 sys sys 1178892101 1473
 sys/include/ape - 20000000775 sys sys 1070327361 0
 sys/include/ape/Plan9libnet.h - 664 sys sys 944948760 487
 sys/include/ape/ar.h - 664 sys sys 944948759 354
@@ -6072,7 +6079,7 @@ sys/include/ip.h - 664 sys sys 1178768502 2597
 sys/include/keyboard.h - 664 sys sys 1131637696 865
 sys/include/libc.h - 664 sys sys 1168306860 19851
 sys/include/libsec.h - 664 sys sys 1124709121 9345
-sys/include/mach.h - 664 sys sys 1143814376 8641
+sys/include/mach.h - 664 sys sys 1178892102 8758
 sys/include/memdraw.h - 664 sys sys 1091904419 5645
 sys/include/memlayer.h - 664 sys sys 1051031022 1851
 sys/include/mouse.h - 664 sys sys 1035232010 1003
@@ -8036,6 +8043,7 @@ sys/src/9/pc/ether8139.c - 664 sys sys 1175019929 18584
 sys/src/9/pc/ether8169.c - 664 sys sys 1172259757 25466
 sys/src/9/pc/ether82543gc.c - 664 sys sys 1131290377 32294
 sys/src/9/pc/ether82557.c - 664 sys sys 1153082663 30197
+sys/src/9/pc/ether82563.c - 664 sys sys 1178932992 32729
 sys/src/9/pc/ether83815.c - 664 sys sys 1172259521 26346
 sys/src/9/pc/ether8390.c - 664 sys sys 1131290377 17702
 sys/src/9/pc/ether8390.h - 664 sys sys 1015014517 1511
@@ -8150,7 +8158,7 @@ sys/src/9/port/debugalloc.c - 664 sys sys 1014931171 10402
 sys/src/9/port/dev.c - 664 sys sys 1146151714 8177
 sys/src/9/port/devaudio.c - 664 sys sys 1170456648 21199
 sys/src/9/port/devbridge.c - 664 sys sys 1055688301 24308
-sys/src/9/port/devcap.c - 664 sys sys 1178320320 4160
+sys/src/9/port/devcap.c - 664 sys sys 1178886040 4141
 sys/src/9/port/devcons.c - 664 sys sys 1176658321 22943
 sys/src/9/port/devdraw.c - 664 sys sys 1147023550 44447
 sys/src/9/port/devdup.c - 664 sys sys 1014931172 2332
@@ -9097,7 +9105,7 @@ sys/src/boot/pc/dosboot.c - 664 sys sys 1097716791 11240
 sys/src/boot/pc/dosfs.h - 664 sys sys 1032215924 1467
 sys/src/boot/pc/eoffs - 664 sys sys 1015007950 0
 sys/src/boot/pc/error.h - 664 sys sys 1015007950 3081
-sys/src/boot/pc/ether.c - 664 sys sys 1174077249 5326
+sys/src/boot/pc/ether.c - 664 sys sys 1178926685 5380
 sys/src/boot/pc/ether2000.c - 664 sys sys 1015007950 2609
 sys/src/boot/pc/ether2114x.c - 664 sys sys 1144977462 38028
 sys/src/boot/pc/ether589.c - 664 sys sys 1144961189 4624
@@ -9106,9 +9114,11 @@ sys/src/boot/pc/ether8003.c - 664 sys sys 1015007950 6446
 sys/src/boot/pc/ether8139.c - 664 sys sys 1121393459 14823
 sys/src/boot/pc/ether8169.c - 664 sys sys 1156429147 21582
 sys/src/boot/pc/ether82557.c - 664 sys sys 1140802406 19090
+sys/src/boot/pc/ether82563.c - 664 sys sys 1178926666 24957
 sys/src/boot/pc/ether83815.c - 664 sys sys 1144961190 21993
 sys/src/boot/pc/ether8390.c - 664 sys sys 1112382847 16209
 sys/src/boot/pc/ether8390.h - 664 sys sys 1015007951 1392
+sys/src/boot/pc/etherdp83820.c - 664 sys sys 1178926667 28729
 sys/src/boot/pc/etherec2t.c - 664 sys sys 1015007951 3598
 sys/src/boot/pc/etherelnk3.c - 664 sys sys 1158012439 44736
 sys/src/boot/pc/etherelnk3x.c - 664 sys sys 1015007951 24989
@@ -9135,7 +9145,7 @@ sys/src/boot/pc/load.c - 664 sys sys 1175289729 9410
 sys/src/boot/pc/mbr.s - 664 sys sys 1015007953 6234
 sys/src/boot/pc/mem.h - 664 sys sys 1130887225 3371
 sys/src/boot/pc/memory.c - 664 sys sys 1019533021 10272
-sys/src/boot/pc/mkfile - 664 sys sys 1174077157 3132
+sys/src/boot/pc/mkfile - 664 sys sys 1178926615 3166
 sys/src/boot/pc/noether.c - 664 sys sys 1094674488 358
 sys/src/boot/pc/part.c - 664 sys sys 1114697151 7153
 sys/src/boot/pc/pbs.s - 664 sys sys 1143465387 8291
@@ -14524,14 +14534,14 @@ sys/src/fs/fs/dat.h - 664 sys sys 1140168010 611
 sys/src/fs/fs/fns.h - 664 sys sys 1172679929 2168
 sys/src/fs/fs/io.h - 664 sys sys 1157939329 6720
 sys/src/fs/fs/mem.h - 664 sys sys 1140168013 2909
-sys/src/fs/fs/mkfile - 664 sys sys 1157939040 1692
+sys/src/fs/fs/mkfile - 664 sys sys 1178933399 1708
 sys/src/fs/fs64 - 20000000775 sys sys 1157943044 0
 sys/src/fs/fs64/9fsfs64.c - 664 sys sys 1151399221 3612
 sys/src/fs/fs64/dat.h - 664 sys sys 1140168005 611
 sys/src/fs/fs64/fns.h - 664 sys sys 1172679929 2330
 sys/src/fs/fs64/io.h - 664 sys sys 1157939329 6720
 sys/src/fs/fs64/mem.h - 664 sys sys 1151398965 3041
-sys/src/fs/fs64/mkfile - 664 sys sys 1157938677 1632
+sys/src/fs/fs64/mkfile - 664 sys sys 1178933399 1648
 sys/src/fs/ip - 20000000775 sys sys 1140167931 0
 sys/src/fs/ip/arp.c - 664 sys sys 1097578954 8696
 sys/src/fs/ip/icmp.c - 664 sys sys 1015109981 991
@@ -14556,6 +14566,7 @@ sys/src/fs/pc/ether2114x.c - 664 sys sys 1015110044 31874
 sys/src/fs/pc/ether8139.c - 664 sys sys 1086569718 18552
 sys/src/fs/pc/ether8169.c - 664 sys sys 1157939501 25385
 sys/src/fs/pc/ether82557.c - 664 sys sys 1154067789 30710
+sys/src/fs/pc/ether82563.c - 664 sys sys 1178933417 26994
 sys/src/fs/pc/ether83815.c - 664 sys sys 1140335463 26764
 sys/src/fs/pc/ether83815.mii.c - 664 sys sys 1049156663 31622
 sys/src/fs/pc/etherdat.h - 664 sys sys 1157938367 72
@@ -14563,7 +14574,7 @@ sys/src/fs/pc/etherdp83820.c - 664 sys sys 1146355081 32045
 sys/src/fs/pc/etherelnk3.c - 664 sys sys 1015110054 42732
 sys/src/fs/pc/etherga620.c - 664 sys sys 1146785153 24748
 sys/src/fs/pc/etherga620fw.h - 664 sys sys 1032126775 222295
-sys/src/fs/pc/etherif.c - 664 sys sys 1157938488 6605
+sys/src/fs/pc/etherif.c - 664 sys sys 1178933411 6667
 sys/src/fs/pc/etherif.h - 664 sys sys 1015110057 730
 sys/src/fs/pc/etherigbe.c - 664 sys sys 1141208695 46676
 sys/src/fs/pc/etherm10g.c - 664 sys sys 1174594317 25743
@@ -14585,7 +14596,7 @@ sys/src/fs/pc/script.i - 664 sys sys 1015110072 27323
 sys/src/fs/pc/scsi.c - 664 sys sys 1151385561 8701
 sys/src/fs/pc/scsibuslogic.c - 664 sys sys 1015110077 28645
 sys/src/fs/pc/scsincr53c8xx.c - 664 sys sys 1146798658 53619
-sys/src/fs/pc/sdata.c - 664 sys sys 1151726802 64709
+sys/src/fs/pc/sdata.c - 664 sys sys 1178933365 64719
 sys/src/fs/pc/sdmv50xx.c - 664 sys sys 1151486130 39434
 sys/src/fs/pc/sdscsi.c - 664 sys sys 1146786984 7017
 sys/src/fs/pc/toy.c - 664 sys sys 1140167948 2166
@@ -14605,7 +14616,7 @@ sys/src/fs/port/console.c - 664 sys sys 1101627646 4886
 sys/src/fs/port/data.c - 664 sys sys 1140167986 4510
 sys/src/fs/port/dentry.c - 664 sys sys 1098156404 6345
 sys/src/fs/port/devcons.c - 664 sys sys 1157942528 4896
-sys/src/fs/port/devsd.c - 664 sys sys 1174081262 15110
+sys/src/fs/port/devsd.c - 664 sys sys 1178933380 15116
 sys/src/fs/port/fcmd.c - 664 sys sys 1146785267 1255
 sys/src/fs/port/fs.h - 664 sys sys 1140168001 682
 sys/src/fs/port/iobuf.c - 664 sys sys 1140167988 4956
@@ -15400,22 +15411,26 @@ sys/src/libmach/7obj.c - 664 sys sys 1148106912 2425
 sys/src/libmach/8.c - 664 sys sys 1168034569 2071
 sys/src/libmach/8db.c - 664 sys sys 1136322405 50889
 sys/src/libmach/8obj.c - 664 sys sys 1148106912 2258
+sys/src/libmach/9.c - 664 sys sys 1178892114 3625
+sys/src/libmach/9c - 20000000775 sys sys 1178892193 0
+sys/src/libmach/9c/9.out.h - 664 sys sys 1178892193 4669
+sys/src/libmach/9obj.c - 664 sys sys 1178892115 2747
 sys/src/libmach/access.c - 664 sys sys 1131289377 4588
 sys/src/libmach/elf.h - 664 sys sys 1131292881 2301
-sys/src/libmach/executable.c - 664 sys sys 1172172965 16228
+sys/src/libmach/executable.c - 664 sys sys 1178892113 16424
 sys/src/libmach/k.c - 664 sys sys 1138471021 3381
 sys/src/libmach/kdb.c - 664 sys sys 1136322404 21222
 sys/src/libmach/kobj.c - 664 sys sys 1148106912 2275
 sys/src/libmach/machdata.c - 664 sys sys 1131289377 8799
 sys/src/libmach/map.c - 664 sys sys 1131289376 3056
 sys/src/libmach/mips2ureg.h - 664 sys sys 1143821483 886
-sys/src/libmach/mkfile - 664 sys sys 1144151016 482
-sys/src/libmach/obj.c - 664 sys sys 1148106918 5986
+sys/src/libmach/mkfile - 664 sys sys 1178892111 493
+sys/src/libmach/obj.c - 664 sys sys 1178892113 6067
 sys/src/libmach/obj.h - 664 sys sys 1148170078 648
 sys/src/libmach/q.c - 664 sys sys 1158071179 3641
-sys/src/libmach/qdb.c - 664 sys sys 1136322404 27544
+sys/src/libmach/qdb.c - 664 sys sys 1178892114 30360
 sys/src/libmach/qobj.c - 664 sys sys 1148106912 2368
-sys/src/libmach/setmach.c - 664 sys sys 1172172965 2911
+sys/src/libmach/setmach.c - 664 sys sys 1178892113 3016
 sys/src/libmach/swap.c - 664 sys sys 1131289376 1056
 sys/src/libmach/sym.c - 664 sys sys 1138471012 26745
 sys/src/libmach/u.c - 664 sys sys 1138471017 3447

+ 49 - 0
dist/replica/plan9.log

@@ -48814,3 +48814,52 @@
 1178854206 0 c 386/bin/usb/usbmouse - 775 sys sys 1178853709 109673
 1178854206 1 c 386/bin/auth/factotum - 775 sys sys 1178853707 321175
 1178854206 2 c 386/bin/troff - 775 sys sys 1178853709 361158
+1178886605 0 c sys/src/9/port/devcap.c - 664 sys sys 1178886040 4141
+1178892007 0 a sys/src/libmach/9.c - 664 sys sys 1178892114 3625
+1178892007 1 a sys/src/libmach/9obj.c - 664 sys sys 1178892115 2747
+1178892007 2 c sys/src/libmach/executable.c - 664 sys sys 1178892113 16424
+1178892007 3 c sys/src/libmach/mkfile - 664 sys sys 1178892111 493
+1178892007 4 c sys/src/libmach/obj.c - 664 sys sys 1178892113 6067
+1178892007 5 c sys/src/libmach/qdb.c - 664 sys sys 1178892114 30360
+1178892007 6 c sys/src/libmach/setmach.c - 664 sys sys 1178892113 3016
+1178893806 0 c 386/lib/libmach.a - 664 sys sys 1178892112 809418
+1178893806 1 c sys/include/a.out.h - 664 sys sys 1178892101 1473
+1178893806 2 c sys/include/mach.h - 664 sys sys 1178892102 8758
+1178893806 3 a sys/src/libmach/9c - 20000000775 sys sys 1178892193 0
+1178893806 4 a sys/src/libmach/9c/9.out.h - 664 sys sys 1178892193 4669
+1178908216 0 c 386/bin/db - 775 sys sys 1178908092 345933
+1178911812 0 a power64 - 20000000775 sys sys 1178892028 0
+1178911812 1 a power64/bin - 20000000775 sys sys 1178891955 0
+1178911812 2 a power64/include - 20000000775 sys sys 1178892069 0
+1178911812 3 a power64/include/u.h - 664 sys sys 1178892069 2886
+1178911812 4 a power64/include/ureg.h - 664 sys sys 1178892069 915
+1178911812 5 a power64/lib - 20000000775 sys sys 1178891973 0
+1178911812 6 a power64/mkfile - 664 sys sys 1178892028 46
+1178911812 7 c dist/replica/plan9.proto - 664 sys sys 1178910941 2871
+1178928008 0 a sys/src/9/pc/ether82563.c - 664 sys sys 1178927170 33008
+1178928008 1 c sys/src/boot/pc/ether.c - 664 sys sys 1178926685 5380
+1178928008 2 c sys/src/boot/pc/mkfile - 664 sys sys 1178926615 3166
+1178928008 3 a sys/src/boot/pc/ether82563.c - 664 sys sys 1178926666 24957
+1178928008 4 a sys/src/boot/pc/etherdp83820.c - 664 sys sys 1178926667 28729
+1178929806 0 c sys/src/9/pc/ether82563.c - 664 sys sys 1178928293 32728
+1178933406 0 c sys/src/9/pc/ether82563.c - 664 sys sys 1178932992 32729
+1178933406 1 c sys/src/fs/fs/mkfile - 664 sys sys 1178933399 1708
+1178933406 2 c sys/src/fs/fs64/mkfile - 664 sys sys 1178933399 1648
+1178933406 3 a sys/src/fs/pc/ether82563.c - 664 sys sys 1178933417 26994
+1178933406 4 c sys/src/fs/pc/etherif.c - 664 sys sys 1178933411 6667
+1178933406 5 c sys/src/fs/pc/sdata.c - 664 sys sys 1178933365 64719
+1178933406 6 c sys/src/fs/port/devsd.c - 664 sys sys 1178933380 15116
+1178940604 0 c 386/bin/acid - 775 sys sys 1178939750 405146
+1178940604 1 c 386/bin/ar - 775 sys sys 1178939751 114363
+1178940604 2 c 386/bin/snap - 775 sys sys 1178939753 316147
+1178940604 3 c 386/bin/snapfs - 775 sys sys 1178939754 390312
+1178940604 4 c 386/bin/file - 775 sys sys 1178939751 128125
+1178940604 5 c 386/bin/kprof - 775 sys sys 1178939752 106496
+1178940604 6 c 386/bin/ktrace - 775 sys sys 1178939752 124176
+1178940604 7 c 386/bin/nm - 775 sys sys 1178939752 130155
+1178940604 8 c 386/bin/prof - 775 sys sys 1178939753 111959
+1178940604 9 c 386/bin/size - 775 sys sys 1178939753 79772
+1178940604 10 c 386/bin/strip - 775 sys sys 1178939754 81761
+1178940604 11 c 386/bin/aux/ms2 - 775 sys sys 1178939751 88464
+1178940604 12 c 386/bin/tprof - 775 sys sys 1178939755 300947
+1178940604 13 c 386/lib/libmach.a - 664 sys sys 1178939757 807390

+ 2 - 0
dist/replica/plan9.proto

@@ -45,6 +45,8 @@ mips	- sys sys
 	+	- sys sys
 power	- sys sys
 	+	- sys sys
+power64	- sys sys
+	+	- sys sys
 sparc	- sys sys
 	+	- sys sys
 sparc64	- sys sys

+ 87 - 0
power64/include/u.h

@@ -0,0 +1,87 @@
+#define nil		((void*)0)
+typedef	unsigned short	ushort;
+typedef	unsigned char	uchar;
+typedef	unsigned long	ulong;
+typedef	unsigned int	uint;
+typedef	signed char	schar;
+typedef	long long	vlong;
+typedef	unsigned long long uvlong;
+typedef unsigned long long uintptr;
+typedef unsigned long	usize;
+typedef	ushort		Rune;
+typedef 	union FPdbleword FPdbleword;
+typedef uintptr	jmp_buf[2];
+#define	JMPBUFSP	0
+#define	JMPBUFPC	1
+#define	JMPBUFDPC	0
+typedef unsigned int	mpdigit;	/* for /sys/include/mp.h */
+typedef unsigned char u8int;
+typedef unsigned short u16int;
+typedef unsigned int	u32int;
+typedef unsigned long long u64int;
+
+/* FPSCR */
+#define	FPSFX	(1<<31)	/* exception summary (sticky) */
+#define	FPSEX	(1<<30)	/* enabled exception summary */
+#define	FPSVX	(1<<29)	/* invalid operation exception summary */
+#define	FPSOX	(1<<28)	/* overflow exception OX (sticky) */
+#define	FPSUX	(1<<27)	/* underflow exception UX (sticky) */
+#define	FPSZX	(1<<26)	/* zero divide exception ZX (sticky) */
+#define	FPSXX	(1<<25)	/* inexact exception XX (sticky) */
+#define	FPSVXSNAN (1<<24)	/* invalid operation exception for SNaN (sticky) */
+#define	FPSVXISI	(1<<23)	/* invalid operation exception for ∞-∞ (sticky) */
+#define	FPSVXIDI	(1<<22)	/* invalid operation exception for ∞/∞ (sticky) */
+#define	FPSVXZDZ (1<<21)	/* invalid operation exception for 0/0 (sticky) */
+#define	FPSVXIMZ	(1<<20)	/* invalid operation exception for ∞*0 (sticky) */
+#define	FPSVXVC	(1<<19)	/* invalid operation exception for invalid compare (sticky) */
+#define	FPSFR	(1<<18)	/* fraction rounded */
+#define	FPSFI	(1<<17)	/* fraction inexact */
+#define	FPSFPRF	(1<<16)	/* floating point result class */
+#define	FPSFPCC	(0xF<<12)	/* <, >, =, unordered */
+#define	FPVXCVI	(1<<8)	/* enable exception for invalid integer convert (sticky) */
+#define	FPVE	(1<<7)	/* invalid operation exception enable */
+#define	FPOVFL	(1<<6)	/* enable overflow exceptions */
+#define	FPUNFL	(1<<5)	/* enable underflow */
+#define	FPZDIV	(1<<4)	/* enable zero divide */
+#define	FPINEX	(1<<3)	/* enable inexact exceptions */
+#define	FPRMASK	(3<<0)	/* rounding mode */
+#define	FPRNR	(0<<0)
+#define	FPRZ	(1<<0)
+#define	FPRPINF	(2<<0)
+#define	FPRNINF	(3<<0)
+#define	FPPEXT	0
+#define	FPPSGL	0
+#define	FPPDBL	0
+#define	FPPMASK	0
+#define	FPINVAL	FPVE
+
+#define	FPAOVFL	FPSOX
+#define	FPAINEX	FPSXX
+#define	FPAUNFL	FPSUX
+#define	FPAZDIV	FPSZX
+#define	FPAINVAL	FPSVX
+
+union FPdbleword
+{
+	double	x;
+	struct {	/* big endian */
+		ulong hi;
+		ulong lo;
+	};
+};
+
+typedef	char*	va_list;
+#define va_start(list, start) list =\
+	(sizeof(start) < 8?\
+		(char*)((vlong*)&(start)+1):\
+		(char*)(&(start)+1))
+#define va_end(list)\
+	USED(list)
+#define va_arg(list, mode)\
+	((sizeof(mode) == 1)?\
+		((mode*)(list += 8))[-1]:\
+	(sizeof(mode) == 2)?\
+		((mode*)(list += 8))[-1]:\
+	(sizeof(mode) == 4)?\
+		((mode*)(list += 8))[-1]:\
+		((mode*)(list += sizeof(mode)))[-1])

+ 44 - 0
power64/include/ureg.h

@@ -0,0 +1,44 @@
+struct Ureg
+{
+/*  0*/	u64int	cause;	/* trap or interrupt vector */
+/*  8*/	u64int	msr; /* SRR1 */
+/* 16*/	u64int	pc;	/* SRR0 */
+/* 24*/	u64int	unused;
+/* 32*/	u64int	lr;
+/* 36*/	u32int	pad;
+/* 40*/	u32int	cr;
+/* 48*/	u64int	xer;
+/* 56*/	u64int	ctr;
+/* 64*/	u64int	r0;
+/* 72*/	union{ u64int r1;	u64int	sp;	u64int	usp; };
+/* 80*/	u64int	r2;
+/* 88*/	u64int	r3;
+/* 96*/	u64int	r4;
+/*104*/	u64int	r5;
+/*112*/	u64int	r6;
+/*120*/	u64int	r7;
+/*128*/	u64int	r8;
+/*136*/	u64int	r9;
+/*144*/	u64int	r10;
+/*152*/	u64int	r11;
+/*160*/	u64int	r12;
+/*168*/	u64int	r13;
+/*176*/	u64int	r14;
+/*184*/	u64int	r15;
+/*192*/	u64int	r16;
+/*200*/	u64int	r17;
+/*208*/	u64int	r18;
+/*216*/	u64int	r19;
+/*224*/	u64int	r20;
+/*232*/	u64int	r21;
+/*240*/	u64int	r22;
+/*248*/	u64int	r23;
+/*256*/	u64int	r24;
+/*264*/	u64int	r25;
+/*272*/	u64int	r26;
+/*280*/	u64int	r27;
+/*288*/	u64int	r28;
+/*296*/	u64int	r29;
+/*304*/	u64int	r30;
+/*312*/	u64int	r31;
+};

+ 6 - 0
power64/mkfile

@@ -0,0 +1,6 @@
+</sys/src/mkfile.proto
+
+CC=9c
+LD=9l
+O=9
+AS=9a

+ 2 - 1
sys/include/a.out.h

@@ -29,9 +29,10 @@ struct	Exec
 #define	P_MAGIC		_MAGIC(0, 24)		/* mips 3000 LE */
 #define	U_MAGIC		_MAGIC(0, 25)		/* sparc64 */
 #define	S_MAGIC		_MAGIC(HDR_MAGIC, 26)	/* amd64 */
+#define	T_MAGIC		_MAGIC(HDR_MAGIC, 27)	/* powerpc64 */
 
 #define	MIN_MAGIC	8
-#define	MAX_MAGIC	26			/* <= 90 */
+#define	MAX_MAGIC	27			/* <= 90 */
 
 #define	DYN_MAGIC	0x80000000		/* dlm */
 

+ 7 - 1
sys/include/mach.h

@@ -14,7 +14,8 @@
  *		sparc64,
  *		mips2 (R4000)
  *		arm
- *		power pc
+ *		powerpc,
+ *		powerpc64
  *		alpha
  */
 enum
@@ -34,6 +35,7 @@ enum
 	NMIPS,
 	MSPARC64,
 	MAMD64,
+	MPOWER64,
 				/* types of executables */
 	FNONE = 0,		/* unidentified */
 	FMIPS,			/* v.out */
@@ -61,6 +63,8 @@ enum
 	FSPARC64,		/* u.out */
 	FAMD64,			/* 6.out */
 	FAMD64B,		/* 6.out bootable */
+	FPOWER64,		/* 9.out */
+	FPOWER64B,		/* 9.out bootable */
 
 	ANONE = 0,		/* dissembler types */
 	AMIPS,
@@ -77,6 +81,7 @@ enum
 	AALPHA,
 	ASPARC64,
 	AAMD64,
+	APOWER64,
 				/* object file types */
 	Obj68020 = 0,		/* .2 */
 	ObjSparc,		/* .k */
@@ -93,6 +98,7 @@ enum
 	ObjSparc64,		/* .u */
 	ObjAmd64,		/* .6 */
 	ObjSpim,		/* .0 */
+	ObjPower64,		/* .9 */
 	Maxobjtype,
 
 	CNONE  = 0,		/* symbol table classes */

+ 1394 - 0
sys/src/9/pc/ether82563.c

@@ -0,0 +1,1394 @@
+/*
+ * Intel 82563 Gigabit Ethernet Controller
+ */
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+#include "../port/error.h"
+#include "../port/netif.h"
+
+#include "etherif.h"
+
+
+/*
+ * these are in the order they appear in the manual, not numeric order.
+ * It was too hard to find them in the book. Ref 21489, rev 2.6
+ */
+
+enum {
+	/* General */
+
+	Ctrl		= 0x00000000,	/* Device Control */
+	Status		= 0x00000008,	/* Device Status */
+	Eec		= 0x00000010,	/* EEPROM/Flash Control/Data */
+	Eerd		= 0x00000014,	/* EEPROM Read */
+	Ctrlext		= 0x00000018,	/* Extended Device Control */
+	Fla		= 0x0000001c,	/* Flash Access */
+	Mdic		= 0x00000020,	/* MDI Control */
+	Seresctl	= 0x00000024,	/* Serdes ana */
+	Fcal		= 0x00000028,	/* Flow Control Address Low */
+	Fcah		= 0x0000002C,	/* Flow Control Address High */
+	Fct		= 0x00000030,	/* Flow Control Type */
+	Kumctrlsta	= 0x00000034,	/* Kumeran Controll and Status Register */
+	Vet		= 0x00000038,	/* VLAN EtherType */
+	Fcttv		= 0x00000170,	/* Flow Control Transmit Timer Value */
+	Txcw		= 0x00000178,	/* Transmit Configuration Word */
+	Rxcw		= 0x00000180,	/* Receive Configuration Word */
+	Ledctl		= 0x00000E00,	/* LED control */
+	Pba		= 0x00001000,	/* Packet Buffer Allocation */
+
+	/* Interrupt */
+
+	Icr		= 0x000000C0,	/* Interrupt Cause Read */
+	Ics		= 0x000000C8,	/* Interrupt Cause Set */
+	Ims		= 0x000000D0,	/* Interrupt Mask Set/Read */
+	Imc		= 0x000000D8,	/* Interrupt mask Clear */
+	Iam		= 0x000000E0,	/* Interrupt acknowledge Auto Mask */
+
+	/* Receive */
+
+	Rctl		= 0x00000100,	/* Control */
+	Ert		= 0x00002008,	/* Early Receive Threshold (573[EVL] only) */
+	Fcrtl		= 0x00002160,	/* Flow Control RX Threshold Low */
+	Fcrth		= 0x00002168,	/* Flow Control Rx Threshold High */
+	Psrctl		= 0x00002170,	/* Packet Split Receive Control */
+	Rdbal		= 0x00002800,	/* Rdesc Base Address Low Queue 0 */
+	Rdbah		= 0x00002804,	/* Rdesc Base Address High Queue 0 */
+	Rdlen		= 0x00002808,	/* Descriptor Length Queue 0 */
+	Rdh		= 0x00002810,	/* Descriptor Head Queue 0 */
+	Rdt		= 0x00002818,	/* Descriptor Tail Queue 0 */
+	Rdtr		= 0x00002820,	/* Descriptor Timer Ring */
+	Rxdctl		= 0x00002828,	/* Descriptor Control */
+	Radv		= 0x0000282C,	/* Interrupt Absolute Delay Timer */
+	Rdbal1		= 0x00002900,	/* Rdesc Base Address Low Queue 1 */
+	Rdbah1		= 0x00002804,	/* Rdesc Base Address High Queue 1 */
+	Rdlen1		= 0x00002908,	/* Descriptor Length Queue 1 */
+	Rdh1		= 0x00002910,	/* Descriptor Head Queue 1 */
+	Rdt1		= 0x00002918,	/* Descriptor Tail Queue 1 */
+	Rxdctl1		= 0x00002928,	/* Descriptor Control Queue 1 */
+	Rsrpd		= 0x00002c00,	/* Small Packet Detect */
+	Raid		= 0x00002c08,	/* ACK interrupt delay */
+	Cpuvec		= 0x00002c10,	/* CPU Vector */
+	Rxcsum		= 0x00005000,	/* Checksum Control */
+	Rfctl		= 0x00005008,	/* Filter Control */
+	Mta		= 0x00005200,	/* Multicast Table Array */
+	Ral		= 0x00005400,	/* Address Low */
+	Rah		= 0x00005404,	/* Address High */
+	Vfta		= 0x00005600,	/* VLAN Filter Table Array */
+	Mrqc		= 0x00005818,	/* Multiple Receive Queues Command */
+	Rssim		= 0x00005864,	/* RSS Interrupt Mask */
+	Rssir		= 0x00005868,	/* RSS Interrupt Request */
+	Reta		= 0x00005c00,	/* Redirection Table */
+	Rssrk		= 0x00005c80,	/* RSS Random Key */
+
+	/* Transmit */
+
+	Tctl		= 0x00000400,	/* Control */
+	Tipg		= 0x00000410,	/* IPG */
+	Tdbal		= 0x00003800,	/* Tdesc Base Address Low */
+	Tdbah		= 0x00003804,	/* Tdesc Base Address High */
+	Tdlen		= 0x00003808,	/* Descriptor Length */
+	Tdh		= 0x00003810,	/* Descriptor Head */
+	Tdt		= 0x00003818,	/* Descriptor Tail */
+	Tidv		= 0x00003820,	/* Interrupt Delay Value */
+	Txdctl		= 0x00003828,	/* Descriptor Control */
+	Tadv		= 0x0000382C,	/* Interrupt Absolute Delay Timer */
+	Tarc0		= 0x00003840,	/* Arbitration Counter Queue 0 */
+	Tdbal1		= 0x00003900,	/* Descriptor Base Low Queue 1 */
+	Tdbah1		= 0x00003904,	/* Descriptor Base High Queue 1 */
+	Tdlen1		= 0x00003908,	/* Descriptor Length Queue 1 */
+	Tdh1		= 0x00003910,	/* Descriptor Head Queue 1 */
+	Tdt1		= 0x00003918,	/* Descriptor Tail Queue 1 */
+	Txdctl1		= 0x00003928,	/* Descriptor Control 1 */
+	Tarc1		= 0x00003940,	/* Arbitration Counter Queue 1 */
+
+	/* Statistics */
+
+	Statistics	= 0x00004000,	/* Start of Statistics Area */
+	Gorcl		= 0x88/4,	/* Good Octets Received Count */
+	Gotcl		= 0x90/4,	/* Good Octets Transmitted Count */
+	Torl		= 0xC0/4,	/* Total Octets Received */
+	Totl		= 0xC8/4,	/* Total Octets Transmitted */
+	Nstatistics	= 64,
+
+};
+
+enum {					/* Ctrl */
+	GIOmd		= (1<<2),	/* BIO master disable */
+	Lrst		= (1<<3),	/* link reset */
+	Slu		= (1<<6),	/* Set Link Up */
+	SspeedMASK	= (3<<8),	/* Speed Selection */
+	SspeedSHIFT	= 8,
+	Sspeed10	= 0x00000000,	/* 10Mb/s */
+	Sspeed100	= 0x00000100,	/* 100Mb/s */
+	Sspeed1000	= 0x00000200,	/* 1000Mb/s */
+	Frcspd		= (1<<11),	/* Force Speed */
+	Frcdplx		= (1<<12),	/* Force Duplex */
+	SwdpinsloMASK	= 0x003C0000,	/* Software Defined Pins - lo nibble */
+	SwdpinsloSHIFT	= 18,
+	SwdpioloMASK	= 0x03C00000,	/* Software Defined Pins - I or O */
+	SwdpioloSHIFT	= 22,
+	Devrst		= (1<<26),	/* Device Reset */
+	Rfce		= (1<<27),	/* Receive Flow Control Enable */
+	Tfce		= (1<<28),	/* Transmit Flow Control Enable */
+	Vme		= (1<<30),	/* VLAN Mode Enable */
+	Phy_rst		= (1<<31),	/* Phy Reset */
+};
+
+enum {					/* Status */
+	Lu		= (1<<1),	/* Link Up */
+	Lanid		= (3<<2),	/* mask for Lan ID.
+	Txoff		= (1<<4),	/* Transmission Paused */
+	Tbimode		= (1<<5),	/* TBI Mode Indication */
+	SpeedMASK	= 0x000000C0,
+	Speed10		= 0x00000000,	/* 10Mb/s */
+	Speed100	= 0x00000040,	/* 100Mb/s */
+	Speed1000	= 0x00000080,	/* 1000Mb/s */
+	Phyra		= (1<<10),	/* PHY Reset Asserted */
+	GIOme		= (1<<19),	/* GIO Master Enable Status */
+};
+
+enum {					/* Ctrl and Status */
+	Fd		= 0x00000001,	/* Full-Duplex */
+	AsdvMASK	= 0x00000300,
+	Asdv10		= 0x00000000,	/* 10Mb/s */
+	Asdv100		= 0x00000100,	/* 100Mb/s */
+	Asdv1000	= 0x00000200,	/* 1000Mb/s */
+};
+
+enum {					/* Eec */
+	Sk		= (1<<0),	/* Clock input to the EEPROM */
+	Cs		= (1<<1),	/* Chip Select */
+	Di		= (1<<2),	/* Data Input to the EEPROM */
+	Do		= (1<<3),	/* Data Output from the EEPROM */
+	Areq		= (1<<6),	/* EEPROM Access Request */
+	Agnt		= (1<<7),	/* EEPROM Access Grant */
+};
+
+enum {					/* Eerd */
+	ee_start	= (1<<0),	/* Start Read */
+	ee_done		= (1<<1),	/* Read done */
+	ee_addr		= (0xfff8<<2),	/* Read address [15:2] */
+	ee_data		= (0xffff<<16),	/* Read Data; Data returned from eeprom/nvm */
+};
+
+enum {					/* Ctrlext */
+	Asdchk		= (1<<12),	/* ASD Check */
+	Eerst		= (1<<13),	/* EEPROM Reset */
+	Spdbyps		= (1<<15),	/* Speed Select Bypass */
+};
+
+enum {					/* EEPROM content offsets */
+	Ea		= 0x00,		/* Ethernet Address */
+	Cf		= 0x03,		/* Compatibility Field */
+	Icw1		= 0x0A,		/* Initialization Control Word 1 */
+	Sid		= 0x0B,		/* Subsystem ID */
+	Svid		= 0x0C,		/* Subsystem Vendor ID */
+	Did		= 0x0D,		/* Device ID */
+	Vid		= 0x0E,		/* Vendor ID */
+	Icw2		= 0x0F,		/* Initialization Control Word 2 */
+};
+
+enum {					/* Mdic */
+	MDIdMASK	= 0x0000FFFF,	/* Data */
+	MDIdSHIFT	= 0,
+	MDIrMASK	= 0x001F0000,	/* PHY Register Address */
+	MDIrSHIFT	= 16,
+	MDIpMASK	= 0x03E00000,	/* PHY Address */
+	MDIpSHIFT	= 21,
+	MDIwop		= 0x04000000,	/* Write Operation */
+	MDIrop		= 0x08000000,	/* Read Operation */
+	MDIready	= 0x10000000,	/* End of Transaction */
+	MDIie		= 0x20000000,	/* Interrupt Enable */
+	MDIe		= 0x40000000,	/* Error */
+};
+
+enum {					/* Icr, Ics, Ims, Imc */
+	Txdw		= 0x00000001,	/* Transmit Descriptor Written Back */
+	Txqe		= 0x00000002,	/* Transmit Queue Empty */
+	Lsc		= 0x00000004,	/* Link Status Change */
+	Rxseq		= 0x00000008,	/* Receive Sequence Error */
+	Rxdmt0		= 0x00000010,	/* Rdesc Minimum Threshold Reached */
+	Rxo		= 0x00000040,	/* Receiver Overrun */
+	Rxt0		= 0x00000080,	/* Receiver Timer Interrupt */
+	Mdac		= 0x00000200,	/* MDIO Access Completed */
+	Rxcfg		= 0x00000400,	/* Receiving /C/ ordered sets */
+	Gpi0		= 0x00000800,	/* General Purpose Interrupts */
+	Gpi1		= 0x00001000,
+	Gpi2		= 0x00002000,
+	Gpi3		= 0x00004000,
+};
+
+enum {					/* Txcw */
+	TxcwFd		= 0x00000020,	/* Full Duplex */
+	TxcwHd		= 0x00000040,	/* Half Duplex */
+	TxcwPauseMASK	= 0x00000180,	/* Pause */
+	TxcwPauseSHIFT	= 7,
+	TxcwPs		= (1<<TxcwPauseSHIFT),	/* Pause Supported */
+	TxcwAs		= (2<<TxcwPauseSHIFT),	/* Asymmetric FC desired */
+	TxcwRfiMASK	= 0x00003000,	/* Remote Fault Indication */
+	TxcwRfiSHIFT	= 12,
+	TxcwNpr		= 0x00008000,	/* Next Page Request */
+	TxcwConfig	= 0x40000000,	/* Transmit COnfig Control */
+	TxcwAne		= 0x80000000,	/* Auto-Negotiation Enable */
+};
+
+enum {					/* Rctl */
+	Rrst		= 0x00000001,	/* Receiver Software Reset */
+	Ren		= 0x00000002,	/* Receiver Enable */
+	Sbp		= 0x00000004,	/* Store Bad Packets */
+	Upe		= 0x00000008,	/* Unicast Promiscuous Enable */
+	Mpe		= 0x00000010,	/* Multicast Promiscuous Enable */
+	Lpe		= 0x00000020,	/* Long Packet Reception Enable */
+	LbmMASK		= 0x000000C0,	/* Loopback Mode */
+	LbmOFF		= 0x00000000,	/* No Loopback */
+	LbmTBI		= 0x00000040,	/* TBI Loopback */
+	LbmMII		= 0x00000080,	/* GMII/MII Loopback */
+	LbmXCVR		= 0x000000C0,	/* Transceiver Loopback */
+	RdtmsMASK	= 0x00000300,	/* Rdesc Minimum Threshold Size */
+	RdtmsHALF	= 0x00000000,	/* Threshold is 1/2 Rdlen */
+	RdtmsQUARTER	= 0x00000100,	/* Threshold is 1/4 Rdlen */
+	RdtmsEIGHTH	= 0x00000200,	/* Threshold is 1/8 Rdlen */
+	MoMASK		= 0x00003000,	/* Multicast Offset */
+	Bam		= 0x00008000,	/* Broadcast Accept Mode */
+	BsizeMASK	= 0x00030000,	/* Receive Buffer Size */
+	Bsize8192	= 0x00020000, 	/* Bsex = 1 */
+	Bsize2048	= 0x00000000,
+	Bsize1024	= 0x00010000,
+	Bsize512	= 0x00020000,
+	Bsize256	= 0x00030000,
+	Vfe		= 0x00040000,	/* VLAN Filter Enable */
+	Cfien		= 0x00080000,	/* Canonical Form Indicator Enable */
+	Cfi		= 0x00100000,	/* Canonical Form Indicator value */
+	Dpf		= 0x00400000,	/* Discard Pause Frames */
+	Pmcf		= 0x00800000,	/* Pass MAC Control Frames */
+	Bsex		= 0x02000000,	/* Buffer Size Extension */
+	Secrc		= 0x04000000,	/* Strip CRC from incoming packet */
+};
+
+enum {					/* Tctl */
+	Trst		= 0x00000001,	/* Transmitter Software Reset */
+	Ten		= 0x00000002,	/* Transmit Enable */
+	Psp		= 0x00000008,	/* Pad Short Packets */
+	CtMASK		= 0x00000FF0,	/* Collision Threshold */
+	CtSHIFT		= 4,
+	ColdMASK	= 0x003FF000,	/* Collision Distance */
+	ColdSHIFT	= 12,
+	Swxoff		= 0x00400000,	/* Sofware XOFF Transmission */
+	Pbe		= 0x00800000,	/* Packet Burst Enable */
+	Rtlc		= 0x01000000,	/* Re-transmit on Late Collision */
+	Nrtu		= 0x02000000,	/* No Re-transmit on Underrrun */
+};
+
+enum {					/* [RT]xdctl */
+	PthreshMASK	= 0x0000003F,	/* Prefetch Threshold */
+	PthreshSHIFT	= 0,
+	HthreshMASK	= 0x00003F00,	/* Host Threshold */
+	HthreshSHIFT	= 8,
+	WthreshMASK	= 0x003F0000,	/* Writebacj Threshold */
+	WthreshSHIFT	= 16,
+	Gran		= 0x01000000,	/* Granularity */
+};
+
+enum {					/* Rxcsum */
+	PcssMASK	= 0x000000FF,	/* Packet Checksum Start */
+	PcssSHIFT	= 0,
+	Ipofl		= 0x00000100,	/* IP Checksum Off-load Enable */
+	Tuofl		= 0x00000200,	/* TCP/UDP Checksum Off-load Enable */
+};
+
+enum {					/* Receive Delay Timer Ring */
+	DelayMASK	= 0x0000FFFF,	/* delay timer in 1.024nS increments */
+	DelaySHIFT	= 0,
+	Fpd		= 0x80000000,	/* Flush partial Descriptor Block */
+};
+
+typedef struct Rd {			/* Receive Descriptor */
+	uint	addr[2];
+	ushort	length;
+	ushort	checksum;
+	uchar	status;
+	uchar	errors;
+	ushort	special;
+} Rd;
+
+enum {					/* Rd status */
+	Rdd		= 0x01,		/* Descriptor Done */
+	Reop		= 0x02,		/* End of Packet */
+	Ixsm		= 0x04,		/* Ignore Checksum Indication */
+	Vp		= 0x08,		/* Packet is 802.1Q (matched VET) */
+	Tcpcs		= 0x20,		/* TCP Checksum Calculated on Packet */
+	Ipcs		= 0x40,		/* IP Checksum Calculated on Packet */
+	Pif		= 0x80,		/* Passed in-exact filter */
+};
+
+enum {					/* Rd errors */
+	Ce		= 0x01,		/* CRC Error or Alignment Error */
+	Se		= 0x02,		/* Symbol Error */
+	Seq		= 0x04,		/* Sequence Error */
+	Cxe		= 0x10,		/* Carrier Extension Error */
+	Tcpe		= 0x20,		/* TCP/UDP Checksum Error */
+	Ipe		= 0x40,		/* IP Checksum Error */
+	Rxe		= 0x80,		/* RX Data Error */
+};
+
+typedef struct Td Td;
+struct Td {			/* Transmit Descriptor */
+	uint	addr[2];	/* Data */
+	uint	control;
+	uint	status;
+};
+
+enum {					/* Tdesc control */
+	LenMASK		= 0x000FFFFF,	/* Data/Packet Length Field */
+	LenSHIFT	= 0,
+	DtypeCD		= 0x00000000,	/* Data Type 'Context Descriptor' */
+	DtypeDD		= 0x00100000,	/* Data Type 'Data Descriptor' */
+	PtypeTCP	= 0x01000000,	/* TCP/UDP Packet Type (CD) */
+	Teop		= 0x01000000,	/* End of Packet (DD) */
+	PtypeIP		= 0x02000000,	/* IP Packet Type (CD) */
+	Ifcs		= 0x02000000,	/* Insert FCS (DD) */
+	Tse		= 0x04000000,	/* TCP Segmentation Enable */
+	Rs		= 0x08000000,	/* Report Status */
+	Rps		= 0x10000000,	/* Report Status Sent */
+	Dext		= 0x20000000,	/* Descriptor Extension */
+	Vle		= 0x40000000,	/* VLAN Packet Enable */
+	Ide		= 0x80000000,	/* Interrupt Delay Enable */
+};
+
+enum {					/* Tdesc status */
+	Tdd		= 0x00000001,	/* Descriptor Done */
+	Ec		= 0x00000002,	/* Excess Collisions */
+	Lc		= 0x00000004,	/* Late Collision */
+	Tu		= 0x00000008,	/* Transmit Underrun */
+	CssMASK		= 0x0000FF00,	/* Checksum Start Field */
+	CssSHIFT	= 8,
+};
+
+enum {
+	Nrd		= 256,		/* multiple of 8 */
+	Ntd		= 64,		/* multiple of 8 */
+	Nrb		= 1024,		/* private receive buffers per Ctlr */
+	Rbsz		= 8192,
+};
+
+typedef struct Ctlr Ctlr;
+struct Ctlr {
+	int	port;
+	Pcidev*	pcidev;
+	Ctlr*	next;
+	int	active;
+	int	started;
+	int	id;
+	int	cls;
+	ushort	eeprom[0x40];
+
+	QLock	alock;			/* attach */
+	void*	alloc;			/* receive/transmit descriptors */
+	int	nrd;
+	int	ntd;
+	int	nrb;			/* how many this Ctlr has in the pool */
+
+	int*	nic;
+	Lock	imlock;
+	int	im;			/* interrupt mask */
+
+	Rendez	lrendez;
+	int	lim;
+
+	int	link;
+
+	QLock	slock;
+	uint	statistics[Nstatistics];
+	uint	lsleep;
+	uint	lintr;
+	uint	rsleep;
+	uint	rintr;
+	uint	txdw;
+	uint	tintr;
+	uint	ixsm;
+	uint	ipcs;
+	uint	tcpcs;
+
+	uchar	ra[Eaddrlen];		/* receive address */
+	ulong	mta[128];		/* multicast table array */
+
+	Rendez	rrendez;
+	int	rim;
+	int	rdfree;
+	Rd*	rdba;			/* receive descriptor base address */
+	Block**	rb;			/* receive buffers */
+	int	rdh;			/* receive descriptor head */
+	int	rdt;			/* receive descriptor tail */
+	int	rdtr;			/* receive delay timer ring value */
+	int	radv;			/* receive interrupt absolute delay timer */
+
+	Lock	tlock;
+	int	tbusy;
+	int	tdfree;
+	Td*	tdba;			/* transmit descriptor base address */
+	Block**	tb;			/* transmit buffers */
+	int	tdh;			/* transmit descriptor head */
+	int	tdt;			/* transmit descriptor tail */
+
+	int	txcw;
+	int	fcrtl;
+	int	fcrth;
+};
+
+enum{
+	Easize	= 6,
+	Maxmac	= 16,
+};
+
+#define csr32r(c, r)	(*((c)->nic+((r)/4)))
+#define csr32w(c, r, v)	(*((c)->nic+((r)/4)) = (v))
+
+static Ctlr* i82563ctlrhead;
+static Ctlr* i82563ctlrtail;
+
+static Lock i82563rblock;		/* free receive Blocks */
+static Block* i82563rbpool;
+
+static char* statistics[Nstatistics] = {
+	"CRC Error",
+	"Alignment Error",
+	"Symbol Error",
+	"RX Error",
+	"Missed Packets",
+	"Single Collision",
+	"Excessive Collisions",
+	"Multiple Collision",
+	"Late Collisions",
+	nil,
+	"Collision",
+	"Transmit Underrun",
+	"Defer",
+	"Transmit - No CRS",
+	"Sequence Error",
+	"Carrier Extension Error",
+	"Receive Error Length",
+	nil,
+	"XON Received",
+	"XON Transmitted",
+	"XOFF Received",
+	"XOFF Transmitted",
+	"FC Received Unsupported",
+	"Packets Received (64 Bytes)",
+	"Packets Received (65-127 Bytes)",
+	"Packets Received (128-255 Bytes)",
+	"Packets Received (256-511 Bytes)",
+	"Packets Received (512-1023 Bytes)",
+	"Packets Received (1024-1522 Bytes)",
+	"Good Packets Received",
+	"Broadcast Packets Received",
+	"Multicast Packets Received",
+	"Good Packets Transmitted",
+	nil,
+	"Good Octets Received",
+	nil,
+	"Good Octets Transmitted",
+	nil,
+	nil,
+	nil,
+	"Receive No Buffers",
+	"Receive Undersize",
+	"Receive Fragment",
+	"Receive Oversize",
+	"Receive Jabber",
+	nil,
+	nil,
+	nil,
+	"Total Octets Received",
+	nil,
+	"Total Octets Transmitted",
+	nil,
+	"Total Packets Received",
+	"Total Packets Transmitted",
+	"Packets Transmitted (64 Bytes)",
+	"Packets Transmitted (65-127 Bytes)",
+	"Packets Transmitted (128-255 Bytes)",
+	"Packets Transmitted (256-511 Bytes)",
+	"Packets Transmitted (512-1023 Bytes)",
+	"Packets Transmitted (1024-1522 Bytes)",
+	"Multicast Packets Transmitted",
+	"Broadcast Packets Transmitted",
+	"TCP Segmentation Context Transmitted",
+	"TCP Segmentation Context Fail",
+};
+
+static long
+i82563ifstat(Ether* edev, void* a, long n, ulong offset)
+{
+	Ctlr *ctlr;
+	char *p, *s;
+	int i, l, r;
+	uvlong tuvl, ruvl;
+
+	ctlr = edev->ctlr;
+	qlock(&ctlr->slock);
+	p = malloc(2*READSTR);
+	l = 0;
+	for(i = 0; i < Nstatistics; i++){
+		r = csr32r(ctlr, Statistics+i*4);
+		if((s = statistics[i]) == nil)
+			continue;
+		switch(i){
+		case Gorcl:
+		case Gotcl:
+		case Torl:
+		case Totl:
+			ruvl = r;
+			ruvl += ((uvlong)csr32r(ctlr, Statistics+(i+1)*4))<<32;
+			tuvl = ruvl;
+			tuvl += ctlr->statistics[i];
+			tuvl += ((uvlong)ctlr->statistics[i+1])<<32;
+			if(tuvl == 0)
+				continue;
+			ctlr->statistics[i] = tuvl;
+			ctlr->statistics[i+1] = tuvl>>32;
+			l += snprint(p+l, 2*READSTR-l, "%s: %llud %llud\n",
+				s, tuvl, ruvl);
+			i++;
+			break;
+
+		default:
+			ctlr->statistics[i] += r;
+			if(ctlr->statistics[i] == 0)
+				continue;
+			l += snprint(p+l, 2*READSTR-l, "%s: %ud %ud\n",
+				s, ctlr->statistics[i], r);
+			break;
+		}
+	}
+
+	l += snprint(p+l, 2*READSTR-l, "lintr: %ud %ud\n",
+		ctlr->lintr, ctlr->lsleep);
+	l += snprint(p+l, 2*READSTR-l, "rintr: %ud %ud\n",
+		ctlr->rintr, ctlr->rsleep);
+	l += snprint(p+l, 2*READSTR-l, "tintr: %ud %ud\n",
+		ctlr->tintr, ctlr->txdw);
+	l += snprint(p+l, 2*READSTR-l, "ixcs: %ud %ud %ud\n",
+		ctlr->ixsm, ctlr->ipcs, ctlr->tcpcs);
+	l += snprint(p+l, 2*READSTR-l, "rdtr: %ud\n", ctlr->rdtr);
+	l += snprint(p+l, 2*READSTR-l, "radv: %ud\n", ctlr->radv);
+	l += snprint(p+l, 2*READSTR-l, "Ctrlext: %08x\n", csr32r(ctlr, Ctrlext));
+
+	l += snprint(p+l, 2*READSTR-l, "eeprom:");
+	for(i = 0; i < 0x40; i++){
+		if(i && ((i & 0x07) == 0))
+			l += snprint(p+l, 2*READSTR-l, "\n       ");
+		l += snprint(p+l, 2*READSTR-l, " %4.4uX", ctlr->eeprom[i]);
+	}
+	snprint(p+l, 2*READSTR-l, "\n");
+	n = readstr(offset, a, n, p);
+	free(p);
+	qunlock(&ctlr->slock);
+
+	return n;
+}
+
+enum {
+	CMrdtr,
+	CMradv,
+};
+
+static Cmdtab i82563ctlmsg[] = {
+	CMrdtr,	"rdtr",	2,
+	CMradv,	"radv",	2,
+};
+
+static long
+i82563ctl(Ether* edev, void* buf, long n)
+{
+	int v;
+	char *p;
+	Ctlr *ctlr;
+	Cmdbuf *cb;
+	Cmdtab *ct;
+
+	if((ctlr = edev->ctlr) == nil)
+		error(Enonexist);
+
+	cb = parsecmd(buf, n);
+	if(waserror()){
+		free(cb);
+		nexterror();
+	}
+
+	ct = lookupcmd(cb, i82563ctlmsg, nelem(i82563ctlmsg));
+	switch(ct->index){
+	case CMrdtr:
+		v = strtol(cb->f[1], &p, 0);
+		if(v < 0 || p == cb->f[1] || v > 0xFFFF)
+			error(Ebadarg);
+		ctlr->rdtr = v;
+		csr32w(ctlr, Rdtr, Fpd|v);
+		break;
+	case CMradv:
+		v = strtol(cb->f[1], &p, 0);
+		if(v < 0 || p == cb->f[1] || v > 0xFFFF)
+			error(Ebadarg);
+		ctlr->radv = v;
+		csr32w(ctlr, Radv, v);
+	}
+	free(cb);
+	poperror();
+
+	return n;
+}
+
+static void
+i82563promiscuous(void* arg, int on)
+{
+	int rctl;
+	Ctlr *ctlr;
+	Ether *edev;
+
+	edev = arg;
+	ctlr = edev->ctlr;
+
+	rctl = csr32r(ctlr, Rctl);
+	rctl &= ~MoMASK;
+	if(on)
+		rctl |= Upe|Mpe;
+	else
+		rctl &= ~(Upe|Mpe);
+	csr32w(ctlr, Rctl, rctl);
+}
+
+static void
+i82563multicast(void* arg, uchar* addr, int on)
+{
+	int bit, x;
+	Ctlr *ctlr;
+	Ether *edev;
+
+	edev = arg;
+	ctlr = edev->ctlr;
+
+	x = addr[5]>>1;
+	bit = ((addr[5] & 1)<<4)|(addr[4]>>4);
+	if(on)
+		ctlr->mta[x] |= 1<<bit;
+	else
+		ctlr->mta[x] &= ~(1<<bit);
+
+	csr32w(ctlr, Mta+x*4, ctlr->mta[x]);
+}
+
+static Block*
+i82563rballoc(void)
+{
+	Block *bp;
+
+	ilock(&i82563rblock);
+	if((bp = i82563rbpool) != nil){
+		i82563rbpool = bp->next;
+		bp->next = nil;
+	}
+	iunlock(&i82563rblock);
+
+	return bp;
+}
+
+static void
+i82563rbfree(Block* bp)
+{
+	bp->rp = bp->lim - Rbsz;
+	bp->wp = bp->rp;
+
+	ilock(&i82563rblock);
+	bp->next = i82563rbpool;
+	i82563rbpool = bp;
+	iunlock(&i82563rblock);
+}
+
+static void
+i82563im(Ctlr* ctlr, int im)
+{
+	ilock(&ctlr->imlock);
+	ctlr->im |= im;
+	csr32w(ctlr, Ims, ctlr->im);
+	iunlock(&ctlr->imlock);
+}
+
+static void
+i82563txinit(Ctlr* ctlr)
+{
+	int i, r;
+	Block *bp;
+
+	csr32w(ctlr, Tctl, (0x0F<<CtSHIFT)|Psp|(66<<ColdSHIFT));
+	csr32w(ctlr, Tipg, (6<<20)|(8<<10)|8);
+	csr32w(ctlr, Tdbal, PCIWADDR(ctlr->tdba));
+	csr32w(ctlr, Tdbah, 0);
+	csr32w(ctlr, Tdlen, ctlr->ntd*sizeof(Td));
+	ctlr->tdh = PREV(0, ctlr->ntd);
+	csr32w(ctlr, Tdh, 0);
+	ctlr->tdt = 0;
+	csr32w(ctlr, Tdt, 0);
+	for(i = 0; i < ctlr->ntd; i++){
+		if((bp = ctlr->tb[i]) != nil){
+			ctlr->tb[i] = nil;
+			freeb(bp);
+		}
+		memset(&ctlr->tdba[i], 0, sizeof(Td));
+	}
+	ctlr->tdfree = ctlr->ntd;
+	csr32w(ctlr, Tidv, 128);
+	r = csr32r(ctlr, Txdctl);
+	r &= ~WthreshMASK;
+	r |= Gran|(4<<WthreshSHIFT);
+	csr32w(ctlr, Tadv, 64);
+	csr32w(ctlr, Txdctl, r);
+	r = csr32r(ctlr, Tctl);
+	r |= Ten;
+	csr32w(ctlr, Tctl, r);
+}
+
+static void
+i82563transmit(Ether* edev)
+{
+	Td *td;
+	Block *bp;
+	Ctlr *ctlr;
+	int tdh, tdt, ctdh;
+
+	ctlr = edev->ctlr;
+
+	ilock(&ctlr->tlock);
+
+	/*
+	 * Free any completed packets
+	 */
+	tdh = ctlr->tdh;
+	ctdh = csr32r(ctlr, Tdh);
+	while(NEXT(tdh, ctlr->ntd) != ctdh){
+		if((bp = ctlr->tb[tdh]) != nil){
+			ctlr->tb[tdh] = nil;
+			freeb(bp);
+		}
+		memset(&ctlr->tdba[tdh], 0, sizeof(Td));
+		tdh = NEXT(tdh, ctlr->ntd);
+	}
+	ctlr->tdh = tdh;
+
+	/*
+	 * Try to fill the ring back up.
+	 */
+	tdt = ctlr->tdt;
+	while(NEXT(tdt, ctlr->ntd) != tdh){
+		if((bp = qget(edev->oq)) == nil)
+			break;
+		td = &ctlr->tdba[tdt];
+		td->addr[0] = PCIWADDR(bp->rp);
+		td->control = ((BLEN(bp) & LenMASK)<<LenSHIFT);
+		td->control |= Ifcs|Teop|DtypeDD;
+		ctlr->tb[tdt] = bp;
+		tdt = NEXT(tdt, ctlr->ntd);
+		ctlr->tdt = tdt;
+		if(NEXT(tdt, ctlr->ntd) == tdh){
+			td->control |= Rs;
+			ctlr->txdw++;
+			i82563im(ctlr, Txdw);
+			break;
+		}
+	}
+	csr32w(ctlr, Tdt, tdt);
+	iunlock(&ctlr->tlock);
+}
+
+static void
+i82563replenish(Ctlr* ctlr)
+{
+	Rd *rd;
+	int rdt;
+	Block *bp;
+
+	rdt = ctlr->rdt;
+	while(NEXT(rdt, ctlr->nrd) != ctlr->rdh){
+		rd = &ctlr->rdba[rdt];
+		if(ctlr->rb[rdt] == nil){
+			bp = i82563rballoc();
+			if(bp == nil){
+				iprint("no available buffers\n");
+				break;
+			}
+			ctlr->rb[rdt] = bp;
+			rd->addr[0] = PCIWADDR(bp->rp);
+			rd->addr[1] = 0;
+		}
+		rd->status = 0;
+		rdt = NEXT(rdt, ctlr->nrd);
+		ctlr->rdfree++;
+	}
+	ctlr->rdt = rdt;
+	csr32w(ctlr, Rdt, rdt);
+}
+
+static void
+i82563rxinit(Ctlr* ctlr)
+{
+	int i;
+	Block *bp;
+
+//	csr32w(ctlr, Rctl, Dpf|Bsize2048|Bam|RdtmsHALF);
+//	csr32w(ctlr, Rctl, Lpe|Dpf|Bsize16384|Bam|RdtmsHALF|Bsex|Secrc);
+	csr32w(ctlr, Rctl, Lpe|Dpf|Bsize8192|Bam|RdtmsHALF|Bsex|Secrc);
+
+	csr32w(ctlr, Rdbal, PCIWADDR(ctlr->rdba));
+	csr32w(ctlr, Rdbah, 0);
+	csr32w(ctlr, Rdlen, ctlr->nrd*sizeof(Rd));
+	ctlr->rdh = 0;
+	csr32w(ctlr, Rdh, 0);
+	ctlr->rdt = 0;
+	csr32w(ctlr, Rdt, 0);
+	ctlr->rdtr = 0;
+	ctlr->radv = 0;
+	csr32w(ctlr, Rdtr, Fpd|0);
+	csr32w(ctlr, Radv, 0);
+
+	for(i = 0; i < ctlr->nrd; i++){
+		if((bp = ctlr->rb[i]) != nil){
+			ctlr->rb[i] = nil;
+			freeb(bp);
+		}
+	}
+	i82563replenish(ctlr);
+	csr32w(ctlr, Radv, 64);
+//	csr32w(ctlr, Rxdctl, (8<<WthreshSHIFT)|(8<<HthreshSHIFT)|4);
+//	csr32w(ctlr, Rxdctl, (0<<WthreshSHIFT)|(0<<HthreshSHIFT)|0);
+	csr32w(ctlr, Rxdctl, (1<<16)|(1<<24));
+
+	/*
+	 * Enable checksum offload.
+	 */
+	csr32w(ctlr, Rxcsum, Tuofl|Ipofl|(ETHERHDRSIZE<<PcssSHIFT));
+}
+
+static void
+i82563rcv(Ether *edev)
+{
+	Rd *rd;
+	Block *bp;
+	int rdh;
+	Ctlr *ctlr;
+
+	ctlr = edev->ctlr;
+	rdh = ctlr->rdh;
+	for(;;){
+		rd = &ctlr->rdba[rdh];
+
+		if(!(rd->status & Rdd))
+			break;
+
+		/*
+		 * Accept eop packets with no errors.
+		 * With no errors and the Ixsm bit set,
+		 * the descriptor status Tpcs and Ipcs bits give
+		 * an indication of whether the checksums were
+		 * calculated and valid.
+		 */
+		if (bp = ctlr->rb[rdh]) {
+			if((rd->status & Reop) && rd->errors == 0){
+				bp->wp += rd->length;
+				bp->next = nil;
+				if(!(rd->status & Ixsm)){
+					ctlr->ixsm++;
+					if(rd->status & Ipcs){
+						/*
+						 * IP checksum calculated
+						 * (and valid as errors == 0).
+						 */
+						ctlr->ipcs++;
+						bp->flag |= Bipck;
+					}
+					if(rd->status & Tcpcs){
+						/*
+						 * TCP/UDP checksum calculated
+						 * (and valid as errors == 0).
+						 */
+						ctlr->tcpcs++;
+						bp->flag |= Btcpck|Budpck;
+					}
+					bp->checksum = rd->checksum;
+					bp->flag |= Bpktck;
+				}
+				etheriq(edev, bp, 1);
+			} else
+				freeb(bp);
+			ctlr->rb[rdh] = nil;
+		}
+		memset(rd, 0, sizeof(Rd));
+		ctlr->rdfree--;
+		ctlr->rdh = rdh = NEXT(rdh, ctlr->nrd);
+		coherence();
+		if(ctlr->rdfree < (ctlr->nrd/4)*3 || (ctlr->rim & Rxdmt0))
+			i82563replenish(ctlr);
+	}
+}
+
+static int
+i82563rim(void* ctlr)
+{
+	return ((Ctlr*)ctlr)->rim != 0;
+}
+
+static void
+i82563rproc(void* arg)
+{
+	Rd *rd;
+	Block *bp;
+	Ctlr *ctlr;
+	int r, rdh, rim;
+	Ether *edev;
+
+	edev = arg;
+	ctlr = edev->ctlr;
+
+	i82563rxinit(ctlr);
+	r = csr32r(ctlr, Rctl);
+	r |= Ren;
+	csr32w(ctlr, Rctl, r);
+
+	for(;;){
+		i82563im(ctlr, Rxt0|Rxo|Rxdmt0|Rxseq);
+		ctlr->rsleep++;
+		coherence();
+		sleep(&ctlr->rrendez, i82563rim, ctlr);
+
+		rdh = ctlr->rdh;
+		for(;;){
+			rd = &ctlr->rdba[rdh];
+			rim = ctlr->rim;
+			ctlr->rim = 0;
+			if(!(rd->status & Rdd))
+				break;
+
+			/*
+			 * Accept eop packets with no errors.
+			 * With no errors and the Ixsm bit set,
+			 * the descriptor status Tpcs and Ipcs bits give
+			 * an indication of whether the checksums were
+			 * calculated and valid.
+			 */
+			if (bp = ctlr->rb[rdh]) {
+				if((rd->status & Reop) && rd->errors == 0){
+					bp->wp += rd->length;
+					bp->next = nil;
+					if(!(rd->status & Ixsm)){
+						ctlr->ixsm++;
+						if(rd->status & Ipcs){
+							/*
+							 * IP checksum calculated
+							 * (and valid as errors == 0).
+							 */
+							ctlr->ipcs++;
+							bp->flag |= Bipck;
+						}
+						if(rd->status & Tcpcs){
+							/*
+							 * TCP/UDP checksum calculated
+							 * (and valid as errors == 0).
+							 */
+							ctlr->tcpcs++;
+							bp->flag |= Btcpck|Budpck;
+						}
+						bp->checksum = rd->checksum;
+						bp->flag |= Bpktck;
+					}
+					etheriq(edev, bp, 1);
+				} else
+					freeb(bp);
+				ctlr->rb[rdh] = nil;
+			}
+			memset(rd, 0, sizeof(Rd));
+			ctlr->rdfree--;
+			ctlr->rdh = rdh = NEXT(rdh, ctlr->nrd);
+			coherence();
+			if(ctlr->rdfree < (ctlr->nrd/4)*3 || (rim & Rxdmt0))
+				i82563replenish(ctlr);
+		}
+	}
+}
+
+static void
+i82563attach(Ether* edev)
+{
+	Block *bp, *fbp;
+	Ctlr *ctlr;
+	char name[KNAMELEN];
+
+	ctlr = edev->ctlr;
+	qlock(&ctlr->alock);
+	if(ctlr->alloc != nil){
+		qunlock(&ctlr->alock);
+		return;
+	}
+
+	ctlr->nrd = ROUND(Nrd, 8);
+	ctlr->ntd = ROUND(Ntd, 8);
+	ctlr->alloc = malloc(ctlr->nrd*sizeof(Rd)+ctlr->ntd*sizeof(Td) + 255);
+	if(ctlr->alloc == nil){
+		qunlock(&ctlr->alock);
+		return;
+	}
+	ctlr->rdba = (Rd*)ROUNDUP((ulong)ctlr->alloc, 256);
+	ctlr->tdba = (Td*)(ctlr->rdba+ctlr->nrd);
+
+	ctlr->rb = malloc(ctlr->nrd*sizeof(Block*));
+	ctlr->tb = malloc(ctlr->ntd*sizeof(Block*));
+
+	if(waserror()){
+		while(ctlr->nrb > 0){
+			bp = i82563rballoc();
+			bp->free = nil;
+			freeb(bp);
+			ctlr->nrb--;
+		}
+		free(ctlr->tb);
+		ctlr->tb = nil;
+		free(ctlr->rb);
+		ctlr->rb = nil;
+		free(ctlr->alloc);
+		ctlr->alloc = nil;
+		qunlock(&ctlr->alock);
+		nexterror();
+	}
+
+	fbp = nil;
+	for(ctlr->nrb = 0; ctlr->nrb < Nrb; ){
+		if((bp = allocb(Rbsz)) == nil)
+			break;
+		if (((ulong)bp->base ^ (ulong)bp->lim) & ~0xffff) {
+			bp->next = fbp;
+			fbp = bp;
+			continue;
+		}
+		bp->free = i82563rbfree;
+		freeb(bp);
+		ctlr->nrb++;
+	}
+	freeblist(fbp);
+
+	snprint(name, KNAMELEN, "#l%drproc", edev->ctlrno);
+	kproc(name, i82563rproc, edev);
+
+	i82563txinit(ctlr);
+
+	qunlock(&ctlr->alock);
+	poperror();
+}
+
+static void
+i82563interrupt(Ureg*, void* arg)
+{
+	Ctlr *ctlr;
+	Ether *edev;
+	int icr, im, txdw;
+
+	edev = arg;
+	ctlr = edev->ctlr;
+
+	ilock(&ctlr->imlock);
+	csr32w(ctlr, Imc, ~0);
+	im = ctlr->im;
+	txdw = 0;
+
+	while(icr = csr32r(ctlr, Icr) & ctlr->im){
+		if(icr & Lsc){
+			im &= ~Lsc;
+			ctlr->lim = icr & Lsc;
+			wakeup(&ctlr->lrendez);
+			ctlr->lintr++;
+		}
+		if(icr & (Rxt0|Rxo|Rxdmt0|Rxseq)){
+			ctlr->rim = icr & (Rxt0|Rxo|Rxdmt0|Rxseq);
+			im &= ~(Rxt0|Rxo|Rxdmt0|Rxseq);
+			wakeup(&ctlr->rrendez);
+//			i82563rcv(edev);
+			ctlr->rintr++;
+		}
+		if(icr & Txdw){
+			im &= ~Txdw;
+			txdw++;
+			ctlr->tintr++;
+		}
+	}
+
+	ctlr->im = im;
+	csr32w(ctlr, Ims, im);
+	iunlock(&ctlr->imlock);
+
+	if(txdw)
+		i82563transmit(edev);
+}
+
+static int
+i82563detach(Ctlr* ctlr)
+{
+	int r, timeo;
+
+	/*
+	 * Perform a device reset to get the chip back to the
+	 * power-on state, followed by an EEPROM reset to read
+	 * the defaults for some internal registers.
+	 */
+	csr32w(ctlr, Imc, ~0);
+	csr32w(ctlr, Rctl, 0);
+	csr32w(ctlr, Tctl, 0);
+
+	delay(10);
+
+	csr32w(ctlr, Ctrl, Devrst);
+	delay(1);
+	for(timeo = 0; timeo < 1000; timeo++){
+		if(!(csr32r(ctlr, Ctrl) & Devrst))
+			break;
+		delay(1);
+	}
+	if(csr32r(ctlr, Ctrl) & Devrst)
+		return -1;
+	r = csr32r(ctlr, Ctrlext);
+	csr32w(ctlr, Ctrlext, r|Eerst);
+	delay(1);
+	for(timeo = 0; timeo < 1000; timeo++){
+		if(!(csr32r(ctlr, Ctrlext) & Eerst))
+			break;
+		delay(1);
+	}
+	if(csr32r(ctlr, Ctrlext) & Eerst)
+		return -1;
+
+	csr32w(ctlr, Imc, ~0);
+	delay(1);
+	for(timeo = 0; timeo < 1000; timeo++){
+		if(!csr32r(ctlr, Icr))
+			break;
+		delay(1);
+	}
+	if(csr32r(ctlr, Icr))
+		return -1;
+
+	return 0;
+}
+
+static void
+i82563shutdown(Ether* ether)
+{
+	i82563detach(ether->ctlr);
+}
+
+static ushort
+eeread(Ctlr* ctlr, int adr)
+{
+	csr32w(ctlr, Eerd, ee_start | adr << 2);
+	while ((csr32r(ctlr, Eerd) & ee_done) == 0)
+		;
+	return csr32r(ctlr, Eerd) >> 16;
+}
+
+static int
+eeload(Ctlr* ctlr)
+{
+	ushort sum;
+	int data, adr;
+
+	sum = 0;
+	for (adr = 0; adr < 0x40; adr++) {
+		data = eeread(ctlr, adr);
+		ctlr->eeprom[adr] = data;
+		sum += data;
+	}
+	return sum;
+}
+
+/*
+ * kind of unnecessary;
+ * but just in case they add 4 or 16 macs to the same ctlr.
+ */
+static uchar*
+etheradd(uchar *u, uint n)
+{
+	int i;
+	uint j;
+
+	for(i = 5; n != 0 && i >= 0; i--){
+		j = n+u[i];
+		u[i] = j;
+		n = j>>8;
+	}
+	return u;
+}
+
+typedef struct {
+	uchar	ea[Easize];
+	int	n;
+} Basetab;
+
+static Basetab btab[Maxmac];
+static int nbase;
+
+int
+nthether(uchar *ea)
+{
+	int i;
+
+	for(i = 0; i < nelem(btab); i++)
+		if(btab[i].n == 0 || memcmp(btab[i].ea, ea, Easize) == 0) {
+			memmove(btab[i].ea, ea, Easize);
+			return btab[i].n++;
+		}
+	return -1;
+}
+
+static int
+i82563reset(Ctlr* ctlr)
+{
+	int i, r;
+
+	if(i82563detach(ctlr))
+		return -1;
+	r = eeload(ctlr);
+	if (r != 0 && r != 0xBABA){
+		print("i82563: bad EEPROM checksum - 0x%4.4uX\n", r);
+		return -1;
+	}
+
+	for(i = Ea; i < Eaddrlen/2; i++){
+		ctlr->ra[2*i] = ctlr->eeprom[i];
+		ctlr->ra[2*i+1] = ctlr->eeprom[i]>>8;
+	}
+	etheradd(ctlr->ra, nthether(ctlr->ra));
+	r = (ctlr->ra[3]<<24)|(ctlr->ra[2]<<16)|(ctlr->ra[1]<<8)|ctlr->ra[0];
+	csr32w(ctlr, Ral, r);
+	r = 0x80000000|(ctlr->ra[5]<<8)|ctlr->ra[4];
+	csr32w(ctlr, Rah, r);
+	for(i = 1; i < 16; i++){
+		csr32w(ctlr, Ral+i*8, 0);
+		csr32w(ctlr, Rah+i*8, 0);
+	}
+	memset(ctlr->mta, 0, sizeof(ctlr->mta));
+	for(i = 0; i < 128; i++)
+		csr32w(ctlr, Mta+i*4, 0);
+	csr32w(ctlr, Fcal, 0x00C28001);
+	csr32w(ctlr, Fcah, 0x00000100);
+	csr32w(ctlr, Fct, 0x00008808);
+	csr32w(ctlr, Fcttv, 0x00000100);
+	csr32w(ctlr, Fcrtl, ctlr->fcrtl);
+	csr32w(ctlr, Fcrth, ctlr->fcrth);
+	return 0;
+}
+
+static void
+i82563pci(void)
+{
+	int cls;
+	Pcidev *p;
+	Ctlr *ctlr;
+	ulong io;
+	void *mem;
+
+	p = nil;
+	while(p = pcimatch(p, 0, 0)){
+		if(p->ccrb != Pcibcnet || p->ccru != 0)
+			continue;
+		if (p->vid != 0x8086 || p->did != 0x1096)
+			continue;
+
+		io = p->mem[0].bar & ~0x0F;
+		mem = vmap(io, p->mem[0].size);
+		if(mem == nil){
+			print("i82563: can't map %8.8luX\n", p->mem[0].bar);
+			continue;
+		}
+		cls = pcicfgr8(p, PciCLS);
+		switch(cls){
+			default:
+				print("i82563: unexpected CLS - %d\n", cls*4);
+				break;
+			case 0x00:
+			case 0xFF:
+				print("i82563: unusable CLS\n");
+				continue;
+			case 0x08:
+			case 0x10:
+				break;
+		}
+		ctlr = malloc(sizeof(Ctlr));
+		ctlr->port = io;
+		ctlr->pcidev = p;
+		ctlr->id = (p->did<<16)|p->vid;
+		ctlr->cls = cls*4;
+		ctlr->nic = mem;
+
+		if(i82563reset(ctlr)){
+			free(ctlr);
+			continue;
+		}
+		pcisetbme(p);
+
+		if(i82563ctlrhead != nil)
+			i82563ctlrtail->next = ctlr;
+		else
+			i82563ctlrhead = ctlr;
+		i82563ctlrtail = ctlr;
+	}
+}
+
+static int
+i82563pnp(Ether* edev)
+{
+	Ctlr *ctlr;
+
+	if(i82563ctlrhead == nil)
+		i82563pci();
+
+	/*
+	 * Any adapter matches if no edev->port is supplied,
+	 * otherwise the ports must match.
+	 */
+	for(ctlr = i82563ctlrhead; ctlr != nil; ctlr = ctlr->next)
+		if(ctlr->active)
+			continue;
+		else if(edev->port == 0 || edev->port == ctlr->port){
+			ctlr->active = 1;
+			break;
+		}
+	if(ctlr == nil)
+		return -1;
+
+	edev->ctlr = ctlr;
+	edev->port = ctlr->port;
+	edev->irq = ctlr->pcidev->intl;
+	edev->tbdf = ctlr->pcidev->tbdf;
+	edev->mbps = 1000;
+	edev->maxmtu = Rbsz;
+	memmove(edev->ea, ctlr->ra, Eaddrlen);
+
+	/*
+	 * Linkage to the generic ethernet driver.
+	 */
+	edev->attach = i82563attach;
+	edev->transmit = i82563transmit;
+	edev->interrupt = i82563interrupt;
+	edev->ifstat = i82563ifstat;
+	edev->ctl = i82563ctl;
+
+	edev->arg = edev;
+	edev->promiscuous = i82563promiscuous;
+	edev->shutdown = i82563shutdown;
+	edev->multicast = i82563multicast;
+
+	return 0;
+}
+
+void
+ether82563link(void)
+{
+	addethercard("i82563", i82563pnp);
+}

+ 0 - 1
sys/src/9/port/devcap.c

@@ -5,7 +5,6 @@
 #include	"fns.h"
 #include	"../port/error.h"
 
-#include	"netif.h"
 #include	<libsec.h>
 
 enum

+ 5 - 3
sys/src/boot/pc/ether.c

@@ -14,6 +14,7 @@ extern int ether2114xreset(Ether*);
 extern int elnk3reset(Ether*);
 extern int i82557reset(Ether*);
 extern int igbepnp(Ether *);
+extern int i82563pnp(Ether *);
 extern int elnk3reset(Ether*);
 extern int ether589reset(Ether*);
 extern int ne2000reset(Ether*);
@@ -25,7 +26,7 @@ extern int rtl8169pnp(Ether*);
 extern int ether83815reset(Ether*);
 extern int rhinepnp(Ether*);
 extern int ga620pnp(Ether*);
-//extern int dp83820pnp(Ether*);
+extern int dp83820pnp(Ether*);
 
 struct {
 	char	*type;
@@ -36,6 +37,7 @@ struct {
 	{ "2114x", ether2114xreset, 0, },
 	{ "i82557", i82557reset, 0, },
 	{ "igbe",  igbepnp, 0, },
+	{ "i82563",i82563pnp, 0, },
 	{ "elnk3", elnk3reset, 0, },
 	{ "3C509", elnk3reset, 0, },
 	{ "3C575", elnk3reset, 0, },
@@ -51,8 +53,8 @@ struct {
 	{ "83815", ether83815reset, 0, },
 	{ "rhine", rhinepnp, 0, },
 	{ "GA620", ga620pnp, 0, },
-//	{ "83820",   dp83820pnp, 0, },
-//	{ "dp83820", dp83820pnp, 0, },
+	{ "83820",   dp83820pnp, 0, },
+	{ "dp83820", dp83820pnp, 0, },
 
 	{ 0, }
 };

+ 948 - 0
sys/src/boot/pc/ether82563.c

@@ -0,0 +1,948 @@
+/*
+ * bootstrap driver for
+ * Intel 82563 Gigabit Ethernet Controller
+ */
+#include "u.h"
+#include "lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+
+#include "etherif.h"
+
+/* compatibility with cpu kernels */
+#define iallocb allocb
+#ifndef CACHELINESZ
+#define CACHELINESZ	32		/* pentium & later */
+#endif
+
+/* from pci.c */
+enum
+{					/* command register (pcidev->pcr) */
+	IOen		= (1<<0),
+	MEMen		= (1<<1),
+	MASen		= (1<<2),
+	MemWrInv	= (1<<4),
+	PErrEn		= (1<<6),
+	SErrEn		= (1<<8),
+};
+
+/*
+ * these are in the order they appear in the manual, not numeric order.
+ * It was too hard to find them in the book. Ref 21489, rev 2.6
+ */
+
+enum {
+	/* General */
+
+	Ctrl		= 0x00000000,	/* Device Control */
+	Status		= 0x00000008,	/* Device Status */
+	Eec		= 0x00000010,	/* EEPROM/Flash Control/Data */
+	Eerd		= 0x00000014,	/* EEPROM Read */
+	Ctrlext		= 0x00000018,	/* Extended Device Control */
+	Fla		= 0x0000001c,	/* Flash Access */
+	Mdic		= 0x00000020,	/* MDI Control */
+	Seresctl	= 0x00000024,	/* Serdes ana */
+	Fcal		= 0x00000028,	/* Flow Control Address Low */
+	Fcah		= 0x0000002C,	/* Flow Control Address High */
+	Fct		= 0x00000030,	/* Flow Control Type */
+	Kumctrlsta	= 0x00000034,	/* Kumeran Controll and Status Register */
+	Vet		= 0x00000038,	/* VLAN EtherType */
+	Fcttv		= 0x00000170,	/* Flow Control Transmit Timer Value */
+	Txcw		= 0x00000178,	/* Transmit Configuration Word */
+	Rxcw		= 0x00000180,	/* Receive Configuration Word */
+	Ledctl		= 0x00000E00,	/* LED control */
+	Pba		= 0x00001000,	/* Packet Buffer Allocation */
+
+	/* Interrupt */
+
+	Icr		= 0x000000C0,	/* Interrupt Cause Read */
+	Ics		= 0x000000C8,	/* Interrupt Cause Set */
+	Ims		= 0x000000D0,	/* Interrupt Mask Set/Read */
+	Imc		= 0x000000D8,	/* Interrupt mask Clear */
+	Iam		= 0x000000E0,	/* Interrupt acknowledge Auto Mask */
+
+	/* Receive */
+
+	Rctl		= 0x00000100,	/* Receive Control */
+	Ert		= 0x00002008,	/* Early Receive Threshold (573[EVL] only) */
+	Fcrtl		= 0x00002160,	/* Flow Control RX Threshold Low */
+	Fcrth		= 0x00002168,	/* Flow Control Rx Threshold High */
+	Psrctl		= 0x00002170,	/* Packet Split Receive Control */
+	Rdbal		= 0x00002800,	/* Rdesc Base Address Low Queue 0 */
+	Rdbah		= 0x00002804,	/* Rdesc Base Address High Queue 0 */
+	Rdlen		= 0x00002808,	/* Receive Descriptor Length Queue 0 */
+	Rdh		= 0x00002810,	/* Receive Descriptor Head Queue 0 */
+	Rdt		= 0x00002818,	/* Receive Descriptor Tail Queue 0 */
+	Rdtr		= 0x00002820,	/* Receive Descriptor Timer Ring */
+	Rxdctl		= 0x00002828,	/* Receive Descriptor Control */
+	Radv		= 0x0000282C,	/* Receive Interrupt Absolute Delay Timer */
+	Rdbal1		= 0x00002900,	/* Rdesc Base Address Low Queue 1 */
+	Rdbah1		= 0x00002804,	/* Rdesc Base Address High Queue 1 */
+	Rdlen1		= 0x00002908,	/* Receive Descriptor Length Queue 1 */
+	Rdh1		= 0x00002910,	/* Receive Descriptor Head Queue 1 */
+	Rdt1		= 0x00002918,	/* Receive Descriptor Tail Queue 1 */
+	Rxdctl1		= 0x00002928,	/* Receive Descriptor Control Queue 1 */
+	Rsrpd		= 0x00002c00,	/* Receive Small Packet Detect */
+	Raid		= 0x00002c08,	/* Receive ACK interrupt delay */
+	Cpuvec		= 0x00002c10,	/* CPU Vector */
+	Rxcsum		= 0x00005000,	/* Receive Checksum Control */
+	Rfctl		= 0x00005008,	/* Receive Filter Control */
+	Mta		= 0x00005200,	/* Multicast Table Array */
+	Ral		= 0x00005400,	/* Receive Address Low */
+	Rah		= 0x00005404,	/* Receive Address High */
+	Vfta		= 0x00005600,	/* VLAN Filter Table Array */
+	Mrqc		= 0x00005818,	/* Multiple Receive Queues Command */
+	Rssim		= 0x00005864,	/* RSS Interrupt Mask */
+	Rssir		= 0x00005868,	/* RSS Interrupt Request */
+	Reta		= 0x00005c00,	/* Redirection Table */
+	Rssrk		= 0x00005c80,	/* RSS Random Key */
+
+	/* Transmit */
+
+	Tctl		= 0x00000400,	/* Transmit Control */
+	Tipg		= 0x00000410,	/* Transmit IPG */
+	Tdbal		= 0x00003800,	/* Tdesc Base Address Low */
+	Tdbah		= 0x00003804,	/* Tdesc Base Address High */
+	Tdlen		= 0x00003808,	/* Transmit Descriptor Length */
+	Tdh		= 0x00003810,	/* Transmit Descriptor Head */
+	Tdt		= 0x00003818,	/* Transmit Descriptor Tail */
+	Tidv		= 0x00003820,	/* Transmit Interrupt Delay Value */
+	Txdctl		= 0x00003828,	/* Transmit Descriptor Control */
+	Tadv		= 0x0000382C,	/* Transmit Interrupt Absolute Delay Timer */
+	Tarc0		= 0x00003840,	/* Transmit Arbitration Counter Queue 0 */
+	Tdbal1		= 0x00003900,	/* Transmit Descriptor Base Low Queue 1 */
+	Tdbah1		= 0x00003904,	/* Transmit Descriptor Base High Queue 1 */
+	Tdlen1		= 0x00003908,	/* Transmit Descriptor Length Queue 1 */
+	Tdh1		= 0x00003910,	/* Transmit Descriptor Head Queue 1 */
+	Tdt1		= 0x00003918,	/* Transmit Descriptor Tail Queue 1 */
+	Txdctl1		= 0x00003928,	/* Transmit Descriptor Control 1 */
+	Tarc1		= 0x00003940,	/* Transmit Arbitration Counter Queue 1 */
+
+	/* Statistics */
+
+	Statistics	= 0x00004000,	/* Start of Statistics Area */
+	Gorcl		= 0x88/4,	/* Good Octets Received Count */
+	Gotcl		= 0x90/4,	/* Good Octets Transmitted Count */
+	Torl		= 0xC0/4,	/* Total Octets Received */
+	Totl		= 0xC8/4,	/* Total Octets Transmitted */
+	Nstatistics	= 64,
+
+};
+
+enum {					/* Ctrl */
+	GIOmd		= (1<<2),	/* BIO master disable */
+	Lrst		= (1<<3),	/* link reset */
+	Slu		= (1<<6),	/* Set Link Up */
+	SspeedMASK	= (3<<8),	/* Speed Selection */
+	SspeedSHIFT	= 8,
+	Sspeed10	= 0x00000000,	/* 10Mb/s */
+	Sspeed100	= 0x00000100,	/* 100Mb/s */
+	Sspeed1000	= 0x00000200,	/* 1000Mb/s */
+	Frcspd		= (1<<11),	/* Force Speed */
+	Frcdplx		= (1<<12),	/* Force Duplex */
+	SwdpinsloMASK	= 0x003C0000,	/* Software Defined Pins - lo nibble */
+	SwdpinsloSHIFT	= 18,
+	SwdpioloMASK	= 0x03C00000,	/* Software Defined Pins - I or O */
+	SwdpioloSHIFT	= 22,
+	Devrst		= (1<<26),	/* Device Reset */
+	Rfce		= (1<<27),	/* Receive Flow Control Enable */
+	Tfce		= (1<<28),	/* Transmit Flow Control Enable */
+	Vme		= (1<<30),	/* VLAN Mode Enable */
+	Phy_rst		= (1<<31),	/* Phy Reset */
+};
+
+enum {					/* Status */
+	Lu		= (1<<1),	/* Link Up */
+	Lanid		= (3<<2),	/* mask for Lan ID.
+	Txoff		= (1<<4),	/* Transmission Paused */
+	Tbimode		= (1<<5),	/* TBI Mode Indication */
+	SpeedMASK	= 0x000000C0,
+	Speed10		= 0x00000000,	/* 10Mb/s */
+	Speed100	= 0x00000040,	/* 100Mb/s */
+	Speed1000	= 0x00000080,	/* 1000Mb/s */
+	Phyra		= (1<<10),	/* PHY Reset Asserted */
+	GIOme		= (1<<19),	/* GIO Master Enable Status */
+};
+
+enum {					/* Ctrl and Status */
+	Fd		= 0x00000001,	/* Full-Duplex */
+	AsdvMASK	= 0x00000300,
+	Asdv10		= 0x00000000,	/* 10Mb/s */
+	Asdv100		= 0x00000100,	/* 100Mb/s */
+	Asdv1000	= 0x00000200,	/* 1000Mb/s */
+};
+
+enum {					/* Eec */
+	Sk		= (1<<0),	/* Clock input to the EEPROM */
+	Cs		= (1<<1),	/* Chip Select */
+	Di		= (1<<2),	/* Data Input to the EEPROM */
+	Do		= (1<<3),	/* Data Output from the EEPROM */
+	Areq		= (1<<6),	/* EEPROM Access Request */
+	Agnt		= (1<<7),	/* EEPROM Access Grant */
+};
+
+enum {					/* Eerd */
+	ee_start	= (1<<0),	/* Start Read */
+	ee_done		= (1<<1),	/* Read done */
+	ee_addr		= (0xfff8<<2),	/* Read address [15:2] */
+	ee_data		= (0xffff<<16),	/* Read Data; Data returned from eeprom/nvm */
+};
+
+enum {					/* Ctrlext */
+	Asdchk		= (1<<12),	/* ASD Check */
+	Eerst		= (1<<13),	/* EEPROM Reset */
+	Spdbyps		= (1<<15),	/* Speed Select Bypass */
+};
+
+enum {					/* EEPROM content offsets */
+	Ea		= 0x00,		/* Ethernet Address */
+	Cf		= 0x03,		/* Compatibility Field */
+	Icw1		= 0x0A,		/* Initialization Control Word 1 */
+	Sid		= 0x0B,		/* Subsystem ID */
+	Svid		= 0x0C,		/* Subsystem Vendor ID */
+	Did		= 0x0D,		/* Device ID */
+	Vid		= 0x0E,		/* Vendor ID */
+	Icw2		= 0x0F,		/* Initialization Control Word 2 */
+};
+
+enum {					/* Mdic */
+	MDIdMASK	= 0x0000FFFF,	/* Data */
+	MDIdSHIFT	= 0,
+	MDIrMASK	= 0x001F0000,	/* PHY Register Address */
+	MDIrSHIFT	= 16,
+	MDIpMASK	= 0x03E00000,	/* PHY Address */
+	MDIpSHIFT	= 21,
+	MDIwop		= 0x04000000,	/* Write Operation */
+	MDIrop		= 0x08000000,	/* Read Operation */
+	MDIready	= 0x10000000,	/* End of Transaction */
+	MDIie		= 0x20000000,	/* Interrupt Enable */
+	MDIe		= 0x40000000,	/* Error */
+};
+
+enum {					/* Icr, Ics, Ims, Imc */
+	Txdw		= 0x00000001,	/* Transmit Descriptor Written Back */
+	Txqe		= 0x00000002,	/* Transmit Queue Empty */
+	Lsc		= 0x00000004,	/* Link Status Change */
+	Rxseq		= 0x00000008,	/* Receive Sequence Error */
+	Rxdmt0		= 0x00000010,	/* Rdesc Minimum Threshold Reached */
+	Rxo		= 0x00000040,	/* Receiver Overrun */
+	Rxt0		= 0x00000080,	/* Receiver Timer Interrupt */
+	Mdac		= 0x00000200,	/* MDIO Access Completed */
+	Rxcfg		= 0x00000400,	/* Receiving /C/ ordered sets */
+	Gpi0		= 0x00000800,	/* General Purpose Interrupts */
+	Gpi1		= 0x00001000,
+	Gpi2		= 0x00002000,
+	Gpi3		= 0x00004000,
+};
+
+enum {					/* Txcw */
+	TxcwFd		= 0x00000020,	/* Full Duplex */
+	TxcwHd		= 0x00000040,	/* Half Duplex */
+	TxcwPauseMASK	= 0x00000180,	/* Pause */
+	TxcwPauseSHIFT	= 7,
+	TxcwPs		= (1<<TxcwPauseSHIFT),	/* Pause Supported */
+	TxcwAs		= (2<<TxcwPauseSHIFT),	/* Asymmetric FC desired */
+	TxcwRfiMASK	= 0x00003000,	/* Remote Fault Indication */
+	TxcwRfiSHIFT	= 12,
+	TxcwNpr		= 0x00008000,	/* Next Page Request */
+	TxcwConfig	= 0x40000000,	/* Transmit COnfig Control */
+	TxcwAne		= 0x80000000,	/* Auto-Negotiation Enable */
+};
+
+enum {					/* Rctl */
+	Rrst		= 0x00000001,	/* Receiver Software Reset */
+	Ren		= 0x00000002,	/* Receiver Enable */
+	Sbp		= 0x00000004,	/* Store Bad Packets */
+	Upe		= 0x00000008,	/* Unicast Promiscuous Enable */
+	Mpe		= 0x00000010,	/* Multicast Promiscuous Enable */
+	Lpe		= 0x00000020,	/* Long Packet Reception Enable */
+	LbmMASK		= 0x000000C0,	/* Loopback Mode */
+	LbmOFF		= 0x00000000,	/* No Loopback */
+	LbmTBI		= 0x00000040,	/* TBI Loopback */
+	LbmMII		= 0x00000080,	/* GMII/MII Loopback */
+	LbmXCVR		= 0x000000C0,	/* Transceiver Loopback */
+	RdtmsMASK	= 0x00000300,	/* Rdesc Minimum Threshold Size */
+	RdtmsHALF	= 0x00000000,	/* Threshold is 1/2 Rdlen */
+	RdtmsQUARTER	= 0x00000100,	/* Threshold is 1/4 Rdlen */
+	RdtmsEIGHTH	= 0x00000200,	/* Threshold is 1/8 Rdlen */
+	MoMASK		= 0x00003000,	/* Multicast Offset */
+	Bam		= 0x00008000,	/* Broadcast Accept Mode */
+	BsizeMASK	= 0x00030000,	/* Receive Buffer Size */
+	Bsize2048	= 0x00000000,
+	Bsize1024	= 0x00010000,
+	Bsize512	= 0x00020000,
+	Bsize256	= 0x00030000,
+	Vfe		= 0x00040000,	/* VLAN Filter Enable */
+	Cfien		= 0x00080000,	/* Canonical Form Indicator Enable */
+	Cfi		= 0x00100000,	/* Canonical Form Indicator value */
+	Dpf		= 0x00400000,	/* Discard Pause Frames */
+	Pmcf		= 0x00800000,	/* Pass MAC Control Frames */
+	Bsex		= 0x02000000,	/* Buffer Size Extension */
+	Secrc		= 0x04000000,	/* Strip CRC from incoming packet */
+};
+
+enum {					/* Tctl */
+	Trst		= 0x00000001,	/* Transmitter Software Reset */
+	Ten		= 0x00000002,	/* Transmit Enable */
+	Psp		= 0x00000008,	/* Pad Short Packets */
+	CtMASK		= 0x00000FF0,	/* Collision Threshold */
+	CtSHIFT		= 4,
+	ColdMASK	= 0x003FF000,	/* Collision Distance */
+	ColdSHIFT	= 12,
+	Swxoff		= 0x00400000,	/* Sofware XOFF Transmission */
+	Pbe		= 0x00800000,	/* Packet Burst Enable */
+	Rtlc		= 0x01000000,	/* Re-transmit on Late Collision */
+	Nrtu		= 0x02000000,	/* No Re-transmit on Underrrun */
+};
+
+enum {					/* [RT]xdctl */
+	PthreshMASK	= 0x0000003F,	/* Prefetch Threshold */
+	PthreshSHIFT	= 0,
+	HthreshMASK	= 0x00003F00,	/* Host Threshold */
+	HthreshSHIFT	= 8,
+	WthreshMASK	= 0x003F0000,	/* Writebacj Threshold */
+	WthreshSHIFT	= 16,
+	Gran		= 0x01000000,	/* Granularity */
+};
+
+enum {					/* Rxcsum */
+	PcssMASK	= 0x000000FF,	/* Packet Checksum Start */
+	PcssSHIFT	= 0,
+	Ipofl		= 0x00000100,	/* IP Checksum Off-load Enable */
+	Tuofl		= 0x00000200,	/* TCP/UDP Checksum Off-load Enable */
+};
+
+typedef struct Rdesc {			/* Receive Descriptor */
+	uint	addr[2];
+	ushort	length;
+	ushort	checksum;
+	uchar	status;
+	uchar	errors;
+	ushort	special;
+} Rdesc;
+
+enum {					/* Rdesc status */
+	Rdd		= 0x01,		/* Descriptor Done */
+	Reop		= 0x02,		/* End of Packet */
+	Ixsm		= 0x04,		/* Ignore Checksum Indication */
+	Vp		= 0x08,		/* Packet is 802.1Q (matched VET) */
+	Tcpcs		= 0x20,		/* TCP Checksum Calculated on Packet */
+	Ipcs		= 0x40,		/* IP Checksum Calculated on Packet */
+	Pif		= 0x80,		/* Passed in-exact filter */
+};
+
+enum {					/* Rdesc errors */
+	Ce		= 0x01,		/* CRC Error or Alignment Error */
+	Se		= 0x02,		/* Symbol Error */
+	Seq		= 0x04,		/* Sequence Error */
+	Cxe		= 0x10,		/* Carrier Extension Error */
+	Tcpe		= 0x20,		/* TCP/UDP Checksum Error */
+	Ipe		= 0x40,		/* IP Checksum Error */
+	Rxe		= 0x80,		/* RX Data Error */
+};
+
+typedef struct Tdesc {			/* Legacy+Normal Transmit Descriptor */
+	uint	addr[2];
+	uint	control;		/* varies with descriptor type */
+	uint	status;			/* varies with descriptor type */
+} Tdesc;
+
+enum {					/* Tdesc control */
+	LenMASK		= 0x000FFFFF,	/* Data/Packet Length Field */
+	LenSHIFT	= 0,
+	DtypeCD		= 0x00000000,	/* Data Type 'Context Descriptor' */
+	DtypeDD		= 0x00100000,	/* Data Type 'Data Descriptor' */
+	PtypeTCP	= 0x01000000,	/* TCP/UDP Packet Type (CD) */
+	Teop		= 0x01000000,	/* End of Packet (DD) */
+	PtypeIP		= 0x02000000,	/* IP Packet Type (CD) */
+	Ifcs		= 0x02000000,	/* Insert FCS (DD) */
+	Tse		= 0x04000000,	/* TCP Segmentation Enable */
+	Rs		= 0x08000000,	/* Report Status */
+	Rps		= 0x10000000,	/* Report Status Sent */
+	Dext		= 0x20000000,	/* Descriptor Extension */
+	Vle		= 0x40000000,	/* VLAN Packet Enable */
+	Ide		= 0x80000000,	/* Interrupt Delay Enable */
+};
+
+enum {					/* Tdesc status */
+	Tdd		= 0x00000001,	/* Descriptor Done */
+	Ec		= 0x00000002,	/* Excess Collisions */
+	Lc		= 0x00000004,	/* Late Collision */
+	Tu		= 0x00000008,	/* Transmit Underrun */
+	CssMASK		= 0x0000FF00,	/* Checksum Start Field */
+	CssSHIFT	= 8,
+};
+
+enum {
+	Nrdesc		= 128,		/* multiple of 8 */
+	Ntdesc		= 128,		/* multiple of 8 */
+};
+
+typedef struct Ctlr Ctlr;
+struct Ctlr {
+	int	port;
+	Pcidev*	pcidev;
+	Ctlr*	next;
+	int	active;
+	int	cls;
+	ushort	eeprom[0x40];
+
+	int*	nic;
+	Lock	imlock;
+	int	im;			/* interrupt mask */
+
+	Lock	slock;
+	uint	statistics[Nstatistics];
+
+	uchar	ra[Eaddrlen];		/* receive address */
+	ulong	mta[128];		/* multicast table array */
+
+	Rdesc*	rdba;			/* receive descriptor base address */
+	Block**	rb;			/* receive buffers */
+	int	rdh;			/* receive descriptor head */
+	int	rdt;			/* receive descriptor tail */
+
+	Tdesc*	tdba;			/* transmit descriptor base address */
+	Lock	tdlock;
+	Block**	tb;			/* transmit buffers */
+	int	tdh;			/* transmit descriptor head */
+	int	tdt;			/* transmit descriptor tail */
+
+	int	txcw;
+	int	fcrtl;
+	int	fcrth;
+
+	/* bootstrap goo */
+	Block*	bqhead;	/* transmission queue */
+	Block*	bqtail;
+};
+
+static Ctlr* ctlrhead;
+static Ctlr* ctlrtail;
+
+#define csr32r(c, r)	(*((c)->nic+((r)/4)))
+#define csr32w(c, r, v)	(*((c)->nic+((r)/4)) = (v))
+
+static void
+i82563im(Ctlr* ctlr, int im)
+{
+	ilock(&ctlr->imlock);
+	ctlr->im |= im;
+	csr32w(ctlr, Ims, ctlr->im);
+	iunlock(&ctlr->imlock);
+}
+
+static void
+i82563attach(Ether* edev)
+{
+	int ctl;
+	Ctlr *ctlr;
+
+	ctlr = edev->ctlr;
+	i82563im(ctlr, 0);
+	ctl = csr32r(ctlr, Rctl)|Ren;
+	csr32w(ctlr, Rctl, ctl);
+	ctl = csr32r(ctlr, Tctl)|Ten;
+	csr32w(ctlr, Tctl, ctl);
+}
+
+
+static void
+txstart(Ether *edev)
+{
+	int tdh, tdt, len, olen;
+	Ctlr *ctlr = edev->ctlr;
+	Block *bp;
+	Tdesc *tdesc;
+
+	/*
+	 * Try to fill the ring back up, moving buffers from the transmit q.
+	 */
+	tdh = PREV(ctlr->tdh, Ntdesc);
+	for(tdt = ctlr->tdt; tdt != tdh; tdt = NEXT(tdt, Ntdesc)){
+		/* pull off the head of the transmission queue */
+		if((bp = ctlr->bqhead) == nil)		/* was qget(edev->oq) */
+			break;
+		ctlr->bqhead = bp->next;
+		if (ctlr->bqtail == bp)
+			ctlr->bqtail = nil;
+		len = olen = BLEN(bp);
+
+		/*
+		 * if packet is too short, make it longer rather than relying
+		 * on ethernet interface to pad it and complain so the caller
+		 * will get fixed.  I don't think Psp is working right, or it's
+		 * getting cleared.
+		 */
+		if (len < ETHERMINTU) {
+			if (bp->rp + ETHERMINTU <= bp->lim)
+				bp->wp = bp->rp + ETHERMINTU;
+			else
+				bp->wp = bp->lim;
+			len = BLEN(bp);
+			print("txstart: extended short pkt %d -> %d bytes\n",
+				olen, len);
+		}
+
+		/* set up a descriptor for it */
+		tdesc = &ctlr->tdba[tdt];
+		tdesc->addr[0] = PCIWADDR(bp->rp);
+		tdesc->addr[1] = 0;
+		tdesc->control = /* Ide| */ Rs|Dext|Ifcs|Teop|DtypeDD|len;
+		tdesc->status = 0;
+
+		ctlr->tb[tdt] = bp;
+	}
+	ctlr->tdt = tdt;
+	csr32w(ctlr, Tdt, tdt);
+	i82563im(ctlr, Txdw);
+}
+
+static Block *
+fromringbuf(Ether *ether)
+{
+	RingBuf *tb = &ether->tb[ether->ti];
+	Block *bp = allocb(tb->len);
+
+	memmove(bp->wp, tb->pkt, tb->len);
+	memmove(bp->wp+Eaddrlen, ether->ea, Eaddrlen);
+	bp->wp += tb->len;
+	return bp;
+}
+
+static void
+i82563transmit(Ether* edev)
+{
+	Block *bp;
+	Ctlr *ctlr;
+	Tdesc *tdesc;
+	RingBuf *tb;
+	int tdh;
+
+	ctlr = edev->ctlr;
+	ilock(&ctlr->tdlock);
+
+	/*
+	 * Free any completed packets
+	 * - try to get the soft tdh to catch the tdt;
+	 * - if the packet had an underrun bump the threshold
+	 *   - the Tu bit doesn't seem to ever be set, perhaps
+	 *     because Rs mode is used?
+	 */
+	tdh = ctlr->tdh;
+	for(;;){
+		tdesc = &ctlr->tdba[tdh];
+		if(!(tdesc->status & Tdd))
+			break;
+		tdesc->status = 0;
+		if(ctlr->tb[tdh] != nil){
+			freeb(ctlr->tb[tdh]);
+			ctlr->tb[tdh] = nil;
+		}
+		tdh = NEXT(tdh, Ntdesc);
+	}
+	ctlr->tdh = tdh;
+
+	/* copy packets from the software RingBuf to the transmission q */
+	while((tb = &edev->tb[edev->ti])->owner == Interface){
+		bp = fromringbuf(edev);
+
+		if(ctlr->bqhead)
+			ctlr->bqtail->next = bp;
+		else
+			ctlr->bqhead = bp;
+		ctlr->bqtail = bp;
+
+		txstart(edev);		/* kick transmitter */
+		tb->owner = Host;	/* give descriptor back */
+		edev->ti = NEXT(edev->ti, edev->ntb);
+	}
+	iunlock(&ctlr->tdlock);
+}
+
+static void
+i82563replenish(Ctlr* ctlr)
+{
+	int rdt;
+	Block *bp;
+	Rdesc *rdesc;
+
+	rdt = ctlr->rdt;
+	while(NEXT(rdt, Nrdesc) != ctlr->rdh){
+		rdesc = &ctlr->rdba[rdt];
+		if(ctlr->rb[rdt] != nil){
+			/* nothing to do */
+		}
+		else if((bp = iallocb(2048)) != nil){
+			ctlr->rb[rdt] = bp;
+			rdesc->addr[0] = PCIWADDR(bp->rp);
+			rdesc->addr[1] = 0;
+		}
+		else
+			break;
+		rdesc->status = 0;
+
+		rdt = NEXT(rdt, Nrdesc);
+	}
+	ctlr->rdt = rdt;
+	csr32w(ctlr, Rdt, rdt);
+}
+
+static void
+toringbuf(Ether *ether, Block *bp)
+{
+	RingBuf *rb = &ether->rb[ether->ri];
+
+	if (rb->owner == Interface) {
+		rb->len = BLEN(bp);
+		memmove(rb->pkt, bp->rp, rb->len);
+		rb->owner = Host;
+		ether->ri = NEXT(ether->ri, ether->nrb);
+	}
+	/* else no one is expecting packets from the network */
+}
+
+static void
+i82563interrupt(Ureg*, void* arg)
+{
+	Block *bp;
+	Ctlr *ctlr;
+	Ether *edev;
+	Rdesc *rdesc;
+	int icr, im, rdh, txdw = 0;
+
+	edev = arg;
+	ctlr = edev->ctlr;
+
+	ilock(&ctlr->imlock);
+	csr32w(ctlr, Imc, ~0);
+	im = ctlr->im;
+
+	for(icr = csr32r(ctlr, Icr); icr & ctlr->im; icr = csr32r(ctlr, Icr)){
+		if(icr & (Rxseq|Lsc)){
+		}
+
+		rdh = ctlr->rdh;
+		for (;;) {
+			rdesc = &ctlr->rdba[rdh];
+			if(!(rdesc->status & Rdd))
+				break;
+			if ((rdesc->status & Reop) && rdesc->errors == 0) {
+				bp = ctlr->rb[rdh];
+				ctlr->rb[rdh] = nil;
+				bp->wp += rdesc->length;
+				toringbuf(edev, bp);