Plan 9 from Bell Labs 2012-05-11

sys/man/8/9boot

@@ -0,0 +1,535 @@
+.TH 9BOOT 8
+.SH NAME
+9boot, 9bootpbs, 9load, 9loadusb \- PC bootstrap programs
+.SH SYNOPSIS
+.I none
+.SH DESCRIPTION
+.I 9boot
+is a specialized Plan 9 kernel loaded by
+the PXE download (BOOTP/DHCP followed by TFTP)
+found in any reasonable Ethernet card's BIOS; it bootstraps Plan 9 by using
+PXE to load another
+.B 386
+or
+.B amd64
+kernel and start it.
+.PP
+.IR 9bootpbs ,
+.I 9load
+and
+.I 9loadusb
+are less commonly used variants
+that reside in a FAT file system under the name
+.L 9load
+and bootstrap Plan 9.
+.I 9bootpbs
+is like
+.I 9boot
+but it can be started by a partition boot sector (PBS),
+as can
+.I 9load
+and
+.IR 9loadusb .
+It is intended to PXE boot older machines without working PXE ROMs.
+.I 9load
+and
+.I 9loadusb
+read FAT file systems.
+.I 9loadusb
+will use only the BIOS's device drivers,
+and thus can load from FAT file systems on USB devices.
+In contrast,
+.I 9load
+will
+.I not
+use BIOS device drivers and cannot read USB devices.
+.PP
+This profusion of loaders is unfortunate, but at least they
+are compiled from the same source.
+The division into separate programs is dictated by the need to fit
+within the first 640K of memory
+and the need to avoid intermixing BIOS and non-BIOS disk access.
+.PP
+These programs are run automatically by the boot procedures described below;
+they cannot be run directly by hand.
+There are two bootstrap sequences:
+.IP \- 3
+PXE BIOS,
+.IR 9boot ,
+kernel
+.IP \-
+BIOS, MBR, disk partition PBS,
+.IR 9load ,
+kernel
+.\" .IP \-
+.\" BIOS, floppy PBS,
+.\" .IR 9load ,
+.\" kernel
+.PP
+Details follow.
+.SS "Loading these bootstraps"
+.I 9boot
+is a bootstrap program that loads and starts a program,
+typically the kernel, on a PC.
+It is run by the PXE boot ROM of a PC,
+which loads
+.I 9boot
+at location
+.B 0x7C00
+(31K).
+.I 9boot
+begins execution at virtual address
+.B 0x80007C00
+and reads a
+.IR plan.ini (8)
+file from
+.B /cfg/pxe
+via PXE,
+then loads the named
+.I bootfile
+via PXE,
+using each ethernet in sequence,
+at the entry address specified by the header,
+usually virtual
+.BR 0xF0100020 .
+After loading, control is passed to the entry location.
+.PP
+.I 9load
+is a similar bootstrap program,
+run by the PC partition boot sector program (PBS),
+which usually resides in the first
+sector of the active partition.
+A copy of the Plan 9 PBS is kept in
+.BR /386/pbs ,
+but due to the ``cylinder-head-sector'' (CHS) addressing mode of old BIOSes, it can only
+operate up to 8.5GB into the disk.
+Plan 9 partitions further into the disk
+can only be booted using
+.BR /386/pbslba ,
+and then only if the machine's BIOS supports
+linear block addressing (LBA) mode for disk transfers.
+.PP
+When booting from disk,
+.\" or floppy,
+the BIOS loads the
+first sector of the medium at location
+.BR 0x7C00 .
+In the case of a disk, it is the master boot record (MBR).
+.\" In the case of a floppy, this is the PBS.
+The MBR copies itself to address
+.BR 0x600 ,
+finds the active partition and loads its PBS at address
+.BR 0x7C00 .
+A copy of the Plan 9 MBR is kept in
+.BR /386/mbr ;
+some commercial MBRs cannot read sectors
+past 2GB.
+The Plan 9 MBR can read sectors up to 8.5GB into
+the disk, and further if the BIOS supports LBA.
+The single file
+.B /386/mbr
+detects whether the BIOS supports LBA and
+acts appropriately, defaulting to CHS mode
+when LBA is not present.
+The PBSs cannot do this due to code size limitations.
+The Plan 9 MBR is suitable for booting non-Plan 9
+operating systems,
+and (modulo the large disk constraints just described)
+non-Plan 9 MBRs are suitable for booting Plan 9.
+.PP
+.I 9load
+begins execution at virtual address
+.B 0x80010000
+(physical 64K) and
+loads the
+.I bootfile
+at the entry address specified by the header,
+usually virtual
+.BR 0xF0100020 .
+After loading, control is passed to the entry location.
+.PP
+In summary,
+Plan 9 is usually booted on a PC
+by using a PXE-capable BIOS to boot
+.I 9boot
+directly over the ethernet.
+File servers that must be able to boot when other machines are down
+boot directly from a Plan 9 disk partition
+.\" or boot floppy
+prepared using
+.B format
+to install the appropriate files and bootstrap sectors
+(see
+.IR prep (8)).
+.br
+.ne 4
+.SS Bootfile
+The
+.I bootfile
+can be specified to these programs as a
+.B bootfile=
+entry in
+.IR plan9.ini ,
+or if booting from the ethernet, by a BOOTP server
+(see
+.B Kernel
+.B loading
+below).
+If loading with
+.IR 9load ,
+the
+.I bootfile
+may be compressed with
+.IR gzip (1).
+In all cases,
+the uncompressed kernel must be in Plan 9 boot image or ELF format.
+If the
+.B plan9.ini
+file contains multiple
+.B bootfile=
+entries,
+these programs will present a numerical menu of the choices; type
+the corresponding number to select an entry.
+.PP
+The format of the
+.I bootfile
+name is
+.IB device ! file
+or
+.IB device ! partition ! file\f1.
+If
+.BI ! file
+is omitted, the default for the particular
+.I device
+is used.
+Supported
+.I devices
+are
+.TF \fLethern
+.PD
+.TP
+.BI ether n
+Ethernet,
+.I 9boot
+only.
+.I N
+specifies the Ethernet device number.
+If a
+.I partition
+is specified, it is taken to be the name of a host machine
+from which to load the kernel.
+.TP
+.BI sd Cn
+Normal disk,
+.I 9load
+only.
+The device name format is described in
+.IR sd (3).
+A
+.I partition
+must be given and must normally
+name a partition containing a FAT file system.
+.\" The name
+.\" .B dos
+.\" refers to the first DOS partition on a given device.
+It is common for Plan 9 partitions to contain a small
+FAT file system for configuration.
+By convention, this partition is called
+.BR 9fat .
+There is no default partition,
+but if
+.I file
+is omitted,
+.I 9load
+will load a kernel directly from the named partition
+without any interpretation of a file system.
+.
+.ig
+.TP
+.BI fd n
+An MS-DOS floppy disk,
+.I 9load
+only.
+.I N
+specifies the floppy drive, either
+0 or 1.
+The
+.I bootfile
+is the contents of the MS-DOS
+.IR file .
+There is no default file.
+For compatibility with normal disks, a
+.I partition
+may be given, but only
+.B dos
+is recognized:
+.BI fd0!dos! file\f1.
+..
+.
+.TP
+.BI bios n
+USB or other BIOS device,
+.IR 9loadusb
+only.
+.I 9load
+loads from a FAT file system on
+the first LBA device
+in the BIOS's list of devices to try to boot from,
+using the BIOS INT 13 calls also used by
+.IR pbslba .
+It does not understand any form of partition table;
+see the
+.B EXAMPLES
+in
+.IR prep (8)
+for how to format such a device.
+.TP
+.BI sdB n
+USB or other BIOS device's partition,
+.IR 9loadusb
+only.
+A special case of
+.BI sd Cn
+that uses
+.BI bios n
+to read from a FAT file system.
+.SS Kernel loading
+.I 9boot
+is initially loaded by the PXE BIOS at physical address
+.BR 0x7C00 .
+When it starts running,
+it switches to 32-bit mode.
+It then double maps the first 16Mb of physical memory to
+virtual addresses
+.B 0
+and
+.BR 0x80000000 .
+Only devices which can be automatically configured,
+e.g. most PCI ethernet adapters,
+will be recognised.
+If the file
+.BI /cfg/pxe/ ether
+can be located via a DHCP server,
+where
+.I ether
+is the lower-case MAC address of a recognised ethernet adapter,
+the contents are obtained and used as a
+.IR plan9.ini .
+.PP
+.I 9load
+differs slightly in operation from
+.IR 9boot .
+It is initially loaded by a partition boot sector at physical address
+.BR 0x10000 .
+In order to find configuration information,
+.I 9load
+searches all units on devices
+.\" .BR fd
+.\" and
+.BI sd Cn \fR
+(all
+.B sd
+devices),
+for a file called
+.\" .B plan9\eplan9.ini
+.\" or
+.B plan9.ini
+(see
+.IR plan9.ini (8))
+on a FAT partition named
+.B dos
+or
+.BR 9fat .
+If one is found, searching stops and the file is read into memory
+at physical address
+.B 0x1200
+where it can be found later by any loaded
+.IR bootfile .
+Some options in
+.B plan9.ini
+are used by
+.IR 9boot :
+.TF bootfile=manual
+.TP
+.B console
+.TP
+.B baud
+Specifies the console device and baud rate if not a display.
+.TP
+.BI ether n
+Ethernet interfaces. These can be used to load the
+.I bootfile
+over a network.
+.TP
+.BI bootfile= bootfile
+Specifies the
+.IR bootfile .
+This option is overridden by a command-line argument.
+.ig
+.TP
+.B bootfile=auto
+Default.
+.TP
+.B bootfile=local
+Like
+.IR auto ,
+but do not attempt to load over the network.
+..
+.TP
+.B bootfile=manual
+After determining which devices are available for loading from,
+enter prompt mode.
+.PD
+.PP
+When the search for
+.B plan9.ini
+is done,
+.I 9load
+proceeds to determine which bootfile to load.
+If there was no
+.I bootfile
+option,
+.I 9load
+searches
+.BI sd Cn \fR
+FAT partitions for a kernel
+(any file named
+.B 9pc*
+or
+.BR 9k8* )
+and if it finds exactly one kernel in a given FAT partition,
+chooses it.
+.I 9load
+then attempts to load the
+.IR bootfile .
+.ig
+unless
+the
+.B bootfile=manual
+option was given, in which case prompt mode is entered immediately.
+..
+.ig
+If the default device is
+.BR fd ,
+.I 9load
+will prompt the user for input before proceeding with the
+default bootfile load after 5 seconds;
+this prompt is omitted if
+a command-line argument or
+.I bootfile
+option
+was given.
+..
+.PP
+.I 9load
+prints the list of available
+.IR device s
+and
+enters prompt mode on encountering any error
+or if directed to do so by a
+.B bootfile=manual
+option.
+In prompt mode, the user is required to type
+a
+.IB bootfile
+in response to the
+.L "Boot from:"
+prompt.
+.br
+.ne 4
+.SS Other facilities and caveats
+.I 9load
+parses the master boot record and Plan 9 partition tables
+(see
+.IR prep (8)),
+leaving partitioning information appended to the
+in-memory contents of
+.I plan9.ini
+for the
+.IR bootfile .
+This is used by
+.IR sd (3)
+to initialize partitions so that
+may be read for NVRAM contents or
+.IR fossil (4)
+or
+.IR kfs (4)
+file systems can be mounted as the root file system.
+A more extensive partitioning is typically done by
+.I fdisk
+and
+.I prep
+as part of
+.I termrc
+or
+.I cpurc
+(see
+.IR cpurc (8)).
+.I 9boot
+cannot parse partition tables,
+as it lacks disk drivers, so add
+.L readparts=
+to your
+.B /cfg/pxe
+file, per
+.IR plan9.ini (8),
+if needed.
+.PP
+A
+control-P
+character typed at any time on the console causes
+.B 9boot
+to perform a hardware reset
+(Ctrl-Alt-Del can also be used on a PC keyboard).
+.PP
+.I 9load
+must be contiguously allocated on
+the disk.
+See
+.IR dossrv (4)
+for information on ensuring this.
+.SH FILES
+.TF /cfg/pxe
+.TP
+.B /386
+these programs reside here
+.TP
+.BI /cfg/pxe
+directory of
+.I plan9.ini
+files on your TFTP server
+.PP
+.IB "FAT-filesystem" :\e9load
+.br
+.IB "FAT-filesystem" :\eplan9.ini
+.br
+.IB "FAT-filesystem" :\eplan9\eplan9.ini
+.SH SOURCE
+.TF /sys/src/9/pcboot
+.PD 0
+.TP
+.B /sys/src/boot/pc
+first-stage disk boot sectors
+.TP
+.B /sys/src/9/pcboot
+.TP
+.B /sys/src/9/pc
+.PD
+.SH "SEE ALSO"
+.IR cons (3),
+.IR booting (8),
+.IR dhcpd (8),
+.IR fshalt (8),
+.IR mkusbboot (8),
+.IR plan9.ini (8),
+.IR prep (8)
+.SH BUGS
+Some of the work done by
+.I 9boot
+is duplicated by the loaded kernel,
+but usually by the same source code.
+.PP
+.B bios
+and
+.B sdB
+usually only work on the first LBA device in the BIOS's list of boot devices.

sys/man/8/INDEX

@@ -1,11 +1,10 @@
 0intro 0intro
 intro 0intro
 6in4 6in4
-9load 9load
-9loadask 9load
-9loadusb 9load
-9pxeload 9load
-ld 9load
+9boot 9boot
+9bootpbs 9boot
+9load 9boot
+9loadusb 9boot
 9pcon 9pcon
 aan aan
 aliasmail aliasmail
@@ -138,6 +137,12 @@ newuser newuser
 nfsserver nfsserver
 pcnfsd nfsserver
 portmapper nfsserver
+9loadask old9load
+9loadusb old9load
+9pxeload old9load
+ld old9load
+old9load old9load
+old9load: 9load old9load
 partfs partfs
 pci pci
 pcmcia pcmcia

sys/man/8/INDEX.html

@@ -14,9 +14,9 @@
 -  configure and run automatic or manual 6to4 tunnel of IPv6 through IPv4
 <DD><TT> 6in4</TT>
 </DT>
-<DT><A HREF="/magic/man2html/8/9load">9load</A>
--  PC bootstrap program
-<DD><TT> 9load, 9pxeload, 9loadusb, 9loadask, ld</TT>
+<DT><A HREF="/magic/man2html/8/9boot">9boot</A>
+-  PC bootstrap programs
+<DD><TT> 9boot, 9bootpbs, 9load, 9loadusb</TT>
 </DT>
 <DT><A HREF="/magic/man2html/8/9pcon">9pcon</A>
 -  9P to text translator
@@ -190,6 +190,10 @@
 -  NFS service
 <DD><TT> nfsserver, portmapper, pcnfsd</TT>
 </DT>
+<DT><A HREF="/magic/man2html/8/old9load">old9load</A>
+-  old PC bootstrap program
+<DD><TT> old9load: 9load, 9pxeload, 9loadusb, 9loadask, ld</TT>
+</DT>
 <DT><A HREF="/magic/man2html/8/partfs">partfs</A>
 -  serve file, with partitions
 <DD><TT> partfs</TT>

sys/man/8/old9load

@@ -1,6 +1,6 @@
-.TH 9LOAD 8
+.TH OLD9LOAD 8
 .SH NAME
-9load, 9pxeload, 9loadusb, 9loadask, ld \- PC bootstrap program
+old9load: 9load, 9pxeload, 9loadusb, 9loadask, ld \- old PC bootstrap program
 .SH SYNOPSIS
 .I "(Under MS-DOS)
 .br

sys/man/8/plan9.ini

@@ -5,14 +5,14 @@ plan9.ini \- configuration file primarily for PCs
 .I none
 .SH DESCRIPTION
 When booting Plan 9 on a PC, the bootstrap programs described in
-.IR 9load (8)
+.IR 9boot (8)
 first read,
 via TFTP or a FAT filesystem on the boot disk,
 a file containing configuration information.
 This file,
 .BI /cfg/pxe/ hex-digits
 (TFTP; see
-.IR 9load (8))
+.IR 9boot (8))
 or
 .B plan9.ini
 (FAT),
@@ -89,12 +89,12 @@ Thus, if you want to load a kernel over the Ethernet, you need
 to specify an
 .B ether0
 line so that
-.I 9load
+.I 9boot
 can find the Ethernet card, even if the kernel would
 have automatically detected it.
 ..
 .PP
-Some cards are software configurable and do not require all options.
+Many cards are software configurable and do not require all options.
 Unspecified options default to the factory defaults.
 .PP
 Known
@@ -123,7 +123,6 @@ and other cards using the Alteon Acenic chip such as the
 Alteon Acenic fiber and copper cards,
 the DEC DEGPA-SA and the SGI Acenic.
 Completely configurable.
-Can't boot through these due to enormous firmware loads.
 .TP
 .B dp83820
 National Semiconductor DP83820-based Gigabit Ethernet adapters, notably
@@ -137,7 +136,6 @@ Known to drive the VIA8237 (ABIT AV8), but at 100Mb/s full-duplex only.
 .B m10g
 The Myricom 10-Gigabit Ethernet 10G-PCIE-8A controller.
 Completely configurable.
-Can't boot through these due to enormous firmware loads.
 .TP
 .B i82598
 The Intel 8259[89] 10-Gigabit Ethernet PCI-Express controllers.
@@ -737,7 +735,7 @@ is started, so NVRAM, for example, may be found.
 On PCs,
 .I 9load
 (but not
-.IR 9load )
+.IR 9boot )
 normally does this and passes the partitions found in
 .BR #ec/sd\fICn\fPpart .
 .SS \fLfs=\fIa.b.c.d
@@ -1012,7 +1010,7 @@ ether0=type=i82557
 audio0=type=sb16 port=0x220 irq=5 dma=1
 .EE
 .SH "SEE ALSO"
-.IR 9load (8),
+.IR 9boot (8),
 .IR booting (8),
 .IR boot (8)
 .SH BUGS

sys/src/boot/_pc/dosfs.h

@@ -0,0 +1,62 @@
+typedef struct Dosboot	Dosboot;
+typedef struct Dos	Dos;
+typedef struct Dosdir	Dosdir;
+typedef struct Dosfile	Dosfile;
+typedef struct Dospart	Dospart;
+
+struct Dospart
+{
+	uchar flag;		/* active flag */
+	uchar shead;		/* starting head */
+	uchar scs[2];		/* starting cylinder/sector */
+	uchar type;		/* partition type */
+	uchar ehead;		/* ending head */
+	uchar ecs[2];		/* ending cylinder/sector */
+	uchar start[4];		/* starting sector */
+	uchar len[4];		/* length in sectors */
+};
+
+#define FAT12	0x01
+#define FAT16	0x04
+#define EXTEND	0x05
+#define FATHUGE	0x06
+#define FAT32	0x0b
+#define FAT32X	0x0c
+#define EXTHUGE	0x0f
+#define DMDDO	0x54
+#define PLAN9	0x39
+#define LEXTEND 0x85
+
+struct Dosfile{
+	Dos	*dos;		/* owning dos file system */
+	char	name[8];
+	char	ext[3];
+	uchar	attr;
+	long	length;
+	long	pstart;		/* physical start cluster address */
+	long	pcurrent;	/* physical current cluster address */
+	long	lcurrent;	/* logical current cluster address */
+	long	offset;
+};
+
+struct Dos{
+	long	start;		/* start of file system */
+	int	sectsize;	/* in bytes */
+	int	clustsize;	/* in sectors */
+	int	clustbytes;	/* in bytes */
+	int	nresrv;		/* sectors */
+	int	nfats;		/* usually 2 */
+	int	rootsize;	/* number of entries */
+	int	volsize;	/* in sectors */
+	int	mediadesc;
+	int	fatsize;	/* in sectors */
+	int	fatclusters;
+	int	fatbits;	/* 12 or 16 */
+	long	fataddr;	/* sector number */
+	long	rootaddr;
+	long	rootclust;
+	long	dataaddr;
+	long	freeptr;
+};
+
+extern int	dosinit(Fs*);

sys/src/boot/pc/memory.c → sys/src/boot/_pc/memory.c

@@ -48,13 +48,6 @@ static RMap rmapupa = {
 	&mapupa[7],
 };
 
-static Map xmapupa[8];
-static RMap xrmapupa = {
-	"unbacked physical memory",
-	xmapupa,
-	&xmapupa[7],
-};
-
 static Map mapram[8];
 static RMap rmapram = {
 	"physical memory",
@@ -207,7 +200,7 @@ mapalloc(RMap* rmap, ulong addr, int size, int align)
 static void
 umbscan(void)
 {
-	uchar *p;
+	uchar o[2], *p;
 
 	/*
 	 * Scan the Upper Memory Blocks (0xA0000->0xF0000) for pieces
@@ -225,29 +218,32 @@ umbscan(void)
 	 */
 	p = KADDR(0xD0000);	/*RSC: changed from 0xC0000 */
 	while(p < (uchar*)KADDR(0xE0000)){
-		if (p[0] == 0x55 && p[1] == 0xAA) {
-			/* Skip p[2] chunks of 512 bytes.  Test for 0x55 AA before
-			     poking obtrusively, or else the Thinkpad X20 dies when
-			     setting up the cardbus (PB) */
-			p += p[2] * 512;
+		/*
+		 * Check for the ROM signature, skip if valid.
+		 */
+		if(p[0] == 0x55 && p[1] == 0xAA){
+			p += p[2]*512;
 			continue;
 		}
 
+		/*
+		 * Is it writeable? If yes, then stick it in
+		 * the UMB device memory map. A floating bus will
+		 * return 0xff, so add that to the map of the
+		 * UMB space available for allocation.
+		 * If it is neither of those, ignore it.
+		 */
+		o[0] = p[0];
 		p[0] = 0xCC;
+		o[1] = p[2*KB-1];
 		p[2*KB-1] = 0xCC;
-		if(p[0] != 0xCC || p[2*KB-1] != 0xCC){
-			p[0] = 0x55;
-			p[1] = 0xAA;
-			p[2] = 4;
-			if(p[0] == 0x55 && p[1] == 0xAA){
-				p += p[2]*512;
-				continue;
-			}
-			if(p[0] == 0xFF && p[1] == 0xFF)
-				mapfree(&rmapumb, PADDR(p), 2*KB);
-		}
-		else
+		if(p[0] == 0xCC && p[2*KB-1] == 0xCC){
+			p[0] = o[0];
+			p[2*KB-1] = o[1];
 			mapfree(&rmapumbrw, PADDR(p), 2*KB);
+		}
+		else if(p[0] == 0xFF && p[1] == 0xFF)
+			mapfree(&rmapumb, PADDR(p), 2*KB);
 		p += 2*KB;
 	}
 
@@ -297,7 +293,7 @@ ulong
 umbrwmalloc(ulong addr, int size, int align)
 {
 	ulong a;
-	uchar *p;
+	uchar o[2], *p;
 
 	if(a = mapalloc(&rmapumbrw, addr, size, align))
 		return(ulong)KADDR(a);
@@ -309,10 +305,16 @@ umbrwmalloc(ulong addr, int size, int align)
 	if((a = umbmalloc(addr, size, align)) == 0)
 		return 0;
 	p = (uchar*)a;
+	o[0] = p[0];
 	p[0] = 0xCC;
+	o[1] = p[size-1];
 	p[size-1] = 0xCC;
-	if(p[0] == 0xCC && p[size-1] == 0xCC)
+	if(p[0] == 0xCC && p[size-1] == 0xCC){
+		p[0] = o[0];
+		p[size-1] = o[1];
 		return a;
+	}
+	
 	umbfree(a, size);
 
 	return 0;

sys/src/boot/_pc/mkfile

@@ -0,0 +1,215 @@
+objtype=386
+</$objtype/mkfile
+BIN=/386
+
+TARG=\
+	9load\
+	9loadask\
+	9loaddebug\
+	9loadlite\
+	9loadlitedebug\
+	9loadusb\
+	9pxeload\
+	9pxeloaddebug\
+
+CORE=\
+	alarm.$O\
+	cga.$O\
+	clock.$O\
+	console.$O\
+	devfloppy.$O\
+	dma.$O\
+	dosboot.$O\
+	fs.$O\
+	ilock.$O\
+	kbd.$O\
+	kfsboot.$O\
+	print.$O\
+	queue.$O\
+	trap.$O\
+
+LOAD=\
+	8250.$O\
+	apm.$O\
+	boot.$O\
+	cis.$O\
+	conf.$O\
+	devbios.$O\
+	devi82365.$O\
+	devpccard.$O\
+	devsd.$O\
+	inflate.$O\
+	load.$O\
+	memory.$O\
+	part.$O\
+	pci.$O\
+	sd53c8xx.$O\
+	sdaoe.$O\
+	sdata.$O\
+	sdbios.$O\
+	sdiahci.$O\
+	sdmylex.$O\
+	sdscsi.$O\
+
+ETHER=\
+	bootp.$O\
+	ether.$O\
+	ether2000.$O\
+	ether2114x.$O\
+	ether589.$O\
+	ether79c970.$O\
+	ether8003.$O\
+	ether8139.$O\
+	ether8169.$O\
+	ether82557.$O\
+	ether82563.$O\
+	ether83815.$O\
+	ether8390.$O\
+	etherdp83820.$O\
+	etherec2t.$O\
+	etherelnk3.$O\
+	etherigbe.$O\
+	ethermii.$O\
+	etherrhine.$O\
+
+BCOM=\
+	bcom.$O\
+	bootld.$O\
+	devsd.$O\
+	memory.$O\
+	part.$O\
+	pci.$O\
+	sdata.$O\
+	sdscsi.$O\
+
+HFILES=\
+	lib.h\
+	mem.h\
+	dat.h\
+	fns.h\
+	io.h\
+	aoe.h\
+	x16.h\
+
+CFLAGS=-FTVw -I.
+
+all:V:	$TARG
+
+9load:	l.$O $CORE $LOAD $ETHER nobiosload.$O
+	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
+	ls -l $target
+
+9pxeload:	lpxe.$O $CORE $LOAD $ETHER nobiosload.$O
+	$LD -o $target -H3 -T0x80007C00 -l $prereq -lflate -lc -lip
+	ls -l $target
+
+9loaddebug:	l.$O $CORE $LOAD $ETHER nobiosload.$O
+	$LD -o $target -T0x80010000 -l $prereq -lflate -lc -lip
+	ls -l $target
+	# acid $target
+	# map({"text", 0x80010000, 0x80090000, 0x00000020})
+
+9pxeloaddebug:	lpxe.$O $CORE $LOAD $ETHER nobiosload.$O
+	$LD -o $target -T0x80007C00 -l $prereq -lflate -lc -lip
+	ls -l $target
+	# acid $target
+	# map({"text", 0x80010000, 0x80090000, 0x00000020})
+
+9loadlite:	l.$O $CORE $LOAD noether.$O nobiosload.$O
+	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc
+	ls -l $target
+
+9loadlitedebug:	l.$O $CORE $LOAD noether.$O nobiosload.$O
+	$LD -o $target -T0x80010000 -l $prereq -lflate -lc
+	ls -l $target
+	# acid $target
+	# map({"text", 0x80010000, 0x80090000, 0x00000020})
+
+9loadusb:	l.$O $CORE $LOAD $ETHER biosload.$O
+	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
+	ls -l $target
+
+9loadask:	l.$O $CORE $LOAD $ETHER askbiosload.$O
+	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
+	ls -l $target
+
+ld.com:	ld.$O $CORE $BCOM
+	$LD -o $target -H3 -T0x80080100 -l $prereq -lc
+	ls -l $target
+
+lddebug:	ld.$O $CORE $BCOM
+	$LD -o $target -T0x80080100 -l $prereq -lc
+	ls -l $target
+	# acid $target
+	# map({"text", 0x80080100, 0x800B0000, 0x00000020})
+
+ld.$O:	l.s
+	$AS -DDOTCOM -o $target l.s
+
+l.$O: l.s
+	$AS -DVGA -o $target l.s
+
+lpxe.$O: l.s
+	$AS -DPXE -DVGA -o $target l.s
+
+lnovga.$O: l.s
+	$AS -o $target l.s
+
+lpxenovga.$O: l.s
+	$AS -DPXE -o $target l.s
+
+loadverb.$O: load.c
+	$CC -o $target $CFLAGS '-DVERBOSE=1' load.c
+
+%.$O:	%.s
+	$AS $stem.s
+
+%.$O:	%.c
+	$CC $CFLAGS $stem.c
+
+%.$O:	$HFILES
+
+clock.$O floppy.$O trap.$O:	ureg.h
+bcom.$O conf.$O devfloppy.$O devsd.$O dosboot.$O fs.$O \
+	kfsboot.$O load.$O part.$O:	dosfs.h fs.h kfs.h
+ether.$O etherelnk3.$O:	etherif.h
+devsd.$O part.$O sdata.$O sdscsi.$O: sd.h
+bootp.$O:	ip.h
+
+clean:
+	rm -f *.[$OS] [$OS].out y.tab.? y.debug y.output $TARG 9loaddebug lddebug
+
+install:V:
+	for (i in $TARG)
+		mk $MKFLAGS $i.install
+
+%.install:V:	$BIN/%
+	for (fs in lookout boundary piestand bovril)
+		9fs $fs && cp $prereq /n/$fs/$prereq
+
+$BIN/%:	%
+	cp $stem $BIN/$stem
+
+UPDATE=\
+	mkfile\
+	${CORE:%.$O=%.c}\
+	${LOAD:%.$O=%.c}\
+	${BCOM:%.$O=%.c}\
+	${ETHER:%.$O=%.c}\
+	$HFILES\
+	l.s\
+	noether.c\
+	x16.h\
+	ureg.h\
+	dosfs.h\
+	fs.h\
+	kfs.h\
+	etherif.h\
+	sd.h\
+	ip.h\
+	devfloppy.h\
+	${TARG:%=/386/%}\
+
+update:V:
+	update $UPDATEFLAGS $UPDATE
+

sys/src/boot/_pc/x16.h

@@ -0,0 +1,159 @@
+/*
+ * Can't write 16-bit code for 8a without getting into
+ * lots of bother, so define some simple commands and
+ * output the code directly.
+ * 
+ * N.B. CALL16(x) kills DI, so don't expect it to be
+ * saved across calls.
+ */
+#define rAX		0		/* rX  */
+#define rCX		1
+#define rDX		2
+#define rBX		3
+#define rSP		4		/* SP */
+#define rBP		5		/* BP */
+#define rSI		6		/* SI */
+#define rDI		7		/* DI */
+
+#define rAL		0		/* rL  */
+#define rCL		1
+#define rDL		2
+#define rBL		3
+#define rAH		4		/* rH */
+#define rCH		5
+#define rDH		6
+#define rBH		7
+
+#define rES		0		/* rS */
+#define rCS		1
+#define rSS		2
+#define rDS		3
+#define rFS		4
+#define rGS		5
+
+#define xSI		4		/* rI (index) */
+#define xDI		5
+#define xBP		6
+#define xBX		7
+
+#define rCR0		0		/* rC */
+#define rCR2		2
+#define rCR3		3
+#define rCR4		4
+
+#define OP(o, m, ro, rm)	BYTE $o;	/* op + modr/m byte */	\
+			BYTE $(((m)<<6)|((ro)<<3)|(rm))
+#define OPrm(o, r, m)	OP(o, 0x00, r, 0x06);	/* general r <-> m */	\
+			WORD $m;
+#define OPrr(o, r0, r1)	OP(o, 0x03, r0, r1);	/* general r -> r */
+
+#define LW(m, rX)	OPrm(0x8B, rX, m)	/* m -> rX */
+#define LXW(x, rI, r)	OP(0x8B, 0x02, r, rI);	/* x(rI) -> r */	\
+			WORD $x
+#define LBPW(x, r)	OP(0x8B, 0x02, r, xBP);	/* x(rBP) -> r */	\
+			WORD $x
+#define LB(m, rB)	OPrm(0x8A, rB, m)	/* m -> r[HL] */
+#define LXB(x, rI, r)	OP(0x8A, 0x01, r, rI);	/* x(rI) -> r */	\
+			BYTE $x
+#define LBPB(x, r)	OP(0x8A, 0x01, r, xBP);	/* x(rBP) -> r */	\
+			BYTE $x
+#define SW(rX, m)	OPrm(0x89, rX, m)	/* rX -> m */
+#define SXW(r, x, rI)	OP(0x89, 0x02, r, rI);	/* r -> x(rI) */	\
+			WORD $x
+#define SBPW(r, x)	OP(0x89, 0x02, r, xBP);	/* r -> x(rBP) */	\
+			WORD $(x)
+#define SBPWI(i, x)	OP(0xC7, 0x01, 0, xBP);	/* i -> x(rBP) */	\
+			BYTE $(x); WORD $(i)
+#define STB(rB, m)	OPrm(0x88, rB, m)	/* rB -> m */
+#define SXB(r, x, rI)	OP(0x88, 0x01, r, rI);	/* rB -> x(rI) */	\
+			BYTE $x
+#define SBPB(r, x)	OP(0x88, 0x01, r, xBP);	/* r -> x(rBP) */	\
+			BYTE $x
+#define SBPBI(i, x)	OP(0xC6, 0x01, 0, xBP);	/* i -> x(rBP) */	\
+			BYTE $(x); BYTE $(i)
+#define LWI(i, rX)	BYTE $(0xB8+rX);	/* i -> rX */		\
+			WORD $i;
+#define LBI(i, rB)	BYTE $(0xB0+rB);	/* i -> r[HL] */	\
+			BYTE $i
+
+#define MW(r0, r1)	OPrr(0x89, r0, r1)	/* r0 -> r1 */
+#define MFSR(rS, rX)	OPrr(0x8C, rS, rX)	/* rS -> rX */
+#define MTSR(rX, rS)	OPrr(0x8E, rS, rX)	/* rX -> rS */
+#define MFCR(rC, rX)	BYTE $0x0F;		/* rC -> rX */		\
+			OP(0x20, 0x03, rC, rX)
+#define MTCR(rX, rC)	BYTE $0x0F;		/* rX -> rC */		\
+			OP(0x22, 0x03, rC, rX)
+
+#define ADC(r0, r1)	OPrr(0x11, r0, r1)	/* r0 + r1 -> r1 */
+#define ADD(r0, r1)	OPrr(0x01, r0, r1)	/* r0 + r1 -> r1 */
+#define ADDI(i, r)	OP(0x81, 0x03, 0x00, r);/* i+r -> r */		\
+			WORD $i;
+#define AND(r0, r1)	OPrr(0x21, r0, r1)	/* r0&r1 -> r1 */
+#define ANDI(i, r)	OP(0x81, 0x03, 0x04, r);/* i&r -> r */		\
+			WORD $i;
+#define CLR(r)		OPrr(0x31, r, r)	/* r^r -> r */
+#define CLRB(r)		OPrr(0x30, r, r)	/* r^r -> r */
+#define CMP(r0, r1)	OPrr(0x39, r0, r1)	/* r1-r0 -> flags */
+#define CMPI(i, r)	OP(0x81, 0x03, 0x07, r);/* r-i -> flags */	\
+			WORD $i;
+#define CMPBR(r0, r1)	OPrr(0x38, r0, r1)	/* r1-r0 -> flags */
+#define DEC(r)		BYTE $(0x48|r)		/* r-1 -> r */
+#define DIV(r)		OPrr(0xF7, 0x06, r)	/* rDX:rAX/r -> rAX, rDX:rAX%r -> rDX */
+#define INC(r)		BYTE $(0x40|r)		/* r+1 -> r */
+#define MUL(r)		OPrr(0xF7, 0x04, r)	/* r*rAX -> rDX:rAX */
+#define IMUL(r0, r1)	BYTE $0x0F;		/* r0*r1 -> r1 */	\
+			OPrr(0xAF, r1, r0)	/* (signed) */
+#define OR(r0, r1)	OPrr(0x09, r0, r1)	/* r0|r1 -> r1 */
+#define ORB(r0, r1)	OPrr(0x08, r0, r1)	/* r0|r1 -> r1 */
+#define ORI(i, r)	OP(0x81, 0x03, 0x01, r);/* i|r -> r */		\
+			WORD $i;
+#define ROLI(i, r)	OPrr(0xC1, 0x00, r);	/* r<<>>i -> r */	\
+			BYTE $i;
+#define SHLI(i, r)	OPrr(0xC1, 0x04, r);	/* r<<i -> r */		\
+			BYTE $i;
+#define SHLBI(i, r)	OPrr(0xC0, 0x04, r);	/* r<<i -> r */		\
+			BYTE $i;
+#define SHRI(i, r)	OPrr(0xC1, 0x05, r);	/* r>>i -> r */		\
+			BYTE $i;
+#define SHRBI(i, r)	OPrr(0xC0, 0x05, r);	/* r>>i -> r */		\
+			BYTE $i;
+#define SUB(r0, r1)	OPrr(0x29, r0, r1)	/* r1-r0 -> r1 */
+#define SUBI(i, r)	OP(0x81, 0x03, 0x05, r);/* r-i -> r */		\
+			WORD $i;
+
+#define STOSW		STOSL
+
+#define CALL16(f)	LWI(f, rDI);		/* &f -> rDI */		\
+			BYTE $0xFF;		/* (*rDI) */		\
+			BYTE $0xD7;
+#define FARJUMP16(s, o)	BYTE $0xEA;		/* jump to ptr16:16 */	\
+			WORD $o; WORD $s
+#define FARJUMP32(s, o)	BYTE $0x66;		/* jump to ptr32:16 */	\
+			BYTE $0xEA; LONG $o; WORD $s
+#define	DELAY		BYTE $0xEB;		/* jmp .+2 */		\
+			BYTE $0x00
+#define BIOSCALL(b)	INT $b			/* INT $b */
+
+#define PEEKW		BYTE $0x26;		/* MOVW	rES:[rBX], rAX  */	\
+			BYTE $0x8B; BYTE $0x07
+#define POKEW		BYTE $0x26;		/* MOVW	rAX, rES:[rBX] */	\
+			BYTE $0x89; BYTE $0x07
+#define OUTPORTB(p, d)	LBI(d, rAL);		/* d -> I/O port p */	\
+			BYTE $0xE6;					\
+			BYTE $p; DELAY
+#define PUSHA		BYTE $0x60
+#define PUSHR(r)	BYTE $(0x50|r)		/* r  -> (--rSP) */
+#define PUSHS(rS)	BYTE $(0x06|((rS)<<3))	/* rS  -> (--rSP) */
+#define PUSHI(i)	BYTE $0x68; WORD $i;	/* i -> --(rSP) */
+#define POPA		BYTE $0x61
+#define POPR(r)		BYTE $(0x58|r)		/* (rSP++) -> r */
+#define POPS(rS)	BYTE $(0x07|((rS)<<3))	/* (rSP++) -> r */
+#define NOP		BYTE $0x90		/* nop */
+
+#define LGDT(gdtptr)	BYTE $0x0F;		/* LGDT */			\
+			BYTE $0x01; BYTE $0x16;					\
+			WORD $gdtptr
+
+/* operand size switch. */
+#define OPSIZE		BYTE $0x66
+

sys/src/boot/pc/mbr.s

@@ -3,7 +3,6 @@
  *	8a mbr.s; 8l -o mbr -l -H3 -T0x0600 mbr.8
  */
 #include "x16.h"
-#include "mem.h"
 
 /*#define FLOPPY	1		/* test on a floppy */
 #define TRACE(C)	PUSHA;\

sys/src/boot/pc/mkfile

@@ -3,183 +3,21 @@ objtype=386
 BIN=/386
 
 TARG=\
-	9load\
-	9loadask\
-	9loaddebug\
-	9loadlite\
-	9loadlitedebug\
-	9loadusb\
-	9pxeload\
-	9pxeloaddebug\
 	mbr\
 	pbs\
 	pbslba\
-
-CORE=\
-	alarm.$O\
-	cga.$O\
-	clock.$O\
-	console.$O\
-	devfloppy.$O\
-	dma.$O\
-	dosboot.$O\
-	fs.$O\
-	ilock.$O\
-	kbd.$O\
-	kfsboot.$O\
-	print.$O\
-	queue.$O\
-	trap.$O\
-
-LOAD=\
-	8250.$O\
-	apm.$O\
-	boot.$O\
-	cis.$O\
-	conf.$O\
-	devbios.$O\
-	devi82365.$O\
-	devpccard.$O\
-	devsd.$O\
-	inflate.$O\
-	load.$O\
-	memory.$O\
-	part.$O\
-	pci.$O\
-	sd53c8xx.$O\
-	sdaoe.$O\
-	sdata.$O\
-	sdbios.$O\
-	sdiahci.$O\
-	sdmylex.$O\
-	sdscsi.$O\
-
-ETHER=\
-	bootp.$O\
-	ether.$O\
-	ether2000.$O\
-	ether2114x.$O\
-	ether589.$O\
-	ether79c970.$O\
-	ether8003.$O\
-	ether8139.$O\
-	ether8169.$O\
-	ether82557.$O\
-	ether82563.$O\
-	ether83815.$O\
-	ether8390.$O\
-	etherdp83820.$O\
-	etherec2t.$O\
-	etherelnk3.$O\
-	etherigbe.$O\
-	ethermii.$O\
-	etherrhine.$O\
-
-BCOM=\
-	bcom.$O\
-	bootld.$O\
-	devsd.$O\
-	memory.$O\
-	part.$O\
-	pci.$O\
-	sdata.$O\
-	sdscsi.$O\
+	pbsraw\
 
 HFILES=\
-	lib.h\
-	mem.h\
-	dat.h\
-	fns.h\
-	io.h\
-	aoe.h\
-
-CFLAGS=-FTVw -I.
+	x16.h\
 
 all:V:	$TARG
 
-9load:	l.$O $CORE $LOAD $ETHER nobiosload.$O
-	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
-	ls -l $target
-
-9pxeload:	lpxe.$O $CORE $LOAD $ETHER nobiosload.$O
-	$LD -o $target -H3 -T0x80007C00 -l $prereq -lflate -lc -lip
-	ls -l $target
-
-9loaddebug:	l.$O $CORE $LOAD $ETHER nobiosload.$O
-	$LD -o $target -T0x80010000 -l $prereq -lflate -lc -lip
-	ls -l $target
-	# acid $target
-	# map({"text", 0x80010000, 0x80090000, 0x00000020})
-
-9pxeloaddebug:	lpxe.$O $CORE $LOAD $ETHER nobiosload.$O
-	$LD -o $target -T0x80007C00 -l $prereq -lflate -lc -lip
-	ls -l $target
-	# acid $target
-	# map({"text", 0x80010000, 0x80090000, 0x00000020})
-
-9loadlite:	l.$O $CORE $LOAD noether.$O nobiosload.$O
-	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc
-	ls -l $target
-
-9loadlitedebug:	l.$O $CORE $LOAD noether.$O nobiosload.$O
-	$LD -o $target -T0x80010000 -l $prereq -lflate -lc
-	ls -l $target
-	# acid $target
-	# map({"text", 0x80010000, 0x80090000, 0x00000020})
-
-9loadusb:	l.$O $CORE $LOAD $ETHER biosload.$O
-	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
-	ls -l $target
-
-9loadask:	l.$O $CORE $LOAD $ETHER askbiosload.$O
-	$LD -o $target -H3 -T0x80010000 -l $prereq -lflate -lc -lip
-	ls -l $target
-
-ld.com:	ld.$O $CORE $BCOM
-	$LD -o $target -H3 -T0x80080100 -l $prereq -lc
-	ls -l $target
-
-lddebug:	ld.$O $CORE $BCOM
-	$LD -o $target -T0x80080100 -l $prereq -lc
-	ls -l $target
-	# acid $target
-	# map({"text", 0x80080100, 0x800B0000, 0x00000020})
-
-ld.$O:	l.s
-	$AS -DDOTCOM -o $target l.s
-
-l.$O: l.s
-	$AS -DVGA -o $target l.s
-
-lpxe.$O: l.s
-	$AS -DPXE -DVGA -o $target l.s
-
-lnovga.$O: l.s
-	$AS -o $target l.s
-
-lpxenovga.$O: l.s
-	$AS -DPXE -o $target l.s
-
-loadverb.$O: load.c
-	$CC -o $target $CFLAGS '-DVERBOSE=1' load.c
-
 %.$O:	%.s
 	$AS $stem.s
 
-%.$O:	%.c
-	$CC $CFLAGS $stem.c
-
 %.$O:	$HFILES
 
-l.$O pbs.$O pbslba.$O mbr.$O:	x16.h
-
-clock.$O floppy.$O trap.$O:	ureg.h
-bcom.$O conf.$O devfloppy.$O devsd.$O dosboot.$O fs.$O \
-	kfsboot.$O load.$O part.$O:	dosfs.h fs.h kfs.h
-ether.$O etherelnk3.$O:	etherif.h
-devsd.$O part.$O sdata.$O sdscsi.$O: sd.h
-bootp.$O:	ip.h
-
 mbr:	mbr.$O
 	$LD -o $target -H3 -T0x0600 -l $prereq
 	ls -l $target
@@ -195,14 +33,14 @@ pbs&.debug:	pbs%.$O
 	# map({"text", 0x7C00, 0x7E00, 0x00000020})
 	
 clean:
-	rm -f *.[$OS] [$OS].out y.tab.? y.debug y.output $TARG 9loaddebug lddebug
+	rm -f *.[$OS] [$OS].out y.tab.? y.debug y.output $TARG
 
 install:V:
 	for (i in $TARG)
 		mk $MKFLAGS $i.install
 
 %.install:V:	$BIN/%
-	for (fs in )
+	for (fs in lookout boundary piestand bovril)
 		9fs $fs && cp $prereq /n/$fs/$prereq
 
 $BIN/%:	%
@@ -210,25 +48,12 @@ $BIN/%:	%
 
 UPDATE=\
 	mkfile\
-	${CORE:%.$O=%.c}\
-	${LOAD:%.$O=%.c}\
-	${BCOM:%.$O=%.c}\
-	${ETHER:%.$O=%.c}\
 	$HFILES\
 	l.s\
-	noether.c\
 	pbs.s\
 	pbslba.s\
 	mbr.s\
 	x16.h\
-	ureg.h\
-	dosfs.h\
-	fs.h\
-	kfs.h\
-	etherif.h\
-	sd.h\
-	ip.h\
-	devfloppy.h\
 	${TARG:%=/386/%}\
 
 update:V:

sys/src/boot/pc/pbs.s

@@ -14,7 +14,6 @@
  * the LBA of the root directory.
  */
 #include "x16.h"
-#include "mem.h"
 
 #define LOADSEG		(0x10000/16)	/* where to load code (64KB) */
 #define LOADOFF		0

sys/src/boot/pc/pbslba.s

@@ -14,7 +14,6 @@
  * the LBA of the root directory.
  */
 #include "x16.h"
-#include "mem.h"
 
 #define LOADSEG		(0x10000/16)	/* where to load code (64KB) */
 #define LOADOFF		0

sys/src/boot/pc/pbsraw.s

@@ -15,7 +15,6 @@
  * The sector size can be probably detected by the bios.
  */
 #include "x16.h"
-#include "mem.h"
 
 #define LOADSEG		(0x10000/16)	/* where to load code (64KB) */
 #define LOADOFF		0