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@@ -1,82 +1,83 @@
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-// We're going to assume 64 bits and hard float.
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-// if you want 32 bits, don't do this nonsense.
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-// Do it the plan 9 way: make a riscv32 directory
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-// and fix things in there.
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-# define SZREG 8
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-
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/* int setjmp (jmp_buf); */
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.globl setjmp
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setjmp:
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- sd ra, 0*SZREG(a0)
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- sd s0, 1*SZREG(a0)
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- sd s1, 2*SZREG(a0)
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- sd s2, 3*SZREG(a0)
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- sd s3, 4*SZREG(a0)
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- sd s4, 5*SZREG(a0)
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- sd s5, 6*SZREG(a0)
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- sd s6, 7*SZREG(a0)
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- sd s7, 8*SZREG(a0)
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- sd s8, 9*SZREG(a0)
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- sd s9, 10*SZREG(a0)
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- sd s10,11*SZREG(a0)
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- sd s11,12*SZREG(a0)
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- sd sp, 13*SZREG(a0)
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-
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- frsr a3
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-
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- fsd fs0, 16*SZREG+ 0*8(a0)
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- fsd fs1, 16*SZREG+ 1*8(a0)
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- fsd fs2, 16*SZREG+ 2*8(a0)
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- fsd fs3, 16*SZREG+ 3*8(a0)
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- fsd fs4, 16*SZREG+ 4*8(a0)
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- fsd fs5, 16*SZREG+ 5*8(a0)
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- fsd fs6, 16*SZREG+ 6*8(a0)
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- fsd fs7, 16*SZREG+ 7*8(a0)
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- fsd fs8, 16*SZREG+ 8*8(a0)
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- fsd fs9, 16*SZREG+ 9*8(a0)
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- fsd fs10,16*SZREG+10*8(a0)
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- fsd fs11,16*SZREG+11*8(a0)
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-
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- sd a3, 15*SZREG(a0)
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-
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- li a0, 0
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- ret
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+ SD ra,0(a0) // X1
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+ SD sp,8(a0) // X14
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+ SD s0,16(a0) // X2
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+ // X0 is zero
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+ // X1 and X2 are done.
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+ sd x3, 48(a0)
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+ sd x4, 56(a0)
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+ sd x5, 64(a0)
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+ sd x6, 72(a0)
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+ sd x7, 80(a0)
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+ sd x8, 88(a0)
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+ sd x9, 96(a0)
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+ sd x10, 104(a0) // store a zero in jmp_buf
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+ sd x11, 112(a0) // Don't touch a1.
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+ sd x12, 120(a0)
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+ sd x13, 128(a0)
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+ // X14 done already
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+ sd x15, 144(a0)
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+ sd x16, 152(a0)
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+ sd x17, 160(a0)
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+ sd x18, 168(a0)
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+ sd x19, 176(a0)
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+ sd x20, 184(a0)
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+ sd x21, 192(a0)
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+ sd x22, 200(a0)
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+ sd x23, 208(a0)
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+ sd x24, 216(a0)
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+ sd x25, 224(a0)
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+ sd x26, 232(a0)
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+ sd x27, 240(a0)
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+ sd x28, 248(a0)
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+ sd x29, 256(a0)
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+ sd x30, 264(a0)
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+ sd x31, 272(a0)
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+ mv a0, x0
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+ RET
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/* volatile void longjmp (jmp_buf, int); */
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.globl longjmp
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longjmp:
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- ld ra, 0*SZREG(a0)
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- ld s0, 1*SZREG(a0)
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- ld s1, 2*SZREG(a0)
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- ld s2, 3*SZREG(a0)
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- ld s3, 4*SZREG(a0)
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- ld s4, 5*SZREG(a0)
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- ld s5, 6*SZREG(a0)
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- ld s6, 7*SZREG(a0)
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- ld s7, 8*SZREG(a0)
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- ld s8, 9*SZREG(a0)
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- ld s9, 10*SZREG(a0)
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- ld s10,11*SZREG(a0)
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- ld s11,12*SZREG(a0)
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- ld sp, 13*SZREG(a0)
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-
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- ld a3, 15*SZREG(a0)
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-
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- fld fs0, 16*SZREG+ 0*8(a0)
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- fld fs1, 16*SZREG+ 1*8(a0)
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- fld fs2, 16*SZREG+ 2*8(a0)
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- fld fs3, 16*SZREG+ 3*8(a0)
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- fld fs4, 16*SZREG+ 4*8(a0)
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- fld fs5, 16*SZREG+ 5*8(a0)
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- fld fs6, 16*SZREG+ 6*8(a0)
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- fld fs7, 16*SZREG+ 7*8(a0)
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- fld fs8, 16*SZREG+ 8*8(a0)
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- fld fs9, 16*SZREG+ 9*8(a0)
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- fld fs10,16*SZREG+10*8(a0)
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-
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- fssr a3
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+ LD sp,8(a0) // X14
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+ LD s0,16(a0) // X2
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+ // X0 is zero
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+ // X1 and X2 are done.
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+ LD x3, 48(a0)
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+ // Don't restore X4, that's reserved for Mach *
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+ //LD x4, 56(a0)
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+ LD x5, 64(a0)
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+ LD x6, 72(a0)
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+ LD x7, 80(a0)
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+ LD x8, 88(a0)
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+ LD x9, 96(a0)
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+ //LD x10, 104(a0) this is a0
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+ // LD x11, 112(a0)
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+ LD x12, 120(a0)
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+ LD x13, 128(a0)
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+ // X14 done already
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+ LD x15, 144(a0)
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+ LD x16, 152(a0)
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+ LD x17, 160(a0)
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+ LD x18, 168(a0)
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+ LD x19, 176(a0)
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+ LD x20, 184(a0)
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+ LD x21, 192(a0)
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+ LD x22, 200(a0)
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+ LD x23, 208(a0)
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+ LD x24, 216(a0)
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+ LD x25, 224(a0)
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+ LD x26, 232(a0)
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+ LD x27, 240(a0)
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+ LD x28, 248(a0)
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+ LD x29, 256(a0)
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+ LD x30, 264(a0)
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+ LD x30, 272(a0)
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+ LD a0,0(a0)
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+ MV ra,a0 // X1 (non zero by definition I hope.
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+ mv a0, a1
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+ RET
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- seqz a0, a1
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- add a0, a0, a1 # a0 = (a1 == 0) ? 1 : a1
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- ret
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