Plan 9 from Bell Labs 2011-01-16

sys/src/9/kw/archkw.c

@@ -379,7 +379,7 @@ l2cacheon(void)
 void
 archconfinit(void)
 {
-	m->cpuhz = 1200*1000*1000;
+	m->cpuhz = Frequency;
 	m->delayloop = m->cpuhz/2000; 	 /* initial estimate */
 	fixaddrmap();
 	if (Debug)

sys/src/9/omap/clock.c

@@ -112,8 +112,7 @@ resetwait(Timerregs *tn)
 {
 	long bound;
 
-	for (bound = 400*1000*1000; !(tn->tistat & Resetdone) && bound > 0;
-	    bound--)
+	for (bound = 400*Mhz; !(tn->tistat & Resetdone) && bound > 0; bound--)
 		;
 	if (bound <= 0)
 		iprint("clock reset didn't complete\n");
@@ -215,7 +214,7 @@ clockshutdown(void)
 }
 
 enum {
-	Instrs		= 10*1000*1000,
+	Instrs		= 10*Mhz,
 };
 
 static long

sys/src/9/omap/dat.h

@@ -8,6 +8,10 @@
 #define	MS2HZ		(1000/HZ)		/* millisec per clock tick */
 #define	TK2SEC(t)	((t)/HZ)		/* ticks to seconds */
 
+enum {
+	Mhz	= 1000 * 1000,
+};
+
 /*
  * More accurate time
  */

sys/src/9/omap/devarch.c

@@ -182,8 +182,7 @@ cputyperead(Chan*, void *a, long n, vlong offset)
 	char name[64], str[128];
 
 	cputype2name(name, sizeof name);
-	snprint(str, sizeof str, "ARM %s %llud\n", name,
-		m->cpuhz / (1000*1000));
+	snprint(str, sizeof str, "ARM %s %llud\n", name, m->cpuhz / Mhz);
 	return readstr(offset, a, n, str);
 }
 

sys/src/9/omap/ether9221.c

@@ -311,8 +311,7 @@ macwait(Regs *regs)
 {
 	long bound;
 
-	for (bound = 400*1000*1000; regs->maccsrcmd & Csrbusy && bound > 0;
-	    bound--)
+	for (bound = 400*Mhz; regs->maccsrcmd & Csrbusy && bound > 0; bound--)
 		;
 	if (bound <= 0)
 		iprint("smc: mac registers didn't come ready\n");
@@ -791,8 +790,7 @@ powerwait(Regs *regs)
 	long bound;
 
 	regs->bytetest = 0;			/* bring power on */
-	for (bound = 400*1000*1000; !(regs->pmtctl & Dready) && bound > 0;
-	    bound--)
+	for (bound = 400*Mhz; !(regs->pmtctl & Dready) && bound > 0; bound--)
 		;
 	if (bound <= 0)
 		iprint("smc: pmtctl didn't come ready\n");