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Reintroducing libmach, removing unused/unsupported code (#737)

Signed-off-by: Álvaro Jurado <elbingmiss@gmail.com>
Álvaro Jurado 6 years ago
parent
commit
615f589e82

+ 0 - 154
sys/src/libmach/0.c

@@ -1,154 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * mips r4k definition
- *
- * currently no compiler - not related to 0c
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "mips2ureg.h"
-#include <mach.h>
-
-#define	FPREGBYTES	4
-#define	REGOFF(x)	(unsigned long)(&((struct Ureg *) 0)->x)
-
-#define SP		REGOFF(sp)
-#define PC		REGOFF(pc)
-#define	R1		REGOFF(hr1)
-#define	R31		REGOFF(hr31)
-#define	FP_REG(x)	(R1+8+FPREGBYTES*(x))
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FPREGSIZE	(FPREGBYTES*33)
-
-Reglist mips2reglist[] = {
-	{"STATUS",	REGOFF(status),		RINT|RRDONLY, 'X'},
-	{"CAUSE",	REGOFF(cause),		RINT|RRDONLY, 'X'},
-	{"BADVADDR",	REGOFF(badvaddr),	RINT|RRDONLY, 'X'},
-	{"TLBVIRT",	REGOFF(tlbvirt),	RINT|RRDONLY, 'X'},
-	{"HI",		REGOFF(hhi),		RINT|RRDONLY, 'W'},
-	{"LO",		REGOFF(hlo),		RINT|RRDONLY, 'W'},
-	{"PC",		PC,		RINT, 'X'},
-	{"SP",		SP,		RINT, 'X'},
-	{"R31",		R31,		RINT, 'W'},
-	{"R30",		REGOFF(hr30),	RINT, 'W'},
-	{"R28",		REGOFF(hr28),	RINT, 'W'},
-	{"R27",		REGOFF(hr27),	RINT, 'W'},
-	{"R26",		REGOFF(hr26),	RINT, 'W'},
-	{"R25",		REGOFF(hr25),	RINT, 'W'},
-	{"R24",		REGOFF(hr24),	RINT, 'W'},
-	{"R23",		REGOFF(hr23),	RINT, 'W'},
-	{"R22",		REGOFF(hr22),	RINT, 'W'},
-	{"R21",		REGOFF(hr21),	RINT, 'W'},
-	{"R20",		REGOFF(hr20),	RINT, 'W'},
-	{"R19",		REGOFF(hr19),	RINT, 'W'},
-	{"R18",		REGOFF(hr18),	RINT, 'W'},
-	{"R17",		REGOFF(hr17),	RINT, 'W'},
-	{"R16",		REGOFF(hr16),	RINT, 'W'},
-	{"R15",		REGOFF(hr15),	RINT, 'W'},
-	{"R14",		REGOFF(hr14),	RINT, 'W'},
-	{"R13",		REGOFF(hr13),	RINT, 'W'},
-	{"R12",		REGOFF(hr12),	RINT, 'W'},
-	{"R11",		REGOFF(hr11),	RINT, 'W'},
-	{"R10",		REGOFF(hr10),	RINT, 'W'},
-	{"R9",		REGOFF(hr9),	RINT, 'W'},
-	{"R8",		REGOFF(hr8),	RINT, 'W'},
-	{"R7",		REGOFF(hr7),	RINT, 'W'},
-	{"R6",		REGOFF(hr6),	RINT, 'W'},
-	{"R5",		REGOFF(hr5),	RINT, 'W'},
-	{"R4",		REGOFF(hr4),	RINT, 'W'},
-	{"R3",		REGOFF(hr3),	RINT, 'W'},
-	{"R2",		REGOFF(hr2),	RINT, 'W'},
-	{"R1",		REGOFF(hr1),	RINT, 'W'},
-	{"F0",		FP_REG(0),	RFLT, 'F'},
-	{"F1",		FP_REG(1),	RFLT, 'f'},
-	{"F2",		FP_REG(2),	RFLT, 'F'},
-	{"F3",		FP_REG(3),	RFLT, 'f'},
-	{"F4",		FP_REG(4),	RFLT, 'F'},
-	{"F5",		FP_REG(5),	RFLT, 'f'},
-	{"F6",		FP_REG(6),	RFLT, 'F'},
-	{"F7",		FP_REG(7),	RFLT, 'f'},
-	{"F8",		FP_REG(8),	RFLT, 'F'},
-	{"F9",		FP_REG(9),	RFLT, 'f'},
-	{"F10",		FP_REG(10),	RFLT, 'F'},
-	{"F11",		FP_REG(11),	RFLT, 'f'},
-	{"F12",		FP_REG(12),	RFLT, 'F'},
-	{"F13",		FP_REG(13),	RFLT, 'f'},
-	{"F14",		FP_REG(14),	RFLT, 'F'},
-	{"F15",		FP_REG(15),	RFLT, 'f'},
-	{"F16",		FP_REG(16),	RFLT, 'F'},
-	{"F17",		FP_REG(17),	RFLT, 'f'},
-	{"F18",		FP_REG(18),	RFLT, 'F'},
-	{"F19",		FP_REG(19),	RFLT, 'f'},
-	{"F20",		FP_REG(20),	RFLT, 'F'},
-	{"F21",		FP_REG(21),	RFLT, 'f'},
-	{"F22",		FP_REG(22),	RFLT, 'F'},
-	{"F23",		FP_REG(23),	RFLT, 'f'},
-	{"F24",		FP_REG(24),	RFLT, 'F'},
-	{"F25",		FP_REG(25),	RFLT, 'f'},
-	{"F26",		FP_REG(26),	RFLT, 'F'},
-	{"F27",		FP_REG(27),	RFLT, 'f'},
-	{"F28",		FP_REG(28),	RFLT, 'F'},
-	{"F29",		FP_REG(29),	RFLT, 'f'},
-	{"F30",		FP_REG(30),	RFLT, 'F'},
-	{"F31",		FP_REG(31),	RFLT, 'f'},
-	{"FPCR",	FP_REG(32),	RFLT, 'X'},
-	{  0 }
-};
-
-	/* mips r4k big-endian */
-Mach mmips2be =
-{
-	"mips2",
-	MMIPS2,		/* machine type */
-	mips2reglist,	/* register set */
-	REGSIZE,	/* number of bytes in reg set */
-	FPREGSIZE,	/* number of bytes in fp reg set */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	"R31",		/* name of link register */
-	"setR30",	/* static base register name */
-	0,		/* SB value */
-	0x1000,		/* page size */
-	0xC0000000,	/* kernel base */
-	0x40000000,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	8,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-
-	/* mips r4k little-endian */
-Mach mmips2le =
-{
-	"mips2",
-	NMIPS2,		/* machine type */
-	mips2reglist,	/* register set */
-	REGSIZE,	/* number of bytes in reg set */
-	FPREGSIZE,	/* number of bytes in fp reg set */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	"R31",		/* name of link register */
-	"setR30",	/* static base register name */
-	0,		/* SB value */
-	0x1000,		/* page size */
-	0xC0000000ULL,	/* kernel base */
-	0x40000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	8,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};

+ 0 - 74
sys/src/libmach/5.c

@@ -1,74 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYARM
-/*
- * arm definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/arm/include/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(ulong) (&((struct Ureg *) 0)->x)
-
-#define SP		REGOFF(r13)
-#define PC		REGOFF(pc)
-
-#define	REGSIZE		sizeof(struct Ureg)
-
-Reglist armreglist[] =
-{
-	{"TYPE",	REGOFF(type),		RINT|RRDONLY, 'X'},
-	{"PSR",		REGOFF(psr),		RINT|RRDONLY, 'X'},
-	{"PC",		PC,			RINT, 'X'},
-	{"SP",		SP,			RINT, 'X'},
-	{"R15",		PC,			RINT, 'X'},
-	{"R14",		REGOFF(r14),		RINT, 'X'},
-	{"R13",		REGOFF(r13),		RINT, 'X'},
-	{"R12",		REGOFF(r12),		RINT, 'X'},
-	{"R11",		REGOFF(r11),		RINT, 'X'},
-	{"R10",		REGOFF(r10),		RINT, 'X'},
-	{"R9",		REGOFF(r9),		RINT, 'X'},
-	{"R8",		REGOFF(r8),		RINT, 'X'},
-	{"R7",		REGOFF(r7),		RINT, 'X'},
-	{"R6",		REGOFF(r6),		RINT, 'X'},
-	{"R5",		REGOFF(r5),		RINT, 'X'},
-	{"R4",		REGOFF(r4),		RINT, 'X'},
-	{"R3",		REGOFF(r3),		RINT, 'X'},
-	{"R2",		REGOFF(r2),		RINT, 'X'},
-	{"R1",		REGOFF(r1),		RINT, 'X'},
-	{"R0",		REGOFF(r0),		RINT, 'X'},
-	{  0 }
-};
-
-	/* the machine description */
-Mach marm =
-{
-	"arm",
-	MARM,		/* machine type */
-	armreglist,	/* register set */
-	REGSIZE,	/* register set size */
-	0,		/* fp register set size */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	"R14",		/* name of link register */
-	"setR12",	/* static base register name */
-	0,		/* static base register value */
-	0x1000,		/* page size */
-	0xC0000000ULL,	/* kernel base */
-	0xC0000000ULL,	/* kernel text mask */
-	0x3FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 1341
sys/src/libmach/5db.c

@@ -1,1341 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-static int debug = 0;
-
-#define	BITS(a, b)	((1<<(b+1))-(1<<a))
-
-#define LSR(v, s)	((unsigned long)(v) >> (s))
-#define ASR(v, s)	((int32_t)(v) >> (s))
-#define ROR(v, s)	(LSR((v), (s)) | (((v) & ((1 << (s))-1)) << (32 - (s))))
-
-
-
-typedef struct	Instr	Instr;
-struct	Instr
-{
-	Map	*map;
-	uint32_t	w;
-	uint64_t	addr;
-	uint8_t	op;			/* super opcode */
-
-	uint8_t	cond;			/* bits 28-31 */
-	uint8_t	store;			/* bit 20 */
-
-	uint8_t	rd;			/* bits 12-15 */
-	uint8_t	rn;			/* bits 16-19 */
-	uint8_t	rs;			/* bits 0-11 (shifter operand) */
-
-	int32_t	imm;			/* rotated imm */
-	char*	curr;			/* fill point in buffer */
-	char*	end;			/* end of buffer */
-	char*	err;			/* error message */
-};
-
-typedef struct Opcode Opcode;
-struct Opcode
-{
-	char*	o;
-	void	(*fmt)(Opcode*, Instr*);
-	uint64_t	(*foll)(Map*, Rgetter, Instr*, uint64_t);
-	char*	a;
-};
-
-static	void	format(char*, Instr*, char*);
-static	char	FRAMENAME[] = ".frame";
-
-/*
- * Arm-specific debugger interface
- */
-
-static	char	*armexcep(Map*, Rgetter);
-static	int	armfoll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	arminst(Map*, uint64_t, char, char*, int);
-static	int	armdas(Map*, uint64_t, char*, int);
-static	int	arminstlen(Map*, uint64_t);
-
-/*
- *	Debugger interface
- */
-Machdata armmach =
-{
-	{0x70, 0x00, 0x20, 0xE1},		/* break point */	/* E1200070 */
-	4,			/* break point size */
-
-	leswab,			/* short to local byte order */
-	leswal,			/* long to local byte order */
-	leswav,			/* long to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	armexcep,			/* print exception */
-	0,			/* breakpoint fixup */
-	0,			/* single precision float printer */
-	0,			/* double precision float printer */
-	armfoll,		/* following addresses */
-	arminst,		/* print instruction */
-	armdas,			/* dissembler */
-	arminstlen,		/* instruction size */
-};
-
-static char*
-armexcep(Map *map, Rgetter rget)
-{
-	uint64_t c;
-
-	c = (*rget)(map, "TYPE");
-	switch ((int)c&0x1f) {
-	case 0x11:
-		return "Fiq interrupt";
-	case 0x12:
-		return "Mirq interrupt";
-	case 0x13:
-		return "SVC/SWI Exception";
-	case 0x17:
-		return "Prefetch Abort/Breakpoint";
-	case 0x18:
-		return "Data Abort";
-	case 0x1b:
-		return "Undefined instruction/Breakpoint";
-	case 0x1f:
-		return "Sys trap";
-	default:
-		return "Undefined trap";
-	}
-}
-
-static
-char*	cond[16] =
-{
-	"EQ",	"NE",	"CS",	"CC",
-	"MI",	"PL",	"VS",	"VC",
-	"HI",	"LS",	"GE",	"LT",
-	"GT",	"LE",	0,	"NV"
-};
-
-static
-char*	shtype[4] =
-{
-	"<<",	">>",	"->",	"@>"
-};
-
-static
-char *hb[4] =
-{
-	"???",	"HU", "B", "H"
-};
-
-static
-char*	addsub[2] =
-{
-	"-",	"+",
-};
-
-int
-armclass(int32_t w)
-{
-	int op, done, cp;
-
-	op = (w >> 25) & 0x7;
-	switch(op) {
-	case 0:	/* data processing r,r,r */
-		if((w & 0x0ff00080) == 0x01200000) {
-			op = (w >> 4) & 0x7;
-			if(op == 7)
-				op = 124;	/* bkpt */
-			else if (op > 0 && op < 4)
-				op += 124;	/* bx, blx */
-			else
-				op = 92;	/* unk */
-			break;
-		}
-		op = ((w >> 4) & 0xf);
-		if(op == 0x9) {
-			op = 48+16;		/* mul, swp or *rex */
-			if((w & 0x0ff00fff) == 0x01900f9f) {
-				op = 93;	/* ldrex */
-				break;
-			}
-			if((w & 0x0ff00ff0) == 0x01800f90) {
-				op = 94;	/* strex */
-				break;
-			}
-			if(w & (1<<24)) {
-				op += 2;
-				if(w & (1<<22))
-					op++;	/* swpb */
-				break;
-			}
-			if(w & (1<<23)) {	/* mullu */
-				op = (48+24+4+4+2+2+4);
-				if(w & (1<<22))	/* mull */
-					op += 2;
-			}
-			if(w & (1<<21))
-				op++;		/* mla */
-			break;
-		}
-		if((op & 0x9) == 0x9)		/* ld/st byte/half s/u */
-		{
-			op = (48+16+4) + ((w >> 22) & 0x1) + ((w >> 19) & 0x2);
-			break;
-		}
-		op = (w >> 21) & 0xf;
-		if(w & (1<<4))
-			op += 32;
-		else
-		if((w & (31<<7)) || (w & (1<<5)))
-			op += 16;
-		break;
-	case 1:	/* data processing i,r,r */
-		op = (48) + ((w >> 21) & 0xf);
-		break;
-	case 2:	/* load/store byte/word i(r) */
-		if ((w & 0xffffff8f) == 0xf57ff00f) {	/* barriers, clrex */
-			done = 1;
-			switch ((w >> 4) & 7) {
-			case 1:
-				op = 95;	/* clrex */
-				break;
-			case 4:
-				op = 96;	/* dsb */
-				break;
-			case 5:
-				op = 97;	/* dmb */
-				break;
-			case 6:
-				op = 98;	/* isb */
-				break;
-			default:
-				done = 0;
-				break;
-			}
-			if (done)
-				break;
-		}
-		op = (48+24) + ((w >> 22) & 0x1) + ((w >> 19) & 0x2);
-		break;
-	case 3:	/* load/store byte/word (r)(r) */
-		op = (48+24+4) + ((w >> 22) & 0x1) + ((w >> 19) & 0x2);
-		break;
-	case 4:	/* block data transfer (r)(r) */
-		if ((w & 0xfe50ffff) == 0xf8100a00) {	/* v7 RFE */
-			op = 99;
-			break;
-		}
-		op = (48+24+4+4) + ((w >> 20) & 0x1);
-		break;
-	case 5:	/* branch / branch link */
-		op = (48+24+4+4+2) + ((w >> 24) & 0x1);
-		break;
-	case 7:	/* coprocessor crap */
-		cp = (w >> 8) & 0xF;
-		if(cp == 10 || cp == 11){	/* vfp */
-			if((w >> 4) & 0x1){
-				/* vfp register transfer */
-				switch((w >> 21) & 0x7){
-				case 0:
-					op = 118 + ((w >> 20) & 0x1);
-					break;
-				case 7:
-					op = 118+2 + ((w >> 20) & 0x1);
-					break;
-				default:
-					op = (48+24+4+4+2+2+4+4);
-					break;
-				}
-				break;
-			}
-			/* vfp data processing */
-			if(((w >> 23) & 0x1) == 0){
-				op = 100 + ((w >> 19) & 0x6) + ((w >> 6) & 0x1);
-				break;
-			}
-			switch(((w >> 19) & 0x6) + ((w >> 6) & 0x1)){
-			case 0:
-				op = 108;
-				break;
-			case 7:
-				if(((w >> 19) & 0x1) == 0){
-					if(((w >> 17) & 0x1) == 0)
-						op = 109 + ((w >> 16) & 0x4) +
-							((w >> 15) & 0x2) +
-							((w >> 7) & 0x1);
-					else if(((w >> 16) & 0x7) == 0x7)
-						op = 117;
-				}else
-					switch((w >> 16) & 0x7){
-					case 0:
-					case 4:
-					case 5:
-						op = 117;
-						break;
-					}
-				break;
-			}
-			if(op == 7)
-				op = (48+24+4+4+2+2+4+4);
-			break;
-		}
-		op = (48+24+4+4+2+2) + ((w >> 3) & 0x2) + ((w >> 20) & 0x1);
-		break;
-	case 6:	/* vfp load / store */
-		if(((w >> 21) &0x9) == 0x8){
-			op = 122 + ((w >> 20) & 0x1);
-			break;
-		}
-		/* fall through */
-	default:	  
-		op = (48+24+4+4+2+2+4+4);
-		break;
-	}
-	return op;
-}
-
-static int
-decode(Map *map, uint64_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if(get4(map, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->w = w;
-	i->addr = pc;
-	i->cond = (w >> 28) & 0xF;
-	i->op = armclass(w);
-	i->map = map;
-	return 1;
-}
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static int
-plocal(Instr *i)
-{
-	char *reg;
-	Symbol s;
-	char *fn;
-	int class;
-	int offset;
-
-	if(!findsym(i->addr, CTEXT, &s)) {
-		if(debug)fprint(2,"fn not found @%llux: %r\n", i->addr);
-		return 0;
-	}
-	fn = s.name;
-	if (!findlocal(&s, FRAMENAME, &s)) {
-		if(debug)fprint(2,"%s.%s not found @%s: %r\n", fn, FRAMENAME, s.name);
-			return 0;
-	}
-	if(s.value > i->imm) {
-		class = CAUTO;
-		offset = s.value-i->imm;
-		reg = "(SP)";
-	} else {
-		class = CPARAM;
-		offset = i->imm-s.value-4;
-		reg = "(FP)";
-	}
-	if(!getauto(&s, offset, class, &s)) {
-		if(debug)fprint(2,"%s %s not found @%ux: %r\n", fn,
-			class == CAUTO ? " auto" : "param", offset);
-		return 0;
-	}
-	bprint(i, "%s%c%lld%s", s.name, class == CPARAM ? '+' : '-', s.value, reg);
-	return 1;
-}
-
-/*
- * Print value v as name[+offset]
- */
-static int
-gsymoff(char *buf, int n, uint32_t v, int space)
-{
-	Symbol s;
-	int r;
-	int32_t delta;
-
-	r = delta = 0;		/* to shut compiler up */
-	if (v) {
-		r = findsym(v, space, &s);
-		if (r)
-			delta = v-s.value;
-		if (delta < 0)
-			delta = -delta;
-	}
-	if (v == 0 || r == 0 || delta >= 4096)
-		return snprint(buf, n, "#%lux", v);
-	if (strcmp(s.name, ".string") == 0)
-		return snprint(buf, n, "#%lux", v);
-	if (!delta)
-		return snprint(buf, n, "%s", s.name);
-	if (s.type != 't' && s.type != 'T')
-		return snprint(buf, n, "%s+%llux", s.name, v-s.value);
-	else
-		return snprint(buf, n, "#%lux", v);
-}
-
-static void
-armdps(Opcode *o, Instr *i)
-{
-	i->store = (i->w >> 20) & 1;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	i->rs = (i->w >> 0) & 0xf;
-	if(i->rn == 15 && i->rs == 0) {
-		if(i->op == 8) {
-			format("MOVW", i,"CPSR, R%d");
-			return;
-		} else
-		if(i->op == 10) {
-			format("MOVW", i,"SPSR, R%d");
-			return;
-		}
-	} else
-	if(i->rn == 9 && i->rd == 15) {
-		if(i->op == 9) {
-			format("MOVW", i, "R%s, CPSR");
-			return;
-		} else
-		if(i->op == 11) {
-			format("MOVW", i, "R%s, SPSR");
-			return;
-		}
-	}
-	if(i->rd == 15) {
-		if(i->op == 120) {
-			format("MOVW", i, "PSR, %x");
-			return;
-		} else
-		if(i->op == 121) {
-			format("MOVW", i, "%x, PSR");
-			return;
-		}
-	}
-	format(o->o, i, o->a);
-}
-
-static void
-armdpi(Opcode *o, Instr *i)
-{
-	uint32_t v;
-	int c;
-
-	v = (i->w >> 0) & 0xff;
-	c = (i->w >> 8) & 0xf;
-	while(c) {
-		v = (v<<30) | (v>>2);
-		c--;
-	}
-	i->imm = v;
-	i->store = (i->w >> 20) & 1;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	i->rs = i->w&0x0f;
-
-		/* RET is encoded as ADD #0,R14,R15 */
-	if((i->w & 0x0fffffff) == 0x028ef000){
-		format("RET%C", i, "");
-		return;
-	}
-	if((i->w & 0x0ff0ffff) == 0x0280f000){
-		format("B%C", i, "0(R%n)");
-		return;
-	}
-	format(o->o, i, o->a);
-}
-
-static void
-armsdti(Opcode *o, Instr *i)
-{
-	uint32_t v;
-
-	v = i->w & 0xfff;
-	if(!(i->w & (1<<23)))
-		v = -v;
-	i->store = ((i->w >> 23) & 0x2) | ((i->w >>21) & 0x1);
-	i->imm = v;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-		/* RET is encoded as LW.P x,R13,R15 */
-	if ((i->w & 0x0ffff000) == 0x049df000)
-	{
-		format("RET%C%p", i, "%I");
-		return;
-	}
-	format(o->o, i, o->a);
-}
-
-static void
-armvstdi(Opcode *o, Instr *i)
-{
-	uint32_t v;
-
-	v = (i->w & 0xff) << 2;
-	if(!(i->w & (1<<23)))
-		v = -v;
-	i->imm = v;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	format(o->o, i, o->a);
-}
-
-/* arm V4 ld/st halfword, signed byte */
-static void
-armhwby(Opcode *o, Instr *i)
-{
-	i->store = ((i->w >> 23) & 0x2) | ((i->w >>21) & 0x1);
-	i->imm = (i->w & 0xf) | ((i->w >> 8) & 0xf);
-	if (!(i->w & (1 << 23)))
-		i->imm = - i->imm;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	i->rs = (i->w >> 0) & 0xf;
-	format(o->o, i, o->a);
-}
-
-static void
-armsdts(Opcode *o, Instr *i)
-{
-	i->store = ((i->w >> 23) & 0x2) | ((i->w >>21) & 0x1);
-	i->rs = (i->w >> 0) & 0xf;
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	format(o->o, i, o->a);
-}
-
-static void
-armbdt(Opcode *o, Instr *i)
-{
-	i->store = (i->w >> 21) & 0x3;		/* S & W bits */
-	i->rn = (i->w >> 16) & 0xf;
-	i->imm = i->w & 0xffff;
-	if(i->w == 0xe8fd8000)
-		format("RFE", i, "");
-	else
-		format(o->o, i, o->a);
-}
-
-static void
-armund(Opcode *o, Instr *i)
-{
-	format(o->o, i, o->a);
-}
-
-static void
-armcdt(Opcode *o, Instr *i)
-{
-	format(o->o, i, o->a);
-}
-
-static void
-armunk(Opcode *o, Instr *i)
-{
-	format(o->o, i, o->a);
-}
-
-static void
-armb(Opcode *o, Instr *i)
-{
-	uint32_t v;
-
-	v = i->w & 0xffffff;
-	if(v & 0x800000)
-		v |= ~0xffffff;
-	i->imm = (v<<2) + i->addr + 8;
-	format(o->o, i, o->a);
-}
-
-static void
-armbpt(Opcode *o, Instr *i)
-{
-	i->imm = ((i->w >> 4) & 0xfff0) | (i->w &0xf);
-	format(o->o, i, o->a);
-}
-
-static void
-armco(Opcode *o, Instr *i)		/* coprocessor instructions */
-{
-	int op, p, cp;
-
-	char buf[1024];
-
-	i->rn = (i->w >> 16) & 0xf;
-	i->rd = (i->w >> 12) & 0xf;
-	i->rs = i->w&0xf;
-	cp = (i->w >> 8) & 0xf;
-	p = (i->w >> 5) & 0x7;
-	if(i->w&(1<<4)) {
-		op = (i->w >> 21) & 0x07;
-		snprint(buf, sizeof(buf), "#%x, #%x, R%d, C(%d), C(%d), #%x", cp, op, i->rd, i->rn, i->rs, p);
-	} else {
-		op = (i->w >> 20) & 0x0f;
-		snprint(buf, sizeof(buf), "#%x, #%x, C(%d), C(%d), C(%d), #%x", cp, op, i->rd, i->rn, i->rs, p);
-	}
-	format(o->o, i, buf);
-}
-
-static int
-armcondpass(Map *map, Rgetter rget, uint8_t cond)
-{
-	uint64_t psr;
-	uint8_t n;
-	uint8_t z;
-	uint8_t c;
-	uint8_t v;
-
-	psr = rget(map, "PSR");
-	n = (psr >> 31) & 1;
-	z = (psr >> 30) & 1;
-	c = (psr >> 29) & 1;
-	v = (psr >> 28) & 1;
-
-	switch(cond) {
-	default:
-	case 0:		return z;
-	case 1:		return !z;
-	case 2:		return c;
-	case 3:		return !c;
-	case 4:		return n;
-	case 5:		return !n;
-	case 6:		return v;
-	case 7:		return !v;
-	case 8:		return c && !z;
-	case 9:		return !c || z;
-	case 10:	return n == v;
-	case 11:	return n != v;
-	case 12:	return !z && (n == v);
-	case 13:	return z || (n != v);
-	case 14:	return 1;
-	case 15:	return 0;
-	}
-}
-
-static uint32_t
-armshiftval(Map *map, Rgetter rget, Instr *i)
-{
-	if(i->w & (1 << 25)) {				/* immediate */
-		uint32_t imm = i->w & BITS(0, 7);
-		uint32_t s = (i->w & BITS(8, 11)) >> 7; /* this contains the *2 */
-		return ROR(imm, s);
-	} else {
-		char buf[8];
-		uint32_t v;
-		uint32_t s = (i->w & BITS(7,11)) >> 7;
-
-		sprint(buf, "R%ld", i->w & 0xf);
-		v = rget(map, buf);
-
-		switch((i->w & BITS(4, 6)) >> 4) {
-		default:
-		case 0:					/* LSLIMM */
-			return v << s;
-		case 1:					/* LSLREG */
-			sprint(buf, "R%lud", s >> 1);
-			s = rget(map, buf) & 0xFF;
-			if(s >= 32) return 0;
-			return v << s;
-		case 2:					/* LSRIMM */
-			return LSR(v, s);
-		case 3:					/* LSRREG */
-			sprint(buf, "R%ld", s >> 1);
-			s = rget(map, buf) & 0xFF;
-			if(s >= 32) return 0;
-			return LSR(v, s);
-		case 4:					/* ASRIMM */
-			if(s == 0) {
-				if((v & (1U<<31)) == 0)
-					return 0;
-				return 0xFFFFFFFF;
-			}
-			return ASR(v, s);
-		case 5:					/* ASRREG */
-			sprint(buf, "R%ld", s >> 1);
-			s = rget(map, buf) & 0xFF;
-			if(s >= 32) {
-				if((v & (1U<<31)) == 0)
-					return 0;
-				return 0xFFFFFFFF;
-			}
-			return ASR(v, s);
-		case 6:					/* RORIMM */
-			if(s == 0) {
-				uint32_t c = (rget(map, "PSR") >> 29) & 1;
-
-				return (c << 31) | LSR(v, 1);
-			}
-			return ROR(v, s);
-		case 7:					/* RORREG */
-			sprint(buf, "R%ld", (s>>1)&0xF);
-			s = rget(map, buf);
-			if(s == 0 || (s & 0xF) == 0)
-				return v;
-			return ROR(v, s & 0xF);
-		}
-	}
-}
-
-static int
-nbits(uint32_t v)
-{
-	int n = 0;
-	int i;
-
-	for(i=0; i < 32 ; i++) {
-		if(v & 1) ++n;
-		v >>= 1;
-	}
-
-	return n;
-}
-
-static uint32_t
-armmaddr(Map *map, Rgetter rget, Instr *i)
-{
-	uint32_t v;
-	uint32_t nb;
-	char buf[8];
-	uint32_t rn;
-
-	rn = (i->w >> 16) & 0xf;
-	sprint(buf,"R%ld", rn);
-
-	v = rget(map, buf);
-	nb = nbits(i->w & ((1 << 15) - 1));
-
-	switch((i->w >> 23) & 3) {
-	default:
-	case 0: return (v - (nb*4)) + 4;
-	case 1: return v;
-	case 2: return v - (nb*4);
-	case 3: return v + 4;
-	}
-}
-
-static uint64_t
-armaddr(Map *map, Rgetter rget, Instr *i)
-{
-	char buf[8];
-	uint32_t rn;
-
-	snprint(buf, sizeof(buf), "R%ld", (i->w >> 16) & 0xf);
-	rn = rget(map, buf);
-
-	if((i->w & (1<<24)) == 0)			/* POSTIDX */
-		return rn;
-
-	if((i->w & (1<<25)) == 0) {			/* OFFSET */
-		if(i->w & (1U<<23))
-			return rn + (i->w & BITS(0,11));
-		return rn - (i->w & BITS(0,11));
-	} else {					/* REGOFF */
-		uint32_t index = 0;
-		uint8_t c;
-		uint8_t rm;
-
-		sprint(buf, "R%ld", i->w & 0xf);
-		rm = rget(map, buf);
-
-		switch((i->w & BITS(5,6)) >> 5) {
-		case 0: index = rm << ((i->w & BITS(7,11)) >> 7);	break;
-		case 1: index = LSR(rm, ((i->w & BITS(7,11)) >> 7));	break;
-		case 2: index = ASR(rm, ((i->w & BITS(7,11)) >> 7));	break;
-		case 3:
-			if((i->w & BITS(7,11)) == 0) {
-				c = (rget(map, "PSR") >> 29) & 1;
-				index = c << 31 | LSR(rm, 1);
-			} else {
-				index = ROR(rm, ((i->w & BITS(7,11)) >> 7));
-			}
-			break;
-		}
-		if(i->w & (1<<23))
-			return rn + index;
-		return rn - index;
-	}
-}
-
-static uint64_t
-armfadd(Map *map, Rgetter rget, Instr *i, uint64_t pc)
-{
-	char buf[8];
-	int r;
-
-	r = (i->w >> 12) & 0xf;
-	if(r != 15 || !armcondpass(map, rget, (i->w >> 28) & 0xf))
-		return pc+4;
-
-	r = (i->w >> 16) & 0xf;
-	sprint(buf, "R%d", r);
-
-	return rget(map, buf) + armshiftval(map, rget, i);
-}
-
-static uint64_t
-armfbx(Map *map, Rgetter rget, Instr *i, uint64_t pc)
-{
-	char buf[8];
-	int r;
-
-	if(!armcondpass(map, rget, (i->w>>28)&0xf))
-		return pc+4;
-	r = (i->w >> 0) & 0xf;
-	sprint(buf, "R%d", r);
-	return rget(map, buf);
-}
-
-static uint64_t
-armfmovm(Map *map, Rgetter rget, Instr *i, uint64_t pc)
-{
-	uint32_t v;
-	uint32_t addr;
-
-	v = i->w & 1<<15;
-	if(!v || !armcondpass(map, rget, (i->w>>28)&0xf))
-		return pc+4;
-
-	addr = armmaddr(map, rget, i) + nbits(i->w & BITS(0,15));
-	if(get4(map, addr, &v) < 0) {
-		werrstr("can't read addr: %r");
-		return -1;
-	}
-	return v;
-}
-
-static uint64_t
-armfbranch(Map *map, Rgetter rget, Instr *i, uint64_t pc)
-{
-	if(!armcondpass(map, rget, (i->w >> 28) & 0xf))
-		return pc+4;
-
-	return pc + (((signed long)i->w << 8) >> 6) + 8;
-}
-
-static uint64_t
-armfmov(Map *map, Rgetter rget, Instr *i, uint64_t pc)
-{
-	uint32_t rd, v;
-
-	rd = (i->w >> 12) & 0xf;
-	if(rd != 15 || !armcondpass(map, rget, (i->w>>28)&0xf))
-		return pc+4;
-
-	 /* LDR */
-	/* BUG: Needs LDH/B, too */
-	if(((i->w>>26)&0x3) == 1) {
-		if(get4(map, armaddr(map, rget, i), &v) < 0) {
-			werrstr("can't read instruction: %r");
-			return pc+4;
-		}
-		return v;
-	}
-
-	 /* MOV */
-	v = armshiftval(map, rget, i);
-
-	return v;
-}
-
-static Opcode opcodes[] =
-{
-	"AND%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"EOR%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"SUB%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"RSB%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"ADD%C%S",	armdps, armfadd,	"R%s,R%n,R%d",
-	"ADC%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"SBC%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"RSC%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"TST%C%S",	armdps, 0,	"R%s,R%n",
-	"TEQ%C%S",	armdps, 0,	"R%s,R%n",
-	"CMP%C%S",	armdps, 0,	"R%s,R%n",
-	"CMN%C%S",	armdps, 0,	"R%s,R%n",
-	"ORR%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"MOVW%C%S",	armdps, armfmov,	"R%s,R%d",
-	"BIC%C%S",	armdps, 0,	"R%s,R%n,R%d",
-	"MVN%C%S",	armdps, 0,	"R%s,R%d",
-
-/* 16 */
-	"AND%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"EOR%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"SUB%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"RSB%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"ADD%C%S",	armdps, armfadd,	"(R%s%h%m),R%n,R%d",
-	"ADC%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"SBC%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"RSC%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"TST%C%S",	armdps, 0,	"(R%s%h%m),R%n",
-	"TEQ%C%S",	armdps, 0,	"(R%s%h%m),R%n",
-	"CMP%C%S",	armdps, 0,	"(R%s%h%m),R%n",
-	"CMN%C%S",	armdps, 0,	"(R%s%h%m),R%n",
-	"ORR%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"MOVW%C%S",	armdps, armfmov,	"(R%s%h%m),R%d",
-	"BIC%C%S",	armdps, 0,	"(R%s%h%m),R%n,R%d",
-	"MVN%C%S",	armdps, 0,	"(R%s%h%m),R%d",
-
-/* 32 */
-	"AND%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"EOR%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"SUB%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"RSB%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"ADD%C%S",	armdps, armfadd,	"(R%s%hR%M),R%n,R%d",
-	"ADC%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"SBC%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"RSC%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"TST%C%S",	armdps, 0,	"(R%s%hR%M),R%n",
-	"TEQ%C%S",	armdps, 0,	"(R%s%hR%M),R%n",
-	"CMP%C%S",	armdps, 0,	"(R%s%hR%M),R%n",
-	"CMN%C%S",	armdps, 0,	"(R%s%hR%M),R%n",
-	"ORR%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"MOVW%C%S",	armdps, armfmov,	"(R%s%hR%M),R%d",
-	"BIC%C%S",	armdps, 0,	"(R%s%hR%M),R%n,R%d",
-	"MVN%C%S",	armdps, 0,	"(R%s%hR%M),R%d",
-
-/* 48 */
-	"AND%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"EOR%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"SUB%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"RSB%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"ADD%C%S",	armdpi, armfadd,	"$#%i,R%n,R%d",
-	"ADC%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"SBC%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"RSC%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"TST%C%S",	armdpi, 0,	"$#%i,R%n",
-	"TEQ%C%S",	armdpi, 0,	"$#%i,R%n",
-	"CMP%C%S",	armdpi, 0,	"$#%i,R%n",
-	"CMN%C%S",	armdpi, 0,	"$#%i,R%n",
-	"ORR%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"MOVW%C%S",	armdpi, armfmov,	"$#%i,R%d",
-	"BIC%C%S",	armdpi, 0,	"$#%i,R%n,R%d",
-	"MVN%C%S",	armdpi, 0,	"$#%i,R%d",
-
-/* 48+16 */
-	"MUL%C%S",	armdpi, 0,	"R%M,R%s,R%n",
-	"MULA%C%S",	armdpi, 0,	"R%M,R%s,R%n,R%d",
-	"SWPW",		armdpi, 0,	"R%s,(R%n),R%d",
-	"SWPB",		armdpi, 0,	"R%s,(R%n),R%d",
-
-/* 48+16+4 */
-	"MOV%u%C%p",	armhwby, 0,	"R%d,(R%n%UR%M)",
-	"MOV%u%C%p",	armhwby, 0,	"R%d,%I",
-	"MOV%u%C%p",	armhwby, armfmov,	"(R%n%UR%M),R%d",
-	"MOV%u%C%p",	armhwby, armfmov,	"%I,R%d",
-
-/* 48+24 */
-	"MOVW%C%p",	armsdti, 0,	"R%d,%I",
-	"MOVB%C%p",	armsdti, 0,	"R%d,%I",
-	"MOVW%C%p",	armsdti, armfmov,	"%I,R%d",
-	"MOVBU%C%p",	armsdti, armfmov,	"%I,R%d",
-
-	"MOVW%C%p",	armsdts, 0,	"R%d,(R%s%h%m)(R%n)",
-	"MOVB%C%p",	armsdts, 0,	"R%d,(R%s%h%m)(R%n)",
-	"MOVW%C%p",	armsdts, armfmov,	"(R%s%h%m)(R%n),R%d",
-	"MOVBU%C%p",	armsdts, armfmov,	"(R%s%h%m)(R%n),R%d",
-
-	"MOVM%C%P%a",	armbdt, armfmovm,		"[%r],(R%n)",
-	"MOVM%C%P%a",	armbdt, armfmovm,		"(R%n),[%r]",
-
-	"B%C",		armb, armfbranch,		"%b",
-	"BL%C",		armb, armfbranch,		"%b",
-
-	"CDP%C",	armco, 0,		"",
-	"CDP%C",	armco, 0,		"",
-	"MCR%C",	armco, 0,		"",
-	"MRC%C",	armco, 0,		"",
-
-/* 48+24+4+4+2+2+4 */
-	"MULLU%C%S",	armdpi, 0,	"R%M,R%s,(R%n,R%d)",
-	"MULALU%C%S",	armdpi, 0,	"R%M,R%s,(R%n,R%d)",
-	"MULL%C%S",	armdpi, 0,	"R%M,R%s,(R%n,R%d)",
-	"MULAL%C%S",	armdpi, 0,	"R%M,R%s,(R%n,R%d)",
-
-/* 48+24+4+4+2+2+4+4 = 92 */
-	"UNK",		armunk, 0,	"",
-
-	/* new v7 arch instructions */
-/* 93 */
-	"LDREX",	armdpi, 0,	"(R%n),R%d",
-	"STREX",	armdpi, 0,	"R%s,(R%n),R%d",
-	"CLREX",	armunk, 0,	"",
-
-/* 96 */
-	"DSB",		armunk, 0,	"",
-	"DMB",		armunk, 0,	"",
-	"ISB",		armunk, 0,	"",
-
-/* 99 */
-	"RFEV7%P%a",	armbdt, 0,	"(R%n)",
-
-/* 100 */
-	"MLA%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"MLS%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"NMLS%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"NMLA%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"MUL%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"NMUL%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"ADD%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"SUB%f%C",	armdps,	0,	"F%s,F%n,F%d",
-	"DIV%f%C",	armdps,	0,	"F%s,F%n,F%d",
-
-/* 109 */
-	"MOV%f%C",	armdps,	0,	"F%s,F%d",
-	"ABS%f%C",	armdps,	0,	"F%s,F%d",
-	"NEG%f%C",	armdps,	0,	"F%s,F%d",
-	"SQRT%f%C",	armdps,	0,	"F%s,F%d",
-	"CMP%f%C",	armdps,	0,	"F%s,F%d",
-	"CMPE%f%C",	armdps,	0,	"F%s,F%d",
-	"CMP%f%C",	armdps,	0,	"$0.0,F%d",
-	"CMPE%f%C",	armdps,	0,	"$0.0,F%d",
-
-/* 117 */
-	"MOV%F%R%C",	armdps, 0,	"F%s,F%d",
-
-/* 118 */
-	"MOVW%C",	armdps, 0,	"R%d,F%n",
-	"MOVW%C",	armdps, 0,	"F%n,R%d",
-	"MOVW%C",	armdps, 0,	"R%d,%x",
-	"MOVW%C",	armdps, 0,	"%x,R%d",
-
-/* 122 */
-	"MOV%f%C",	armvstdi,	0,	"F%d,%I",
-	"MOV%f%C",	armvstdi,	0,	"%I,F%d",
-
-/* 124 */
-	"BKPT%C",	armbpt,	0,		"$#%i",
-	"BX%C",		armdps,	armfbx,	"(R%s)",
-	"BXJ%C",	armdps,	armfbx,	"(R%s)",
-	"BLX%C",	armdps,	armfbx,	"(R%s)",
-};
-
-static void
-gaddr(Instr *i)
-{
-	*i->curr++ = '$';
-	i->curr += gsymoff(i->curr, i->end-i->curr, i->imm, CANY);
-}
-
-static	char *mode[] = { 0, "IA", "DB", "IB" };
-static	char *pw[] = { "P", "PW", 0, "W" };
-static	char *sw[] = { 0, "W", "S", "SW" };
-
-static void
-format(char *mnemonic, Instr *i, char *f)
-{
-	int j, k, m, n;
-	int g;
-	char *fmt;
-
-	if(mnemonic)
-		format(0, i, mnemonic);
-	if(f == 0)
-		return;
-	if(mnemonic)
-		if(i->curr < i->end)
-			*i->curr++ = '\t';
-	for ( ; *f && i->curr < i->end; f++) {
-		if(*f != '%') {
-			*i->curr++ = *f;
-			continue;
-		}
-		switch (*++f) {
-
-		case 'C':	/* .CONDITION */
-			if(cond[i->cond])
-				bprint(i, ".%s", cond[i->cond]);
-			break;
-
-		case 'S':	/* .STORE */
-			if(i->store)
-				bprint(i, ".S");
-			break;
-
-		case 'P':	/* P & U bits for block move */
-			n = (i->w >>23) & 0x3;
-			if (mode[n])
-				bprint(i, ".%s", mode[n]);
-			break;
-
-		case 'p':	/* P & W bits for single data xfer*/
-			if (pw[i->store])
-				bprint(i, ".%s", pw[i->store]);
-			break;
-
-		case 'a':	/* S & W bits for single data xfer*/
-			if (sw[i->store])
-				bprint(i, ".%s", sw[i->store]);
-			break;
-
-		case 's':
-			bprint(i, "%d", i->rs & 0xf);
-			break;
-				
-		case 'M':
-			bprint(i, "%lud", (i->w>>8) & 0xf);
-			break;
-				
-		case 'm':
-			bprint(i, "%lud", (i->w>>7) & 0x1f);
-			break;
-
-		case 'h':
-			bprint(i, shtype[(i->w>>5) & 0x3]);
-			break;
-
-		case 'u':		/* Signed/unsigned Byte/Halfword */
-			bprint(i, hb[(i->w>>5) & 0x3]);
-			break;
-
-		case 'I':
-			if (i->rn == 13) {
-				if (plocal(i))
-					break;
-			}
-			g = 0;
-			fmt = "#%lx(R%d)";
-			if (i->rn == 15) {
-				/* convert load of offset(PC) to a load immediate */
-				if (get4(i->map, i->addr+i->imm+8, (uint32_t*)&i->imm) > 0)
-				{
-					g = 1;
-					fmt = "";
-				}
-			}
-			if (mach->sb)
-			{
-				if (i->rd == 11) {
-					uint32_t nxti;
-
-					if (get4(i->map, i->addr+4, &nxti) > 0) {
-						if ((nxti & 0x0e0f0fff) == 0x060c000b) {
-							i->imm += mach->sb;
-							g = 1;
-							fmt = "-SB";
-						}
-					}
-				}
-				if (i->rn == 12)
-				{
-					i->imm += mach->sb;
-					g = 1;
-					fmt = "-SB(SB)";
-				}
-			}
-			if (g)
-			{
-				gaddr(i);
-				bprint(i, fmt, i->rn);
-			}
-			else
-				bprint(i, fmt, i->imm, i->rn);
-			break;
-		case 'U':		/* Add/subtract from base */
-			bprint(i, addsub[(i->w >> 23) & 1]);
-			break;
-
-		case 'n':
-			bprint(i, "%d", i->rn);
-			break;
-
-		case 'd':
-			bprint(i, "%d", i->rd);
-			break;
-
-		case 'i':
-			bprint(i, "%lux", i->imm);
-			break;
-
-		case 'b':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(uint32_t)i->imm, CTEXT);
-			break;
-
-		case 'g':
-			i->curr += gsymoff(i->curr, i->end-i->curr,
-				i->imm, CANY);
-			break;
-
-		case 'f':
-			switch((i->w >> 8) & 0xF){
-			case 10:
-				bprint(i, "F");
-				break;
-			case 11:
-				bprint(i, "D");
-				break;
-			}
-			break;
-
-		case 'F':
-			switch(((i->w >> 15) & 0xE) + ((i->w >> 8) & 0x1)){
-			case 0x0:
-				bprint(i, ((i->w >> 7) & 0x1)? "WF" : "WF.U");
-				break;
-			case 0x1:
-				bprint(i, ((i->w >> 7) & 0x1)? "WD" : "WD.U");
-				break;
-			case 0x8:
-				bprint(i, "FW.U");
-				break;
-			case 0x9:
-				bprint(i, "DW.U");
-				break;
-			case 0xA:
-				bprint(i, "FW");
-				break;
-			case 0xB:
-				bprint(i, "DW");
-				break;
-			case 0xE:
-				bprint(i, "FD");
-				break;
-			case 0xF:
-				bprint(i, "DF");
-				break;
-			}
-			break;
-
-		case 'R':
-			if(((i->w >> 7) & 0x1) == 0)
-				bprint(i, "R");
-			break;
-
-		case 'x':
-			switch(i->rn){
-			case 0:
-				bprint(i, "FPSID");
-				break;
-			case 1:
-				bprint(i, "FPSCR");
-				break;
-			case 2:
-				bprint(i, "FPEXC");
-				break;
-			default:
-				bprint(i, "FPS(%d)", i->rn);
-				break;
-			}
-			break;
-
-		case 'r':
-			n = i->imm&0xffff;
-			j = 0;
-			k = 0;
-			while(n) {
-				m = j;
-				while(n&0x1) {
-					j++;
-					n >>= 1;
-				}
-				if(j != m) {
-					if(k)
-						bprint(i, ",");
-					if(j == m+1)
-						bprint(i, "R%d", m);
-					else
-						bprint(i, "R%d-R%d", m, j-1);
-					k = 1;
-				}
-				j++;
-				n >>= 1;
-			}
-			break;
-
-		case '\0':
-			*i->curr++ = '%';
-			return;
-
-		default:
-			bprint(i, "%%%c", *f);
-			break;
-		}
-	}
-	*i->curr = 0;
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-
-	i.curr = buf;
-	i.end = buf+n-1;
-	if(decode(map, pc, &i) < 0)
-		return -1;
-
-	(*opcodes[i.op].fmt)(&opcodes[i.op], &i);
-	return 4;
-}
-
-static int
-arminst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	USED(modifier);
-	return printins(map, pc, buf, n);
-}
-
-static int
-armdas(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-
-	i.curr = buf;
-	i.end = buf+n;
-	if(decode(map, pc, &i) < 0)
-		return -1;
-	if(i.end-i.curr > 8)
-		i.curr = _hexify(buf, i.w, 7);
-	*i.curr = 0;
-	return 4;
-}
-
-static int
-arminstlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	if(decode(map, pc, &i) < 0)
-		return -1;
-	return 4;
-}
-
-static int
-armfoll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	uint64_t d;
-	Instr i;
-
-	if(decode(map, pc, &i) < 0)
-		return -1;
-
-	if(opcodes[i.op].foll) {
-		d = (*opcodes[i.op].foll)(map, rget, &i, pc);
-		if(d == -1)
-			return -1;
-	} else
-		d = pc+4;
-
-	foll[0] = d;
-	return 1;
-}

+ 0 - 147
sys/src/libmach/5obj.c

@@ -1,147 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * 5obj.c - identify and parse an arm object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "5c/5.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_is5(char *s)
-{
-	return  s[0] == ANAME				/* ANAME */
-		&& s[1] == D_FILE			/* type */
-		&& s[2] == 1				/* sym */
-		&& s[3] == '<';				/* name of file */
-}
-
-int
-_read5(Biobuf *bp, Prog *p)
-{
-	int as, n;
-	Addr a;
-
-	as = Bgetc(bp);			/* as */
-	if(as < 0)
-		return 0;
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = leswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 6);		/* scond(1), reg(1), lineno(4) */
-	a = addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int32_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp,1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type){
-	default:
-	case D_NONE:
-	case D_REG:
-	case D_FREG:
-	case D_PSR:
-	case D_FPCR:
-		break;
-	case D_OREG:
-	case D_CONST:
-	case D_BRANCH:
-	case D_SHIFT:
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-		if(a.sym && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 97
sys/src/libmach/68020.c

@@ -1,97 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYNEXT
-/*
- * 68020 definition
- */
-#include <u.h>
-#include "68020/ureg.h"
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-#define	MAXREG	0
-#define	MINREG	0
-
-#define	REGOFF(x)	(ulong)(&((struct Ureg *) 0)->x)
-
-#define	VO	REGOFF(vo)		/* vo, 2 bytes */
-#define	SR	REGOFF(sr)		/* sr, 2 bytes */
-#define	R0	REGOFF(r0)
-#define	PC	REGOFF(pc)
-#define	DBMAGIC	REGOFF(magic)
-#define	SP	REGOFF(usp)
-
-#define	REGSIZE		(R0+4)
-#define	FCTL(x)		(REGSIZE+(x)*4)
-#define	FREG(x)		(FCTL(3)+(x)*12)
-#define	FPREGSIZE	(11*12)
-
-/*
- *	68020 register set
- */
-Reglist m68020reglist[] = {
-	{"VO",		VO,		RINT,	'x'},
-	{"SR",		SR,		RINT,	'x'},
-	{"MAGIC",	DBMAGIC,	RINT,	'X'},
-	{"PC",		PC,		RINT,	'X'},
-	{"A7",		SP,		RINT,	'X'},
-	{"KSP",		REGOFF(sp),	RINT,	'X'},
-	{"A6",		REGOFF(a6),	RINT,	'X'},
-	{"A5",		REGOFF(a5),	RINT,	'X'},
-	{"A4",		REGOFF(a4),	RINT,	'X'},
-	{"A3",		REGOFF(a3),	RINT,	'X'},
-	{"A2",		REGOFF(a2),	RINT,	'X'},
-	{"A1",		REGOFF(a1),	RINT,	'X'},
-	{"A0",		REGOFF(a0),	RINT,	'X'},
-	{"R7",		REGOFF(r7),	RINT,	'X'},
-	{"R6",		REGOFF(r6),	RINT,	'X'},
-	{"R5",		REGOFF(r5),	RINT,	'X'},
-	{"R4",		REGOFF(r4),	RINT,	'X'},
-	{"R3",		REGOFF(r3),	RINT,	'X'},
-	{"R2",		REGOFF(r2),	RINT,	'X'},
-	{"R1",		REGOFF(r1),	RINT,	'X'},
-	{"R0",		REGOFF(r0),	RINT,	'X'},
-	{"FPCR",	FCTL(0),	RFLT,	'X'},
-	{"FPSR",	FCTL(1),	RFLT,	'X'},
-	{"FPIAR",	FCTL(2),	RFLT,	'X'},
-	{"F0",		FREG(0),	RFLT,	'8'},
-	{"F1",		FREG(1),	RFLT,	'8'},
-	{"F2",		FREG(2),	RFLT,	'8'},
-	{"F3",		FREG(3),	RFLT,	'8'},
-	{"F4",		FREG(4),	RFLT,	'8'},
-	{"F5",		FREG(5),	RFLT,	'8'},
-	{"F6",		FREG(6),	RFLT,	'8'},
-	{"F7",		FREG(7),	RFLT,	'8'},
-	{0}
-};
-
-Mach m68020 =
-{
-	"68020",
-	M68020,		/* machine type */
-	m68020reglist,	/* register list */
-	REGSIZE,	/* number of bytes in reg set */
-	FPREGSIZE,	/* number of bytes in fp reg set */
-	"PC",
-	"A7",
-	0,		/* link register */
-	"a6base",	/* static base register name */
-	0,		/* value */
-	0x2000,		/* page size */
-	0x80000000ULL,	/* kernel base */
-	0x80000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	2,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 532
sys/src/libmach/68020/2.out.h

@@ -1,532 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#define	NSYM	50
-#define	NSNAME	8
-
-/* R0 is return */
-#define	REGEXT	7
-/* A7 is sp A6 is sb */
-#define	AREGEXT	5
-/* F0 is ret */
-#define	FREGEXT	7
-
-enum	as
-{
-	AXXX = 0,
-	AABCD,
-	AADDB,
-	AADDL,
-	AADDW,
-	AADDXB,
-	AADDXL,
-	AADDXW,
-	AADJSP,
-	AANDB,
-	AANDL,
-	AANDW,
-	AASLB,
-	AASLL,
-	AASLW,
-	AASRB,
-	AASRL,
-	AASRW,
-	ABCASE,
-	ABCC,
-	ABCHG,
-	ABCLR,
-	ABCS,
-	ABEQ,
-	ABFCHG,
-	ABFCLR,
-	ABFEXTS,
-	ABFEXTU,
-	ABFFFO,
-	ABFINS,
-	ABFSET,
-	ABFTST,
-	ABGE,
-	ABGT,
-	ABHI,
-	ABKPT,
-	ABLE,
-	ABLS,
-	ABLT,
-	ABMI,
-	ABNE,
-	ABPL,
-	ABRA,
-	ABSET,
-	ABSR,
-	ABTST,
-	ABVC,
-	ABVS,
-	ACALLM,
-	ACAS2B,
-	ACAS2L,
-	ACAS2W,
-	ACASB,
-	ACASEW,
-	ACASL,
-	ACASW,
-	ACHK2B,
-	ACHK2L,
-	ACHK2W,
-	ACHKL,
-	ACHKW,
-	ACLRB,
-	ACLRL,
-	ACLRW,
-	ACMP2B,
-	ACMP2L,
-	ACMP2W,
-	ACMPB,
-	ACMPL,
-	ACMPW,
-	ADATA,
-	ADBCC,
-	ADBCS,
-	ADBEQ,
-	ADBF,
-	ADBGE,
-	ADBGT,
-	ADBHI,
-	ADBLE,
-	ADBLS,
-	ADBLT,
-	ADBMI,
-	ADBNE,
-	ADBPL,
-	ADBT,
-	ADBVC,
-	ADBVS,
-	ADIVSL,
-	ADIVSW,
-	ADIVUL,
-	ADIVUW,
-	AEND,
-	AEORB,
-	AEORL,
-	AEORW,
-	AEXG,
-	AEXTBL,
-	AEXTBW,
-	AEXTWL,
-	AFABSB,
-	AFABSD,
-	AFABSF,
-	AFABSL,
-	AFABSW,
-	AFACOSB,
-	AFACOSD,
-	AFACOSF,
-	AFACOSL,
-	AFACOSW,
-	AFADDB,
-	AFADDD,
-	AFADDF,
-	AFADDL,
-	AFADDW,
-	AFASINB,
-	AFASIND,
-	AFASINF,
-	AFASINL,
-	AFASINW,
-	AFATANB,
-	AFATAND,
-	AFATANF,
-	AFATANHB,
-	AFATANHD,
-	AFATANHF,
-	AFATANHL,
-	AFATANHW,
-	AFATANL,
-	AFATANW,
-	AFBEQ,
-	AFBF,
-	AFBGE,
-	AFBGT,
-	AFBLE,
-	AFBLT,
-	AFBNE,
-	AFBT,
-	AFCMPB,
-	AFCMPD,
-	AFCMPF,
-	AFCMPL,
-	AFCMPW,
-	AFCOSB,
-	AFCOSD,
-	AFCOSF,
-	AFCOSHB,
-	AFCOSHD,
-	AFCOSHF,
-	AFCOSHL,
-	AFCOSHW,
-	AFCOSL,
-	AFCOSW,
-	AFDBEQ,
-	AFDBF,
-	AFDBGE,
-	AFDBGT,
-	AFDBLE,
-	AFDBLT,
-	AFDBNE,
-	AFDBT,
-	AFDIVB,
-	AFDIVD,
-	AFDIVF,
-	AFDIVL,
-	AFDIVW,
-	AFETOXB,
-	AFETOXD,
-	AFETOXF,
-	AFETOXL,
-	AFETOXM1B,
-	AFETOXM1D,
-	AFETOXM1F,
-	AFETOXM1L,
-	AFETOXM1W,
-	AFETOXW,
-	AFGETEXPB,
-	AFGETEXPD,
-	AFGETEXPF,
-	AFGETEXPL,
-	AFGETEXPW,
-	AFGETMANB,
-	AFGETMAND,
-	AFGETMANF,
-	AFGETMANL,
-	AFGETMANW,
-	AFINTB,
-	AFINTD,
-	AFINTF,
-	AFINTL,
-	AFINTRZB,
-	AFINTRZD,
-	AFINTRZF,
-	AFINTRZL,
-	AFINTRZW,
-	AFINTW,
-	AFLOG10B,
-	AFLOG10D,
-	AFLOG10F,
-	AFLOG10L,
-	AFLOG10W,
-	AFLOG2B,
-	AFLOG2D,
-	AFLOG2F,
-	AFLOG2L,
-	AFLOG2W,
-	AFLOGNB,
-	AFLOGND,
-	AFLOGNF,
-	AFLOGNL,
-	AFLOGNP1B,
-	AFLOGNP1D,
-	AFLOGNP1F,
-	AFLOGNP1L,
-	AFLOGNP1W,
-	AFLOGNW,
-	AFMODB,
-	AFMODD,
-	AFMODF,
-	AFMODL,
-	AFMODW,
-	AFMOVEB,
-	AFMOVED,
-	AFMOVEF,
-	AFMOVEL,
-	AFMOVEM,
-	AFMOVEMC,
-	AFMOVEW,
-	AFMULB,
-	AFMULD,
-	AFMULF,
-	AFMULL,
-	AFMULW,
-	AFNEGB,
-	AFNEGD,
-	AFNEGF,
-	AFNEGL,
-	AFNEGW,
-	AFREMB,
-	AFREMD,
-	AFREMF,
-	AFREML,
-	AFREMW,
-	AFRESTORE,
-	AFSAVE,
-	AFSCALEB,
-	AFSCALED,
-	AFSCALEF,
-	AFSCALEL,
-	AFSCALEW,
-	AFSEQ,
-	AFSF,
-	AFSGE,
-	AFSGT,
-	AFSINB,
-	AFSIND,
-	AFSINF,
-	AFSINHB,
-	AFSINHD,
-	AFSINHF,
-	AFSINHL,
-	AFSINHW,
-	AFSINL,
-	AFSINW,
-	AFSLE,
-	AFSLT,
-	AFSNE,
-	AFSQRTB,
-	AFSQRTD,
-	AFSQRTF,
-	AFSQRTL,
-	AFSQRTW,
-	AFST,
-	AFSUBB,
-	AFSUBD,
-	AFSUBF,
-	AFSUBL,
-	AFSUBW,
-	AFTANB,
-	AFTAND,
-	AFTANF,
-	AFTANHB,
-	AFTANHD,
-	AFTANHF,
-	AFTANHL,
-	AFTANHW,
-	AFTANL,
-	AFTANW,
-	AFTENTOXB,
-	AFTENTOXD,
-	AFTENTOXF,
-	AFTENTOXL,
-	AFTENTOXW,
-	AFTSTB,
-	AFTSTD,
-	AFTSTF,
-	AFTSTL,
-	AFTSTW,
-	AFTWOTOXB,
-	AFTWOTOXD,
-	AFTWOTOXF,
-	AFTWOTOXL,
-	AFTWOTOXW,
-	AGLOBL,
-	AGOK,
-	AHISTORY,
-	AILLEG,
-	AINSTR,
-	AJMP,
-	AJSR,
-	ALEA,
-	ALINKL,
-	ALINKW,
-	ALOCATE,
-	ALONG,
-	ALSLB,
-	ALSLL,
-	ALSLW,
-	ALSRB,
-	ALSRL,
-	ALSRW,
-	AMOVB,
-	AMOVEM,
-	AMOVEPL,
-	AMOVEPW,
-	AMOVESB,
-	AMOVESL,
-	AMOVESW,
-	AMOVL,
-	AMOVW,
-	AMULSL,
-	AMULSW,
-	AMULUL,
-	AMULUW,
-	ANAME,
-	ANBCD,
-	ANEGB,
-	ANEGL,
-	ANEGW,
-	ANEGXB,
-	ANEGXL,
-	ANEGXW,
-	ANOP,
-	ANOTB,
-	ANOTL,
-	ANOTW,
-	AORB,
-	AORL,
-	AORW,
-	APACK,
-	APEA,
-	ARESET,
-	AROTLB,
-	AROTLL,
-	AROTLW,
-	AROTRB,
-	AROTRL,
-	AROTRW,
-	AROXLB,
-	AROXLL,
-	AROXLW,
-	AROXRB,
-	AROXRL,
-	AROXRW,
-	ARTD,
-	ARTE,
-	ARTM,
-	ARTR,
-	ARTS,
-	ASBCD,
-	ASCC,
-	ASCS,
-	ASEQ,
-	ASF,
-	ASGE,
-	ASGT,
-	ASHI,
-	ASLE,
-	ASLS,
-	ASLT,
-	ASMI,
-	ASNE,
-	ASPL,
-	AST,
-	ASTOP,
-	ASUBB,
-	ASUBL,
-	ASUBW,
-	ASUBXB,
-	ASUBXL,
-	ASUBXW,
-	ASVC,
-	ASVS,
-	ASWAP,
-	ASYS,
-	ATAS,
-	ATEXT,
-	ATRAP,
-	ATRAPCC,
-	ATRAPCS,
-	ATRAPEQ,
-	ATRAPF,
-	ATRAPGE,
-	ATRAPGT,
-	ATRAPHI,
-	ATRAPLE,
-	ATRAPLS,
-	ATRAPLT,
-	ATRAPMI,
-	ATRAPNE,
-	ATRAPPL,
-	ATRAPT,
-	ATRAPV,
-	ATRAPVC,
-	ATRAPVS,
-	ATSTB,
-	ATSTL,
-	ATSTW,
-	AUNLK,
-	AUNPK,
-	AWORD,
-	ASIGNAME,
-
-	ALAST
-};
-
-enum
-{
-	NREG		= 8,
-
-	D_R0		= 0,
-	D_A0		= NREG,
-	D_F0		= D_A0+NREG,
-	D_NONE		= D_F0+NREG,
-	D_TOS,
-	D_BRANCH,
-	D_STACK,
-	D_TREE,
-	D_EXTERN,
-	D_STATIC,
-	D_AUTO,
-	D_PARAM,
-	D_CONST,
-	D_FCONST,
-	D_QUICK,
-
-	D_CCR,
-	D_SR,
-	D_SFC,
-	D_CACR,
-	D_USP,
-	D_VBR,
-	D_CAAR,
-	D_MSP,
-	D_ISP,
-	D_DFC,
-	D_FPCR,
-	D_FPSR,
-	D_FPIAR,
-	D_SCONST,
-	D_FILE,
-
-	D_TC,		/* new for 68040 */
-	D_ITT0,
-	D_ITT1,
-	D_DTT0,
-	D_DTT1,
-	D_MMUSR,
-	D_URP,
-	D_SRP,
-
-	D_FILE1,
-
-	D_MASK		= 63/(D_SRP>=63?0:1),
-
-	I_DIR		= (D_MASK+1)*0,
-	I_INDINC	= (D_MASK+1)*1,
-	I_INDDEC	= (D_MASK+1)*2,
-	I_INDIR		= (D_MASK+1)*3,
-	I_ADDR		= (D_MASK+1)*4,
-
-	I_INDEX1	= (D_MASK+1)*1,
-	I_INDEX2	= (D_MASK+1)*2,
-	I_INDEX3	= (D_MASK+1)*3,
-
-	I_MASK		= (D_MASK+1)*7,
-
-	T_FIELD		= 1<<0,
-	T_INDEX		= 1<<1,
-	T_TYPE		= 1<<2,
-	T_OFFSET	= 1<<3,
-	T_FCONST	= 1<<4,
-	T_SYM		= 1<<5,
-	T_SCONST	= 1<<6
-};
-
-/*
- * this is the ranlib header
- */
-#define	SYMDEF	"__.SYMDEF"
-
-/*
- * this is the simulated IEEE floating point
- */
-typedef	struct	ieee	Ieee;
-struct	ieee
-{
-	long	l;	/* contains ls-man	0xffffffff */
-	long	h;	/* contains sign	0x80000000
-				    exp		0x7ff00000
-				    ms-man	0x000fffff */
-};

+ 0 - 37
sys/src/libmach/68020/ureg.h

@@ -1,37 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-struct Ureg
-{
-	uint32_t	r0;
-	uint32_t	r1;
-	uint32_t	r2;
-	uint32_t	r3;
-	uint32_t	r4;
-	uint32_t	r5;
-	uint32_t	r6;
-	uint32_t	r7;
-	uint32_t	a0;
-	uint32_t	a1;
-	uint32_t	a2;
-	uint32_t	a3;
-	uint32_t	a4;
-	uint32_t	a5;
-	uint32_t	a6;
-	uint32_t	sp;
-	uint32_t	usp;
-	uint32_t	magic;		/* for db to find bottom of ureg */
-	ushort	sr;
-	uint32_t	pc;
-	ushort	vo;
-#ifndef	UREGVARSZ
-#define	UREGVARSZ 23		/* for 68040; 15 is enough on 68020 */
-#endif
-	uchar	microstate[UREGVARSZ];	/* variable-sized portion */
-};

+ 0 - 2093
sys/src/libmach/68020db.c

@@ -1,2093 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-/*
- * 68020-specific debugger interface
- */
-
-static	char	*m68020excep(Map*, Rgetter);
-
-static	int	m68020foll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	m68020inst(Map*, uint64_t, char, char*, int);
-static	int	m68020das(Map*, uint64_t, char*, int);
-static	int	m68020instlen(Map*, uint64_t);
-
-Machdata m68020mach =
-{
-	{0x48,0x48,0,0},	/* break point #0 instr. */
-	2,			/* size of break point instr. */
-
-	beswab,			/* convert short to local byte order */
-	beswal,			/* convert long to local byte order */
-	beswav,			/* convert vlong to local byte order */
-	cisctrace,		/* C traceback */
-	ciscframe,		/* frame finder */
-	m68020excep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,
-	beieeedftos,
-	m68020foll,		/* follow-set calculation */
-	m68020inst,		/* print instruction */
-	m68020das,		/* dissembler */
-	m68020instlen,		/* instruction size */
-};
-
-/*
- * 68020 exception frames
- */
-
-#define BPTTRAP	4		/* breakpoint gives illegal inst */
-
-static char * excep[] = {
-	[2]	"bus error",
-	[3]	"address error",
-	[4]	"illegal instruction",
-	[5]	"zero divide",
-	[6]	"CHK",
-	[7]	"TRAP",
-	[8]	"privilege violation",
-	[9]	"Trace",
-	[10]	"line 1010",
-	[11]	"line 1011",
-	[13]	"coprocessor protocol violation",
-	[24]	"spurious",
-	[25]	"incon",
-	[26]	"tac",
-	[27]	"auto 3",
-	[28]	"clock",
-	[29]	"auto 5",
-	[30]	"parity",
-	[31]	"mouse",
-	[32]	"system call",
-	[33]	"system call 1",
-	[48]	"FPCP branch",
-	[49]	"FPCP inexact",
-	[50]	"FPCP zero div",
-	[51]	"FPCP underflow",
-	[52]	"FPCP operand err",
-	[53]	"FPCP overflow",
-	[54]	"FPCP signal NAN",
-};
-
-static int m68020vec;
-static
-struct ftype{
-	int16_t	fmt;
-	int16_t	len;
-	char	*name;
-} ftype[] = {		/* section 6.5.7 page 6-24 */
-	{  0,  4*2, "Short Format" },
-	{  1,  4*2, "Throwaway" },
-	{  2,  6*2, "Instruction Exception" },
-	{  3,  6*2, "MC68040 Floating Point Exception" },
-	{  8, 29*2, "MC68010 Bus Fault" },
-	{  7, 30*2, "MC68040 Bus Fault" },
-	{  9, 10*2, "Coprocessor mid-Instruction" },
-	{ 10, 16*2, "MC68020 Short Bus Fault" },
-	{ 11, 46*2, "MC68020 Long Bus Fault" },
-	{  0,    0, 0 }
-};
-
-static int
-m68020ufix(Map *map)
-{
-	struct ftype *ft;
-	int i, size, vec;
-	uint32_t efl[2];
-	uint8_t *ef=(uint8_t*)efl;
-	uint32_t l;
-	uint64_t stktop;
-	int16_t fvo;
-
-		/* The kernel proc pointer on a 68020 is always
-		 * at #8xxxxxxx; on the 68040 NeXT, the address
-		 * is always #04xxxxxx.  the sun3 port at sydney
-		 * uses 0xf8xxxxxx to 0xffxxxxxx.
-		 */
-	m68020vec = 0;
-
-	if (get4(map, mach->kbase, (&l)) < 0)
-		return -1;
-	if ((l&0xfc000000) == 0x04000000)	/* if NeXT */
-		size = 30*2;
-	else
-		size = 46*2;			/* 68020 */
-	USED(size);
-
-	stktop = mach->kbase+mach->pgsize;
-	for(i=3; i<100; i++){
-		if (get1(map, stktop-i*4, (uint8_t*)&l, 4)< 0)
-			return -1;
-
-		if(machdata->swal(l) == 0xBADC0C0A){
-			if (get1(map, stktop-(i-1)*4, (uint8_t *)&efl[0], 4) < 0)
-				return -1;
-			if (get1(map, stktop-(i-2)*4, (uint8_t *)&efl[1], 4) < 0)
-				return -1;
-			fvo = (ef[6]<<8)|ef[7];
-			vec = fvo & 0xfff;
-			vec >>= 2;
-			if(vec >= 256)
-				continue;
-
-			for(ft=ftype; ft->name; ft++) {
-				if(ft->fmt == ((fvo>>12) & 0xF)){
-					m68020vec = vec;
-					return 1;
-				}
-			}
-			break;
-		}
-	}
-	return -1;
-}
-
-static char *
-m68020excep(Map *map, Rgetter rget)
-{
-	uint64_t pc;
-	uint8_t buf[4];
-
-	if (m68020ufix(map) < 0)
-		return "bad exception frame";
-
-	if(excep[m68020vec] == 0)
-		return "bad exeception type";
-
-	if(m68020vec == BPTTRAP) {
-		pc = (*rget)(map, "PC");
-		if (get1(map, pc, buf, machdata->bpsize) > 0)
-		if(memcmp(buf, machdata->bpinst, machdata->bpsize) == 0)
-			return "breakpoint";
-	}
-	return excep[m68020vec];
-}
-	/* 68020 Disassembler and related functions */
-/*
-not supported: cpBcc, cpDBcc, cpGEN, cpScc, cpTRAPcc, cpRESTORE, cpSAVE 
-
-opcode:					1 1 1 1 1 1
-					5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-%y - register number						  x x x
-%f - trap vector						  x x x
-%e - destination eff addr				    x x x x x x
-%p - conditional predicate				    x x x x x x
-%s - size code						x x
-%C - cache code						x x
-%E - source eff addr.				x x x x x x
-%d - direction bit				      x
-%c - condition code				x x x x
-%x - register number				x x x
-%b - shift count				x x x
-%q - daffy 3-bit quick operand or shift count	x x x
-%i - immediate operand <varies>
-%t - offset(PC) <varies>
-
-word 1:					1 1 1 1 1 1
-					5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-%a - register number						  x x x
-%w - bit field width					      x x x x x
-%L - MMU function code (SFC/DFC/D%a/#[0-3])		      x x x x x
-%P - conditional predicate				    x x x x x x
-%k - k factor						  x x x x x x x
-%m - register mask					x x x x x x x x
-%N - control register id			x x x x x x x x x x x x
-%j - (Dq != Dr) ? Dq:Dr : Dr		  x x x			  x x x
-%K - dynamic k register					  x x x
-%h - register number					x x x
-%I - MMU function code mask			      x x x x
-%o - bit field offset				  x x x x x
-%u - register number				      x x x
-%D - float dest reg				    x x x
-%F - (fdr==fsr) ? "F%D" :"F%B,F%D" 	   x x x x x x
-%S - float source type			      x x x
-%B - float source register		      x x x
-%Z - ATC level number			      x x x
-%H - MMU register			    x x x x
-%r - register type/number		x x x x
-
-word 2:					1 1 1 1 1 1
-					5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-%A - register number						  x x x
-%U - register number				      x x x
-%R - register type,number		x x x x
-
------------------------------------------------------------------------------
-
-%a	-	register [word 1: 0-2]
-%c	-	condition code [opcode: 8-11]
-%d	-	direction [opcode: 8]
-%e	-	destination effective address [opcode: 0-5]
-%f	-	trap vector [opcode: 0-3]
-%h	-	register [word 1: 5-7]
-%i	-	immediate operand (1, 2, or 4 bytes)
-%j	-	Dq:Dr if Dq != Dr; else Dr => Dr [word 1: 0-2] Dq [word 1: 12-14]
-%k	-	k factor [word 1: 0-6]
-%m	-	register mask [word 1: 0-7]
-%o	-	bit field offset [word 1: 6-10]
-%p	-	conditional predicate [opcode: 0-5]
-%q	-	daffy 3-bit quick operand [opcode: 9-11]
-%r	-	register type, [word 1: 15], register [word 1: 12-14]
-%s	-	size [opcode: 6-7]
-%t	-	offset beyond pc (text address) (2 or 4 bytes)
-%u	-	register [word 1: 6-8]
-%w	-	bit field width [word 1: 0-4]
-%x	-	register [opcode: 9-11]
-%y	-	register [opcode: 0-2]
-%A	-	register [word 2: 0-2]
-%B	-	float source register [word 1: 10-12]
-%C	-	cache identifier [opcode: 6-7] (IC, DC, or BC)
-%D	-	float dest reg [word 1: 7-9]
-%E	-	dest effective address [opcode: 6-11]
-%F	-	float dest reg == float src reg => "F%D"; else "F%B,F%D"
-%H	-	MMU reg [word 1: 10-13] (see above & p 4-53/54)
-%I	-	MMU function code mask [word 1: 5-8]
-%K	-	dynamic k factor register [word 1: 4-6]
-%L	-	MMU function code [word 1: 0-4] (SFC, DFC, D%a, or #[0-3])
-%N	-	control register [word 1: 0-11]
-%P	-	conditional predicate [word 1: 0-5]
-%R	-	register type, [word 2: 15], register [word 2: 12-14]
-%S	-	float source type code [word 1: 10-12]
-%U	-	register [word 2: 6-8]
-%Z	-	ATC level number [word 1: 10-12]
-%1	-	Special case: EA as second operand
-*/
-	/* Operand classes */
-enum {
-	EAPI = 1,	/* extended address: pre decrement only */
-	EACA,		/* extended address: control alterable */
-	EACAD,		/* extended address: control alterable or Dreg */
-	EACAPI,		/* extended address: control alterable or post-incr */
-	EACAPD,		/* extended address: control alterable or pre-decr */
-	EAMA,		/* extended address: memory alterable */
-	EADA,		/* extended address: data alterable */
-	EAA,		/* extended address: alterable */
-	EAC,		/* extended address: control addressing */
-	EACPI,		/* extended address: control addressing or post-incr */
-	EACD,		/* extended address: control addressing or Dreg */
-	EAD,		/* extended address: data addressing */
-	EAM,		/* extended address: memory addressing */
-	EAM_B,		/* EAM with byte immediate data */
-	EADI,		/* extended address: data addressing or immediate */
-	EADI_L,		/* EADI with long immediate data */
-	EADI_W,		/* EADI with word immediate data */
-	EAALL,		/* extended address: all modes */
-	EAALL_L,	/* EAALL with long immediate data */
-	EAALL_W,	/* EAALL with word immediate data */
-	EAALL_B,	/* EAALL with byte immediate date */
-		/* special codes not directly used for validation */
-	EAFLT,		/* extended address: EADI for B, W, L, or S; else EAM */
-	EADDA,		/* destination extended address: EADA */
-	BREAC,		/* EAC operand for JMP or CALL */
-	OP8,		/* low 8 bits of op word */
-	I8,		/* low 8-bits of first extension word */
-	I16,		/* 16 bits in first extension word */
-	I32,		/* 32 bits in first and second extension words */
-	IV,		/* 8, 16 or 32 bit data in first & 2nd extension words */
-	C16,		/* CAS2 16 bit immediate with bits 9-11 & 3-5 zero */
-	BR8,		/* 8 bits in op word or 16 or 32 bits in extension words
-				branch instruction format (p. 2-25) */
-	BR16,		/* 16-bit branch displacement */
-	BR32,		/* 32-bit branch displacement */
-	STACK,		/* return PC on stack - follow set only */
-};
-		/* validation bit masks for various EA classes */
-enum {
-	Dn	= 0x0001,	/* Data register */
-	An	= 0x0002,	/* Address register */
-	Ind	= 0x0004,	/* Address register indirect */
-	Pinc	= 0x0008,	/* Address register indirect post-increment */
-	Pdec	= 0x0010,	/* Address register indirect pre-decrement */
-	Bdisp	= 0x0020,	/* Base/Displacement in all its forms */
-	PCrel	= 0x0040,	/* PC relative addressing in all its forms */
-	Imm	= 0x0080,	/* Immediate data */
-	Abs	= 0x0100,	/* Absolute */
-};
-	/* EA validation table indexed by operand class number */
-
-static	int16_t	validea[] =
-{
-	0,						/* none */
-	Pdec,						/* EAPI */
-	Abs|Bdisp|Ind,					/* EACA */
-	Abs|Bdisp|Ind|Dn,				/* EACAD */
-	Abs|Bdisp|Pinc|Ind,				/* EACAPI */
-	Abs|Bdisp|Pdec|Ind,				/* EACAPD */
-	Abs|Bdisp|Pdec|Pinc|Ind,			/* EAMA */
-	Abs|Bdisp|Pdec|Pinc|Ind|Dn,			/* EADA */
-	Abs|Bdisp|Pdec|Pinc|Ind|An|Dn,			/* EAA */
-	Abs|PCrel|Bdisp|Ind,				/* EAC */
-	Abs|PCrel|Bdisp|Pinc|Ind,			/* EACPI */
-	Abs|PCrel|Bdisp|Ind|Dn,				/* EACD */
-	Abs|PCrel|Bdisp|Pdec|Pinc|Ind|Dn,		/* EAD */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind,		/* EAM */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind,		/* EAM_B */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|Dn,		/* EADI */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|Dn,		/* EADI_L */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|Dn,		/* EADI_W */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|An|Dn,	/* EAALL */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|An|Dn,	/* EAALL_L */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|An|Dn,	/* EAALL_W */
-	Abs|Imm|PCrel|Bdisp|Pdec|Pinc|Ind|An|Dn,	/* EAALL_B */
-};
-	/* EA types */
-enum
-{
-	Dreg,		/* Dn */
-	Areg,		/* An */
-	AInd,		/* (An) */
-	APdec,		/* -(An) */
-	APinc,		/* (An)+ */
-	ADisp,		/* Displacement beyond (An) */
-	BXD,		/* Base, Index, Displacement */
-	PDisp,		/* Displacement beyond PC */
-	PXD,		/* PC, Index, Displacement */
-	ABS,		/* absolute */
-	IMM,		/* immediate */
-	IREAL,		/* single precision real immediate */
-	IEXT,		/* extended precision real immediate */
-	IPACK,		/* packed real immediate */
-	IDBL,		/* double precision real immediate */
-};
-	
-typedef	struct optable	Optable;
-typedef	struct operand	Operand;
-typedef	struct inst	Inst;
-
-struct optable
-{
-	uint16_t	opcode;
-	uint16_t	mask0;
-	uint16_t	op2;
-	uint16_t	mask1;
-	char	opdata[2];
-	char	*format;
-};
-
-struct	operand
-{
-	int	eatype;
-	int16_t	ext;
-	union {
-		int32_t	immediate;	/* sign-extended integer byte/word/long */
-		struct	{		/* index mode displacements */
-			int32_t	disp;
-			int32_t	outer;
-		};
-		char	floater[24];	/* floating point immediates */
-	};
-};
-
-struct	inst
-{
-	int	n;		/* # bytes in instruction */
-	uint64_t	addr;		/* addr of start of instruction */
-	uint16_t	raw[4+12];	/* longest instruction: 24 byte packed immediate */
-	Operand	and[2];
-	char	*end;		/* end of print buffer */
-	char	*curr;		/* current fill point in buffer */
-	char	*errmsg;
-};
-	/* class 0: bit field, MOVEP & immediate instructions */
-static Optable t0[] = {
-{ 0x003c, 0xffff, 0x0000, 0xff00, {I8},		"ORB	%i,CCR" },
-{ 0x007c, 0xffff, 0x0000, 0x0000, {I16},	"ORW	%i,SR" },
-{ 0x023c, 0xffff, 0x0000, 0xff00, {I8},		"ANDB	%i,CCR" },
-{ 0x027c, 0xffff, 0x0000, 0x0000, {I16},	"ANDW	%i,SR" },
-{ 0x0a3c, 0xffff, 0x0000, 0xff00, {I8},		"EORB	%i,CCR" },
-{ 0x0a7c, 0xffff, 0x0000, 0x0000, {I16},	"EORW	%i,SR" },
-{ 0x0cfc, 0xffff, 0x0000, 0x0000, {C16,C16},	"CAS2W	R%a:R%A,R%u:R%U,(%r):(%R)"} ,
-{ 0x0efc, 0xffff, 0x0000, 0x0000, {C16,C16},	"CAS2L	R%a:R%A,R%u:R%U,(%r):(%R)"} ,
-
-{ 0x06c0, 0xfff8, 0x0000, 0x0000, {0},		"RTM	R%y" },
-{ 0x06c8, 0xfff8, 0x0000, 0x0000, {0},		"RTM	A%y" },
-{ 0x0800, 0xfff8, 0x0000, 0x0000, {I16},	"BTSTL	%i,R%y" },
-{ 0x0840, 0xfff8, 0x0000, 0x0000, {I16},	"BCHGL	%i,R%y" },
-{ 0x0880, 0xfff8, 0x0000, 0x0000, {I16},	"BCLRL	%i,R%y" },
-
-{ 0x00c0, 0xffc0, 0x0000, 0x0fff, {EAC},	"CMP2B	%e,%r" },
-{ 0x00c0, 0xffc0, 0x0800, 0x0fff, {EAC},	"CHK2B	%e,%r" },
-{ 0x02c0, 0xffc0, 0x0000, 0x0fff, {EAC},	"CMP2W	%e,%r" },
-{ 0x02c0, 0xffc0, 0x0800, 0x0fff, {EAC},	"CHK2W	%e,%r" },
-{ 0x04c0, 0xffc0, 0x0000, 0x0fff, {EAC},	"CMP2L	%e,%r" },
-{ 0x04c0, 0xffc0, 0x0800, 0x0fff, {EAC},	"CHK2L	%e,%r" },
-{ 0x06c0, 0xffc0, 0x0000, 0x0000, {I16, BREAC},	"CALLM	%i,%e" },
-{ 0x0800, 0xffc0, 0x0000, 0x0000, {I16, EAD},	"BTSTB	%i,%e" },
-{ 0x0840, 0xffc0, 0x0000, 0x0000, {I16, EADA},	"BCHG	%i,%e" },
-{ 0x0880, 0xffc0, 0x0000, 0x0000, {I16, EADA},	"BCLR	%i,%e" },
-{ 0x08c0, 0xffc0, 0x0000, 0x0000, {I16, EADA},	"BSET	%i,%e" },
-{ 0x0ac0, 0xffc0, 0x0000, 0xfe38, {EAMA},	"CASB	R%a,R%u,%e" },
-{ 0x0cc0, 0xffc0, 0x0000, 0xfe38, {EAMA},	"CASW	R%a,R%u,%e" },
-{ 0x0ec0, 0xffc0, 0x0000, 0xfe38, {EAMA},	"CASL	R%a,R%u,%e" },
-
-{ 0x0000, 0xff00, 0x0000, 0x0000, {IV, EADA},	"OR%s	%i,%e" },
-{ 0x0200, 0xff00, 0x0000, 0x0000, {IV, EADA},	"AND%s	%i,%e" },
-{ 0x0400, 0xff00, 0x0000, 0x0000, {IV, EADA},	"SUB%s	%i,%e" },
-{ 0x0600, 0xff00, 0x0000, 0x0000, {IV, EADA},	"ADD%s	%i,%e" },
-{ 0x0a00, 0xff00, 0x0000, 0x0000, {IV, EADA},	"EOR%s	%i,%e" },
-{ 0x0c00, 0xff00, 0x0000, 0x0000, {IV, EAD},	"CMP%s	%i,%e" },
-{ 0x0e00, 0xff00, 0x0000, 0x0800, {EAMA},	"MOVES%s	%e,%r" },
-{ 0x0e00, 0xff00, 0x0800, 0x0800, {EAMA},	"MOVES%s	%r,%e" },
-
-{ 0x0108, 0xf1f8, 0x0000, 0x0000, {I16},	"MOVEPW	(%i,A%y),R%x" },
-{ 0x0148, 0xf1f8, 0x0000, 0x0000, {I16},	"MOVEPL	(%i,A%y),R%x" },
-{ 0x0188, 0xf1f8, 0x0000, 0x0000, {I16},	"MOVEPW	R%x,(%i,A%y)" },
-{ 0x01c8, 0xf1f8, 0x0000, 0x0000, {I16},	"MOVEPL	R%x,(%i,A%y)" },
-{ 0x0100, 0xf1f8, 0x0000, 0x0000, {0},		"BTSTL	R%x,R%y" },
-{ 0x0140, 0xf1f8, 0x0000, 0x0000, {0},		"BCHGL	R%x,R%y" },
-{ 0x0180, 0xf1f8, 0x0000, 0x0000, {0},		"BCLRL	R%x,R%y" },
-{ 0x01c0, 0xf1f8, 0x0000, 0x0000, {0},		"BSET	R%x,R%y" },
-
-{ 0x0100, 0xf1c0, 0x0000, 0x0000, {EAM_B},	"BTSTB	R%x,%e" },
-{ 0x0140, 0xf1c0, 0x0000, 0x0000, {EAMA},	"BCHG	R%x,%e" },
-{ 0x0180, 0xf1c0, 0x0000, 0x0000, {EAMA},	"BCLR	R%x,%e" },
-{ 0x01c0, 0xf1c0, 0x0000, 0x0000, {EAMA},	"BSET	R%x,%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 1: move byte */
-static Optable t1[] = {
-{ 0x1000, 0xf000, 0x0000, 0x0000, {EAALL_B,EADDA},"MOVB	%e,%E" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 2: move long */
-static Optable t2[] = {
-{ 0x2040, 0xf1c0, 0x0000, 0x0000, {EAALL_L},	  "MOVL	%e,A%x" },
-
-{ 0x2000, 0xf000, 0x0000, 0x0000, {EAALL_L,EADDA},"MOVL	%e,%E" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 3: move word */
-static Optable t3[] = {
-{ 0x3040, 0xf1c0, 0x0000, 0x0000, {EAALL_W},	  "MOVW	%e,A%x" },
-
-{ 0x3000, 0xf000, 0x0000, 0x0000, {EAALL_W,EADDA},"MOVW	%e,%E" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 4: miscellaneous */
-static Optable t4[] = {
-{ 0x4e75, 0xffff, 0x0000, 0x0000, {STACK},	"RTS" },
-{ 0x4e77, 0xffff, 0x0000, 0x0000, {STACK},	"RTR" },
-{ 0x4afc, 0xffff, 0x0000, 0x0000, {0},		"ILLEGAL" },
-{ 0x4e71, 0xffff, 0x0000, 0x0000, {0},		"NOP" },
-{ 0x4e74, 0xffff, 0x0000, 0x0000, {I16, STACK},	"RTD	%i" },
-{ 0x4e76, 0xffff, 0x0000, 0x0000, {0},		"TRAPV" },
-{ 0x4e70, 0xffff, 0x0000, 0x0000, {0},		"RESET" },
-{ 0x4e72, 0xffff, 0x0000, 0x0000, {I16},	"STOP	%i" },
-{ 0x4e73, 0xffff, 0x0000, 0x0000, {0},		"RTE" },
-{ 0x4e7a, 0xffff, 0x0000, 0x0000, {I16},	"MOVEL	%N,%r" },
-{ 0x4e7b, 0xffff, 0x0000, 0x0000, {I16},	"MOVEL	%r,%N" },
-
-{ 0x4808, 0xfff8, 0x0000, 0x0000, {I32},	"LINKL	A%y,%i" },
-{ 0x4840, 0xfff8, 0x0000, 0x0000, {0},		"SWAPW	R%y" },
-{ 0x4848, 0xfff8, 0x0000, 0x0000, {0},		"BKPT	#%y" },
-{ 0x4880, 0xfff8, 0x0000, 0x0000, {0},		"EXTW	R%y" },
-{ 0x48C0, 0xfff8, 0x0000, 0x0000, {0},		"EXTL	R%y" },
-{ 0x49C0, 0xfff8, 0x0000, 0x0000, {0},		"EXTBL	R%y" },
-{ 0x4e50, 0xfff8, 0x0000, 0x0000, {I16},	"LINKW	A%y,%i" },
-{ 0x4e58, 0xfff8, 0x0000, 0x0000, {0},		"UNLK	A%y" },
-{ 0x4e60, 0xfff8, 0x0000, 0x0000, {0},		"MOVEL	(A%y),USP" },
-{ 0x4e68, 0xfff8, 0x0000, 0x0000, {0},		"MOVEL	USP,(A%y)" },
-
-{ 0x4e40, 0xfff0, 0x0000, 0x0000, {0},		"SYS	%f" },
-
-{ 0x40c0, 0xffc0, 0x0000, 0x0000, {EADA},	"MOVW	SR,%e" },
-{ 0x42c0, 0xffc0, 0x0000, 0x0000, {EADA},	"MOVW	CCR,%e" },
-{ 0x44c0, 0xffc0, 0x0000, 0x0000, {EADI_W},	"MOVW	%e,CCR" },
-{ 0x46c0, 0xffc0, 0x0000, 0x0000, {EADI_W},	"MOVW	%e,SR" },
-{ 0x4800, 0xffc0, 0x0000, 0x0000, {EADA},	"NBCDB	%e" },
-{ 0x4840, 0xffc0, 0x0000, 0x0000, {EAC},	"PEA	%e" },
-{ 0x4880, 0xffc0, 0x0000, 0x0000, {I16, EACAPD},"MOVEMW	%i,%e" },
-{ 0x48c0, 0xffc0, 0x0000, 0x0000, {I16, EACAPD},"MOVEML	%i,%e" },
-{ 0x4ac0, 0xffc0, 0x0000, 0x0000, {EADA},	"TAS	%e" },
-{ 0x4a00, 0xffc0, 0x0000, 0x0000, {EAD},	"TSTB	%e" },
-{ 0x4c00, 0xffc0, 0x0000, 0x8ff8, {EADI_L},	"MULUL	%e,%r" },
-{ 0x4c00, 0xffc0, 0x0400, 0x8ff8, {EADI_L},	"MULUL	%e,R%a:%r" },
-{ 0x4c00, 0xffc0, 0x0800, 0x8ff8, {EADI_L},	"MULSL	%e,%r" },
-{ 0x4c00, 0xffc0, 0x0c00, 0x8ff8, {EADI_L},	"MULSL	%e,R%a:%r" },
-{ 0x4c40, 0xffc0, 0x0000, 0x8ff8, {EADI_L},	"DIVUL	%e,%j" },
-{ 0x4c40, 0xffc0, 0x0400, 0x8ff8, {EADI_L},	"DIVUD	%e,%r:R%a" },
-{ 0x4c40, 0xffc0, 0x0800, 0x8ff8, {EADI_L},	"DIVSL	%e,%j" },
-{ 0x4c40, 0xffc0, 0x0c00, 0x8ff8, {EADI_L},	"DIVSD	%e,%r:R%a" },
-{ 0x4c80, 0xffc0, 0x0000, 0x0000, {I16, EACPI}, "MOVEMW	%1,%i" },
-{ 0x4cc0, 0xffc0, 0x0000, 0x0000, {I16, EACPI}, "MOVEML	%1,%i" },
-{ 0x4e80, 0xffc0, 0x0000, 0x0000, {BREAC},	"JSR	%e" },
-{ 0x4ec0, 0xffc0, 0x0000, 0x0000, {BREAC},	"JMP	%e" },
-
-{ 0x4000, 0xff00, 0x0000, 0x0000, {EADA},	"NEGX%s	%e" },
-{ 0x4200, 0xff00, 0x0000, 0x0000, {EADA},	"CLR%s	%e" },
-{ 0x4400, 0xff00, 0x0000, 0x0000, {EADA},	"NEG%s	%e" },
-{ 0x4600, 0xff00, 0x0000, 0x0000, {EADA},	"NOT%s	%e" },
-{ 0x4a00, 0xff00, 0x0000, 0x0000, {EAALL},	"TST%s	%e" },
-
-{ 0x4180, 0xf1c0, 0x0000, 0x0000, {EADI_W},	"CHKW	%e,R%x" },
-{ 0x41c0, 0xf1c0, 0x0000, 0x0000, {EAC},	"LEA	%e,A%x" },
-{ 0x4100, 0xf1c0, 0x0000, 0x0000, {EADI_L},	"CHKL	%e,R%x" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 5:  miscellaneous quick, branch & trap instructions */
-static Optable t5[] = {
-{ 0x5000, 0xf1c0, 0x0000, 0x0000, {EADA},	"ADDB	$Q#%q,%e" },
-{ 0x5100, 0xf1c0, 0x0000, 0x0000, {EADA},	"SUBB	$Q#%q,%e" },
-
-{ 0x50c8, 0xf1f8, 0x0000, 0x0000, {BR16},	"DB%c	R%y,%t" },
-{ 0x51c8, 0xf1f8, 0x0000, 0x0000, {BR16},	"DB%c	R%y,%t" },
-
-{ 0x5000, 0xf1c0, 0x0000, 0x0000, {EAA},	"ADDB	$Q#%q,%e" },
-{ 0x5040, 0xf1c0, 0x0000, 0x0000, {EAA},	"ADDW	$Q#%q,%e" },
-{ 0x5080, 0xf1c0, 0x0000, 0x0000, {EAA},	"ADDL	$Q#%q,%e" },
-{ 0x5100, 0xf1c0, 0x0000, 0x0000, {EAA},	"SUBB	$Q#%q,%e" },
-{ 0x5140, 0xf1c0, 0x0000, 0x0000, {EAA},	"SUBW	$Q#%q,%e" },
-{ 0x5180, 0xf1c0, 0x0000, 0x0000, {EAA},	"SUBL	$Q#%q,%e" },
-
-{ 0x50fa, 0xf0ff, 0x0000, 0x0000, {I16},	"TRAP%cW	%i" },
-{ 0x50fb, 0xf0ff, 0x0000, 0x0000, {I32},	"TRAP%cL	%i" },
-{ 0x50fc, 0xf0ff, 0x0000, 0x0000, {0},		"TRAP%c" },
-
-{ 0x50c0, 0xf0c0, 0x0000, 0x0000, {EADA},	"S%c	%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 6: branch instructions */
-static Optable t6[] = {
-{ 0x6000, 0xff00, 0x0000, 0x0000, {BR8},	"BRA	%t" },
-{ 0x6100, 0xff00, 0x0000, 0x0000, {BR8},	"BSR	%t" },
-{ 0x6000, 0xf000, 0x0000, 0x0000, {BR8},	"B%c	%t" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 7: move quick */
-static Optable t7[] = {
-{ 0x7000, 0xf100, 0x0000, 0x0000, {OP8},	"MOVL	$Q%i,R%x" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 8: BCD operations, DIV, and OR instructions */
-static Optable t8[] = {
-{ 0x8100, 0xf1f8, 0x0000, 0x0000, {0},		"SBCDB	R%y,R%x" },
-{ 0x8108, 0xf1f8, 0x0000, 0x0000, {0},		"SBCDB	-(A%y),-(A%x)" },
-{ 0x8140, 0xf1f8, 0x0000, 0x0000, {I16},	"PACK	R%y,R%x,%i" },
-{ 0x8148, 0xf1f8, 0x0000, 0x0000, {I16},	"PACK	-(A%y),-(A%x),%i" },
-{ 0x8180, 0xf1f8, 0x0000, 0x0000, {I16},	"UNPK	R%y,R%x,%i" },
-{ 0x8188, 0xf1f8, 0x0000, 0x0000, {I16},	"UNPK	-(A%y),-(A%x),%i" },
-
-{ 0x80c0, 0xf1c0, 0x0000, 0x0000, {EADI_W},	"DIVUW	%e,R%x" },
-{ 0x81c0, 0xf1c0, 0x0000, 0x0000, {EADI_W},	"DIVSW	%e,R%x" },
-
-{ 0x8000, 0xf100, 0x0000, 0x0000, {EADI},	"OR%s	%e,R%x" },
-{ 0x8100, 0xf100, 0x0000, 0x0000, {EAMA},	"OR%s	R%x,%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class 9: subtract instruction */
-static Optable t9[] = {
-{ 0x90c0, 0xf1c0, 0x0000, 0x0000, {EAALL_W},	"SUBW	%e,A%x" },
-{ 0x91c0, 0xf1c0, 0x0000, 0x0000, {EAALL_L},	"SUBL	%e,A%x" },
-
-{ 0x9100, 0xf138, 0x0000, 0x0000, {0},		"SUBX%s	R%y,R%x" },
-{ 0x9108, 0xf138, 0x0000, 0x0000, {0},		"SUBX%s	-(A%y),-(A%x)" },
-
-{ 0x9000, 0xf100, 0x0000, 0x0000, {EAALL},	"SUB%s	%e,R%x" },
-{ 0x9100, 0xf100, 0x0000, 0x0000, {EAMA},	"SUB%s	R%x,%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class b: CMP & EOR */
-static Optable tb[] = {
-{ 0xb000, 0xf1c0, 0x0000, 0x0000, {EADI},	"CMPB	R%x,%e" },
-{ 0xb040, 0xf1c0, 0x0000, 0x0000, {EAALL_W},	"CMPW	R%x,%e" },
-{ 0xb080, 0xf1c0, 0x0000, 0x0000, {EAALL_L},	"CMPL	R%x,%e" },
-{ 0xb0c0, 0xf1c0, 0x0000, 0x0000, {EAALL_W},	"CMPW	A%x,%e" },
-{ 0xb1c0, 0xf1c0, 0x0000, 0x0000, {EAALL_L},	"CMPL	A%x,%e" },
-
-{ 0xb108, 0xf138, 0x0000, 0x0000, {0},		"CMP%s	(A%y)+,(A%x)+" },
-
-{ 0xb100, 0xf100, 0x0000, 0x0000, {EADA},	"EOR%s	%e,R%x" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class c: AND, MUL, BCD & Exchange */
-static Optable tc[] = {
-{ 0xc100, 0xf1f8, 0x0000, 0x0000, {0},		"ABCDB	R%y,R%x" },
-{ 0xc108, 0xf1f8, 0x0000, 0x0000, {0},		"ABCDB	-(A%y),-(A%x)" },
-{ 0xc140, 0xf1f8, 0x0000, 0x0000, {0},		"EXG	R%x,R%y" },
-{ 0xc148, 0xf1f8, 0x0000, 0x0000, {0},		"EXG	A%x,A%y" },
-{ 0xc188, 0xf1f8, 0x0000, 0x0000, {0},		"EXG	R%x,A%y" },
-
-{ 0xc0c0, 0xf1c0, 0x0000, 0x0000, {EADI_W},	"MULUW	%e,R%x" },
-{ 0xc1c0, 0xf1c0, 0x0000, 0x0000, {EADI_W},	"MULSW	%e,R%x" },
-
-{ 0xc000, 0xf100, 0x0000, 0x0000, {EADI},	"AND%s	%e,R%x" },
-{ 0xc100, 0xf100, 0x0000, 0x0000, {EAMA},	"AND%s	R%x,%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class d: addition  */
-static Optable td[] = {
-{ 0xd000, 0xf1c0, 0x0000, 0x0000, {EADI},	"ADDB	%e,R%x" },
-{ 0xd0c0, 0xf1c0, 0x0000, 0x0000, {EAALL_W},	"ADDW	%e,A%x" },
-{ 0xd1c0, 0xf1c0, 0x0000, 0x0000, {EAALL_L},	"ADDL	%e,A%x" },
-
-{ 0xd100, 0xf138, 0x0000, 0x0000, {0},		"ADDX%s	R%y,R%x" },
-{ 0xd108, 0xf138, 0x0000, 0x0000, {0},		"ADDX%s	-(A%y),-(A%x)" },
-
-{ 0xd000, 0xf100, 0x0000, 0x0000, {EAALL},	"ADD%s	%e,R%x" },
-{ 0xd100, 0xf100, 0x0000, 0x0000, {EAMA},	"ADD%s	R%x,%e" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class e: shift, rotate, bit field operations */
-static Optable te[] = {
-{ 0xe8c0, 0xffc0, 0x0820, 0xfe38, {EACD},	"BFTST	%e{R%u:R%a}" },
-{ 0xe8c0, 0xffc0, 0x0800, 0xfe20, {EACD},	"BFTST	%e{R%u:%w}" },
-{ 0xe8c0, 0xffc0, 0x0020, 0xf838, {EACD},	"BFTST	%e{%o:R%a}" },
-{ 0xe8c0, 0xffc0, 0x0000, 0xf820, {EACD},	"BFTST	%e{%o:%w}" },
-
-{ 0xe9c0, 0xffc0, 0x0820, 0x8e38, {EACD},	"BFEXTU	%e{R%u:R%a},%r" },
-{ 0xe9c0, 0xffc0, 0x0800, 0x8e20, {EACD},	"BFEXTU	%e{R%u:%w},%r" },
-{ 0xe9c0, 0xffc0, 0x0020, 0x8838, {EACD},	"BFEXTU	%e{%o:R%a},%r" },
-{ 0xe9c0, 0xffc0, 0x0000, 0x8820, {EACD},	"BFEXTU	%e{%o:%w},%r" },
-
-{ 0xeac0, 0xffc0, 0x0820, 0xfe38, {EACAD},	"BFCHG	%e{R%u:R%a}" },
-{ 0xeac0, 0xffc0, 0x0800, 0xfe20, {EACAD},	"BFCHG	%e{R%u:%w}" },
-{ 0xeac0, 0xffc0, 0x0020, 0xf838, {EACAD},	"BFCHG	%e{%o:R%a}" },
-{ 0xeac0, 0xffc0, 0x0000, 0xf820, {EACAD},	"BFCHG	%e{%o:%w}" },
-
-{ 0xebc0, 0xffc0, 0x0820, 0x8e38, {EACD},	"BFEXTS	%e{R%u:R%a},%r" },
-{ 0xebc0, 0xffc0, 0x0800, 0x8e20, {EACD},	"BFEXTS	%e{R%u:%w},%r" },
-{ 0xebc0, 0xffc0, 0x0020, 0x8838, {EACD},	"BFEXTS	%e{%o:R%a},%r" },
-{ 0xebc0, 0xffc0, 0x0000, 0x8820, {EACD},	"BFEXTS	%e{%o:%w},%r" },
-
-{ 0xecc0, 0xffc0, 0x0820, 0xfe38, {EACAD},	"BFCLR	%e{R%u:R%a}" },
-{ 0xecc0, 0xffc0, 0x0800, 0xfe20, {EACAD},	"BFCLR	%e{R%u:%w}" },
-{ 0xecc0, 0xffc0, 0x0020, 0xf838, {EACAD},	"BFCLR	%e{%o:R%a}" },
-{ 0xecc0, 0xffc0, 0x0000, 0xf820, {EACAD},	"BFCLR	%e{%o:%w}" },
-
-{ 0xedc0, 0xffc0, 0x0820, 0x8e38, {EACAD},	"BFFFO	%e{R%u:R%a},%r" },
-{ 0xedc0, 0xffc0, 0x0800, 0x8e20, {EACAD},	"BFFFO	%e{R%u:%w},%r" },
-{ 0xedc0, 0xffc0, 0x0020, 0x8838, {EACAD},	"BFFFO	%e{%o:R%a},%r" },
-{ 0xedc0, 0xffc0, 0x0000, 0x8820, {EACAD},	"BFFFO	%e{%o:%w},%r" },
-
-{ 0xeec0, 0xffc0, 0x0820, 0xfe38, {EACAD},	"BFSET	%e{R%u:R%a}" },
-{ 0xeec0, 0xffc0, 0x0800, 0xfe20, {EACAD},	"BFSET	%e{R%u:%w}" },
-{ 0xeec0, 0xffc0, 0x0020, 0xf838, {EACAD},	"BFSET	%e{%o:R%a}" },
-{ 0xeec0, 0xffc0, 0x0000, 0xf820, {EACAD},	"BFSET	%e{%o:%w}" },
-
-{ 0xefc0, 0xffc0, 0x0820, 0x8e38, {EACAD},	"BFINS	%r,%e{R%u:R%a}" },
-{ 0xefc0, 0xffc0, 0x0800, 0x8e20, {EACAD},	"BFINS	%r,%e{R%u:%w}" },
-{ 0xefc0, 0xffc0, 0x0020, 0x8838, {EACAD},	"BFINS	%r,%e{%o:R%a}" },
-{ 0xefc0, 0xffc0, 0x0000, 0x8820, {EACAD},	"BFINS	%r,%e{%o:%w}" },
-
-{ 0xe0c0, 0xfec0, 0x0000, 0x0000, {EAMA},	"AS%dW	%e" },
-{ 0xe2c0, 0xfec0, 0x0000, 0x0000, {EAMA},	"LS%dW	%e" },
-{ 0xe4c0, 0xfec0, 0x0000, 0x0000, {EAMA},	"ROX%dW	%e" },
-{ 0xe6c0, 0xfec0, 0x0000, 0x0000, {EAMA},	"RO%dW	%e" },
-
-{ 0xe000, 0xf038, 0x0000, 0x0000, {0},		"AS%d%s	#%q,R%y" },
-{ 0xe008, 0xf038, 0x0000, 0x0000, {0},		"LS%d%s	#%q,R%y" },
-{ 0xe010, 0xf038, 0x0000, 0x0000, {0},		"ROX%d%s	#%q,R%y" },
-{ 0xe018, 0xf038, 0x0000, 0x0000, {0},		"RO%d%s	#%q,R%y" },
-{ 0xe020, 0xf038, 0x0000, 0x0000, {0},		"AS%d%s	R%x,R%y" },
-{ 0xe028, 0xf038, 0x0000, 0x0000, {0},		"LS%d%s	R%x,R%y" },
-{ 0xe030, 0xf038, 0x0000, 0x0000, {0},		"ROX%d%s	R%x,R%y" },
-{ 0xe038, 0xf038, 0x0000, 0x0000, {0},		"RO%d%s	R%x,R%y" },
-{ 0,0,0,0,{0},0 },
-};
-	/* class f: coprocessor and mmu instructions */
-static Optable tf[] = {
-{ 0xf280, 0xffff, 0x0000, 0xffff, {0},		"FNOP" },
-{ 0xf200, 0xffff, 0x5c00, 0xfc00, {0},		"FMOVECRX	%k,F%D" },
-{ 0xf27a, 0xffff, 0x0000, 0xffc0, {I16},	"FTRAP%P	%i" },
-{ 0xf27b, 0xffff, 0x0000, 0xffc0, {I32},	"FTRAP%P	%i" },
-{ 0xf27c, 0xffff, 0x0000, 0xffc0, {0},		"FTRAP%P" },
-
-{ 0xf248, 0xfff8, 0x0000, 0xffc0, {BR16},	"FDB%P	R%y,%t" },
-{ 0xf620, 0xfff8, 0x8000, 0x8fff, {0},		"MOVE16	(A%y)+,(%r)+" },
-{ 0xf500, 0xfff8, 0x0000, 0x0000, {0},		"PFLUSHN	(A%y)" },
-{ 0xf508, 0xfff8, 0x0000, 0x0000, {0},		"PFLUSH	(A%y)" },
-{ 0xf510, 0xfff8, 0x0000, 0x0000, {0},		"PFLUSHAN" },
-{ 0xf518, 0xfff8, 0x0000, 0x0000, {0},		"PFLUSHA" },
-{ 0xf548, 0xfff8, 0x0000, 0x0000, {0},		"PTESTW	(A%y)" },
-{ 0xf568, 0xfff8, 0x0000, 0x0000, {0},		"PTESTR	(A%y)" },
-{ 0xf600, 0xfff8, 0x0000, 0x0000, {I32},	"MOVE16	(A%y)+,$%i" },
-{ 0xf608, 0xfff8, 0x0000, 0x0000, {I32},	"MOVE16	$%i,(A%y)-" },
-{ 0xf610, 0xfff8, 0x0000, 0x0000, {I32},	"MOVE16	(A%y),$%i" },
-{ 0xf618, 0xfff8, 0x0000, 0x0000, {I32},	"MOVE16	$%i,(A%y)" },
-
-{ 0xf000, 0xffc0, 0x0800, 0xffff, {EACA},	"PMOVE	%e,TT0" },
-{ 0xf000, 0xffc0, 0x0900, 0xffff, {EACA},	"PMOVEFD	%e,TT0" },
-{ 0xf000, 0xffc0, 0x0a00, 0xffff, {EACA},	"PMOVE	TT0,%e" },
-{ 0xf000, 0xffc0, 0x0b00, 0xffff, {EACA},	"PMOVEFD	TT0,%e" },
-{ 0xf000, 0xffc0, 0x0c00, 0xffff, {EACA},	"PMOVE	%e,TT1" },
-{ 0xf000, 0xffc0, 0x0d00, 0xffff, {EACA},	"PMOVEFD	%e,TT1" },
-{ 0xf000, 0xffc0, 0x0e00, 0xffff, {EACA},	"PMOVE	TT1,%e" },
-{ 0xf000, 0xffc0, 0x0f00, 0xffff, {EACA},	"PMOVEFD	TT1,%e" },
-{ 0xf000, 0xffc0, 0x2400, 0xffff, {0},		"PFLUSHA" },
-{ 0xf000, 0xffc0, 0x2800, 0xffff, {EACA},	"PVALID	VAL,%e" },
-{ 0xf000, 0xffc0, 0x6000, 0xffff, {EACA},	"PMOVE	%e,MMUSR" },
-{ 0xf000, 0xffc0, 0x6200, 0xffff, {EACA},	"PMOVE	MMUSR,%e" },
-{ 0xf000, 0xffc0, 0x2800, 0xfff8, {EACA},	"PVALID	A%a,%e" },
-{ 0xf000, 0xffc0, 0x2000, 0xffe0, {EACA},	"PLOADW	%L,%e" },
-{ 0xf000, 0xffc0, 0x2200, 0xffe0, {EACA},	"PLOADR	%L,%e" },
-{ 0xf000, 0xffc0, 0x8000, 0xffe0, {EACA},	"PTESTW	%L,%e,#0" },
-{ 0xf000, 0xffc0, 0x8200, 0xffe0, {EACA},	"PTESTR	%L,%e,#0" },
-{ 0xf000, 0xffc0, 0x3000, 0xfe00, {0},		"PFLUSH	%L,#%I" },
-{ 0xf000, 0xffc0, 0x3800, 0xfe00, {EACA},	"PFLUSH	%L,#%I,%e" },
-{ 0xf000, 0xffc0, 0x8000, 0xe300, {EACA},	"PTESTW	%L,%e,#%Z" },
-{ 0xf000, 0xffc0, 0x8100, 0xe300, {EACA},	"PTESTW	%L,%e,#%Z,A%h" },
-{ 0xf000, 0xffc0, 0x8200, 0xe300, {EACA},	"PTESTR	%L,%e,#%Z" },
-{ 0xf000, 0xffc0, 0x8300, 0xe300, {EACA},	"PTESTR	%L,%e,#%Z,A%h" },
-{ 0xf000, 0xffc0, 0x4000, 0xc3ff, {EACA},	"PMOVE	%e,%H" },
-{ 0xf000, 0xffc0, 0x4100, 0xc3ff, {EACA},	"PMOVEFD	%e,%H" },
-{ 0xf000, 0xffc0, 0x4200, 0xc3ff, {EACA},	"PMOVE	%H,%e" },
-
-	/* floating point (coprocessor 1)*/
-
-{ 0xf200, 0xffc0, 0x8400, 0xffff, {EAALL_L},	"FMOVEL	%e,FPIAR" },
-{ 0xf200, 0xffc0, 0x8800, 0xffff, {EADI_L},	"FMOVEL	%e,FPSR" },
-{ 0xf200, 0xffc0, 0x9000, 0xffff, {EADI_L},	"FMOVEL	%e,FPCR" },
-{ 0xf200, 0xffc0, 0xa400, 0xffff, {EAA},	"FMOVEL	FPIAR,%e" },
-{ 0xf200, 0xffc0, 0xa800, 0xffff, {EADA},	"FMOVEL	FPSR,%e" },
-{ 0xf200, 0xffc0, 0xb000, 0xffff, {EADA},	"FMOVEL	FPCR,%e" },
-
-{ 0xf240, 0xffc0, 0x0000, 0xffc0, {EADA},	"FS%P	%e" },
-
-{ 0xf200, 0xffc0, 0xd000, 0xff00, {EACPI},	"FMOVEMX	%e,%m" },
-{ 0xf200, 0xffc0, 0xd800, 0xff00, {EACPI},	"FMOVEMX	%e,R%K" },
-{ 0xf200, 0xffc0, 0xe000, 0xff00, {EAPI},	"FMOVEMX	%m,-(A%y)" },
-{ 0xf200, 0xffc0, 0xe800, 0xff00, {EAPI},	"FMOVEMX	R%K,-(A%y)" },
-{ 0xf200, 0xffc0, 0xf000, 0xff00, {EACAPD},	"FMOVEMX	%m,%e" },
-{ 0xf200, 0xffc0, 0xf800, 0xff00, {EACAPD},	"FMOVEMX	R%K,%e" },
-
-{ 0xf200, 0xffc0, 0x6800, 0xfc00, {EAMA},	"FMOVEX	F%D,%e" },
-{ 0xf200, 0xffc0, 0x6c00, 0xfc00, {EAMA},	"FMOVEP	F%D,%e,{%k}" },
-{ 0xf200, 0xffc0, 0x7400, 0xfc00, {EAMA},	"FMOVED	F%D,%e" },
-{ 0xf200, 0xffc0, 0x7c00, 0xfc00, {EAMA},	"FMOVEP	F%D,%e,{R%K}" },
-
-{ 0xf200, 0xffc0, 0x8000, 0xe3ff, {EAM},	"FMOVEML	#%B,%e" },
-{ 0xf200, 0xffc0, 0xa000, 0xe3ff, {EAMA},	"FMOVEML	%e,#%B" },
-
-{ 0xf200, 0xffc0, 0x0000, 0xe07f, {0},		"FMOVE	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0001, 0xe07f, {0},		"FINTX	%F" },
-{ 0xf200, 0xffc0, 0x0002, 0xe07f, {0},		"FSINHX	%F" },
-{ 0xf200, 0xffc0, 0x0003, 0xe07f, {0},		"FINTRZ	%F" },
-{ 0xf200, 0xffc0, 0x0004, 0xe07f, {0},		"FSQRTX	%F" },
-{ 0xf200, 0xffc0, 0x0006, 0xe07f, {0},		"FLOGNP1X	%F" },
-{ 0xf200, 0xffc0, 0x0009, 0xe07f, {0},		"FTANHX	%F" },
-{ 0xf200, 0xffc0, 0x000a, 0xe07f, {0},		"FATANX	%F" },
-{ 0xf200, 0xffc0, 0x000c, 0xe07f, {0},		"FASINX	%F" },
-{ 0xf200, 0xffc0, 0x000d, 0xe07f, {0},		"FATANHX	%F" },
-{ 0xf200, 0xffc0, 0x000e, 0xe07f, {0},		"FSINX	%F" },
-{ 0xf200, 0xffc0, 0x000f, 0xe07f, {0},		"FTANX	%F" },
-{ 0xf200, 0xffc0, 0x0010, 0xe07f, {0},		"FETOXX	%F" },
-{ 0xf200, 0xffc0, 0x0011, 0xe07f, {0},		"FTWOTOXX	%F" },
-{ 0xf200, 0xffc0, 0x0012, 0xe07f, {0},		"FTENTOXX	%F" },
-{ 0xf200, 0xffc0, 0x0014, 0xe07f, {0},		"FLOGNX	%F" },
-{ 0xf200, 0xffc0, 0x0015, 0xe07f, {0},		"FLOG10X	%F" },
-{ 0xf200, 0xffc0, 0x0016, 0xe07f, {0},		"FLOG2X	%F" },
-{ 0xf200, 0xffc0, 0x0018, 0xe07f, {0},		"FABSX	%F" },
-{ 0xf200, 0xffc0, 0x0019, 0xe07f, {0},		"FCOSHX	%F" },
-{ 0xf200, 0xffc0, 0x001a, 0xe07f, {0},		"FNEGX	%F" },
-{ 0xf200, 0xffc0, 0x001c, 0xe07f, {0},		"FACOSX	%F" },
-{ 0xf200, 0xffc0, 0x001d, 0xe07f, {0},		"FCOSX	%F" },
-{ 0xf200, 0xffc0, 0x001e, 0xe07f, {0},		"FGETEXPX	%F" },
-{ 0xf200, 0xffc0, 0x001f, 0xe07f, {0},		"FGETMANX	%F" },
-{ 0xf200, 0xffc0, 0x0020, 0xe07f, {0},		"FDIVX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0021, 0xe07f, {0},		"FMODX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0022, 0xe07f, {0},		"FADDX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0023, 0xe07f, {0},		"FMULX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0024, 0xe07f, {0},		"FSGLDIVX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0025, 0xe07f, {0},		"FREMX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0026, 0xe07f, {0},		"FSCALEX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0027, 0xe07f, {0},		"FSGLMULX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0028, 0xe07f, {0},		"FSUBX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0038, 0xe07f, {0},		"FCMPX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x003a, 0xe07f, {0},		"FTSTX	F%B" },
-{ 0xf200, 0xffc0, 0x0040, 0xe07f, {0},		"FSMOVE	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0041, 0xe07f, {0},		"FSSQRTX	%F"},
-{ 0xf200, 0xffc0, 0x0044, 0xe07f, {0},		"FDMOVE	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0045, 0xe07f, {0},		"FDSQRTX	%F" },
-{ 0xf200, 0xffc0, 0x0058, 0xe07f, {0},		"FSABSX	%F" },
-{ 0xf200, 0xffc0, 0x005a, 0xe07f, {0},		"FSNEGX	%F" },
-{ 0xf200, 0xffc0, 0x005c, 0xe07f, {0},		"FDABSX	%F" },
-{ 0xf200, 0xffc0, 0x005e, 0xe07f, {0},		"FDNEGX	%F" },
-{ 0xf200, 0xffc0, 0x0060, 0xe07f, {0},		"FSDIVX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0062, 0xe07f, {0},		"FSADDX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0063, 0xe07f, {0},		"FSMULX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0064, 0xe07f, {0},		"FDDIVX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0066, 0xe07f, {0},		"FDADDX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0067, 0xe07f, {0},		"FDMULX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x0068, 0xe07f, {0},		"FSSUBX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x006c, 0xe07f, {0},		"FDSUBX	F%B,F%D" },
-{ 0xf200, 0xffc0, 0x4000, 0xe07f, {EAFLT},	"FMOVE%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4001, 0xe07f, {EAFLT},	"FINT%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4002, 0xe07f, {EAFLT},	"FSINH%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4003, 0xe07f, {EAFLT},	"FINTRZ%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4004, 0xe07f, {EAFLT},	"FSQRT%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4006, 0xe07f, {EAFLT},	"FLOGNP1%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4009, 0xe07f, {EAFLT},	"FTANH%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x400a, 0xe07f, {EAFLT},	"FATAN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x400c, 0xe07f, {EAFLT},	"FASIN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x400d, 0xe07f, {EAFLT},	"FATANH%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x400e, 0xe07f, {EAFLT},	"FSIN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x400f, 0xe07f, {EAFLT},	"FTAN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4010, 0xe07f, {EAFLT},	"FETOX%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4011, 0xe07f, {EAFLT},	"FTWOTOX%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4012, 0xe07f, {EAFLT},	"FTENTOX%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4014, 0xe07f, {EAFLT},	"FLOGN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4015, 0xe07f, {EAFLT},	"FLOG10%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4016, 0xe07f, {EAFLT},	"FLOG2%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4018, 0xe07f, {EAFLT},	"FABS%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4019, 0xe07f, {EAFLT},	"FCOSH%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x401a, 0xe07f, {EAFLT},	"FNEG%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x401c, 0xe07f, {EAFLT},	"FACOS%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x401d, 0xe07f, {EAFLT},	"FCOS%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x401e, 0xe07f, {EAFLT},	"FGETEXP%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x401f, 0xe07f, {EAFLT},	"FGETMAN%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4020, 0xe07f, {EAFLT},	"FDIV%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4021, 0xe07f, {EAFLT},	"FMOD%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4022, 0xe07f, {EAFLT},	"FADD%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4023, 0xe07f, {EAFLT},	"FMUL%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4024, 0xe07f, {EAFLT},	"FSGLDIV%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4025, 0xe07f, {EAFLT},	"FREM%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4026, 0xe07f, {EAFLT},	"FSCALE%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4027, 0xe07f, {EAFLT},	"FSGLMUL%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4028, 0xe07f, {EAFLT},	"FSUB%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4038, 0xe07f, {EAFLT},	"FCMP%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x403a, 0xe07f, {EAFLT},	"FTST%S	%e" },
-{ 0xf200, 0xffc0, 0x4040, 0xe07f, {EAFLT},	"FSMOVE%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4041, 0xe07f, {EAFLT},	"FSSQRT%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4044, 0xe07f, {EAFLT},	"FDMOVE%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4045, 0xe07f, {EAFLT},	"FDSQRT%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4058, 0xe07f, {EAFLT},	"FSABS%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x405a, 0xe07f, {EAFLT},	"FSNEG%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x405c, 0xe07f, {EAFLT},	"FDABS%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x405e, 0xe07f, {EAFLT},	"FDNEG%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4060, 0xe07f, {EAFLT},	"FSDIV%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4062, 0xe07f, {EAFLT},	"FSADD%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4063, 0xe07f, {EAFLT},	"FSMUL%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4064, 0xe07f, {EAFLT},	"FDDIV%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4066, 0xe07f, {EAFLT},	"FDADD%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4067, 0xe07f, {EAFLT},	"FDMUL%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x4068, 0xe07f, {EAFLT},	"FSSUB%S	%e,F%D" },
-{ 0xf200, 0xffc0, 0x406c, 0xe07f, {EAFLT},	"FDSUB%S	%e,F%D" },
-
-{ 0xf200, 0xffc0, 0x0030, 0xe078, {0},		"FSINCOSX	F%B,F%a:F%D" },
-{ 0xf200, 0xffc0, 0x4030, 0xe078, {EAFLT},	"FSINCOS%S	%e,F%a:F%D" },
-
-{ 0xf200, 0xffc0, 0x6000, 0xe000, {EADA},	"FMOVE%S	F%D,%e" },
-
-{ 0xf300, 0xffc0, 0x0000, 0x0000, {EACAPD},	"FSAVE	%e" },
-{ 0xf340, 0xffc0, 0x0000, 0x0000, {EACAPI},	"FRESTORE	%e" },
-
-{ 0xf280, 0xffc0, 0x0000, 0x0000, {BR16},	"FB%p	%t" },
-{ 0xf2c0, 0xffc0, 0x0000, 0x0000, {BR32},	"FB%p	%t" },
-
-{ 0xf408, 0xff38, 0x0000, 0x0000, {0},		"CINVL	%C,(A%y)" },
-{ 0xf410, 0xff38, 0x0000, 0x0000, {0},		"CINVP	%C,(A%y)" },
-{ 0xf418, 0xff38, 0x0000, 0x0000, {0},		"CINVA	%C" },
-{ 0xf428, 0xff38, 0x0000, 0x0000, {0},		"CPUSHL	%C,(A%y)" },
-{ 0xf430, 0xff38, 0x0000, 0x0000, {0},		"CPUSHP	%C,(A%y)" },
-{ 0xf438, 0xff38, 0x0000, 0x0000, {0},		"CPUSHA	%C" },
-{ 0,0,0,0,{0},0 },
-};
-
-static Optable	*optables[] =
-{
-	t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, 0, tb, tc, td, te, tf,
-};
-
-static	Map	*mymap;
-
-static int
-dumpinst(Inst *ip, char *buf, int n)
-{
-	int i;
-
-	if (n <= 0)
-		return 0;
-
-	*buf++ = '#';
-	for (i = 0; i < ip->n && i*4+1 < n-4; i++, buf += 4)
-		_hexify(buf, ip->raw[i], 3);
-	*buf = 0;
-	return i*4+1;
-}
-
-static int
-getword(Inst *ip, uint64_t offset)
-{
-	if (ip->n < nelem(ip->raw)) {
-		if (get2(mymap, offset, &ip->raw[ip->n++]) > 0)
-			return 1;
-		werrstr("can't read instruction: %r");
-	} else
-		werrstr("instruction too big: %r");
-	return -1;
-}
-
-static int
-getshorts(Inst *ip, void *where, int n)
-{
-	if (ip->n+n < nelem(ip->raw)) {
-		if (get1(mymap, ip->addr+ip->n*2, (uint8_t*)&ip->raw[ip->n], n*2) < 0) {
-			werrstr("can't read instruction: %r");
-			return 0;
-		}
-		memmove(where, &ip->raw[ip->n], n*2);
-		ip->n += n;
-		return 1;
-	}
-	werrstr("instruction too big: %r");
-	return 0;
-}
-
-static int
-i8(Inst *ip, int32_t *l)
-{
-	if (getword(ip, ip->addr+ip->n*2) < 0)
-		return -1;
-	*l = ip->raw[ip->n-1]&0xff;
-	if (*l&0x80)
-		*l |= ~0xff;
-	return 1;
-}
-
-static int
-i16(Inst *ip, int32_t *l)
-{
-	if (getword(ip, ip->addr+ip->n*2) < 0)
-		return -1;
-	*l = ip->raw[ip->n-1];
-	if (*l&0x8000)
-		*l |= ~0xffff;
-	return 1;
-}
-static int
-i32(Inst *ip, int32_t *l)
-{
-	if (getword(ip, ip->addr+ip->n*2) < 0)
-		return -1;
-	if (getword(ip, ip->addr+ip->n*2) < 0)
-		return -1;
-	*l = (ip->raw[ip->n-2]<<16)|ip->raw[ip->n-1];
-	return 1;
-}
-
-static int
-getimm(Inst *ip, Operand *ap, int mode)
-{
-	ap->eatype = IMM;
-	switch(mode)
-	{
-	case EAM_B:	/* byte */
-	case EAALL_B:
-		return i8(ip, &ap->immediate);
-	case EADI_W:	/* word */
-	case EAALL_W:
-		return i16(ip, &ap->immediate);
-	case EADI_L:	/* long */
-	case EAALL_L:
-		return i32(ip, &ap->immediate);
-	case EAFLT:	/* floating point - size in bits 10-12 or word 1 */
-		switch((ip->raw[1]>>10)&0x07)
-		{
-		case 0:	/* long integer */
-			return i32(ip, &ap->immediate);
-		case 1:	/* single precision real */
-			ap->eatype = IREAL;
-			return getshorts(ip, ap->floater, 2);
-		case 2:	/* extended precision real - not supported */
-			ap->eatype = IEXT;
-			return getshorts(ip, ap->floater, 6);
-		case 3: /* packed decimal real - not supported */
-			ap->eatype = IPACK;
-			return getshorts(ip, ap->floater, 12);
-		case 4:	/* integer word */
-			return i16(ip, &ap->immediate);
-		case 5:	/* double precision real */
-			ap->eatype = IDBL;
-			return getshorts(ip, ap->floater, 4);
-		case 6:	/* integer byte */
-			return i8(ip, &ap->immediate);
-		default:
-			ip->errmsg = "bad immediate float data";
-			return -1;
-		}
-		/* not reached */
-	case IV:	/* size encoded in bits 6&7 of opcode word */
-	default:
-		switch((ip->raw[0]>>6)&0x03)
-		{
-		case 0x00:	/* integer byte */
-			return i8(ip, &ap->immediate);
-		case 0x01:	/* integer word */
-			return i16(ip, &ap->immediate);
-		case 0x02:	/* integer long */
-			return i32(ip, &ap->immediate);
-		default:
-			ip->errmsg = "bad immediate size";
-			return -1;
-		}
-		/* not reached */
-	}
-}
-
-static int
-getdisp(Inst *ip, Operand *ap)
-{
-	int16_t ext;
-
-	if (getword(ip, ip->addr+ip->n*2) < 0)
-		return -1;
-	ext = ip->raw[ip->n-1];
-	ap->ext = ext;
-	if ((ext&0x100) == 0) {		/* indexed with 7-bit displacement */
-		ap->disp = ext&0x7f;
-		if (ap->disp&0x40)
-			ap->disp |= ~0x7f;
-		return 1;
-	}
-	switch(ext&0x30)	/* first (inner) displacement  */
-	{
-	case 0x10:
-		break;
-	case 0x20:
-		if (i16(ip, &ap->disp) < 0)
-			return -1;
-		break;
-	case 0x30:
-		if (i32(ip, &ap->disp) < 0)
-			return -1;
-		break;
-	default:
-		ip->errmsg = "bad EA displacement";
-		return -1;
-	}
-	switch (ext&0x03)	/* outer displacement */
-	{
-	case 0x02:		/* 16 bit displacement */
-		return i16(ip, &ap->outer);
-	case 0x03:		/* 32 bit displacement */
-		return i32(ip, &ap->outer);
-	default:
-		break;
-	}
-	return 1;
-}
-
-static int
-ea(Inst *ip, int ea, Operand *ap, int mode)
-{
-	int type, size;
-
-	type = 0;
-	ap->ext = 0;
-	switch((ea>>3)&0x07)
-	{
-	case 0x00:
-		ap->eatype = Dreg;
-		type = Dn;
-		break;
-	case 0x01:
-		ap->eatype = Areg;
-		type = An;
-		break;
-	case 0x02:
-		ap->eatype = AInd;
-		type = Ind;
-		break;
-	case 0x03:
-		ap->eatype = APinc;
-		type = Pinc;
-		break;
-	case 0x04:
-		ap->eatype = APdec;
-		type = Pdec;
-		break;
-	case 0x05:
-		ap->eatype = ADisp;
-		type = Bdisp;
-		if (i16(ip, &ap->disp) < 0)
-			return -1;
-		break;
-	case 0x06:
-		ap->eatype = BXD;
-		type = Bdisp;
-		if (getdisp(ip, ap) < 0)
-			return -1;
-		break;
-	case 0x07:
-		switch(ea&0x07)
-		{
-		case 0x00:
-			type = Abs;
-			ap->eatype = ABS;
-			if (i16(ip, &ap->immediate) < 0)
-				return -1;
-			break;
-		case 0x01:
-			type = Abs;
-			ap->eatype = ABS;
-			if (i32(ip, &ap->immediate) < 0)
-				return -1;
-			break;
-		case 0x02:
-			type = PCrel;
-			ap->eatype = PDisp;
-			if (i16(ip, &ap->disp) < 0)
-				return -1;
-			break;
-		case 0x03:
-			type = PCrel;
-			ap->eatype = PXD;
-			if (getdisp(ip, ap) < 0)
-				return -1;
-			break;
-		case 0x04:
-			type = Imm;
-			if (getimm(ip, ap, mode) < 0)
-				return -1;
-			break;
-		default:
-			ip->errmsg = "bad EA mode";
-			return -1;
-		}
-	}
-		/* Allowable floating point EAs are restricted for packed,
-		 * extended, and double precision operands
-		 */
-	if (mode == EAFLT) {
-		size = (ip->raw[1]>>10)&0x07;
-		if (size == 2 || size == 3 || size == 5)
-			mode = EAM;
-		else
-			mode = EADI;
-	}
-	if (!(validea[mode]&type)) {
-		ip->errmsg = "invalid EA";
-		return -1;
-	}
-	return 1;
-}
-
-static int
-decode(Inst *ip, Optable *op)
-{
-	int i, t, mode;
-	Operand *ap;
-	int16_t opcode;
-
-	opcode = ip->raw[0];
-	for (i = 0; i < nelem(op->opdata) && op->opdata[i]; i++) {
-		ap = &ip->and[i];
-		mode = op->opdata[i];
-		switch(mode)
-		{
-		case EAPI:		/* normal EA modes */
-		case EACA:
-		case EACAD:
-		case EACAPI:
-		case EACAPD:
-		case EAMA:
-		case EADA:
-		case EAA:
-		case EAC:
-		case EACPI:
-		case EACD:
-		case EAD:
-		case EAM:
-		case EAM_B:
-		case EADI:
-		case EADI_L:
-		case EADI_W:
-		case EAALL:
-		case EAALL_L:
-		case EAALL_W:
-		case EAALL_B:
-		case EAFLT:
-			if (ea(ip, opcode&0x3f, ap, mode) < 0)
-				return -1;
-			break;
-		case EADDA:	/* stupid bit flop required */
-			t = ((opcode>>9)&0x07)|((opcode>>3)&0x38);
-			if (ea(ip, t, ap, EADA)< 0)
-					return -1;
-			break;
-		case BREAC:	/* EAC JMP or CALL operand */
-			if (ea(ip, opcode&0x3f, ap, EAC) < 0)
-				return -1;
-			break;
-		case OP8:	/* weird movq instruction */
-			ap->eatype = IMM;
-			ap->immediate = opcode&0xff;
-			if (opcode&0x80)
-				ap->immediate |= ~0xff;
-			break;
-		case I8:	/* must be two-word opcode */
-			ap->eatype = IMM;
-			ap->immediate = ip->raw[1]&0xff;
-			if (ap->immediate&0x80)
-				ap->immediate |= ~0xff;
-			break;
-		case I16:	/* 16 bit immediate */
-		case BR16:
-			ap->eatype = IMM;
-			if (i16(ip, &ap->immediate) < 0)
-				return -1;
-			break;
-		case C16:	/* CAS2 16 bit immediate */
-			ap->eatype = IMM;
-			if (i16(ip, &ap->immediate) < 0)
-				return -1;
-			if (ap->immediate & 0x0e38) {
-				ip->errmsg = "bad CAS2W operand";
-				return 0;
-			}
-			break;
-		case I32:	/* 32 bit immediate */
-		case BR32:
-			ap->eatype = IMM;
-			if (i32(ip, &ap->immediate) < 0)
-				return -1;
-			break;
-		case IV:	/* immediate data depends on size field */
-			if (getimm(ip, ap, IV) < 0)
-				return -1;
-			break;
-		case BR8:	/* branch displacement format */
-			ap->eatype = IMM;
-			ap->immediate = opcode&0xff;
-			if (ap->immediate == 0) {
-				if (i16(ip, &ap->immediate) < 0)
-					return -1;
-			} else if (ap->immediate == 0xff) {
-				if (i32(ip, &ap->immediate) < 0)
-					return -1;
-			} else if (ap->immediate & 0x80)
-				ap->immediate |= ~0xff;
-			break;
-		case STACK:	/* Dummy operand type for Return instructions */
-		default:
-			break;
-		}
-	}
-	return 1;
-}
-
-static Optable *
-instruction(Inst *ip)
-{
-	uint16_t opcode, op2;
-	Optable *op;
-	int class;
-
-	ip->n = 0;
-	if (getword(ip, ip->addr) < 0)
-		return 0;
-	opcode = ip->raw[0];
-	if (get2(mymap, ip->addr+2, &op2) < 0)
-		op2 = 0;
-	class = (opcode>>12)&0x0f;
-	for (op = optables[class]; op && op->format; op++) {
-		if (op->opcode != (opcode&op->mask0))
-			continue;
-		if (op->op2 != (op2&op->mask1))
-			continue;
-		if (op->mask1)
-			ip->raw[ip->n++] = op2;
-		return op;
-	}
-	ip->errmsg = "Invalid opcode";
-	return 0;
-}
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Inst *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static	char	*regname[] =
-{
-	"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "A0",
-	"A1", "A2", "A3", "A4", "A5", "A6", "A7", "PC", "SB"
-};
-
-static void
-plocal(Inst *ip, Operand *ap)
-{
-	int ret;
-	int32_t offset;
-	uint64_t moved;
-	Symbol s;
-
-	offset = ap->disp;
-	if (!findsym(ip->addr, CTEXT, &s))
-		goto none;
-
-	moved = pc2sp(ip->addr);
-	if (moved == -1)
-		goto none;
-
-	if (offset > moved) {		/* above frame - must be argument */
-		offset -= moved;
-		ret = getauto(&s, offset-mach->szaddr, CPARAM, &s);
-	} else				/* below frame - must be automatic */
-		ret = getauto(&s, moved-offset, CPARAM, &s);
-	if (ret)
-		bprint(ip, "%s+%lux", s.name, offset);
-	else
-none:		bprint(ip, "%lux", ap->disp);
-}
-
-/*
- *	this guy does all the work of printing the base and index component
- *	of an EA.
- */
-static int
-pidx(Inst *ip, int ext, int reg, char *bfmt, char *ifmt, char *nobase)
-{
-	char *s;
-	int printed;
-	char buf[512];
-
-	printed = 1;
-	if (ext&0x80) {				/* Base suppressed */
-		if (reg == 16)
-			bprint(ip, bfmt, "(ZPC)");
-		else if (nobase)
-			bprint(ip, nobase);
-		else
-			printed = 0;
-	} else					/* format base reg */
-		bprint(ip, bfmt, regname[reg]);
-	if (ext & 0x40)				/* index suppressed */
-		return printed;
-	switch ((ext>>9)&0x03)
-	{
-	case 0x01:
-		s = "*2";
-		break;
-	case 0x02:
-		s = "*4";
-		break;
-	case 0x03:
-		s = "*8";
-		break;
-	default:
-		if (ext&0x80)
-			s = "*1";
-		else
-			s = "";
-		break;
-	}
-	sprint(buf, "%s.%c%s", regname[(ext>>12)&0x0f], (ext&0x800) ? 'L' : 'W', s);
-	if (!printed)
-		bprint(ip, ifmt, buf);
-	else
-		bprint(ip, "(%s)", buf);
-	return 1;
-}
-
-static void
-prindex(Inst *ip, int reg, Operand *ap)
-{
-	int16_t ext;
-	int left;
-	int disp;
-
-	left = ip->end-ip->curr;
-	if (left <= 0)
-		return;
-	ext = ap->ext;
-	disp = ap->disp;
-		/* look for static base register references */
-	if ((ext&0xa0) == 0x20 && reg == 14 && mach->sb && disp) {
-		reg = 17;		/* "A6" -> "SB" */
-		disp += mach->sb;
-	}
-	if ((ext&0x100) == 0) {		/* brief form */
-		if (reg == 15)
-			plocal(ip, ap);
-		else if (disp)
-			ip->curr += symoff(ip->curr, left, disp, CANY);
-		pidx(ip, ext&0xff00, reg, "(%s)", "(%s)", 0);
-		return;
-	}
-	switch(ext&0x3f)	/* bd size, && i/is */
-	{
-	case 0x10:
-		if (!pidx(ip, ext, reg, "(%s)", "(%s)", 0))
-			bprint(ip, "#0");
-		break;
-	case 0x11:
-		if (pidx(ip, ext, reg, "((%s)", "((%s)", 0))
-			bprint(ip, ")");
-		else
-			bprint(ip, "#0");
-		break;
-	case 0x12:
-	case 0x13:
-		ip->curr += symoff(ip->curr, left, ap->outer, CANY);
-		if (pidx(ip, ext, reg, "((%s)", "((%s)", 0))
-			bprint(ip, ")");
-		break;
-	case 0x15:
-		if (!pidx(ip, ext, reg, "((%s))", "(%s)", 0))
-			bprint(ip, "#0");
-		break;
-	case 0x16:
-	case 0x17:
-		ip->curr += symoff(ip->curr, left, ap->outer, CANY);
-		pidx(ip, ext, reg, "((%s))", "(%s)", 0);
-		break;
-	case 0x20:
-	case 0x30:
-		if (reg == 15)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, left, disp, CANY);
-		pidx(ip, ext, reg, "(%s)", "(%s)", 0);
-		break;
-	case 0x21:
-	case 0x31:
-		*ip->curr++ = '(';
-		if (reg == 15)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, left-1, disp, CANY);
-		pidx(ip, ext, reg, "(%s)", "(%s)", 0);
-		bprint(ip, ")");
-		break;
-	case 0x22:
-	case 0x23:
-	case 0x32:
-	case 0x33:
-		ip->curr += symoff(ip->curr, left, ap->outer, CANY);
-		bprint(ip, "(");
-		if (reg == 15)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, ip->end-ip->curr, disp, CANY);
-		pidx(ip, ext, reg, "(%s)", "(%s)", 0);
-		bprint(ip, ")");
-		break;
-	case 0x25:
-	case 0x35:
-		*ip->curr++ = '(';
-		if (reg == 15)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, left-1, disp, CANY);
-		if (!pidx(ip, ext, reg, "(%s))", "(%s)", "())"))
-			bprint(ip, ")");
-		break;
-	case 0x26:
-	case 0x27:
-	case 0x36:
-	case 0x37:
-		ip->curr += symoff(ip->curr, left, ap->outer, CANY);
-		bprint(ip, "(");
-		if (reg == 15)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, ip->end-ip->curr, disp, CANY);
-		pidx(ip, ext, reg, "(%s))", "(%s)", "())");
-		break;
-	default:
-		bprint(ip, "??%x??", ext);
-		ip->errmsg = "bad EA";
-		break;
-	}
-}
-
-static	void
-pea(int reg, Inst *ip, Operand *ap)
-{
-	int i, left;
-
-	left = ip->end-ip->curr;
-	if (left < 0)
-		return;
-	switch(ap->eatype)
-	{
-	case Dreg:
-		bprint(ip, "R%d", reg);
-		break;
-	case Areg:
-		bprint(ip, "A%d", reg);
-		break;
-	case AInd:
-		bprint(ip, "(A%d)", reg);
-		break;
-	case APinc:
-		bprint(ip, "(A%d)+", reg);
-		break;
-	case APdec:
-		bprint(ip, "-(A%d)", reg);
-		break;
-	case PDisp:
-		ip->curr += symoff(ip->curr, left, ip->addr+2+ap->disp, CANY);
-		break;
-	case PXD:
-		prindex(ip, 16, ap);
-		break;
-	case ADisp:	/* references off the static base */
-		if (reg == 6 && mach->sb && ap->disp) {
-			ip->curr += symoff(ip->curr, left, ap->disp+mach->sb, CANY);
-			bprint(ip, "(SB)");
-			break;
-		}
-			/* reference autos and parameters off the stack */
-		if (reg == 7)
-			plocal(ip, ap);
-		else
-			ip->curr += symoff(ip->curr, left, ap->disp, CANY);
-		bprint(ip, "(A%d)", reg);
-		break;
-	case BXD:
-		prindex(ip, reg+8, ap);
-		break;
-	case ABS:
-		ip->curr += symoff(ip->curr, left, ap->immediate, CANY);
-		bprint(ip, "($0)");
-		break;
-	case IMM:
-		*ip->curr++ = '$';
-		ip->curr += symoff(ip->curr, left-1, ap->immediate, CANY);
-		break;
-	case IREAL:
-		*ip->curr++ = '$';
-		ip->curr += beieeesftos(ip->curr, left-1, (void*) ap->floater);
-		break;
-	case IDBL:
-		*ip->curr++ = '$';
-		ip->curr += beieeedftos(ip->curr, left-1, (void*) ap->floater);
-		break;
-	case IPACK:
-		bprint(ip, "$#");
-		for (i = 0; i < 24 && ip->curr < ip->end-1; i++) {
-			_hexify(ip->curr, ap->floater[i], 1);
-			ip->curr += 2;
-		}
-		break;
-	case IEXT:
-		bprint(ip, "$#");
-		ip->curr += beieee80ftos(ip->curr, left-2, (void*)ap->floater);
-		break;
-	default:
-		bprint(ip, "??%x??", ap->eatype);
-		ip->errmsg = "bad EA type";
-		break;
-	}
-}
-
-static char *cctab[]  = { "F", "T", "HI", "LS", "CC", "CS", "NE", "EQ",
-			  "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" };
-static	char *fcond[] =
-{
-	"F",	"EQ",	"OGT",	"OGE",	"OLT",	"OLE",	"OGL", "OR",
-	"UN",	"UEQ",	"UGT",	"UGE",	"ULT",	"ULE",	"NE",	"T",
-	"SF",	"SEQ",	"GT",	"GE",	"LT",	"LE",	"GL",	"GLE",
-	"NGLE",	"NGL",	"NLE",	"NLT",	"NGE",	"NGT",	"SNE",	"ST"
-};
-static	char *cachetab[] =	{ "NC", "DC", "IC", "BC" };
-static	char *mmutab[] =	{ "TC", "??", "SRP", "CRP" };
-static	char *crtab0[] =
-{
-	"SFC", "DFC", "CACR", "TC", "ITT0", "ITT1", "DTT0", "DTT1",
-};
-static	char *crtab1[] =
-{
-	"USP", "VBR", "CAAR", "MSP", "ISP", "MMUSR", "URP", "SRP",
-};
-static	char typetab[] =	{ 'L', 'S', 'X', 'P', 'W', 'D', 'B', '?', };
-static	char sztab[] =		{'?', 'B', 'W', 'L', '?' };
-
-static	void
-formatins(char *fmt, Inst *ip)
-{
-	int16_t op, w1;
-	int r1, r2;
-	int currand;
-
-	op = ip->raw[0];
-	w1 = ip->raw[1];
-	currand = 0;
-	for (; *fmt && ip->curr < ip->end; fmt++) {
-		if (*fmt != '%')
-			*ip->curr++ = *fmt;
-		else switch(*++fmt)
-		{
-		case '%':
-			*ip->curr++ = '%';
-			break;
-		case 'a':	/* register number; word 1:[0-2] */
-			*ip->curr++ = (w1&0x07)+'0';
-			break;
-		case 'c':	/* condition code; opcode: [8-11] */
-			bprint(ip, cctab[(op>>8)&0x0f]);
-			break;
-		case 'd':	/* shift direction; opcode: [8] */
-			if (op&0x100)
-				*ip->curr++ = 'L';
-			else
-				*ip->curr++ = 'R';
-			break;
-		case 'e':	/* source effective address */
-			pea(op&0x07, ip, &ip->and[currand++]);
-			break;
-		case 'f':	/* trap vector; op code: [0-3] */
-			bprint(ip, "%x", op&0x0f);
-			break;
-		case 'h':	/* register number; word 1: [5-7] */
-			*ip->curr++ = (w1>>5)&0x07+'0';
-			break;
-		case 'i':	/* immediate operand */
-			ip->curr += symoff(ip->curr, ip->end-ip->curr,
-					ip->and[currand++].immediate, CANY);
-			break;
-		case 'j':	/* data registers; word 1: [0-2] & [12-14] */
-			r1 = w1&0x07;
-			r2 = (w1>>12)&0x07;
-			if (r1 == r2)
-				bprint(ip, "R%d", r1);
-			else
-				bprint(ip, "R%d:R%d", r2, r1);
-			break;
-		case 'k':	/* k factor; word 1 [0-6] */
-			bprint(ip, "%x", w1&0x7f);
-			break;
-		case 'm':	/* register mask; word 1 [0-7] */
-			bprint(ip, "%x", w1&0xff);
-			break;
-		case 'o':	/* bit field offset; word1: [6-10] */
-			bprint(ip, "%d", (w1>>6)&0x3f);
-			break;
-		case 'p':	/* conditional predicate; opcode: [0-5]
-				   only bits 0-4 are defined  */
-			bprint(ip, fcond[op&0x1f]);
-			break;
-		case 'q':	/* 3-bit immediate value; opcode[9-11] */
-			r1 = (op>>9)&0x07;
-			if (r1 == 0)
-				*ip->curr++ = '8';
-			else
-				*ip->curr++ = r1+'0';
-			break;
-		case 'r':	/* register type & number; word 1: [12-15] */
-			bprint(ip, regname[(w1>>12)&0x0f]);
-			break;
-		case 's':	/* size; opcode [6-7] */
-			*ip->curr = sztab[((op>>6)&0x03)+1];
-			if (*ip->curr++ == '?')
-				ip->errmsg = "bad size code";
-			break;
-		case 't':	/* text offset */
-			ip->curr += symoff(ip->curr, ip->end-ip->curr,
-				ip->and[currand++].immediate+ip->addr+2, CTEXT);
-			break;
-		case 'u':	/* register number; word 1: [6-8] */
-			*ip->curr++ = ((w1>>6)&0x07)+'0';
-			break;
-		case 'w':	/* bit field width; word 1: [0-4] */
-			bprint(ip, "%d", w1&0x0f);
-			break;
-		case 'x':	/* register number; opcode: [9-11] */
-			*ip->curr++ = ((op>>9)&0x07)+'0';
-			break;
-		case 'y':	/* register number; opcode: [0-2] */
-			*ip->curr++ = (op&0x07)+'0';
-			break;
-		case 'z':	/* shift count; opcode: [9-11] */	
-			*ip->curr++ = ((op>>9)&0x07)+'0';
-			break;
-		case 'A':	/* register number; word 2: [0-2] */
-			*ip->curr++ = (ip->raw[2]&0x07)+'0';
-			break;
-		case 'B':	/* float source reg; word 1: [10-12] */
-			*ip->curr++ = ((w1>>10)&0x07)+'0';
-			break;
-		case 'C':	/* cache identifier; opcode: [6-7] */
-			bprint(ip, cachetab[(op>>6)&0x03]);
-			break;
-		case 'D':	/* float dest reg; word 1: [7-9] */
-			*ip->curr++ = ((w1>>7)&0x07)+'0';
-			break;
-		case 'E':	/* destination EA; opcode: [6-11] */
-			pea((op>>9)&0x07, ip, &ip->and[currand++]);
-			break;
-		case 'F':	/* float dest register(s); word 1: [7-9] & [10-12] */
-			r1 = (w1>>7)&0x07;
-			r2 = (w1>>10)&0x07;
-			if (r1 == r2)
-				bprint(ip, "F%d", r1);
-			else
-				bprint(ip, "F%d,F%d", r2, r1);
-			break;
-		case 'H':	/* MMU register; word 1 [10-13] */
-			bprint(ip, mmutab[(w1>>10)&0x03]);
-			if (ip->curr[-1] == '?')
-				ip->errmsg = "bad mmu register";
-			break;
-		case 'I':	/* MMU function code mask; word 1: [5-8] */
-			bprint(ip, "%x", (w1>>4)&0x0f);
-			break;
-		case 'K':	/* dynamic k-factor register; word 1: [5-8] */
-			bprint(ip, "%d",  (w1>>4)&0x0f);
-			break;
-		case 'L':	/* MMU function code; word 1: [0-6] */
-			if (w1&0x10)
-				bprint(ip, "%x", w1&0x0f);
-			else if (w1&0x08)
-				bprint(ip, "R%d",w1&0x07);
-			else if (w1&0x01)
-				bprint(ip, "DFC");
-			else
-				bprint(ip, "SFC");
-			break;
-		case 'N':	/* control register; word 1: [0-11] */
-			r1 = w1&0xfff;
-			if (r1&0x800)
-				bprint(ip, crtab1[r1&0x07]);
-			else
-				bprint(ip, crtab0[r1&0x07]);
-			break;
-		case 'P':	/* conditional predicate; word 1: [0-5] */
-			bprint(ip, fcond[w1&0x1f]);
-			break;
-		case 'R':	/* register type & number; word 2 [12-15] */
-			bprint(ip, regname[(ip->raw[2]>>12)&0x0f]);
-			break;
-		case 'S':	/* float source type code; word 1: [10-12] */
-			*ip->curr = typetab[(w1>>10)&0x07];
-			if (*ip->curr++ == '?')
-				ip->errmsg = "bad float type";
-			break;
-		case 'U':	/* register number; word 2: [6-8] */
-			*ip->curr++ = ((ip->raw[2]>>6)&0x07)+'0';
-			break;
-		case 'Z':	/* ATC level number; word 1: [10-12] */
-			bprint(ip, "%x", (w1>>10)&0x07);
-			break;
-		case '1':	/* effective address in second operand*/
-			pea(op&0x07, ip, &ip->and[1]);
-			break;
-		default:
-			bprint(ip, "%%%c", *fmt);
-			break;
-		}
-	}
-	*ip->curr = 0;		/* there's always room for 1 byte */
-}
-
-static int
-dispsize(Inst *ip)
-{
-	uint16_t ext;
-	static int dsize[] = {0, 0, 1, 2};	/* in words */
-
-	if (get2(mymap, ip->addr+ip->n*2, &ext) < 0)
-		return -1;
-	if ((ext&0x100) == 0)
-		return 1;
-	return dsize[(ext>>4)&0x03]+dsize[ext&0x03]+1;
-}
-
-static int
-immsize(Inst *ip, int mode)
-{
-	static int fsize[] = { 2, 2, 6, 12, 1, 4, 1, -1 };
-	static int isize[] = { 1, 1, 2, -1 };
-
-	switch(mode)
-	{
-	case EAM_B:			/* byte */
-	case EAALL_B:
-	case EADI_W:			/* word */
-	case EAALL_W:
-		return 1;
-	case EADI_L:			/* long */
-	case EAALL_L:
-		return 2;
-	case EAFLT:	/* floating point - size in bits 10-12 or word 1 */
-		return fsize[(ip->raw[1]>>10)&0x07];
-	case IV:	/* size encoded in bits 6&7 of opcode word */
-	default:
-		return isize[(ip->raw[0]>>6)&0x03];
-	}
-}
-
-static int
-easize(Inst *ip, int ea, int mode)
-{
-	switch((ea>>3)&0x07)
-	{
-	case 0x00:
-	case 0x01:
-	case 0x02:
-	case 0x03:
-	case 0x04:
-		return 0;
-	case 0x05:
-		return 1;
-	case 0x06:
-		return dispsize(ip);
-	case 0x07:
-		switch(ea&0x07)
-		{
-		case 0x00:
-		case 0x02:
-			return 1;
-		case 0x01:
-			return 2;
-		case 0x03:
-			return dispsize(ip);
-		case 0x04:
-			return immsize(ip, mode);
-		default:
-			return -1;
-		}
-	}
-	return -1;
-}
-
-static int
-instrsize(Inst *ip, Optable *op)
-{
-	int i, t, mode;
-	int16_t opcode;
-
-	opcode = ip->raw[0];
-	for (i = 0; i < nelem(op->opdata) && op->opdata[i]; i++) {
-		mode = op->opdata[i];
-		switch(mode)
-		{
-		case EAPI:		/* normal EA modes */
-		case EACA:
-		case EACAD:
-		case EACAPI:
-		case EACAPD:
-		case EAMA:
-		case EADA:
-		case EAA:
-		case EAC:
-		case EACPI:
-		case EACD:
-		case EAD:
-		case EAM:
-		case EAM_B:
-		case EADI:
-		case EADI_L:
-		case EADI_W:
-		case EAALL:
-		case EAALL_L:
-		case EAALL_W:
-		case EAALL_B:
-		case EAFLT:
-			t = easize(ip, opcode&0x3f, mode);
-			if (t < 0)
-				return -1;
-			ip->n += t;
-			break;
-		case EADDA:	/* stupid bit flop required */
-			t = ((opcode>>9)&0x07)|((opcode>>3)&0x38);
-			t = easize(ip, t, mode);
-			if (t < 0)
-				return -1;
-			ip->n += t;
-			break;
-		case BREAC:	/* EAC JMP or CALL operand */
-				/* easy displacements for follow set */
-			if ((opcode&0x038) == 0x28 || (opcode&0x3f) == 0x3a) {
-				if (i16(ip, &ip->and[i].immediate) < 0)
-					return -1;
-			} else {
-				t = easize(ip, opcode&0x3f, mode);
-				if (t < 0)
-					return -1;
-				ip->n += t;
-			}
-			break;
-		case I16:	/* 16 bit immediate */
-		case C16:	/* CAS2 16 bit immediate */
-			ip->n++;
-			break;
-		case BR16:	/* 16 bit branch displacement */
-			if (i16(ip, &ip->and[i].immediate) < 0)
-				return -1;
-			break;
-		case BR32:	/* 32 bit branch displacement */
-			if (i32(ip, &ip->and[i].immediate) < 0)
-				return -1;
-			break;
-		case I32:	/* 32 bit immediate */
-			ip->n += 2;
-			break;
-		case IV:	/* immediate data depends on size field */
-			t = (ip->raw[0]>>6)&0x03;
-			if (t < 2)
-				ip->n++;
-			else if (t == 2)
-				ip->n += 2;
-			else 
-				return -1;
-			break;
-		case BR8:	/* loony branch displacement format */
-			t = opcode&0xff;
-			if (t == 0) {
-				if (i16(ip, &ip->and[i].immediate) < 0)
-					return -1;
-			} else if (t == 0xff) {
-				if (i32(ip, &ip->and[i].immediate) < 0)
-					return -1;
-			} else {
-				ip->and[i].immediate = t;
-				if (t & 0x80)
-					ip->and[i].immediate |= ~0xff;
-			}
-			break;
-		case STACK:	/* Dummy operand for Return instructions */
-		case OP8:	/* weird movq instruction */
-		case I8:	/* must be two-word opcode */
-		default:
-			break;
-		}
-	}
-	return 1;
-}
-
-static int
-eaval(Inst *ip, Operand *ap, Rgetter rget)
-{
-	int reg;
-	char buf[8];
-
-	reg = ip->raw[0]&0x07;
-	switch(ap->eatype)
-	{
-	case AInd:
-		sprint(buf, "A%d", reg);
-		return (*rget)(mymap, buf);
-	case PDisp:
-		return ip->addr+2+ap->disp;
-	case ADisp:
-		sprint(buf, "A%d", reg);
-		return ap->disp+(*rget)(mymap, buf);
-	case ABS:
-		return ap->immediate;
-	default:
-		return 0;
-	}
-}
-
-static int
-m68020instlen(Map *map, uint64_t pc)
-{
-	Inst i;
-	Optable *op;
-
-	mymap = map;
-	i.addr = pc;
-	i.errmsg = 0;
-	op = instruction(&i);
-	if (op && instrsize(&i, op) > 0)
-			return i.n*2;
-	return -1;
-}
-
-static int
-m68020foll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	int j;
-	Inst i;
-	uint32_t l;
-	Optable *op;
-
-	mymap = map;
-	i.addr = pc;
-	i.errmsg = 0;
-	op = instruction(&i);
-	if (op == 0  || instrsize(&i, op) < 0)
-		return -1;
-	for (j = 0; j < nelem(op->opdata) && op->opdata[j]; j++) {
-		switch(op->opdata[j])
-		{
-		case BREAC:	/* CALL, JMP, JSR */
-			foll[0] = pc+2+eaval(&i, &i.and[j], rget);
-			return 1;
-		case BR8:	/* Bcc, BSR, & BRA */
-		case BR16:	/* FBcc, FDBcc, DBcc */
-		case BR32:	/* FBcc */
-			foll[0] = pc+i.n*2;
-			foll[1] = pc+2+i.and[j].immediate;
-			return 2;
-		case STACK:	/* RTR, RTS, RTD */
-			if (get4(map, (*rget)(map, mach->sp), &l) < 0)
-				return -1;
-			*foll = l;
-			return 1;
-		default:
-			break;
-		}
-	}
-	foll[0] = pc+i.n*2;			
-	return 1;
-}
-
-static int
-m68020inst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	Inst i;
-	Optable *op;
-
-	USED(modifier);
-	mymap = map;
-	i.addr = pc;
-	i.curr = buf;
-	i.end = buf+n-1;
-	i.errmsg = 0;
-	op = instruction(&i);
-	if (!op)
-		return -1;
-	if (decode(&i, op) > 0)
-		formatins(op->format, &i);
-	if (i.errmsg) {
-		if (i.curr != buf)
-			bprint(&i, "\t\t;");
-		bprint(&i, "%s: ", i.errmsg);
-		dumpinst(&i, i.curr, i.end-i.curr);
-	}
-	return i.n*2;
-}
-
-static int
-m68020das(Map *map, uint64_t pc, char *buf, int n)
-{
-	Inst i;
-	Optable *op;
-
-	mymap = map;
-	i.addr = pc;
-	i.curr = buf;
-	i.end = buf+n-1;
-	i.errmsg = 0;
-	
-	op = instruction(&i);
-	if (!op)
-		return -1;
-	decode(&i, op);
-	if (i.errmsg)
-		bprint(&i, "%s: ", i.errmsg);
-	dumpinst(&i, i.curr, i.end-i.curr);
-	return i.n*2;
-}

+ 0 - 151
sys/src/libmach/68020obj.c

@@ -1,151 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * 2obj.c - identify and parse a 68020 object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "68020/2.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	sym;
-	char	flags;
-};
-static Addr addr(Biobuf *);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_is2(char *t)
-{
-	uint8_t *s = (uint8_t *)t;
-
-	return  s[0] == (ANAME&0xff)			/* aslo = ANAME */
-		&& s[1] == ((ANAME>>8)&0xff)		/* ashi = ANAME */
-		&& s[2] == D_FILE			/* type */
-		&& s[3] == 1				/* sym */
-		&& s[4] == '<';				/* name of file */
-}
-
-int
-_read2(Biobuf *bp, Prog *p)
-{
-	int as, n, c;
-	Addr a;
-
-	as = Bgetc(bp);		/* as(low) */
-	if(as < 0)
-		return 0;
-	c = Bgetc(bp);		/* as(high) */
-	if(c < 0)
-		return 0;
-	as |= ((c & 0xff) << 8);
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = beswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 4);		/*lineno: low, high, lowhigh, highigh*/
-	a = addr(bp);
-	addr(bp);
-	if(!(a.flags & T_SYM))
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int t;
-	int32_t off;
-
-	a.flags = Bgetc(bp);			/* flags */
-	a.sym = -1;
-	off = 0;
-	if(a.flags & T_FIELD)
-		skip(bp, 2);
-	if(a.flags & T_INDEX)
-		skip(bp, 7);
-	if(a.flags & T_OFFSET){
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-	}
-	if(a.flags & T_SYM)
-		a.sym = Bgetc(bp);
-	if(a.flags & T_FCONST)
-		skip(bp, 8);
-	else if(a.flags & T_SCONST)
-		skip(bp, NSNAME);
-	else{
-		t = Bgetc(bp);
-		if(a.flags & T_TYPE)
-			t |= Bgetc(bp) << 8;
-		t &= D_MASK;
-		if(a.sym > 0 && (t==D_PARAM || t==D_AUTO))
-			_offset(a.sym, off);
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 90
sys/src/libmach/8.c

@@ -1,90 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEY32
-/*
- * 386 definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/386/include/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(ulong)(&((struct Ureg *) 0)->x)
-
-#define PC		REGOFF(pc)
-#define SP		REGOFF(sp)
-#define	AX		REGOFF(ax)
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define FP_CTL(x)	(REGSIZE+4*(x))
-#define FP_REG(x)	(FP_CTL(7)+10*(x))
-#define	FPREGSIZE	(7*4+8*10)
-
-Reglist i386reglist[] = {
-	{"DI",		REGOFF(di),	RINT, 'X'},
-	{"SI",		REGOFF(si),	RINT, 'X'},
-	{"BP",		REGOFF(bp),	RINT, 'X'},
-	{"BX",		REGOFF(bx),	RINT, 'X'},
-	{"DX",		REGOFF(dx),	RINT, 'X'},
-	{"CX",		REGOFF(cx),	RINT, 'X'},
-	{"AX",		REGOFF(ax),	RINT, 'X'},
-	{"GS",		REGOFF(gs),	RINT, 'X'},
-	{"FS",		REGOFF(fs),	RINT, 'X'},
-	{"ES",		REGOFF(es),	RINT, 'X'},
-	{"DS",		REGOFF(ds),	RINT, 'X'},
-	{"TRAP",	REGOFF(trap), 	RINT, 'X'},
-	{"ECODE",	REGOFF(ecode),	RINT, 'X'},
-	{"PC",		PC,		RINT, 'X'},
-	{"CS",		REGOFF(cs),	RINT, 'X'},
-	{"EFLAGS",	REGOFF(flags),	RINT, 'X'},
-	{"SP",		SP,		RINT, 'X'},
-	{"SS",		REGOFF(ss),	RINT, 'X'},
-
-	{"E0",		FP_CTL(0),	RFLT, 'X'},
-	{"E1",		FP_CTL(1),	RFLT, 'X'},
-	{"E2",		FP_CTL(2),	RFLT, 'X'},
-	{"E3",		FP_CTL(3),	RFLT, 'X'},
-	{"E4",		FP_CTL(4),	RFLT, 'X'},
-	{"E5",		FP_CTL(5),	RFLT, 'X'},
-	{"E6",		FP_CTL(6),	RFLT, 'X'},
-	{"F0",		FP_REG(0),	RFLT, '3'},
-	{"F1",		FP_REG(1),	RFLT, '3'},
-	{"F2",		FP_REG(2),	RFLT, '3'},
-	{"F3",		FP_REG(3),	RFLT, '3'},
-	{"F4",		FP_REG(4),	RFLT, '3'},
-	{"F5",		FP_REG(5),	RFLT, '3'},
-	{"F6",		FP_REG(6),	RFLT, '3'},
-	{"F7",		FP_REG(7),	RFLT, '3'},
-	{  0 }
-};
-
-Mach mi386 =
-{
-	"386",
-	MI386,		/* machine type */
-	i386reglist,	/* register list */
-	REGSIZE,	/* size of registers in bytes */
-	FPREGSIZE,	/* size of fp registers in bytes */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	0,		/* link register */
-	"setSB",	/* static base register name (bogus anyways) */
-	0,		/* static base register value */
-	0x1000,		/* page size */
-	0xF0100000ULL,	/* kernel base */
-	0xF0000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	1,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 1 - 20
sys/src/libmach/8db.c

@@ -189,7 +189,7 @@ struct	Instr
 	uint8_t	reg;		/* bits 3-5 of mod r/m field */
 	char	ss;		/* bits 6-7 of SIB */
 	char	index;		/* bits 3-5 of SIB */
-	char	base;		/* bits 0-2 of SIB */
+	uint8_t	base;		/* bits 0-2 of SIB */
 	char	rip;		/* RIP-relative in amd64 mode */
 	uint8_t	opre;		/* f2/f3 could introduce media */
 	int16_t	seg;		/* segment of far address */
@@ -1292,25 +1292,6 @@ igetl(Map *map, Instr *ip, uint32_t *lp)
 	return 1;
 }
 
-/*
- *  get 8 bytes of the instruction
- */
-static int
-igetq(Map *map, Instr *ip, int64_t *qp)
-{
-	uint32_t	l;
-	uint64_t q;
-
-	if (igetl(map, ip, &l) < 0)
-		return -1;
-	q = l;
-	if (igetl(map, ip, &l) < 0)
-		return -1;
-	q |= ((uint64_t)l<<32);
-	*qp = q;
-	return 1;
-}
-
 static int
 getdisp(Map *map, Instr *ip, int mod, int rm, int code, int pcrel)
 {

+ 0 - 147
sys/src/libmach/8obj.c

@@ -1,147 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * 8obj.c - identify and parse a 386 object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "8c/8.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	sym;
-	char	flags;
-};
-static	Addr	addr(Biobuf*);
-static	char	type2char(int);
-static	void	skip(Biobuf*, int);
-
-int
-_is8(char *t)
-{
-	uint8_t *s = (uint8_t*)t;
-
-	return  s[0] == (ANAME&0xff)			/* aslo = ANAME */
-		&& s[1] == ((ANAME>>8)&0xff)
-		&& s[2] == D_FILE			/* type */
-		&& s[3] == 1				/* sym */
-		&& s[4] == '<';				/* name of file */
-}
-
-int
-_read8(Biobuf *bp, Prog* p)
-{
-	int as, n, c;
-	Addr a;
-
-	as = Bgetc(bp);		/* as(low) */
-	if(as < 0)
-		return 0;
-	c = Bgetc(bp);		/* as(high) */
-	if(c < 0)
-		return 0;
-	as |= ((c & 0xff) << 8);
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = leswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 4);		/* lineno(4) */
-	a = addr(bp);
-	addr(bp);
-	if(!(a.flags & T_SYM))
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int t;
-	int32_t off;
-
-	off = 0;
-	a.sym = -1;
-	a.flags = Bgetc(bp);			/* flags */
-	if(a.flags & T_INDEX)
-		skip(bp, 2);
-	if(a.flags & T_OFFSET){
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-	}
-	if(a.flags & T_SYM)
-		a.sym = Bgetc(bp);
-	if(a.flags & T_FCONST)
-		skip(bp, 8);
-	else
-	if(a.flags & T_SCONST)
-		skip(bp, NSNAME);
-	if(a.flags & T_TYPE) {
-		t = Bgetc(bp);
-		if(a.sym > 0 && (t==D_PARAM || t==D_AUTO))
-			_offset(a.sym, off);
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 131
sys/src/libmach/9.c

@@ -1,131 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYPPC64
-/*
- * PowerPC 64 definition
- *	forsyth@vitanuova.com
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/power64/include/ureg.h"
-#include <mach.h>
-
-
-#define	REGOFF(x)	offsetof(struct Ureg, x)
-
-#define R31		REGOFF(r31)
-#define FP_REG(x)	(R31+4+8*(x))
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FPREGSIZE	(8*33)	
-
-Reglist power64reglist[] = {
-	{"CAUSE",	REGOFF(cause),	RINT|RRDONLY,	'Y'},
-	{"TRAP",	REGOFF(cause),	RINT|RRDONLY,	'Y'},	/* alias for acid */
-//	{"MSR",	REGOFF(msr),	RINT|RRDONLY,	'Y'},
-	{"PC",		REGOFF(pc),	RINT,		'Y'},
-	{"LR",		REGOFF(lr),	RINT,		'Y'},
-	{"CR",		REGOFF(cr),	RINT,		'X'},
-	{"XER",		REGOFF(xer),	RINT,		'Y'},
-	{"CTR",		REGOFF(ctr),	RINT,		'Y'},
-	{"PC",		REGOFF(pc),		RINT,		'Y'},
-	{"SP",		REGOFF(sp),		RINT,		'Y'},
-	{"R0",		REGOFF(r0),	RINT,		'Y'},
-	/* R1 is SP */
-	{"R2",		REGOFF(r2),	RINT,		'Y'},
-	{"R3",		REGOFF(r3),	RINT,		'Y'},
-	{"R4",		REGOFF(r4),	RINT,		'Y'},
-	{"R5",		REGOFF(r5),	RINT,		'Y'},
-	{"R6",		REGOFF(r6),	RINT,		'Y'},
-	{"R7",		REGOFF(r7),	RINT,		'Y'},
-	{"R8",		REGOFF(r8),	RINT,		'Y'},
-	{"R9",		REGOFF(r9),	RINT,		'Y'},
-	{"R10",		REGOFF(r10),	RINT,		'Y'},
-	{"R11",		REGOFF(r11),	RINT,		'Y'},
-	{"R12",		REGOFF(r12),	RINT,		'Y'},
-	{"R13",		REGOFF(r13),	RINT,		'Y'},
-	{"R14",		REGOFF(r14),	RINT,		'Y'},
-	{"R15",		REGOFF(r15),	RINT,		'Y'},
-	{"R16",		REGOFF(r16),	RINT,		'Y'},
-	{"R17",		REGOFF(r17),	RINT,		'Y'},
-	{"R18",		REGOFF(r18),	RINT,		'Y'},
-	{"R19",		REGOFF(r19),	RINT,		'Y'},
-	{"R20",		REGOFF(r20),	RINT,		'Y'},
-	{"R21",		REGOFF(r21),	RINT,		'Y'},
-	{"R22",		REGOFF(r22),	RINT,		'Y'},
-	{"R23",		REGOFF(r23),	RINT,		'Y'},
-	{"R24",		REGOFF(r24),	RINT,		'Y'},
-	{"R25",		REGOFF(r25),	RINT,		'Y'},
-	{"R26",		REGOFF(r26),	RINT,		'Y'},
-	{"R27",		REGOFF(r27),	RINT,		'Y'},
-	{"R28",		REGOFF(r28),	RINT,		'Y'},
-	{"R29",		REGOFF(r29),	RINT,		'Y'},
-	{"R30",		REGOFF(r30),	RINT,		'Y'},
-	{"R31",		REGOFF(r31),	RINT,		'Y'},
-	{"F0",		FP_REG(0),	RFLT,		'F'},
-	{"F1",		FP_REG(1),	RFLT,		'F'},
-	{"F2",		FP_REG(2),	RFLT,		'F'},
-	{"F3",		FP_REG(3),	RFLT,		'F'},
-	{"F4",		FP_REG(4),	RFLT,		'F'},
-	{"F5",		FP_REG(5),	RFLT,		'F'},
-	{"F6",		FP_REG(6),	RFLT,		'F'},
-	{"F7",		FP_REG(7),	RFLT,		'F'},
-	{"F8",		FP_REG(8),	RFLT,		'F'},
-	{"F9",		FP_REG(9),	RFLT,		'F'},
-	{"F10",		FP_REG(10),	RFLT,		'F'},
-	{"F11",		FP_REG(11),	RFLT,		'F'},
-	{"F12",		FP_REG(12),	RFLT,		'F'},
-	{"F13",		FP_REG(13),	RFLT,		'F'},
-	{"F14",		FP_REG(14),	RFLT,		'F'},
-	{"F15",		FP_REG(15),	RFLT,		'F'},
-	{"F16",		FP_REG(16),	RFLT,		'F'},
-	{"F17",		FP_REG(17),	RFLT,		'F'},
-	{"F18",		FP_REG(18),	RFLT,		'F'},
-	{"F19",		FP_REG(19),	RFLT,		'F'},
-	{"F20",		FP_REG(20),	RFLT,		'F'},
-	{"F21",		FP_REG(21),	RFLT,		'F'},
-	{"F22",		FP_REG(22),	RFLT,		'F'},
-	{"F23",		FP_REG(23),	RFLT,		'F'},
-	{"F24",		FP_REG(24),	RFLT,		'F'},
-	{"F25",		FP_REG(25),	RFLT,		'F'},
-	{"F26",		FP_REG(26),	RFLT,		'F'},
-	{"F27",		FP_REG(27),	RFLT,		'F'},
-	{"F28",		FP_REG(28),	RFLT,		'F'},
-	{"F29",		FP_REG(29),	RFLT,		'F'},
-	{"F30",		FP_REG(30),	RFLT,		'F'},
-	{"F31",		FP_REG(31),	RFLT,		'F'},
-	{"FPSCR",	FP_REG(32)+4,	RFLT,		'X'},
-	{  0 }
-};
-
-	/* the machine description */
-Mach mpower64 =
-{
-	"power64",
-	MPOWER64,		/* machine type */
-	power64reglist,		/* register set */
-	REGSIZE,		/* number of bytes in register set */
-	FPREGSIZE,		/* number of bytes in FP register set */
-	"PC",			/* name of PC */
-	"SP",			/* name of SP */
-	"LR",			/* name of link register */
-	"setSB",		/* static base register name */
-	0,			/* value */
-	0x100000,		/* page size (TODO, too many choices) */
-	0xffffffff80000000ull,	/* kernel base (TODO, likely incorrect) */
-	0xf000000000000000ull,	/* kernel text mask (TODO, likely incorrect) */
-	0x00007ffffff00000ull,	/* user stack top (TODO, likely incorrect) */
-	4,			/* quantization of pc */
-	8,			/* szaddr */
-	8,			/* szreg */
-	4,			/* szfloat */
-	8,			/* szdouble */
-};
-#endif

+ 0 - 428
sys/src/libmach/9c/9.out.h

@@ -1,428 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * powerpc 64
- */
-#define	NSNAME	8
-#define	NSYM	50
-#define	NREG	32
-
-#define NOPROF	(1<<0)
-#define DUPOK	(1<<1)
-
-enum
-{
-	REGZERO		= 0,	/* set to zero */
-	REGSP		= 1,
-	REGSB		= 2,
-	REGRET		= 3,
-	REGARG		= 3,
-	REGMIN		= 7,	/* register variables allocated from here to REGMAX */
-	REGMAX		= 27,
-	REGEXT		= 30,	/* external registers allocated from here down */
-	REGTMP		= 31,	/* used by the linker */
-
-	FREGRET		= 0,
-	FREGMIN		= 17,	/* first register variable */
-	FREGEXT		= 26,	/* first external register */
-	FREGCVI		= 27, /* floating conversion constant */
-	FREGZERO	= 28,	/* both float and double */
-	FREGHALF	= 29,	/* double */
-	FREGONE		= 30,	/* double */
-	FREGTWO		= 31	/* double */
-/*
- * GENERAL:
- *
- * compiler allocates R3 up as temps
- * compiler allocates register variables R7-R27
- * compiler allocates external registers R30 down
- *
- * compiler allocates register variables F17-F26
- * compiler allocates external registers F26 down
- */
-};
-
-enum	as
-{
-	AXXX	= 0,
-	AADD,
-	AADDCC,
-	AADDV,
-	AADDVCC,
-	AADDC,
-	AADDCCC,
-	AADDCV,
-	AADDCVCC,
-	AADDME,
-	AADDMECC,
-	AADDMEVCC,
-	AADDMEV,
-	AADDE,
-	AADDECC,
-	AADDEVCC,
-	AADDEV,
-	AADDZE,
-	AADDZECC,
-	AADDZEVCC,
-	AADDZEV,
-	AAND,
-	AANDCC,
-	AANDN,
-	AANDNCC,
-	ABC,
-	ABCL,
-	ABEQ,
-	ABGE,
-	ABGT,
-	ABL,
-	ABLE,
-	ABLT,
-	ABNE,
-	ABR,
-	ABVC,
-	ABVS,
-	ACMP,
-	ACMPU,
-	ACNTLZW,
-	ACNTLZWCC,
-	ACRAND,
-	ACRANDN,
-	ACREQV,
-	ACRNAND,
-	ACRNOR,
-	ACROR,
-	ACRORN,
-	ACRXOR,
-	ADIVW,
-	ADIVWCC,
-	ADIVWVCC,
-	ADIVWV,
-	ADIVWU,
-	ADIVWUCC,
-	ADIVWUVCC,
-	ADIVWUV,
-	AEQV,
-	AEQVCC,
-	AEXTSB,
-	AEXTSBCC,
-	AEXTSH,
-	AEXTSHCC,
-	AFABS,
-	AFABSCC,
-	AFADD,
-	AFADDCC,
-	AFADDS,
-	AFADDSCC,
-	AFCMPO,
-	AFCMPU,
-	AFCTIW,
-	AFCTIWCC,
-	AFCTIWZ,
-	AFCTIWZCC,
-	AFDIV,
-	AFDIVCC,
-	AFDIVS,
-	AFDIVSCC,
-	AFMADD,
-	AFMADDCC,
-	AFMADDS,
-	AFMADDSCC,
-	AFMOVD,
-	AFMOVDCC,
-	AFMOVDU,
-	AFMOVS,
-	AFMOVSU,
-	AFMSUB,
-	AFMSUBCC,
-	AFMSUBS,
-	AFMSUBSCC,
-	AFMUL,
-	AFMULCC,
-	AFMULS,
-	AFMULSCC,
-	AFNABS,
-	AFNABSCC,
-	AFNEG,
-	AFNEGCC,
-	AFNMADD,
-	AFNMADDCC,
-	AFNMADDS,
-	AFNMADDSCC,
-	AFNMSUB,
-	AFNMSUBCC,
-	AFNMSUBS,
-	AFNMSUBSCC,
-	AFRSP,
-	AFRSPCC,
-	AFSUB,
-	AFSUBCC,
-	AFSUBS,
-	AFSUBSCC,
-	AMOVMW,
-	ALSW,
-	ALWAR,
-	AMOVWBR,
-	AMOVB,
-	AMOVBU,
-	AMOVBZ,
-	AMOVBZU,
-	AMOVH,
-	AMOVHBR,
-	AMOVHU,
-	AMOVHZ,
-	AMOVHZU,
-	AMOVW,
-	AMOVWU,
-	AMOVFL,
-	AMOVCRFS,
-	AMTFSB0,
-	AMTFSB0CC,
-	AMTFSB1,
-	AMTFSB1CC,
-	AMULHW,
-	AMULHWCC,
-	AMULHWU,
-	AMULHWUCC,
-	AMULLW,
-	AMULLWCC,
-	AMULLWVCC,
-	AMULLWV,
-	ANAND,
-	ANANDCC,
-	ANEG,
-	ANEGCC,
-	ANEGVCC,
-	ANEGV,
-	ANOR,
-	ANORCC,
-	AOR,
-	AORCC,
-	AORN,
-	AORNCC,
-	AREM,
-	AREMCC,
-	AREMV,
-	AREMVCC,
-	AREMU,
-	AREMUCC,
-	AREMUV,
-	AREMUVCC,
-	ARFI,
-	ARLWMI,
-	ARLWMICC,
-	ARLWNM,
-	ARLWNMCC,
-	ASLW,
-	ASLWCC,
-	ASRW,
-	ASRAW,
-	ASRAWCC,
-	ASRWCC,
-	ASTSW,
-	ASTWCCC,
-	ASUB,
-	ASUBCC,
-	ASUBVCC,
-	ASUBC,
-	ASUBCCC,
-	ASUBCV,
-	ASUBCVCC,
-	ASUBME,
-	ASUBMECC,
-	ASUBMEVCC,
-	ASUBMEV,
-	ASUBV,
-	ASUBE,
-	ASUBECC,
-	ASUBEV,
-	ASUBEVCC,
-	ASUBZE,
-	ASUBZECC,
-	ASUBZEVCC,
-	ASUBZEV,
-	ASYNC,
-	AXOR,
-	AXORCC,
-
-	ADCBF,
-	ADCBI,
-	ADCBST,
-	ADCBT,
-	ADCBTST,
-	ADCBZ,
-	AECIWX,
-	AECOWX,
-	AEIEIO,
-	AICBI,
-	AISYNC,
-	APTESYNC,
-	ATLBIE,
-	ATLBIEL,
-	ATLBSYNC,
-	ATW,
-
-	ASYSCALL,
-	ADATA,
-	AGLOBL,
-	AGOK,
-	AHISTORY,
-	ANAME,
-	ANOP,
-	ARETURN,
-	ATEXT,
-	AWORD,
-	AEND,
-	ADYNT,
-	AINIT,
-	ASIGNAME,
-
-	ARFCI,
-
-	/* optional on 32-bit */
-	AFRES,
-	AFRESCC,
-	AFRSQRTE,
-	AFRSQRTECC,
-	AFSEL,
-	AFSELCC,
-	AFSQRT,
-	AFSQRTCC,
-	AFSQRTS,
-	AFSQRTSCC,
-
-	/* 64-bit */
-	
-	ACNTLZD,
-	ACNTLZDCC,
-	ACMPW,	/* CMP with L=0 */
-	ACMPWU,
-	ADIVD,
-	ADIVDCC,
-	ADIVDVCC,
-	ADIVDV,
-	ADIVDU,
-	ADIVDUCC,
-	ADIVDUVCC,
-	ADIVDUV,
-	AEXTSW,
-	AEXTSWCC,
-	/* AFCFIW; AFCFIWCC */
-	AFCFID,
-	AFCFIDCC,
-	AFCTID,
-	AFCTIDCC,
-	AFCTIDZ,
-	AFCTIDZCC,
-	ALDAR,
-	AMOVD,
-	AMOVDU,
-	AMOVWZ,
-	AMOVWZU,
-	AMULHD,
-	AMULHDCC,
-	AMULHDU,
-	AMULHDUCC,
-	AMULLD,
-	AMULLDCC,
-	AMULLDVCC,
-	AMULLDV,
-	ARFID,
-	ARLDMI,
-	ARLDMICC,
-	ARLDC,
-	ARLDCCC,
-	ARLDCR,
-	ARLDCRCC,
-	ARLDCL,
-	ARLDCLCC,
-	ASLBIA,
-	ASLBIE,
-	ASLBMFEE,
-	ASLBMFEV,
-	ASLBMTE,
-	ASLD,
-	ASLDCC,
-	ASRD,
-	ASRAD,
-	ASRADCC,
-	ASRDCC,
-	ASTDCCC,
-	ATD,
-
-	/* 64-bit pseudo operation */
-	ADWORD,
-	AREMD,
-	AREMDCC,
-	AREMDV,
-	AREMDVCC,
-	AREMDU,
-	AREMDUCC,
-	AREMDUV,
-	AREMDUVCC,
-
-	/* more 64-bit operations */
-	AHRFID,
-
-	ALAST
-};
-
-/* type/name */
-enum
-{
-	D_GOK	= 0,
-	D_NONE,
-
-/* name */
-	D_EXTERN,
-	D_STATIC,
-	D_AUTO,
-	D_PARAM,
-
-/* type */
-	D_BRANCH,
-	D_OREG,
-	D_CONST,
-	D_FCONST,
-	D_SCONST,
-	D_REG,
-	D_FPSCR,
-	D_MSR,
-	D_FREG,
-	D_CREG,
-	D_SPR,
-	D_OPT,	/* branch/trap option */
-	D_FILE,
-	D_FILE1,
-	D_DCR,	/* device control register */
-	D_DCONST,
-
-/* reg names iff type is D_SPR */
-	D_XER	= 1,
-	D_LR	= 8,
-	D_CTR	= 9
-	/* and many supervisor level registers */
-};
-
-/*
- * this is the ranlib header
- */
-#define	SYMDEF	"__.SYMDEF"
-
-/*
- * this is the simulated IEEE floating point
- */
-typedef	struct	ieee	Ieee;
-struct	ieee
-{
-	long	l;	/* contains ls-man	0xffffffff */
-	long	h;	/* contains sign	0x80000000
-				    exp		0x7ff00000
-				    ms-man	0x000fffff */
-};

+ 0 - 165
sys/src/libmach/9obj.c

@@ -1,165 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * 9obj.c - identify and parse a PowerPC-64 object file
- *	forsyth@terzarima.net
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "9c/9.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_is9(char *s)
-{
-	return  (s[0]&0377) == ANAME			/* ANAME */
-		&& (s[1]&0377) == ANAME>>8
-		&& s[2] == D_FILE			/* type */
-		&& s[3] == 1				/* sym */
-		&& s[4] == '<';				/* name of file */
-}
-
-int
-_read9(Biobuf *bp, Prog *p)
-{
-	int as, n, c;
-	Addr a;
-
-	as = Bgetc(bp);					/* as(low) */
-	if(as < 0)
-		return 0;
-	c = Bgetc(bp);					/* as(high) */
-	if(c < 0)
-		return 0;
-	as |= ((c & 0xff) << 8);
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = beswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	n = Bgetc(bp);					/* reg and flag */
-	skip(bp, 4);					/* lineno(4) */
-	a = addr(bp);
-	if(n & 0x40)
-		addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int64_t off;
-	int32_t l;
-
-	a.type = Bgetc(bp);				/* a.type */
-	skip(bp,1);					/* reg */
-	a.sym = Bgetc(bp);				/* sym index */
-	a.name = Bgetc(bp);				/* sym type */
-	switch(a.type){
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_CREG:
-	case D_FPSCR: case D_MSR:
-		break;
-	case D_SPR:
-	case D_OREG:
-	case D_CONST:
-	case D_BRANCH:
-	case D_DCONST:
-	case D_DCR:
-		l = Bgetc(bp);
-		l |= Bgetc(bp) << 8;
-		l |= Bgetc(bp) << 16;
-		l |= Bgetc(bp) << 24;
-		off = l;
-		if(a.type == D_DCONST){
-			l = Bgetc(bp);
-			l |= Bgetc(bp) << 8;
-			l |= Bgetc(bp) << 16;
-			l |= Bgetc(bp) << 24;
-			off = ((int64_t)l << 32) | (off & 0xFFFFFFFF);
-			a.type = D_CONST;		/* perhaps */
-		}
-		if(off < 0)
-			off = -off;
-		if(a.sym && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 125
sys/src/libmach/alpha.c

@@ -1,125 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYALPHA
-/*
- * alpha definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "alpha/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(ulong)(&((struct Ureg *) 0)->x)
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FPREGSIZE	(8*33)
-
-#define	SP		REGOFF(sp)
-#define	PC		REGOFF(pc)
-#define	FP_REG(x)	(REGSIZE+8*(x))
-
-Reglist alphareglist[] = {
-	{"STATUS",	REGOFF(status),	RINT|RRDONLY, 'W'},
-	{"TYPE",	REGOFF(type),	RINT|RRDONLY, 'W'},
-	{"A0",	REGOFF(a0),	RINT|RRDONLY, 'W'},
-	{"A1",	REGOFF(a1),	RINT|RRDONLY, 'W'},
-	{"A2",		REGOFF(a2),	RINT|RRDONLY, 'W'},
-	{"PC",		PC,	RINT, 'X'},
-	{"SP",		SP,	RINT, 'X'},
-	{"R29",		REGOFF(r29),	RINT, 'W'},
-	{"R28",		REGOFF(r28),	RINT, 'W'},
-	{"R27",		REGOFF(r27),	RINT, 'W'},
-	{"R26",		REGOFF(r26),	RINT, 'W'},
-	{"R25",		REGOFF(r25),	RINT, 'W'},
-	{"R24",		REGOFF(r24),	RINT, 'W'},
-	{"R23",		REGOFF(r23),	RINT, 'W'},
-	{"R22",		REGOFF(r22),	RINT, 'W'},
-	{"R21",		REGOFF(r21),	RINT, 'W'},
-	{"R20",		REGOFF(r20),	RINT, 'W'},
-	{"R19",		REGOFF(r19),	RINT, 'W'},
-	{"R18",		REGOFF(r18),	RINT, 'W'},
-	{"R17",		REGOFF(r17),	RINT, 'W'},
-	{"R16",		REGOFF(r16),	RINT, 'W'},
-	{"R15",		REGOFF(r15),	RINT, 'W'},
-	{"R14",		REGOFF(r14),	RINT, 'W'},
-	{"R13",		REGOFF(r13),	RINT, 'W'},
-	{"R12",		REGOFF(r12),	RINT, 'W'},
-	{"R11",		REGOFF(r11),	RINT, 'W'},
-	{"R10",		REGOFF(r10),	RINT, 'W'},
-	{"R9",		REGOFF(r9),	RINT, 'W'},
-	{"R8",		REGOFF(r8),	RINT, 'W'},
-	{"R7",		REGOFF(r7),	RINT, 'W'},
-	{"R6",		REGOFF(r6),	RINT, 'W'},
-	{"R5",		REGOFF(r5),	RINT, 'W'},
-	{"R4",		REGOFF(r4),	RINT, 'W'},
-	{"R3",		REGOFF(r3),	RINT, 'W'},
-	{"R2",		REGOFF(r2),	RINT, 'W'},
-	{"R1",		REGOFF(r1),	RINT, 'W'},
-	{"R0",		REGOFF(r0),	RINT, 'W'},
-	{"F0",		FP_REG(0),	RFLT, 'F'},
-	{"F1",		FP_REG(1),	RFLT, 'F'},
-	{"F2",		FP_REG(2),	RFLT, 'F'},
-	{"F3",		FP_REG(3),	RFLT, 'F'},
-	{"F4",		FP_REG(4),	RFLT, 'F'},
-	{"F5",		FP_REG(5),	RFLT, 'F'},
-	{"F6",		FP_REG(6),	RFLT, 'F'},
-	{"F7",		FP_REG(7),	RFLT, 'F'},
-	{"F8",		FP_REG(8),	RFLT, 'F'},
-	{"F9",		FP_REG(9),	RFLT, 'F'},
-	{"F10",		FP_REG(10),	RFLT, 'F'},
-	{"F11",		FP_REG(11),	RFLT, 'F'},
-	{"F12",		FP_REG(12),	RFLT, 'F'},
-	{"F13",		FP_REG(13),	RFLT, 'F'},
-	{"F14",		FP_REG(14),	RFLT, 'F'},
-	{"F15",		FP_REG(15),	RFLT, 'F'},
-	{"F16",		FP_REG(16),	RFLT, 'F'},
-	{"F17",		FP_REG(17),	RFLT, 'F'},
-	{"F18",		FP_REG(18),	RFLT, 'F'},
-	{"F19",		FP_REG(19),	RFLT, 'F'},
-	{"F20",		FP_REG(20),	RFLT, 'F'},
-	{"F21",		FP_REG(21),	RFLT, 'F'},
-	{"F22",		FP_REG(22),	RFLT, 'F'},
-	{"F23",		FP_REG(23),	RFLT, 'F'},
-	{"F24",		FP_REG(24),	RFLT, 'F'},
-	{"F25",		FP_REG(25),	RFLT, 'F'},
-	{"F26",		FP_REG(26),	RFLT, 'F'},
-	{"F27",		FP_REG(27),	RFLT, 'F'},
-	{"F28",		FP_REG(28),	RFLT, 'F'},
-	{"F29",		FP_REG(29),	RFLT, 'F'},
-	{"F30",		FP_REG(30),	RFLT, 'F'},
-	{"F31",		FP_REG(31),	RFLT, 'F'},
-	{"FPCR",		FP_REG(32),	RFLT, 'W'},
-	{  0 }
-};
-
-	/* the machine description */
-Mach malpha =
-{
-	"alpha",
-	MALPHA,		/* machine type */
-	alphareglist,	/* register set */
-	REGSIZE,	/* number of bytes in reg set */
-	FPREGSIZE,	/* number of bytes in fp reg set */
-	"PC",
-	"SP",
-	"R29",
-	"setSB",	/* static base register name */
-	0,		/* static base register value */
-	0x2000,		/* page size */
-	0x80000000ULL,	/* kernel base */
-	0xF0000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	8,		/* szreg (not used?) */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 274
sys/src/libmach/alpha/7.out.h

@@ -1,274 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#define	NSNAME	8
-#define	NSYM	50
-#define	NREG	32
-#define NOPROF	(1<<0)
-#define DUPOK	(1<<1)
-
-enum
-{
-	REGRET		= 0,	/* return register and first temp, grows++ */
-	REGARG		= 0,	/* first arg passed in */
-	REGEXT		= 15,	/* first external register, grows-- */
-
-	REGLINK		= 26,	/* subroutine linkage */
-	REGTMP		= 27,	/* used by the loader */
-	REGTMP2		= 28,	/* used by the loader */
-	REGSB		= 29,	/* static pointer */
-	REGSP		= 30,	/* stack pointer */
-	REGZERO		= 31,	/* always zero */
-
-	FREGRET		= 0,
-	FREGEXT		= 27,	/* first external register */
-	FREGHALF	= 28,	/* double */
-	FREGONE		= 29,	/* double */
-	FREGTWO		= 30,	/* double */
-	FREGZERO	= 31,	/* both float and double */
-};
-
-enum	as
-{
-	AXXX,
-	AGOK,
-	ATEXT,
-	ADATA,
-	AGLOBL,
-	AHISTORY,
-	ANAME,
-	AWORD,
-
-	ANOP,
-
-	AMOVL,
-	AMOVLU,
-	AMOVQ,
-	AMOVQU,
-	AMOVS,
-	AMOVT,
-
-	AMOVB,
-	AMOVBU,
-	AMOVW,
-	AMOVWU,
-
-	AMOVA,
-	AMOVAH,
-
-	AMOVLL,
-	AMOVQL,
-	AMOVLC,
-	AMOVQC,
-
-	AMOVQP,
-	AMOVLP,
-
-	AADDL,
-	AADDLV,
-	AADDQ,
-	AADDQV,
-	AS4ADDL,
-	AS4ADDQ,
-	AS8ADDL,
-	AS8ADDQ,
-	AS4SUBL,
-	AS4SUBQ,
-	AS8SUBL,
-	AS8SUBQ,
-	ASUBL,
-	ASUBLV,
-	ASUBQ,
-	ASUBQV,
-
-	ACMPEQ,
-	ACMPGT,
-	ACMPGE,
-	ACMPUGT,
-	ACMPUGE,
-	ACMPBLE,
-
-	AAND,
-	AANDNOT,
-	AOR,
-	AORNOT,
-	AXOR,
-	AXORNOT,
-
-	ACMOVEQ,
-	ACMOVNE,
-	ACMOVLT,
-	ACMOVGE,
-	ACMOVLE,
-	ACMOVGT,
-	ACMOVLBC,
-	ACMOVLBS,
-
-	AMULL,
-	AMULQ,
-	AMULLV,
-	AMULQV,
-	AUMULH,
-	ADIVQ,
-	AMODQ,
-	ADIVQU,
-	AMODQU,
-	ADIVL,
-	AMODL,
-	ADIVLU,
-	AMODLU,
-
-	ASLLQ,
-	ASRLQ,
-	ASRAQ,
-	ASLLL,
-	ASRLL,
-	ASRAL,
-
-	AEXTBL,
-	AEXTWL,
-	AEXTLL,
-	AEXTQL,
-	AEXTWH,
-	AEXTLH,
-	AEXTQH,
-
-	AINSBL,
-	AINSWL,
-	AINSLL,
-	AINSQL,
-	AINSWH,
-	AINSLH,
-	AINSQH,
-
-	AMSKBL,
-	AMSKWL,
-	AMSKLL,
-	AMSKQL,
-	AMSKWH,
-	AMSKLH,
-	AMSKQH,
-
-	AZAP,
-	AZAPNOT,
-
-	AJMP,
-	AJSR,
-	ARET,
-
-	ABR,
-	ABSR,
-
-	ABEQ,
-	ABNE,
-	ABLT,
-	ABGE,
-	ABLE,
-	ABGT,
-	ABLBC,
-	ABLBS,
-
-	AFBEQ,
-	AFBNE,
-	AFBLT,
-	AFBGE,
-	AFBLE,
-	AFBGT,
-
-	ATRAPB,
-	AMB,
-	AFETCH,
-	AFETCHM,
-	ARPCC,
-
-	ACPYS,
-	ACPYSN,
-	ACPYSE,
-	ACVTLQ,
-	ACVTQL,
-	AFCMOVEQ,
-	AFCMOVNE,
-	AFCMOVLT,
-	AFCMOVGE,
-	AFCMOVLE,
-	AFCMOVGT,
-
-	AADDS,
-	AADDT,
-	ACMPTEQ,
-	ACMPTGT,
-	ACMPTGE,
-	ACMPTUN,
-	ACVTQS,
-	ACVTQT,
-	ACVTTS,
-	ACVTTQ,
-	ADIVS,
-	ADIVT,
-	AMULS,
-	AMULT,
-	ASUBS,
-	ASUBT,
-
-	ACALL_PAL,
-	AREI,
-
-	AEND,
-
-	ADYNT,
-	AINIT,
-
-	ASIGNAME,
-
-	ALAST,
-};
-
-/* type/name */
-enum
-{
-	D_GOK	= 0,
-	D_NONE,
-
-/* name */
-	D_EXTERN,
-	D_STATIC,
-	D_AUTO,
-	D_PARAM,
-
-/* type */
-	D_BRANCH,
-	D_OREG,
-	D_CONST,
-	D_FCONST,
-	D_SCONST,
-	D_REG,
-	D_FREG,
-	D_FCREG,
-	D_PREG,
-	D_PCC,
-	D_FILE,
-	D_FILE1,
-};
-
-/*
- * this is the ranlib header
- */
-#define	SYMDEF	"__.SYMDEF"
-
-/*
- * this is the simulated IEEE floating point
- */
-typedef	struct	ieee	Ieee;
-struct	ieee
-{
-	long	l;	/* contains ls-man	0xffffffff */
-	long	h;	/* contains sign	0x80000000
-				    exp		0x7ff00000
-				    ms-man	0x000fffff */
-};

+ 0 - 58
sys/src/libmach/alpha/ureg.h

@@ -1,58 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-struct Ureg
-{
-	/* l.s saves 31 64-bit values: */
-	uvlong	type;
-	uvlong	a0;
-	uvlong	a1;
-	uvlong	a2;
-
-	uvlong	r0;
-	uvlong	r1;
-	uvlong	r2;
-	uvlong	r3;
-	uvlong	r4;
-	uvlong	r5;
-	uvlong	r6;
-	uvlong	r7;
-	uvlong	r8;
-	uvlong	r9;
-	uvlong	r10;
-	uvlong	r11;
-	uvlong	r12;
-	uvlong	r13;
-	uvlong	r14;
-	uvlong	r15;
-
-	uvlong	r19;
-	uvlong	r20;
-	uvlong	r21;
-	uvlong	r22;
-	uvlong	r23;
-	uvlong	r24;
-	uvlong	r25;
-	uvlong	r26;
-	uvlong	r27;
-	uvlong	r28;
-	union {
-		uvlong	r30;
-		uvlong	usp;
-		uvlong	sp;
-	};
-
-	/* OSF/1 PALcode frame: */
-	uvlong	status;	/* PS */
-	uvlong	pc;
-	uvlong	r29;		/* GP */
-	uvlong	r16;		/* a0 */
-	uvlong	r17;		/* a1 */
-	uvlong	r18;		/* a2 */
-};

+ 0 - 934
sys/src/libmach/alphadb.c

@@ -1,934 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-/*
- * Alpha-specific debugger interface
- */
-
-static 	char	*alphaexcep(Map*, Rgetter);
-static	int	alphafoll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	alphainst(Map*, uint64_t, char, char*, int);
-static	int	alphadas(Map*, uint64_t, char*, int);
-static	int	alphainstlen(Map*, uint64_t);
-/*
- *	Debugger interface
- */
-Machdata alphamach =
-{
-	{0x80, 0, 0, 0},		/* break point */
-	4,			/* break point size */
-
-	leswab,			/* short to local byte order */
-	leswal,			/* long to local byte order */
-	leswav,			/* vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	alphaexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	leieeesftos,		/* single precision float printer */
-	leieeedftos,		/* double precisioin float printer */
-	alphafoll,		/* following addresses */
-	alphainst,		/* print instruction */
-	alphadas,		/* dissembler */
-	alphainstlen,		/* instruction size */
-};
-
-static char *illegaltype[] = {
-	"breakpoint",
-	"bugchk",
-	"gentrap",
-	"fen",
-	"illegal instruction",
-};
-
-static char *
-alphaexcep(Map *map, Rgetter rget)
-{
-	uint32_t type, a0, a1;
-	static char buf[256];
-
-	type = (*rget)(map, "TYPE");
-	a0 = (*rget)(map, "A0");
-	a1 = (*rget)(map, "A1");
-/*	a2 = (*rget)(map, "A2"); */
-
-	switch (type) {
-	case 1:	/* arith */
-		sprint(buf, "trap: arithmetic trap 0x%lux", a0);
-		break;
-	case 2:	/* bad instr or FEN */
-		if (a0 <= 4)
-			return illegaltype[a0];
-		else
-			sprint(buf, "illegal instr trap, unknown type %lud", a0);
-		break;
-	case 3:	/* intr */
-		sprint(buf, "interrupt type %lud", a0);
-		break;
-	case 4:	/* memory fault */
-		sprint(buf, "fault %s addr=0x%lux", (a1&1)?"write":"read", a0);
-		break;
-	case 5:	/* syscall() */
-		return "system call";
-	case 6:	/* alignment fault */
-		sprint(buf, "unaligned op 0x%lux addr 0x%lux", a1, a0);
-		break;
-	default:	/* cannot happen */
-		sprint(buf, "unknown exception type %lud", type);
-		break;
-	}
-	return buf;
-}
-
-	/* alpha disassembler and related functions */
-
-static	char FRAMENAME[] = ".frame";
-
-typedef struct {
-	uint64_t addr;
-	uint8_t op;			/* bits 31-26 */
-	uint8_t ra;			/* bits 25-21 */
-	uint8_t rb;			/* bits 20-16 */
-	uint8_t rc;			/* bits 4-0 */
-	int32_t mem;			/* bits 15-0 */
-	int32_t branch;			/* bits 20-0 */
-	uint8_t function;			/* bits 11-5 */
-	uint8_t literal;			/* bits 20-13 */
-	uint8_t islit;			/* bit 12 */
-	uint8_t fpfn;			/* bits 10-5 */
-	uint8_t fpmode;			/* bits 15-11 */
-	int32_t w0;
-	int32_t w1;
-	int size;			/* instruction size */
-	char *curr;			/* fill point in buffer */
-	char *end;			/* end of buffer */
-	char *err;			/* error message */
-} Instr;
-
-static Map *mymap;
-
-static int
-decode(uint64_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if (get4(mymap, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->addr = pc;
-	i->size = 1;
-	i->op = (w >> 26) & 0x3F;
-	i->ra = (w >> 21) & 0x1F;
-	i->rb = (w >> 16) & 0x1F;
-	i->rc = w & 0x1F;
-	i->function = (w >> 5) & 0x7F;
-	i->mem = w & 0xFFFF;
-	if (i->mem & 0x8000)
-		i->mem -= 0x10000;
-	i->branch = w & 0x1FFFFF;
-	if (i->branch & 0x100000)
-		i->branch -= 0x200000;
-	i->function = (w >> 5) & 0x7F;
-	i->literal = (w >> 13) & 0xFF;
-	i->islit = (w >> 12) & 0x01;
-	i->fpfn = (w >> 5) & 0x3F;
-	i->fpmode = (w >> 11) & 0x1F;
-	i->w0 = w;
-	return 1;
-}
-
-static int
-mkinstr(uint64_t pc, Instr *i)
-{
-/*	Instr x; */
-
-	if (decode(pc, i) < 0)
-		return -1;
-
-#ifdef	frommips
-/* we probably want to do something like this for alpha... */
-	/*
-	 * if it's a LUI followed by an ORI,
-	 * it's an immediate load of a large constant.
-	 * fix the LUI immediate in any case.
-	 */
-	if (i->op == 0x0F) {
-		if (decode(pc+4, &x) < 0)
-			return 0;
-		i->immediate <<= 16;
-		if (x.op == 0x0D && x.rs == x.rt && x.rt == i->rt) {
-			i->immediate |= (x.immediate & 0xFFFF);
-			i->w1 = x.w0;
-			i->size++;
-			return 1;
-		}
-	}
-#endif
-	return 1;
-}
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-typedef struct Opcode Opcode;
-
-struct Opcode {
-	char *mnemonic;
-	void (*f)(Opcode *, Instr *);
-	char *ken;
-};
-
-static void format(char *, Instr *, char *);
-
-static int
-plocal(Instr *i, char *m, char r, int store)
-{
-	int offset;
-	char *reg;
-	Symbol s;
-
-	if (!findsym(i->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s))
-		return 0;
-	if (s.value > i->mem) {
-		if(!getauto(&s, s.value-i->mem, CAUTO, &s))
-			return 0;
-		reg = "(SP)";
-		offset = i->mem;
-	} else {
-		offset = i->mem-s.value-8;
-		if (!getauto(&s, offset, CPARAM, &s))
-			return 0;
-		reg = "(FP)";
-	}
-	if (store)
-		bprint(i, "%s\t%c%d,%s+%d%s", m, r, i->ra, s.name, offset, reg);
-	else
-		bprint(i, "%s\t%s+%d%s,%c%d", m, s.name, offset, reg, r, i->ra);
-	return 1;
-}
-
-static void
-_load(Opcode *o, Instr *i, char r)
-{
-	char *m;
-
-	m = o->mnemonic;
-	if (i->rb == 30 && plocal(i, m, r, 0))
-		return;
-	if (i->rb == 29 && mach->sb) {
-		bprint(i, "%s\t", m);
-		i->curr += symoff(i->curr, i->end-i->curr, i->mem+mach->sb, CANY);
-		bprint(i, "(SB),%c%d", r, i->ra);
-		return;
-	}
-	format(m, i, o->ken);
-}
-
-static void
-load(Opcode *o, Instr *i)
-{
-	_load(o, i, 'R');
-}
-
-static void
-loadf(Opcode *o, Instr *i)
-{
-	_load(o, i, 'F');
-}
-
-static void
-_store(Opcode *o, Instr *i, char r)
-{
-	char *m;
-
-	m = o->mnemonic;
-	if (i->rb == 30 && plocal(i, m, r, 1))
-		return;
-	if (i->rb == 29 && mach->sb) {
-		bprint(i, "%s\t%c%d,", m, r, i->ra);
-		i->curr += symoff(i->curr, i->end-i->curr, i->mem+mach->sb, CANY);
-		bprint(i, "(SB)");
-		return;
-	}
-	format(o->mnemonic, i, o->ken);
-}
-
-static void
-store(Opcode *o, Instr *i)
-{
-	_store(o, i, 'R');
-}
-
-static void
-storef(Opcode *o, Instr *i)
-{
-	_store(o, i, 'F');
-}
-
-static void
-misc(Opcode *o, Instr *i)
-{
-	char *f;
-
-	USED(o);
-	switch (i->mem&0xFFFF) {
-	case 0x0000:
-		f = "TRAPB";
-		break;
-	case 0x4000:
-		f = "MB";
-		break;
-	case 0x8000:
-		f = "FETCH\t0(R%b)";
-		break;
-	case 0xA000:
-		f = "FETCH_M\t0(R%b)";
-		break;
-	case 0xC000:
-		f = "RPCC\tR%a";
-		break;
-	case 0xE000:
-		f = "RC\tR%a";
-		break;
-	case 0xF000:
-		f = "RS\tR%a";
-		break;
-	default:
-		f = "%w";
-	}
-	format(0, i, f);
-}
-
-static char	*jmpcode[4] = { "JMP", "JSR", "RET", "JSR_COROUTINE" };
-
-static void
-jmp(Opcode *o, Instr *i)
-{
-	int hint;
-	char *m;
-
-	USED(o);
-	hint = (i->mem >> 14) & 3;
-	m = jmpcode[hint];
-	if (i->ra == 31) {
-		if (hint == 2 && i->rb == 29)
-			bprint(i, m);
-		else
-			format(m, i, "(R%b)");
-	}
-	else
-		format(m, i, "R%a,(R%b)");
-}
-
-static void
-br(Opcode *o, Instr *i)
-{
-	if (i->ra == 31)
-		format(o->mnemonic, i, "%B");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-bsr(Opcode *o, Instr *i)
-{
-	if (i->ra == 26)
-		format(o->mnemonic, i, "%B");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-mult(Opcode *o, Instr *i)
-{
-	char *m;
-
-	switch (i->function) {
-	case 0x00:
-		m = "MULL";
-		break;
-	case 0x20:
-		m = "MULQ";
-		break;
-	case 0x40:
-		m = "MULL/V";
-		break;
-	case 0x60:
-		m = "MULQ/V";
-		break;
-	case 0x30:
-		m = "UMULH";
-		break;
-	default:
-		format("???", i, "%w");
-		return;
-	}
-	format(m, i, o->ken);
-}
-
-static char	alphaload[] = "%l,R%a";
-static char	alphafload[] = "%l,F%a";
-static char	alphastore[] = "R%a,%l";
-static char	alphafstore[] = "F%a,%l";
-static char	alphabranch[] = "R%a,%B";
-static char	alphafbranch[] = "F%a,%B";
-static char	alphaint[] = "%v,R%a,R%c";
-static char	alphafp[] = "F%b,F%a,F%c";
-static char	alphafp2[] = "F%b,F%c";
-static char	alphaxxx[] = "%w";
-
-static Opcode opcodes[64] = {
-	"PAL",		0,	alphaxxx,
-	"OPC01",	0,	alphaxxx,
-	"OPC02",	0,	alphaxxx,
-	"OPC03",	0,	alphaxxx,
-	"OPC04",	0,	alphaxxx,
-	"OPC05",	0,	alphaxxx,
-	"OPC06",	0,	alphaxxx,
-	"OPC07",	0,	alphaxxx,
-	"MOVQA",	load,	alphaload,
-	"MOVQAH",	load,	alphaload,
-	"MOVBU",	load,	alphaload,		/* v 3 */
-	"MOVQU",	load,	alphaload,
-	"MOVWU",	load,	alphaload,		/* v 3 */
-	"MOVWU",	store,	alphastore,		/* v 3 */
-	"MOVBU",	store,	alphastore,		/* v 3 */
-	"MOVQU",	store,	alphastore,
-	0,		0,	0,			/* int arith */
-	0,		0,	0,			/* logical */
-	0,		0,	0,			/* shift */
-	0,		mult,	alphaint,
-	"OPC14",	0,	alphaxxx,
-	"vax",		0,	alphafp,		/* vax */
-	0,		0,	0,			/* ieee */
-	0,		0,	0,			/* fp */
-	0,		misc,	alphaxxx,
-	"PAL19 [HW_MFPR]",0,	alphaxxx,
-	"JSR",		jmp,	0,
-	"PAL1B [HW_LD]",0,	alphaxxx,
-	"OPC1C",	0,	alphaxxx,
-	"PAL1D [HW_MTPR]",0,	alphaxxx,
-	"PAL1E [HW_REI]",0,	alphaxxx,
-	"PAL1F [HW_ST]",0,	alphaxxx,
-	"MOVF",		loadf,	alphafload,
-	"MOVG",		loadf,	alphafload,
-	"MOVS",		loadf,	alphafload,
-	"MOVT",		loadf,	alphafload,
-	"MOVF",		storef,	alphafstore,
-	"MOVG",		storef,	alphafstore,
-	"MOVS",		storef,	alphafstore,
-	"MOVT",		storef,	alphafstore,
-	"MOVL",		load,	alphaload,
-	"MOVQ",		load,	alphaload,
-	"MOVLL",	load,	alphaload,
-	"MOVQL",	load,	alphaload,
-	"MOVL",		store,	alphastore,
-	"MOVQ",		store,	alphastore,
-	"MOVLC",	store,	alphastore,
-	"MOVQC",	store,	alphastore,
-	"JMP",		br,	alphabranch,
-	"FBEQ",		0,	alphafbranch,
-	"FBLT",		0,	alphafbranch,
-	"FBLE",		0,	alphafbranch,
-	"JSR",		bsr,	alphabranch,
-	"FBNE",		0,	alphafbranch,
-	"FBGE",		0,	alphafbranch,
-	"FBGT",		0,	alphafbranch,
-	"BLBC",		0,	alphafbranch,
-	"BEQ",		0,	alphabranch,
-	"BLT",		0,	alphabranch,
-	"BLE",		0,	alphabranch,
-	"BLBS",		0,	alphabranch,
-	"BNE",		0,	alphabranch,
-	"BGE",		0,	alphabranch,
-	"BGT",		0,	alphabranch,
-};
-
-static Opcode fpopcodes[64] = {
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-
-	"CVTLQ",	0,	alphafp2,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-
-	"CPYS",		0,	alphafp,
-	"CPYSN",	0,	alphafp,
-	"CPYSE",	0,	alphafp,
-	"???",		0,	alphaxxx,
-	"MOVT",		0,	"FPCR,F%a",
-	"MOVT",		0,	"F%a,FPCR",
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"FCMOVEQ",	0,	alphafp,
-	"FCMOVNE",	0,	alphafp,
-	"FCMOVLT",	0,	alphafp,
-	"FCMOVGE",	0,	alphafp,
-	"FCMOVLE",	0,	alphafp,
-	"FCMOVGT",	0,	alphafp,
-
-	"CVTQL",	0,	alphafp2,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-};
-
-static Opcode ieeeopcodes[64] = {
-	"ADDS",		0,	alphafp,
-	"SUBS",		0,	alphafp,
-	"MULS",		0,	alphafp,
-	"DIVS",		0,	alphafp,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-
-	"ADDT",		0,	alphafp,
-	"SUBT",		0,	alphafp,
-	"MULT",		0,	alphafp,
-	"DIVT",		0,	alphafp,
-	"CMPTUN",	0,	alphafp,
-	"CMPTEQ",	0,	alphafp,
-	"CMPTLT",	0,	alphafp,
-	"CMPTLE",	0,	alphafp,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"CVTTS",	0,	alphafp2,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"CVTTQ",	0,	alphafp2,
-
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"???",		0,	alphaxxx,
-	"CVTQS",	0,	alphafp2,
-	"???",		0,	alphaxxx,
-	"CVTQT",	0,	alphafp2,
-	"???",		0,	alphaxxx,
-};
-
-static unsigned char	amap[128] = {
-	[0x00]	1,
-	[0x40]	2,
-	[0x20]	3,
-	[0x60]	4,
-	[0x09]	5,
-	[0x49]	6,
-	[0x29]	7,
-	[0x69]	8,
-	[0x2D]	9,
-	[0x4D]	10,
-	[0x6D]	11,
-	[0x1D]	12,	
-	[0x3D]	13,	
-	[0x0F]	14,	
-	[0x02]	15,	
-	[0x0B]	16,	
-	[0x12]	17,	
-	[0x1B]	18,
-	[0x22]	19,	
-	[0x2B]	20,	
-	[0x32]	21,	
-	[0x3B]	22,
-};
-
-static Opcode arithopcodes[64] = {
-	"???",		0,	alphaxxx,
-	"ADDL",		0,	alphaint,
-	"ADDL/V",	0,	alphaint,
-	"ADDQ",		0,	alphaint,
-	"ADDQ/V",	0,	alphaint,
-	"SUBL",		0,	alphaint,
-	"SUBL/V",	0,	alphaint,
-	"SUBQ",		0,	alphaint,
-	"SUBQ/V",	0,	alphaint,
-	"CMPEQ",	0,	alphaint,
-	"CMPLT",	0,	alphaint,
-	"CMPLE",	0,	alphaint,
-	"CMPULT",	0,	alphaint,
-	"CMPULE",	0,	alphaint,
-	"CMPBGE",	0,	alphaint,
-	"S4ADDL",	0,	alphaint,
-	"S4SUBL",	0,	alphaint,
-	"S8ADDL",	0,	alphaint,
-	"S8SUBL",	0,	alphaint,
-	"S4ADDQ",	0,	alphaint,
-	"S4SUBQ",	0,	alphaint,
-	"S8ADDQ",	0,	alphaint,
-	"S8SUBQ",	0,	alphaint,
-};
-
-static unsigned char	lmap[128] = {
-	[0x00]	1,
-	[0x20]	2,
-	[0x40]	3,
-	[0x08]	4,
-	[0x28]	5,
-	[0x48]	6,
-	[0x24]	7,
-	[0x44]	8,
-	[0x64]	9,
-	[0x26]	7,
-	[0x46]	8,
-	[0x66]	9,
-	[0x14]	10,
-	[0x16]	11,
-};
-
-static Opcode logicalopcodes[64] = {
-	"???",		0,	alphaxxx,
-	"AND",		0,	alphaint,
-	"OR",		0,	alphaint,
-	"XOR",		0,	alphaint,
-	"ANDNOT",	0,	alphaint,
-	"ORNOT",	0,	alphaint,
-	"XORNOT",	0,	alphaint,
-	"CMOVEQ",	0,	alphaint,
-	"CMOVLT",	0,	alphaint,
-	"CMOVLE",	0,	alphaint,
-	"CMOVNE",	0,	alphaint,
-	"CMOVGE",	0,	alphaint,
-	"CMOVGT",	0,	alphaint,
-	"CMOVLBS",	0,	alphaint,
-	"CMOVLBC",	0,	alphaint,
-};
-
-static unsigned char	smap[128] = {
-	[0x39]	1,
-	[0x3C]	2,
-	[0x34]	3,
-	[0x06]	4,
-	[0x16]	5,
-	[0x26]	6,
-	[0x36]	7,
-	[0x5A]	8,
-	[0x6A]	9,
-	[0x7A]	10,
-	[0x0B]	11,
-	[0x1B]	12,
-	[0x2B]	13,
-	[0x3B]	14,
-	[0x57]	15,
-	[0x67]	16,
-	[0x77]	17,
-	[0x02]	18,
-	[0x12]	19,
-	[0x22]	20,
-	[0x32]	21,
-	[0x52]	22,
-	[0x62]	23,
-	[0x72]	24,
-	[0x30]	25,
-	[0x31]	26,
-};
-
-static Opcode shiftopcodes[64] = {
-	"???",		0,	alphaxxx,
-	"SLLQ",		0,	alphaint,
-	"SRAQ",		0,	alphaint,
-	"SRLQ",		0,	alphaint,
-	"EXTBL",	0,	alphaint,
-	"EXTWL",	0,	alphaint,
-	"EXTLL",	0,	alphaint,
-	"EXTQL",	0,	alphaint,
-	"EXTWH",	0,	alphaint,
-	"EXTLH",	0,	alphaint,
-	"EXTQH",	0,	alphaint,
-	"INSBL",	0,	alphaint,
-	"INSWL",	0,	alphaint,
-	"INSLL",	0,	alphaint,
-	"INSQL",	0,	alphaint,
-	"INSWH",	0,	alphaint,
-	"INSLH",	0,	alphaint,
-	"INSQH",	0,	alphaint,
-	"MSKBL",	0,	alphaint,
-	"MSKWL",	0,	alphaint,
-	"MSKLL",	0,	alphaint,
-	"MSKQL",	0,	alphaint,
-	"MSKWH",	0,	alphaint,
-	"MSKLH",	0,	alphaint,
-	"MSKQH",	0,	alphaint,
-	"ZAP",		0,	alphaint,
-	"ZAPNOT",	0,	alphaint,
-};
-
-static void
-format(char *mnemonic, Instr *i, char *f)
-{
-	if (mnemonic)
-		format(0, i, mnemonic);
-	if (f == 0)
-		return;
-	if (mnemonic)
-		if (i->curr < i->end)
-			*i->curr++ = '\t';
-	for ( ; *f && i->curr < i->end; f++) {
-		if (*f != '%') {
-			*i->curr++ = *f;
-			continue;
-		}
-		switch (*++f) {
-
-		case 'a':
-			bprint(i, "%d", i->ra);
-			break;
-
-		case 'b':
-			bprint(i, "%d", i->rb);
-			break;
-
-		case 'c':
-			bprint(i, "%d", i->rc);
-			break;
-
-		case 'v':
-			if (i->islit)
-				bprint(i, "$%ux", i->literal);
-			else
-				bprint(i, "R%d", i->rb);
-			break;
-
-		case 'l':
-			bprint(i, "%lx(R%d)", i->mem, i->rb);
-			break;
-
-		case 'i':
-			bprint(i, "$%lx", i->mem);
-			break;
-
-		case 'B':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(i->branch<<2)+i->addr+4, CANY);
-			break;
-
-		case 'w':
-			bprint(i, "[%lux]", i->w0);
-			break;
-
-		case '\0':
-			*i->curr++ = '%';
-			return;
-
-		default:
-			bprint(i, "%%%c", *f);
-			break;
-		}
-	}
-	*i->curr = 0;
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-	Opcode *o;
-	uint8_t op;
-
-	i.curr = buf;
-	i.end = buf+n-1;
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	switch (i.op) {
-
-	case 0x10:					/* INTA */
-		o = arithopcodes;
-		op = amap[i.function];
-		break;
-
-	case 0x11:					/* INTL */
-		o = logicalopcodes;
-		op = lmap[i.function];
-		break;
-
-	case 0x12:					/* INTS */
-		o = shiftopcodes;
-		op = smap[i.function];
-		break;
-
-	case 0x16:					/* FLTI */
-		o = ieeeopcodes;
-		op = i.fpfn;
-		break;
-
-	case 0x17:					/* FLTL */
-		o = fpopcodes;
-		op = i.fpfn;
-		break;
-
-	default:
-		o = opcodes;
-		op = i.op;
-		break;
-	}
-	if (o[op].f)
-		(*o[op].f)(&o[op], &i);
-	else
-		format(o[op].mnemonic, &i, o[op].ken);
-	return i.size*4;
-}
-
-static int
-alphainst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	USED(modifier);
-	return printins(map, pc, buf, n);
-}
-
-static int
-alphadas(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-
-	i.curr = buf;
-	i.end = buf+n;
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	if (i.end-i.curr > 8)
-		i.curr = _hexify(buf, i.w0, 7);
-	if (i.size == 2 && i.end-i.curr > 9) {
-		*i.curr++ = ' ';
-		i.curr = _hexify(i.curr, i.w1, 7);
-	}
-	*i.curr = 0;
-	return i.size*4;
-}
-
-static int
-alphainstlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	return i.size*4;
-}
-
-static int
-alphafoll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	char buf[8];
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-
-	switch(i.op) {
-	case 0x1A:				/* JMP/JSR/RET */
-		sprint(buf, "R%d", i.rb);
-		foll[0] = (*rget)(map, buf);
-		return 1;
-	case 0x30:				/* BR */
-	case 0x34:				/* BSR */
-		foll[0] = pc+4 + (i.branch<<2);
-		return 1;
-	default:
-		if (i.op > 0x30) {		/* cond */
-			foll[0] = pc+4;
-			foll[1] = pc+4 + (i.branch<<2);
-			return 2;
-		}
-		foll[0] = pc+i.size*4;
-		return 1;
-	}
-}

+ 0 - 147
sys/src/libmach/alphaobj.c

@@ -1,147 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * 7obj.c - identify and parse an alpha object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "alpha/7.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_is7(char *s)
-{
-	return  s[0] == ANAME				/* ANAME */
-		&& s[1] == D_FILE			/* type */
-		&& s[2] == 1				/* sym */
-		&& s[3] == '<';				/* name of file */
-}
-
-int
-_read7(Biobuf *bp, Prog *p)
-{
-	int as, n;
-	Addr a;
-
-	as = Bgetc(bp);			/* as */
-	if(as < 0)
-		return 0;
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = leswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 5);		/* reg(1), lineno(4) */
-	a = addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int64_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp,1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type){
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_PREG:
-	case D_FCREG: case D_PCC:
-		break;
-	case D_OREG:
-	case D_CONST:
-	case D_BRANCH:
-		off = (uint64_t)Bgetc(bp);
-		off |= (uint64_t)Bgetc(bp) << 8;
-		off |= (uint64_t)Bgetc(bp) << 16;
-		off |= (uint64_t)Bgetc(bp) << 24;
-		off |= (uint64_t)Bgetc(bp) << 32;
-		off |= (uint64_t)Bgetc(bp) << 40;
-		off |= (uint64_t)Bgetc(bp) << 48;
-		off |= (uint64_t)Bgetc(bp) << 56;
-		if(off < 0)
-			off = -off;
-		if(a.sym && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 627
sys/src/libmach/executable.c

@@ -36,26 +36,13 @@ typedef struct {
 	int32_t dummy;			/* padding to ensure extra long */
 } ExecHdr;
 
-#ifdef HARVEYNEXT
-static	int	nextboot(int, Fhdr*, ExecHdr*);
-#elif HARVEYSPARC
-static	int	sparcboot(int, Fhdr*, ExecHdr*);
-#elif HARVEYMIPS
-static	int	mipsboot(int, Fhdr*, ExecHdr*);
-static	int	mips4kboot(int, Fhdr*, ExecHdr*);
-#endif
-static	int	common(int, Fhdr*, ExecHdr*);
-static	int	commonllp64(int, Fhdr*, ExecHdr*);
-static	int	adotout(int, Fhdr*, ExecHdr*);
 static	int	elfdotout(int, Fhdr*, ExecHdr*);
-static	int	armdotout(int, Fhdr*, ExecHdr*);
 static	void	setsym(Fhdr*, int32_t, int32_t, int32_t, int64_t);
 static	void	setdata(Fhdr*, uint64_t, int32_t, int64_t,
 				  int32_t);
 static	void	settext(Fhdr*, uint64_t, uint64_t, int32_t,
 				  int64_t);
 static	void	hswal(void*, int, uint32_t(*)(uint32_t));
-static	uint64_t	_round(uint64_t, uint32_t);
 
 /*
  *	definition of per-executable file type structures
@@ -73,171 +60,10 @@ typedef struct Exectable{
 	int	(*hparse)(int, Fhdr*, ExecHdr*);
 } ExecTable;
 
-#ifdef HARVEYMIPS
-extern	Mach	mmips;
-extern	Mach	mmips2le;
-extern	Mach	mmips2be;
-#elif HARVEYSPARC
-extern	Mach	msparc;
-extern	Mach	msparc64;
-extern	Mach	m68020;
-#elif HARVEY32
-extern	Mach	mi386;
-#endif
 extern	Mach	mamd64;
-#ifdef HARVEYARM
-extern	Mach	marm;
-#elif HARVEYPPC
-extern	Mach	mpower;
-extern	Mach	mpower64;
-#elif HARVEYALPHA
-extern	Mach	malpha;
-#endif
 
 ExecTable exectab[] =
 {
-#ifdef HARVEYMIPS
-	{ V_MAGIC,			/* Mips v.out */
-		"mips plan 9 executable BE",
-		"mips plan 9 dlm BE",
-		FMIPS,
-		1,
-		&mmips,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ P_MAGIC,			/* Mips 0.out (r3k le) */
-		"mips plan 9 executable LE",
-		"mips plan 9 dlm LE",
-		FMIPSLE,
-		1,
-		&mmips,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ M_MAGIC,			/* Mips 4.out */
-		"mips 4k plan 9 executable BE",
-		"mips 4k plan 9 dlm BE",
-		FMIPS2BE,
-		1,
-		&mmips2be,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ N_MAGIC,			/* Mips 0.out */
-		"mips 4k plan 9 executable LE",
-		"mips 4k plan 9 dlm LE",
-		FMIPS2LE,
-		1,
-		&mmips2le,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ 0x160<<16,			/* Mips boot image */
-		"mips plan 9 boot image",
-		nil,
-		FMIPSB,
-		0,
-		&mmips,
-		sizeof(struct mipsexec),
-		beswal,
-		mipsboot },
-	{ (0x160<<16)|3,		/* Mips boot image */
-		"mips 4k plan 9 boot image",
-		nil,
-		FMIPSB,
-		0,
-		&mmips2be,
-		sizeof(struct mips4kexec),
-		beswal,
-		mips4kboot },
-#elif HARVEYSPARC
-	{ K_MAGIC,			/* Sparc k.out */
-		"sparc plan 9 executable",
-		"sparc plan 9 dlm",
-		FSPARC,
-		1,
-		&msparc,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ 0x01030107, 			/* Sparc boot image */
-		"sparc plan 9 boot image",
-		nil,
-		FSPARCB,
-		0,
-		&msparc,
-		sizeof(struct sparcexec),
-		beswal,
-		sparcboot },
-	{ U_MAGIC,			/* Sparc64 u.out */
-		"sparc64 plan 9 executable",
-		"sparc64 plan 9 dlm",
-		FSPARC64,
-		1,
-		&msparc64,
-		sizeof(Exec),
-		beswal,
-		adotout },
-	{ A_MAGIC,			/* 68020 2.out & boot image */
-		"68020 plan 9 executable",
-		"68020 plan 9 dlm",
-		F68020,
-		1,
-		&m68020,
-		sizeof(Exec),
-		beswal,
-		common },
-#elif HARVEYNEXT
-	{ 0xFEEDFACE,			/* Next boot image */
-		"next plan 9 boot image",
-		nil,
-		FNEXTB,
-		0,
-		&m68020,
-		sizeof(struct nextexec),
-		beswal,
-		nextboot },
-#elif HARVEY32
-	{ I_MAGIC,			/* I386 8.out & boot image */
-		"386 plan 9 executable",
-		"386 plan 9 dlm",
-		FI386,
-		1,
-		&mi386,
-		sizeof(Exec),
-		beswal,
-		common },
-#endif
-	{ S_MAGIC,			/* amd64 6.out & boot image */
-		"amd64 plan 9 executable",
-		"amd64 plan 9 dlm",
-		FAMD64,
-		1,
-		&mamd64,
-		sizeof(Exec)+8,
-		nil,
-		commonllp64 },
-#ifdef HARVEYPPC
-	{ Q_MAGIC,			/* PowerPC q.out & boot image */
-		"power plan 9 executable",
-		"power plan 9 dlm",
-		FPOWER,
-		1,
-		&mpower,
-		sizeof(Exec),
-		beswal,
-		common },
-	{ T_MAGIC,			/* power64 9.out & boot image */
-		"power64 plan 9 executable",
-		"power64 plan 9 dlm",
-		FPOWER64,
-		1,
-		&mpower64,
-		sizeof(Exec)+8,
-		nil,
-		commonllp64 },
-#endif
 	{ ELF_MAG,			/* any ELF */
 		"elf executable",
 		nil,
@@ -249,51 +75,9 @@ ExecTable exectab[] =
 		sizeof(E64hdr),
 		nil,
 		elfdotout },
-#ifdef HARVEYARM
-	{ E_MAGIC,			/* Arm 5.out and boot image */
-		"arm plan 9 executable",
-		"arm plan 9 dlm",
-		FARM,
-		1,
-		&marm,
-		sizeof(Exec),
-		beswal,
-		common },
-	{ (143<<16)|0413,		/* (Free|Net)BSD Arm */
-		"arm *bsd executable",
-		nil,
-		FARM,
-		0,
-		&marm,
-		sizeof(Exec),
-		leswal,
-		armdotout },
-#elif HARVEYALPHA
-	{ L_MAGIC,			/* alpha 7.out */
-		"alpha plan 9 executable",
-		"alpha plan 9 dlm",
-		FALPHA,
-		1,
-		&malpha,
-		sizeof(Exec),
-		beswal,
-		common },
-	{ 0x0700e0c3,			/* alpha boot image */
-		"alpha plan 9 boot image",
-		nil,
-		FALPHA,
-		0,
-		&malpha,
-		sizeof(Exec),
-		beswal,
-		common },
-#endif
 	{ 0 },
 };
 
-#ifdef HARVEY32
-Mach	*mach = &mi386;			/* Global current machine table */
-#endif
 Mach	*mach = &mamd64;
 
 static ExecTable*
@@ -393,229 +177,6 @@ hswal(void *v, int n, uint32_t (*swap)(uint32_t))
 		*ulp = (*swap)(*ulp);
 }
 
-/*
- *	Crack a normal a.out-type header
- */
-static int
-adotout(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	int32_t pgsize;
-
-	USED(fd);
-	pgsize = mach->pgsize;
-	settext(fp, hp->e.entry, pgsize+sizeof(Exec),
-			hp->e.text, sizeof(Exec));
-	setdata(fp, _round(pgsize+fp->txtsz+sizeof(Exec), pgsize),
-		hp->e.data, fp->txtsz+sizeof(Exec), hp->e.bss);
-	setsym(fp, hp->e.syms, hp->e.spsz, hp->e.pcsz, fp->datoff+fp->datsz);
-	return 1;
-}
-
-static void
-commonboot(Fhdr *fp)
-{
-	if (!(fp->entry & mach->ktmask))
-		return;
-
-	switch(fp->type) {				/* boot image */
-	case F68020:
-		fp->type = F68020B;
-		fp->name = "68020 plan 9 boot image";
-		break;
-	case FI386:
-		fp->type = FI386B;
-		fp->txtaddr = (uint32_t)fp->entry;
-		fp->name = "386 plan 9 boot image";
-		fp->dataddr = _round(fp->txtaddr+fp->txtsz, mach->pgsize);
-		break;
-	case FARM:
-		fp->type = FARMB;
-		fp->txtaddr = (uint32_t)fp->entry;
-		fp->name = "ARM plan 9 boot image";
-		fp->dataddr = _round(fp->txtaddr+fp->txtsz, mach->pgsize);
-		return;
-	case FALPHA:
-		fp->type = FALPHAB;
-		fp->txtaddr = (uint32_t)fp->entry;
-		fp->name = "alpha plan 9 boot image";
-		fp->dataddr = fp->txtaddr+fp->txtsz;
-		break;
-	case FPOWER:
-		fp->type = FPOWERB;
-		fp->txtaddr = (uint32_t)fp->entry;
-		fp->name = "power plan 9 boot image";
-		fp->dataddr = fp->txtaddr+fp->txtsz;
-		break;
-	case FAMD64:
-		fp->type = FAMD64B;
-		fp->txtaddr = fp->entry;
-		fp->name = "amd64 plan 9 boot image";
-		fp->dataddr = _round(fp->txtaddr+fp->txtsz, 4096);
-		break;
-	case FPOWER64:
-		fp->type = FPOWER64B;
-		fp->txtaddr = fp->entry;
-		fp->name = "power64 plan 9 boot image";
-		fp->dataddr = fp->txtaddr+fp->txtsz;
-		break;
-	default:
-		return;
-	}
-	fp->hdrsz = 0;			/* header stripped */
-}
-
-/*
- *	_MAGIC() style headers and
- *	alpha plan9-style bootable images for axp "headerless" boot
- *
- */
-static int
-common(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	adotout(fd, fp, hp);
-	if(hp->e.magic & DYN_MAGIC) {
-		fp->txtaddr = 0;
-		fp->dataddr = fp->txtsz;
-		return 1;
-	}
-	commonboot(fp);
-	return 1;
-}
-
-static int
-commonllp64(int i, Fhdr *fp, ExecHdr *hp)
-{
-	int32_t pgsize;
-	uint64_t entry;
-
-	hswal(&hp->e, sizeof(Exec)/sizeof(int32_t), beswal);
-	if(!(hp->e.magic & HDR_MAGIC))
-		return 0;
-
-	/*
-	 * There can be more magic here if the
-	 * header ever needs more expansion.
-	 * For now just catch use of any of the
-	 * unused bits.
-	 */
-	if((hp->e.magic & ~DYN_MAGIC)>>16)
-		return 0;
-	entry = beswav(hp->e.hdr[0]);
-
-	pgsize = mach->pgsize;
-	settext(fp, entry, pgsize+fp->hdrsz, hp->e.text, fp->hdrsz);
-	setdata(fp, _round(pgsize+fp->txtsz+fp->hdrsz, pgsize),
-		hp->e.data, fp->txtsz+fp->hdrsz, hp->e.bss);
-	setsym(fp, hp->e.syms, hp->e.spsz, hp->e.pcsz, fp->datoff+fp->datsz);
-
-	if(hp->e.magic & DYN_MAGIC) {
-		fp->txtaddr = 0;
-		fp->dataddr = fp->txtsz;
-		return 1;
-	}
-	commonboot(fp);
-	return 1;
-}
-
-#ifdef HARVEYMIPS
-/*
- *	mips bootable image.
- */
-static int
-mipsboot(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	USED(fd);
-	fp->type = FMIPSB;
-	switch(hp->e.amagic) {
-	default:
-	case 0407:	/* some kind of mips */
-		settext(fp, (uint32_t)hp->e.mentry,
-			(uint32_t)hp->e.text_start,
-			hp->e.tsize, sizeof(struct mipsexec)+4);
-		setdata(fp, (uint32_t)hp->e.data_start, hp->e.dsize,
-			fp->txtoff+hp->e.tsize, hp->e.bsize);
-		break;
-	case 0413:	/* some kind of mips */
-		settext(fp, (uint32_t)hp->e.mentry,
-			(uint32_t)hp->e.text_start,
-			hp->e.tsize, 0);
-		setdata(fp, (uint32_t)hp->e.data_start, hp->e.dsize,
-			hp->e.tsize, hp->e.bsize);
-		break;
-	}
-	setsym(fp, hp->e.nsyms, 0, hp->e.pcsize, hp->e.symptr);
-	fp->hdrsz = 0;			/* header stripped */
-	return 1;
-}
-
-/*
- *	mips4k bootable image.
- */
-static int
-mips4kboot(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	USED(fd);
-	fp->type = FMIPSB;
-	switch(hp->e.h.amagic) {
-	default:
-	case 0407:	/* some kind of mips */
-		settext(fp, (uint32_t)hp->e.h.mentry,
-			(uint32_t)hp->e.h.text_start,
-			hp->e.h.tsize, sizeof(struct mips4kexec));
-		setdata(fp, (uint32_t)hp->e.h.data_start, hp->e.h.dsize,
-			fp->txtoff+hp->e.h.tsize, hp->e.h.bsize);
-		break;
-	case 0413:	/* some kind of mips */
-		settext(fp, (uint32_t)hp->e.h.mentry,
-			(uint32_t)hp->e.h.text_start,
-			hp->e.h.tsize, 0);
-		setdata(fp, (uint32_t)hp->e.h.data_start, hp->e.h.dsize,
-			hp->e.h.tsize, hp->e.h.bsize);
-		break;
-	}
-	setsym(fp, hp->e.h.nsyms, 0, hp->e.h.pcsize, hp->e.h.symptr);
-	fp->hdrsz = 0;			/* header stripped */
-	return 1;
-}
-#endif
-#ifdef HARVEYSPARC
-/*
- *	sparc bootable image
- */
-static int
-sparcboot(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	USED(fd);
-	fp->type = FSPARCB;
-	settext(fp, hp->e.sentry, hp->e.sentry, hp->e.stext,
-		sizeof(struct sparcexec));
-	setdata(fp, hp->e.sentry+hp->e.stext, hp->e.sdata,
-		fp->txtoff+hp->e.stext, hp->e.sbss);
-	setsym(fp, hp->e.ssyms, 0, hp->e.sdrsize, fp->datoff+hp->e.sdata);
-	fp->hdrsz = 0;			/* header stripped */
-	return 1;
-}
-#endif
-#ifdef HARVEYNEXT
-/*
- *	next bootable image
- */
-static int
-nextboot(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	USED(fd);
-	fp->type = FNEXTB;
-	settext(fp, hp->e.textc.vmaddr, hp->e.textc.vmaddr,
-		hp->e.texts.size, hp->e.texts.offset);
-	setdata(fp, hp->e.datac.vmaddr, hp->e.datas.size,
-		hp->e.datas.offset, hp->e.bsss.size);
-	setsym(fp, hp->e.symc.nsyms, hp->e.symc.spoff, hp->e.symc.pcoff,
-		hp->e.symc.symoff);
-	fp->hdrsz = 0;			/* header stripped */
-	return 1;
-}
-#endif
-
 /*
  * ELF64 binaries.
  */
@@ -671,9 +232,6 @@ elf64dotout(int fd, Fhdr *fp, ExecHdr *hp)
 		fp->name = "amd64 ELF64 executable";
 		break;
 	case POWER64:
-#ifdef HARVEYPPC
-		mach = &mpower64;
-#endif
 		fp->type = FPOWER64;
 		fp->name = "power64 ELF64 executable";
 		break;
@@ -731,156 +289,6 @@ elf64dotout(int fd, Fhdr *fp, ExecHdr *hp)
 	return 1;
 }
 
-#ifdef HARVEY32
-/*
- * ELF32 binaries.
- */
-static int
-elf32dotout(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	uint32_t (*swal)(uint32_t);
-	uint16_t (*swab)(uint16_t);
-	Ehdr *ep;
-	Phdr *ph;
-	int i, it, id, is, phsz;
-
-	/* bitswap the header according to the DATA format */
-	ep = &hp->e;
-	if(ep->ident[DATA] == ELFDATA2LSB) {
-		swab = leswab;
-		swal = leswal;
-	} else if(ep->ident[DATA] == ELFDATA2MSB) {
-		swab = beswab;
-		swal = beswal;
-	} else {
-		werrstr("bad ELF32 encoding - not big or little endian");
-		return 0;
-	}
-
-	ep->type = swab(ep->type);
-	ep->machine = swab(ep->machine);
-	ep->version = swal(ep->version);
-	ep->elfentry = swal(ep->elfentry);
-	ep->phoff = swal(ep->phoff);
-	ep->shoff = swal(ep->shoff);
-	ep->flags = swal(ep->flags);
-	ep->ehsize = swab(ep->ehsize);
-	ep->phentsize = swab(ep->phentsize);
-	ep->phnum = swab(ep->phnum);
-	ep->shentsize = swab(ep->shentsize);
-	ep->shnum = swab(ep->shnum);
-	ep->shstrndx = swab(ep->shstrndx);
-	if(ep->type != EXEC || ep->version != CURRENT)
-		return 0;
-
-	/* we could definitely support a lot more machines here */
-	fp->magic = ELF_MAG;
-	fp->hdrsz = (ep->ehsize+ep->phnum*ep->phentsize+16)&~15;
-	switch(ep->machine) {
-	case I386:
-		mach = &mi386;
-		fp->type = FI386;
-		fp->name = "386 ELF32 executable";
-		break;
-	case MIPS:
-		mach = &mmips;
-		fp->type = FMIPS;
-		fp->name = "mips ELF32 executable";
-		break;
-	case SPARC64:
-		mach = &msparc64;
-		fp->type = FSPARC64;
-		fp->name = "sparc64 ELF32 executable";
-		break;
-	case POWER:
-		mach = &mpower;
-		fp->type = FPOWER;
-		fp->name = "power ELF32 executable";
-		break;
-	case POWER64:
-		mach = &mpower64;
-		fp->type = FPOWER64;
-		fp->name = "power64 ELF32 executable";
-		break;
-	case AMD64:
-		mach = &mamd64;
-		fp->type = FAMD64;
-		fp->name = "amd64 ELF32 executable";
-		break;
-	case ARM:
-		mach = &marm;
-		fp->type = FARM;
-		fp->name = "arm ELF32 executable";
-		break;
-	default:
-		return 0;
-	}
-
-	if(ep->phentsize != sizeof(Phdr)) {
-		werrstr("bad ELF32 header size");
-		return 0;
-	}
-	phsz = sizeof(Phdr)*ep->phnum;
-	ph = malloc(phsz);
-	if(!ph)
-		return 0;
-	seek(fd, ep->phoff, 0);
-	if(read(fd, ph, phsz) < 0) {
-		free(ph);
-		return 0;
-	}
-	hswal(ph, phsz/sizeof(uint32_t), swal);
-
-	/* find text, data and symbols and install them */
-	it = id = is = -1;
-	for(i = 0; i < ep->phnum; i++) {
-		if(ph[i].type == LOAD
-		&& (ph[i].flags & (R|X)) == (R|X) && it == -1)
-			it = i;
-		else if(ph[i].type == LOAD
-		&& (ph[i].flags & (R|W)) == (R|W) && id == -1)
-			id = i;
-		else if(ph[i].type == NOPTYPE && is == -1)
-			is = i;
-	}
-	if(it == -1 || id == -1) {
-		/*
-		 * The SPARC64 boot image is something of an ELF hack.
-		 * Text+Data+BSS are represented by ph[0].  Symbols
-		 * are represented by ph[1]:
-		 *
-		 *		filesz, memsz, vaddr, paddr, off
-		 * ph[0] : txtsz+datsz, txtsz+datsz+bsssz, txtaddr-KZERO, datasize, txtoff
-		 * ph[1] : symsz, lcsz, 0, 0, symoff
-		 */
-		if(ep->machine == SPARC64 && ep->phnum == 2) {
-			uint32_t txtaddr, txtsz, dataddr, bsssz;
-
-			txtaddr = ph[0].vaddr | 0x80000000;
-			txtsz = ph[0].filesz - ph[0].paddr;
-			dataddr = txtaddr + txtsz;
-			bsssz = ph[0].memsz - ph[0].filesz;
-			settext(fp, ep->elfentry | 0x80000000, txtaddr, txtsz, ph[0].offset);
-			setdata(fp, dataddr, ph[0].paddr, ph[0].offset + txtsz, bsssz);
-			setsym(fp, ph[1].filesz, 0, ph[1].memsz, ph[1].offset);
-			free(ph);
-			return 1;
-		}
-
-		werrstr("No ELF32 TEXT or DATA sections");
-		free(ph);
-		return 0;
-	}
-
-	settext(fp, ep->elfentry, ph[it].vaddr, ph[it].memsz, ph[it].offset);
-	setdata(fp, ph[id].vaddr, ph[id].filesz, ph[id].offset, ph[id].memsz - ph[id].filesz);
-	if(is != -1)
-		setsym(fp, ph[is].filesz, 0, ph[is].memsz, ph[is].offset);
-	free(ph);
-	return 1;
-}
-
-#endif
 /*
  * Elf binaries.
  */
@@ -903,29 +311,6 @@ elfdotout(int fd, Fhdr *fp, ExecHdr *hp)
 	return 0;
 }
 
-/*
- * (Free|Net)BSD ARM header.
- */
-static int
-armdotout(int fd, Fhdr *fp, ExecHdr *hp)
-{
-	uint64_t kbase;
-
-	USED(fd);
-	settext(fp, hp->e.entry, sizeof(Exec), hp->e.text, sizeof(Exec));
-	setdata(fp, fp->txtsz, hp->e.data, fp->txtsz, hp->e.bss);
-	setsym(fp, hp->e.syms, hp->e.spsz, hp->e.pcsz, fp->datoff+fp->datsz);
-
-	kbase = 0xF0000000;
-	if ((fp->entry & kbase) == kbase) {		/* Boot image */
-		fp->txtaddr = kbase+sizeof(Exec);
-		fp->name = "ARM *BSD boot image";
-		fp->hdrsz = 0;		/* header stripped */
-		fp->dataddr = kbase+fp->txtsz;
-	}
-	return 1;
-}
-
 static void
 settext(Fhdr *fp, uint64_t e, uint64_t a, int32_t s, int64_t off)
 {
@@ -955,15 +340,3 @@ setsym(Fhdr *fp, int32_t symsz, int32_t sppcsz, int32_t lnpcsz,
 	fp->lnpcsz = lnpcsz;
 	fp->lnpcoff = fp->sppcoff+fp->sppcsz;
 }
-
-
-static uint64_t
-_round(uint64_t a, uint32_t b)
-{
-	uint64_t w;
-
-	w = (a/b)*b;
-	if (a!=w)
-		w += b;
-	return(w);
-}

+ 0 - 129
sys/src/libmach/k.c

@@ -1,129 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYSPARC
-/*
- * sparc definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/sparc/include/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(ulong)(&((struct Ureg *) 0)->x)
-
-#define R1		REGOFF(r1)
-#define R7		REGOFF(r7)
-#define PC		REGOFF(pc)
-#define	R15		REGOFF(r15)
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FP_REG(x)	(REGSIZE+4*(x))
-#define	FPREGSIZE	(33*4)
-
-Reglist sparcreglist[] = {
-	{"Y",		REGOFF(y),	RINT|RRDONLY, 'X'},
-	{"TBR",		REGOFF(tbr),	RINT|RRDONLY, 'X'},
-	{"PSR",		REGOFF(psr),	RINT|RRDONLY, 'X'},
-	{"PC",		REGOFF(pc),	RINT, 'X'},
-	{"R1",		REGOFF(r1),	RINT, 'X'},
-	{"R2",		REGOFF(r2),	RINT, 'X'},
-	{"R3",		REGOFF(r3),	RINT, 'X'},
-	{"R4",		REGOFF(r4),	RINT, 'X'},
-	{"R5",		REGOFF(r5),	RINT, 'X'},
-	{"R6",		REGOFF(r6),	RINT, 'X'},
-	{"R7",		REGOFF(r7),	RINT, 'X'},
-	{"R8",		REGOFF(r8),	RINT, 'X'},
-	{"R9",		REGOFF(r9),	RINT, 'X'},
-	{"R10",		REGOFF(r10),	RINT, 'X'},
-	{"R11",		REGOFF(r11),	RINT, 'X'},
-	{"R12",		REGOFF(r12),	RINT, 'X'},
-	{"R13",		REGOFF(r13),	RINT, 'X'},
-	{"R14",		REGOFF(r14),	RINT, 'X'},
-	{"R15",		REGOFF(r15),	RINT, 'X'},
-	{"R16",		REGOFF(r16),	RINT, 'X'},
-	{"R17",		REGOFF(r17),	RINT, 'X'},
-	{"R18",		REGOFF(r18),	RINT, 'X'},
-	{"R19",		REGOFF(r19),	RINT, 'X'},
-	{"R20",		REGOFF(r20),	RINT, 'X'},
-	{"R21",		REGOFF(r21),	RINT, 'X'},
-	{"R22",		REGOFF(r22),	RINT, 'X'},
-	{"R23",		REGOFF(r23),	RINT, 'X'},
-	{"R24",		REGOFF(r24),	RINT, 'X'},
-	{"R25",		REGOFF(r25),	RINT, 'X'},
-	{"R26",		REGOFF(r26),	RINT, 'X'},
-	{"R27",		REGOFF(r27),	RINT, 'X'},
-	{"R28",		REGOFF(r28),	RINT, 'X'},
-	{"R29",		REGOFF(r29),	RINT, 'X'},
-	{"R30",		REGOFF(r30),	RINT, 'X'},
-	{"R31",		REGOFF(r31),	RINT, 'X'},
-	{"NPC",		REGOFF(npc),	RINT, 'X'},
-
-	{"FSR",		FP_REG(0),	RINT, 'X'},
-	{"F0",		FP_REG(1),	RFLT, 'F'},
-	{"F1",		FP_REG(2),	RFLT, 'f'},
-	{"F2",		FP_REG(3),	RFLT, 'F'},
-	{"F3",		FP_REG(4),	RFLT, 'f'},
-	{"F4",		FP_REG(5),	RFLT, 'F'},
-	{"F5",		FP_REG(6),	RFLT, 'f'},
-	{"F6",		FP_REG(7),	RFLT, 'F'},
-	{"F7",		FP_REG(8),	RFLT, 'f'},
-	{"F8",		FP_REG(9),	RFLT, 'F'},
-	{"F9",		FP_REG(10),	RFLT, 'f'},
-	{"F10",		FP_REG(11),	RFLT, 'F'},
-	{"F11",		FP_REG(12),	RFLT, 'f'},
-	{"F12",		FP_REG(13),	RFLT, 'F'},
-	{"F13",		FP_REG(14),	RFLT, 'f'},
-	{"F14",		FP_REG(15),	RFLT, 'F'},
-	{"F15",		FP_REG(16),	RFLT, 'f'},
-	{"F16",		FP_REG(17),	RFLT, 'F'},
-	{"F17",		FP_REG(18),	RFLT, 'f'},
-	{"F18",		FP_REG(19),	RFLT, 'F'},
-	{"F19",		FP_REG(20),	RFLT, 'f'},
-	{"F20",		FP_REG(21),	RFLT, 'F'},
-	{"F21",		FP_REG(22),	RFLT, 'f'},
-	{"F22",		FP_REG(23),	RFLT, 'F'},
-	{"F23",		FP_REG(24),	RFLT, 'f'},
-	{"F24",		FP_REG(25),	RFLT, 'F'},
-	{"F25",		FP_REG(26),	RFLT, 'f'},
-	{"F26",		FP_REG(27),	RFLT, 'F'},
-	{"F27",		FP_REG(28),	RFLT, 'f'},
-	{"F28",		FP_REG(29),	RFLT, 'F'},
-	{"F29",		FP_REG(30),	RFLT, 'f'},
-	{"F30",		FP_REG(31),	RFLT, 'F'},
-	{"F31",		FP_REG(32),	RFLT, 'f'},
-	{  0 }
-};
-
-/*
- * sparc has same stack format as mips
- */
-Mach msparc =
-{
-	"sparc",
-	MSPARC,		/* machine type */
-	sparcreglist,	/* register list */
-	REGSIZE,	/* register set size in bytes */
-	FPREGSIZE,	/* floating point register size in bytes */
-	"PC",		/* name of PC */
-	"R1",		/* name of SP */
-	"R15",		/* name of link register */
-	"setSB",	/* static base register name */
-	0,		/* value */
-	0x1000,		/* page size */
-	0xE0000000ULL,	/* kernel base */
-	0xE0000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 1060
sys/src/libmach/kdb.c

@@ -1,1060 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-/*
- * Sparc-specific debugger interface
- */
-
-static	char	*sparcexcep(Map*, Rgetter);
-static	int	sparcfoll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	sparcinst(Map*, uint64_t, char, char*, int);
-static	int	sparcdas(Map*, uint64_t, char*, int);
-static	int	sparcinstlen(Map*, uint64_t);
-
-Machdata sparcmach =
-{
-	{0x91, 0xd0, 0x20, 0x01},	/* breakpoint: TA $1 */
-	4,			/* break point size */
-
-	beswab,			/* convert short to local byte order */
-	beswal,			/* convert long to local byte order */
-	beswav,			/* convert vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* frame finder */
-	sparcexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,		/* single precision float printer */
-	beieeedftos,		/* double precision float printer */
-	sparcfoll,		/* following addresses */
-	sparcinst,		/* print instruction */
-	sparcdas,		/* dissembler */
-	sparcinstlen,		/* instruction size */
-};
-
-static char *trapname[] =
-{
-	"reset",
-	"instruction access exception",
-	"illegal instruction",
-	"privileged instruction",
-	"fp disabled",
-	"window overflow",
-	"window underflow",
-	"unaligned address",
-	"fp exception",
-	"data access exception",
-	"tag overflow",
-};
-
-static char*
-excname(uint32_t tbr)
-{
-	static char buf[32];
-
-	if(tbr < sizeof trapname/sizeof(char*))
-		return trapname[tbr];
-	if(tbr >= 130)
-		sprint(buf, "trap instruction %ld", tbr-128);
-	else if(17<=tbr && tbr<=31)
-		sprint(buf, "interrupt level %ld", tbr-16);
-	else switch(tbr){
-	case 36:
-		return "cp disabled";
-	case 40:
-		return "cp exception";
-	case 128:
-		return "syscall";
-	case 129:
-		return "breakpoint";
-	default:
-		sprint(buf, "unknown trap %ld", tbr);
-	}
-	return buf;
-}
-
-static char*
-sparcexcep(Map *map, Rgetter rget)
-{
-	int32_t tbr;
-
-	tbr = (*rget)(map, "TBR");
-	tbr = (tbr&0xFFF)>>4;
-	return excname(tbr);
-}
-
-	/* Sparc disassembler and related functions */
-
-struct opcode {
-	char	*mnemonic;
-	void	(*f)(struct instr*, char*);
-	int	flag;
-};
-
-static	char FRAMENAME[] = ".frame";
-
-typedef struct instr Instr;
-
-struct instr {
-	uint8_t	op;		/* bits 31-30 */
-	uint8_t	rd;		/* bits 29-25 */
-	uint8_t	op2;		/* bits 24-22 */
-	uint8_t	a;		/* bit  29    */
-	uint8_t	cond;		/* bits 28-25 */
-	uint8_t	op3;		/* bits 24-19 */
-	uint8_t	rs1;		/* bits 18-14 */
-	uint8_t	i;		/* bit  13    */
-	uint8_t	asi;		/* bits 12-05 */
-	uint8_t	rs2;		/* bits 04-00 */
-	int16_t	simm13;		/* bits 12-00, signed */
-	uint16_t	opf;		/* bits 13-05 */
-	uint32_t	immdisp22;	/* bits 21-00 */
-	uint32_t	simmdisp22;	/* bits 21-00, signed */
-	uint32_t	disp30;		/* bits 30-00 */
-	uint32_t	imm32;		/* SETHI+ADD constant */
-	int	target;		/* SETHI+ADD dest reg */
-	int32_t	w0;
-	int32_t	w1;
-	uint64_t	addr;		/* pc of instruction */
-	char	*curr;		/* current fill level in output buffer */
-	char	*end;		/* end of buffer */
-	int 	size;		/* number of longs in instr */
-	char	*err;		/* errmsg */
-};
-
-static	Map	*mymap;		/* disassembler context */
-static	int	dascase;
-
-static int	mkinstr(uint64_t, Instr*);
-static void	bra1(Instr*, char*, char*[]);
-static void	bra(Instr*, char*);
-static void	fbra(Instr*, char*);
-static void	cbra(Instr*, char*);
-static void	unimp(Instr*, char*);
-static void	fpop(Instr*, char*);
-static void	shift(Instr*, char*);
-static void	sethi(Instr*, char*);
-static void	load(Instr*, char*);
-static void	loada(Instr*, char*);
-static void	store(Instr*, char*);
-static void	storea(Instr*, char*);
-static void	add(Instr*, char*);
-static void	cmp(Instr*, char*);
-static void	wr(Instr*, char*);
-static void	jmpl(Instr*, char*);
-static void	rd(Instr*, char*);
-static void	loadf(Instr*, char*);
-static void	storef(Instr*, char*);
-static void	loadc(Instr*, char*);
-static void	loadcsr(Instr*, char*);
-static void	trap(Instr*, char*);
-
-static struct opcode sparcop0[8] = {
-	[0]	"UNIMP",	unimp,	0,	/* page 137 */
-	[2]	"B",		bra,	0,	/* page 119 */
-	[4]	"SETHI",	sethi,	0,	/* page 104 */
-	[6]	"FB",		fbra,	0,	/* page 121 */
-	[7]	"CB",		cbra,	0,	/* page 123 */
-};
-
-static struct opcode sparcop2[64] = {
-	[0x00]	"ADD",		add,	0,	/* page 108 */
-	[0x10]	"ADDCC",	add,	0,
-	[0x08]	"ADDX",		add,	0,
-	[0x18]	"ADDXCC",	add,	0,
-
-	[0x20]	"TADD",		add,	0,	/* page 109 */
-	[0x22]	"TADDCCTV",	add,	0,
-
-	[0x04]	"SUB",		add,	0,	/* page 110 */
-	[0x14]	"SUBCC",	cmp,	0,
-	[0x0C]	"SUBX",		add,	0,
-	[0x1C]	"SUBXCC",	add,	0,
-
-	[0x21]	"TSUB",		add,	0,	/* page 111 */
-	[0x23]	"TSUBCCTV",	add,	0,
-
-	[0x24]	"MULSCC",	add,	0,	/* page 112 */
-
-	[0x0A]	"UMUL",		add,	0,	/* page 113 */
-	[0x0B]	"SMUL",		add,	0,
-	[0x1A]	"UMULCC",	add,	0,
-	[0x1B]	"SMULCC",	add,	0,
-
-	[0x0E]	"UDIV",		add,	0,	/* page 115 */
-	[0x0F]	"SDIV",		add,	0,
-	[0x1E]	"UDIVCC",	add,	0,
-	[0x1F]	"SDIVCC",	add,	0,
-
-	[0x01]	"AND",		add,	0,	/* page 106 */
-	[0x11]	"ANDCC",	add,	0,
-	[0x05]	"ANDN",		add,	0,
-	[0x15]	"ANDNCC",	add,	0,
-	[0x02]	"OR",		add,	0,
-	[0x12]	"ORCC",		add,	0,
-	[0x06]	"ORN",		add,	0,
-	[0x16]	"ORNCC",	add,	0,
-	[0x03]	"XOR",		add,	0,
-	[0x13]	"XORCC",	add,	0,
-	[0x07]	"XORN",		add,	0,
-	[0x17]	"XORNCC",	add,	0,
-
-	[0x25]	"SLL",		shift,	0,	/* page 107 */
-	[0x26]	"SRL",		shift,	0,
-	[0x27]	"SRA",		shift,	0,
-
-	[0x3C]	"SAVE",		add,	0,	/* page 117 */
-	[0x3D]	"RESTORE",	add,	0,
-
-	[0x38]	"JMPL",		jmpl,	0,	/* page 126 */
-
-	[0x39]	"RETT",		add,	0,	/* page 127 */
-
-	[0x3A]	"T",		trap,	0,	/* page 129 */
-
-	[0x28]	"rdy",		rd,	0,	/* page 131 */
-	[0x29]	"rdpsr",	rd,	0,
-	[0x2A]	"rdwim",	rd,	0,
-	[0x2B]	"rdtbr",	rd,	0,
-
-	[0x30]	"wry",		wr,	0,	/* page 133 */
-	[0x31]	"wrpsr",	wr,	0,
-	[0x32]	"wrwim",	wr,	0,
-	[0x33]	"wrtbr",	wr,	0,
-
-	[0x3B]	"flush",	add,	0,	/* page 138 */
-
-	[0x34]	"FPOP",		fpop,	0,	/* page 140 */
-	[0x35]	"FPOP",		fpop,	0,
-};
-
-static struct opcode sparcop3[64]={
-	[0x09]	"ldsb",		load,	0,	/* page 90 */
-	[0x19]	"ldsba",	loada,	0,
-	[0x0A]	"ldsh",		load,	0,
-	[0x1A]	"ldsha",	loada,	0,
-	[0x01]	"ldub",		load,	0,
-	[0x11]	"lduba",	loada,	0,
-	[0x02]	"lduh",		load,	0,
-	[0x12]	"lduha",	loada,	0,
-	[0x00]	"ld",		load,	0,
-	[0x10]	"lda",		loada,	0,
-	[0x03]	"ldd",		load,	0,
-	[0x13]	"ldda",		loada,	0,
-
-	[0x20]	"ldf",		loadf,	0,	/* page 92 */
-	[0x23]	"lddf",		loadf,	0,
-	[0x21]	"ldfsr",	loadf,0,
-
-	[0x30]	"ldc",		loadc,	0,	/* page 94 */
-	[0x33]	"lddc",		loadc,	0,
-	[0x31]	"ldcsr",	loadcsr,0,
-
-	[0x05]	"stb",		store,	0,	/* page 95 */
-	[0x15]	"stba",		storea,	0,
-	[0x06]	"sth",		store,	0,
-	[0x16]	"stha",		storea,	0,
-	[0x04]	"st",		store,	0,
-	[0x14]	"sta",		storea,	0,
-	[0x07]	"std",		store,	0,
-	[0x17]	"stda",		storea,	0,
-
-	[0x24]	"stf",		storef,	0,	/* page 97 */
-	[0x27]	"stdf",		storef,	0,
-	[0x25]	"stfsr",	storef,0,
-	[0x26]	"stdfq",	storef,0,
-
-	[0x34]	"stc",		loadc,	0,	/* page 99 */
-	[0x37]	"stdc",		loadc,	0,
-	[0x35]	"stcsr",	loadcsr,0,
-	[0x36]	"stdcq",	loadcsr,0,
-
-	[0x0D]	"ldstub",	store,	0,	/* page 101 */
-	[0x1D]	"ldstuba",	storea,	0,
-
-	[0x0F]	"swap",		load,	0,	/* page 102 */
-	[0x1F]	"swapa",	loada,	0,
-};
-
-#pragma	varargck	argpos	bprint	2
-#pragma	varargck	type	"T"	char*
-
-/* convert to lower case from upper, according to dascase */
-static int
-Tfmt(Fmt *f)
-{
-	char buf[128];
-	char *s, *t, *oa;
-
-	oa = va_arg(f->args, char*);
-	if(dascase){
-		for(s=oa,t=buf; *t = *s; s++,t++)
-			if('A'<=*t && *t<='Z')
-				*t += 'a'-'A';
-		return fmtstrcpy(f, buf);
-	}
-	return fmtstrcpy(f, oa);
-}
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static int
-decode(uint64_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if (get4(mymap, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->op = (w >> 30) & 0x03;
-	i->rd = (w >> 25) & 0x1F;
-	i->op2 = (w >> 22) & 0x07;
-	i->a = (w >> 29) & 0x01;
-	i->cond = (w >> 25) & 0x0F;
-	i->op3 = (w >> 19) & 0x3F;
-	i->rs1 = (w >> 14) & 0x1F;
-	i->i = (w >> 13) & 0x01;
-	i->asi = (w >> 5) & 0xFF;
-	i->rs2 = (w >> 0) & 0x1F;
-	i->simm13 = (w >> 0) & 0x1FFF;
-	if(i->simm13 & (1<<12))
-		i->simm13 |= ~((1<<13)-1);
-	i->opf = (w >> 5) & 0x1FF;
-	i->immdisp22 = (w >> 0) & 0x3FFFFF;
-	i->simmdisp22 = i->immdisp22;
-	if(i->simmdisp22 & (1<<21))
-		i->simmdisp22 |= ~((1<<22)-1);
-	i->disp30 = (w >> 0) & 0x3FFFFFFF;
-	i->w0 = w;
-	i->target = -1;
-	i->addr = pc;
-	i->size = 1;
-	return 1;
-}
-
-static int
-mkinstr(uint64_t pc, Instr *i)
-{
-	Instr xi;
-
-	if (decode(pc, i) < 0)
-		return -1;
-	if(i->op==0 && i->op2==4 && !dascase){	/* SETHI */
-		if (decode(pc+4, &xi) < 0)
-			return -1;
-		if(xi.op==2 && xi.op3==0)		/* ADD */
-		if(xi.i == 1 && xi.rs1 == i->rd){	/* immediate to same reg */
-			i->imm32 = xi.simm13 + (i->immdisp22<<10);
-			i->target = xi.rd;
-			i->w1 = xi.w0;
-			i->size++;
-			return 1;
-		}
-	}
-	if(i->op==2 && i->opf==1 && !dascase){	/* FMOVS */
-		if (decode(pc+4, &xi) < 0)
-			return -1;
-		if(i->op==2 && i->opf==1)		/* FMOVS */
-		if(xi.rd==i->rd+1 && xi.rs2==i->rs2+1){	/* next pair */
-			i->w1 = xi.w0;
-			i->size++;
-		}
-	}
-	return 1;
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr instr;
-	void (*f)(Instr*, char*);
-
-	mymap = map;
-	memset(&instr, 0, sizeof(instr));
-	instr.curr = buf;
-	instr.end = buf+n-1;
-	if (mkinstr(pc, &instr) < 0)
-		return -1;
-	switch(instr.op){
-	case 0:
-		f = sparcop0[instr.op2].f;
-		if(f)
-			(*f)(&instr, sparcop0[instr.op2].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-
-	case 1:
-		bprint(&instr, "%T", "CALL\t");
-		instr.curr += symoff(instr.curr, instr.end-instr.curr,
-					pc+instr.disp30*4, CTEXT);
-		if (!dascase)
-			bprint(&instr, "(SB)");
-		break;
-
-	case 2:
-		f = sparcop2[instr.op3].f;
-		if(f)
-			(*f)(&instr, sparcop2[instr.op3].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-
-	case 3:
-		f = sparcop3[instr.op3].f;
-		if(f)
-			(*f)(&instr, sparcop3[instr.op3].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-	}
-	if (instr.err) {
-		if (instr.curr != buf)
-			bprint(&instr, "\t\t;");
-		bprint(&instr, instr.err);
-	}
-	return instr.size*4;
-}
-
-static int
-sparcinst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	static int fmtinstalled = 0;
-
-		/* a modifier of 'I' toggles the dissassembler type */
-	if (!fmtinstalled) {
-		fmtinstalled = 1;
-		fmtinstall('T', Tfmt);
-	}
-	if ((asstype == ASUNSPARC && modifier == 'i')
-		|| (asstype == ASPARC && modifier == 'I'))
-		dascase = 'a'-'A';
-	else
-		dascase = 0;
-	return printins(map, pc, buf, n);
-}
-
-static int
-sparcdas(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr instr;
-
-	mymap = map;
-	memset(&instr, 0, sizeof(instr));
-	instr.curr = buf;
-	instr.end = buf+n-1;
-	if (mkinstr(pc, &instr) < 0)
-		return -1;
-	if (instr.end-instr.curr > 8)
-		instr.curr = _hexify(instr.curr, instr.w0, 7);
-	if (instr.end-instr.curr > 9 && instr.size == 2) {
-		*instr.curr++ = ' ';
-		instr.curr = _hexify(instr.curr, instr.w1, 7);
-	}
-	*instr.curr = 0;
-	return instr.size*4;
-}
-
-static int
-sparcinstlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	return i.size*4;
-}
-
-static int
-plocal(Instr *i)
-{
-	int offset;
-	Symbol s;
-
-	if (!findsym(i->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s))
-		return -1;
-	if (s.value > i->simm13) {
-		if(getauto(&s, s.value-i->simm13, CAUTO, &s)) {
-			bprint(i, "%s+%lld(SP)", s.name, s.value);
-			return 1;
-		}
-	} else {
-		offset = i->simm13-s.value;
-		if (getauto(&s, offset-4, CPARAM, &s)) {
-			bprint(i, "%s+%d(FP)", s.name, offset);
-			return 1;
-		}
-	}
-	return -1;
-}
-
-static void
-address(Instr *i)
-{
-	Symbol s, s2;
-	uint64_t off, off1;
-
-	if (i->rs1 == 1 && plocal(i) >= 0)
-		return;
-	off = mach->sb+i->simm13;
-	if(i->rs1 == 2	&& findsym(off, CANY, &s)
-			&& s.value-off < 4096
-			&& (s.class == CDATA || s.class == CTEXT)) {
-		if(off==s.value && s.name[0]=='$'){
-			off1 = 0;
-			geta(mymap, s.value, &off1);
-			if(off1 && findsym(off1, CANY, &s2) && s2.value == off1){
-				bprint(i, "$%s(SB)", s2.name);
-				return;
-			}
-		}
-		bprint(i, "%s", s.name);
-		if (s.value != off)
-			bprint(i, "+%llux", s.value-off);
-		bprint(i, "(SB)");
-		return;
-	}
-	bprint(i, "%ux(R%d)", i->simm13, i->rs1);
-}
-
-static void
-unimp(Instr *i, char *m)
-{
-	bprint(i, "%T", m);
-}
-
-static char	*bratab[16] = {	/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X9]	"NE",
-	[0X1]	"E",
-	[0XA]	"G",
-	[0X2]	"LE",
-	[0XB]	"GE",
-	[0X3]	"L",
-	[0XC]	"GU",
-	[0X4]	"LEU",
-	[0XD]	"CC",
-	[0X5]	"CS",
-	[0XE]	"POS",
-	[0X6]	"NEG",
-	[0XF]	"VC",
-	[0X7]	"VS",
-};
-
-static char	*fbratab[16] = {	/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X7]	"U",
-	[0X6]	"G",
-	[0X5]	"UG",
-	[0X4]	"L",
-	[0X3]	"UL",
-	[0X2]	"LG",
-	[0X1]	"NE",
-	[0X9]	"E",
-	[0XA]	"UE",
-	[0XB]	"GE",
-	[0XC]	"UGE",
-	[0XD]	"LE",
-	[0XE]	"ULE",
-	[0XF]	"O",
-};
-
-static char	*cbratab[16] = {	/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X7]	"3",
-	[0X6]	"2",
-	[0X5]	"23",
-	[0X4]	"1",
-	[0X3]	"13",
-	[0X2]	"12",
-	[0X1]	"123",
-	[0X9]	"0",
-	[0XA]	"03",
-	[0XB]	"02",
-	[0XC]	"023",
-	[0XD]	"01",
-	[0XE]	"013",
-	[0XF]	"012",
-};
-
-static void
-bra1(Instr *i, char *m, char *tab[])
-{
-	int32_t imm;
-
-	imm = i->simmdisp22;
-	if(i->a)
-		bprint(i, "%T%T.%c\t", m, tab[i->cond], 'A'+dascase);
-	else
-		bprint(i, "%T%T\t", m, tab[i->cond]);
-	i->curr += symoff(i->curr, i->end-i->curr, i->addr+4*imm, CTEXT);
-	if (!dascase)
-		bprint(i, "(SB)");
-}
-
-static void
-bra(Instr *i, char *m)			/* page 91 */
-{
-	bra1(i, m, bratab);
-}
-
-static void
-fbra(Instr *i, char *m)			/* page 93 */
-{
-	bra1(i, m, fbratab);
-}
-
-static void
-cbra(Instr *i, char *m)			/* page 95 */
-{
-	bra1(i, m, cbratab);
-}
-
-static void
-trap(Instr *i, char *m)			/* page 101 */
-{
-	if(i->i == 0)
-		bprint(i, "%T%T\tR%d+R%d", m, bratab[i->cond], i->rs2, i->rs1);
-	else
-		bprint(i, "%T%T\t$%ux+R%d", m, bratab[i->cond], i->simm13, i->rs1);
-}
-
-static void
-sethi(Instr *i, char *m)		/* page 89 */
-{
-	uint32_t imm;
-
-	imm = i->immdisp22<<10;
-	if(dascase){
-		bprint(i, "%T\t%lux, R%d", m, imm, i->rd);
-		return;
-	}
-	if(imm==0 && i->rd==0){
-		bprint(i, "NOP");
-		return;
-	}
-	if(i->target < 0){
-		bprint(i, "MOVW\t$%lux, R%d", imm, i->rd);
-		return;
-	}
-	bprint(i, "MOVW\t$%lux, R%d", i->imm32, i->target);
-}
-
-static char ldtab[] = {
-	'W',
-	'B',
-	'H',
-	'D',
-};
-
-static char*
-moveinstr(int op3, char *m)
-{
-	char *s;
-	int c;
-	static char buf[8];
-
-	if(!dascase){
-		/* batshit cases */
-		if(op3 == 0xF || op3 == 0x1F)
-			return "SWAP";
-		if(op3 == 0xD || op3 == 0x1D)
-			return "TAS";	/* really LDSTUB */
-		c = ldtab[op3&3];
-		s = "";
-		if((op3&11)==1 || (op3&11)==2)
-			s="U";
-		sprint(buf, "MOV%c%s", c, s);
-		return buf;
-	}
-	return m;
-}
-
-static void
-load(Instr *i, char *m)			/* page 68 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), R%d", m, i->rs1, i->rs2, i->rd);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", R%d", i->rd);
-	}
-}
-
-static void
-loada(Instr *i, char *m)		/* page 68 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d, %d), R%d", m, i->rs1, i->rs2, i->asi, i->rd);
-	else
-		bprint(i, "unknown ld asi %lux", i->w0);
-}
-
-static void
-store(Instr *i, char *m)		/* page 74 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\tR%d, (R%d+R%d)",
-				m, i->rd, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\tR%d, ", m, i->rd);
-		address(i);
-	}
-}
-
-static void
-storea(Instr *i, char *m)		/* page 74 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\tR%d, (R%d+R%d, %d)", m, i->rd, i->rs1, i->rs2, i->asi);
-	else
-		bprint(i, "%s\tR%d, %d(R%d, %d), ???", m, i->rd, i->simm13, i->rs1, i->asi);
-}
-
-static void
-shift(Instr *i, char *m)	/* page 88 */
-{
-	if(i->i == 0){
-		if(i->rs1 == i->rd)
-			if(dascase)
-				bprint(i, "%T\tR%d, R%d", m, i->rs1, i->rs2);
-			else
-				bprint(i, "%T\tR%d, R%d", m, i->rs2, i->rs1);
-		else
-			if(dascase)
-				bprint(i, "%T\tR%d, R%d, R%d", m, i->rs1, i->rs2, i->rd);
-			else
-				bprint(i, "%T\tR%d, R%d, R%d", m, i->rs2, i->rs1, i->rd);
-	}else{
-		if(i->rs1 == i->rd)
-			if(dascase)
-				bprint(i, "%T\t$%d,R%d", m, i->simm13&0x1F, i->rs1);
-			else
-				bprint(i, "%T\tR%d, $%d", m,  i->rs1, i->simm13&0x1F);
-		else
-			if(dascase)
-				bprint(i, "%T\tR%d, $%d, R%d",m,i->rs1,i->simm13&0x1F,i->rd);
-			else
-				bprint(i, "%T\t$%d, R%d, R%d",m,i->simm13&0x1F,i->rs1,i->rd);
-	}
-}
-
-static void
-add(Instr *i, char *m)	/* page 82 */
-{
-	if(i->i == 0){
-		if(dascase)
-			bprint(i, "%T\tR%d, R%d", m, i->rs1, i->rs2);
-		else
-			if(i->op3==2 && i->rs1==0 && i->rd)  /* OR R2, R0, R1 */
-				bprint(i, "MOVW\tR%d", i->rs2);
-			else
-				bprint(i, "%T\tR%d, R%d", m, i->rs2, i->rs1);
-	}else{
-		if(dascase)
-			bprint(i, "%T\tR%d, $%ux", m, i->rs1, i->simm13);
-		else
-			if(i->op3==0 && i->rd && i->rs1==0)	/* ADD $x, R0, R1 */
-				bprint(i, "MOVW\t$%ux", i->simm13);
-			else if(i->op3==0 && i->rd && i->rs1==2){
-				/* ADD $x, R2, R1 -> MOVW $x(SB), R1 */
-				bprint(i, "MOVW\t$");
-				address(i);
-			} else
-				bprint(i, "%T\t$%ux, R%d", m, i->simm13, i->rs1);
-	}
-	if(i->rs1 != i->rd)
-		bprint(i, ", R%d", i->rd);
-}
-
-static void
-cmp(Instr *i, char *m)
-{
-	if(dascase || i->rd){
-		add(i, m);
-		return;
-	}
-	if(i->i == 0)
-		bprint(i, "CMP\tR%d, R%d", i->rs1, i->rs2);
-	else
-		bprint(i, "CMP\tR%d, $%ux", i->rs1, i->simm13);
-}
-
-static char *regtab[4] = {
-	"Y",
-	"PSR",
-	"WIM",
-	"TBR",
-};
-
-static void
-wr(Instr *i, char *m)		/* page 82 */
-{
-	if(dascase){
-		if(i->i == 0)
-			bprint(i, "%s\tR%d, R%d", m, i->rs1, i->rs2);
-		else
-			bprint(i, "%s\tR%d, $%ux", m, i->rs1, i->simm13);
-	}else{
-		if(i->i && i->simm13==0)
-			bprint(i, "MOVW\tR%d", i->rs1);
-		else if(i->i == 0)
-			bprint(i, "wr\tR%d, R%d", i->rs2, i->rs1);
-		else
-			bprint(i, "wr\t$%ux, R%d", i->simm13, i->rs1);
-	}
-	bprint(i, ", %s", regtab[i->op3&3]);
-}
-
-static void
-rd(Instr *i, char *m)		/* page 103 */
-{
-	if(i->rs1==15 && i->rd==0){
-		m = "stbar";
-		if(!dascase)
-			m = "STBAR";
-		bprint(i, "%s", m);
-	}else{
-		if(!dascase)
-			m = "MOVW";
-		bprint(i, "%s\t%s, R%d", m, regtab[i->op3&3], i->rd);
-	}
-}
-
-static void
-jmpl(Instr *i, char *m)		/* page 82 */
-{
-	if(i->i == 0){
-		if(i->rd == 15)
-			bprint(i, "%T\t(R%d+R%d)", "CALL", i->rs2, i->rs1);
-		else
-			bprint(i, "%T\t(R%d+R%d), R%d", m, i->rs2, i->rs1, i->rd);
-	}else{
-		if(!dascase && i->simm13==8 && i->rs1==15 && i->rd==0)
-			bprint(i, "RETURN");
-		else{
-			bprint(i, "%T\t", m);
-			address(i);
-			bprint(i, ", R%d", i->rd);
-		}
-	}
-}
-
-static void
-loadf(Instr *i, char *m)		/* page 70 */
-{
-	if(!dascase){
-		m = "FMOVD";
-		if(i->op3 == 0x20)
-			m = "FMOVF";
-		else if(i->op3 == 0x21)
-			m = "MOVW";
-	}
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d)", m, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-	}
-	if(i->op3 == 0x21)
-		bprint(i, ", FSR");
-	else
-		bprint(i, ", R%d", i->rd);
-}
-
-static void
-storef(Instr *i, char *m)		/* page 70 */
-{
-	if(!dascase){
-		m = "FMOVD";
-		if(i->op3 == 0x25 || i->op3 == 0x26)
-			m = "MOVW";
-		else if(i->op3 == 0x20)
-			m = "FMOVF";
-	}
-	bprint(i, "%s\t", m);
-	if(i->op3 == 0x25)
-		bprint(i, "FSR, ");
-	else if(i->op3 == 0x26)
-		bprint(i, "FQ, ");
-	else
-		bprint(i, "R%d, ", i->rd);
-	if(i->i == 0)
-		bprint(i, "(R%d+R%d)", i->rs1, i->rs2);
-	else
-		address(i);
-}
-
-static void
-loadc(Instr *i, char *m)			/* page 72 */
-{
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), C%d", m, i->rs1, i->rs2, i->rd);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", C%d", i->rd);
-	}
-}
-
-static void
-loadcsr(Instr *i, char *m)			/* page 72 */
-{
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), CSR", m, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", CSR");
-	}
-}
-
-static struct{
-	int	opf;
-	char	*name;
-} fptab1[] = {			/* ignores rs1 */
-	0xC4,	"FITOS",	/* page 109 */
-	0xC8,	"FITOD",
-	0xCC,	"FITOX",
-
-	0xD1,	"FSTOI",	/* page 110 */
-	0xD2,	"FDTOI",
-	0xD3,	"FXTOI",
-
-	0xC9,	"FSTOD",	/* page 111 */
-	0xCD,	"FSTOX",
-	0xC6,	"FDTOS",
-	0xCE,	"FDTOX",
-	0xC7,	"FXTOS",
-	0xCB,	"FXTOD",
-
-	0x01,	"FMOVS",	/* page 112 */
-	0x05,	"FNEGS",
-	0x09,	"FABSS",
-
-	0x29,	"FSQRTS", 	/* page 113 */
-	0x2A,	"FSQRTD",
-	0x2B,	"FSQRTX",
-
-	0,	0,
-};
-
-static struct{
-	int	opf;
-	char	*name;
-} fptab2[] = {			/* uses rs1 */
-
-	0x41,	"FADDS",	/* page 114 */
-	0x42,	"FADDD",
-	0x43,	"FADDX",
-	0x45,	"FSUBS",
-	0x46,	"FSUBD",
-	0x47,	"FSUBX",
-
-	0x49,	"FMULS",	/* page 115 */
-	0x4A,	"FMULD",
-	0x4B,	"FMULX",
-	0x4D,	"FDIVS",
-	0x4E,	"FDIVD",
-	0x4F,	"FDIVX",
-
-	0x51,	"FCMPS",	/* page 116 */
-	0x52,	"FCMPD",
-	0x53,	"FCMPX",
-	0x55,	"FCMPES",
-	0x56,	"FCMPED",
-	0x57,	"FCMPEX",
-
-	0, 0
-};
-
-static void
-fpop(Instr *i, char *m)	/* page 108-116 */
-{
-	int j;
-
-	if(dascase==0 && i->size==2){
-		bprint(i, "FMOVD\tF%d, F%d", i->rs2, i->rd);
-		return;
-	}
-	for(j=0; fptab1[j].name; j++)
-		if(fptab1[j].opf == i->opf){
-			bprint(i, "%T\tF%d, F%d", fptab1[j].name, i->rs2, i->rd);
-			return;
-		}
-	for(j=0; fptab2[j].name; j++)
-		if(fptab2[j].opf == i->opf){
-			bprint(i, "%T\tF%d, F%d, F%d", fptab2[j].name, i->rs1, i->rs2, i->rd);
-			return;
-		}
-	bprint(i, "%T%ux\tF%d, F%d, F%d", m, i->opf, i->rs1, i->rs2, i->rd);
-}
-
-static int
-sparcfoll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	uint32_t w, r1, r2;
-	char buf[8];
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	w = i.w0;
-	switch(w & 0xC1C00000){
-	case 0x00800000:		/* branch on int cond */
-	case 0x01800000:		/* branch on fp cond */
-	case 0x01C00000:		/* branch on copr cond */
-		foll[0] = pc+8;
-		foll[1] = pc + (i.simmdisp22<<2);
-		return 2;
-	}
-
-	if((w&0xC0000000) == 0x40000000){	/* CALL */
-		foll[0] = pc + (i.disp30<<2);
-		return 1;
-	}
-
-	if((w&0xC1F80000) == 0x81C00000){	/* JMPL */
-		sprint(buf, "R%ld", (w>>14)&0xF);
-		r1 = (*rget)(map, buf);
-		if(w & 0x2000)			/* JMPL R1+simm13 */
-			r2 = i.simm13;
-		else{				/* JMPL R1+R2 */
-			sprint(buf, "R%ld", w&0xF);
-			r2 = (*rget)(map, buf);
-		}
-		foll[0] = r1 + r2;
-		return 1;
-	}
-	foll[0] = pc+i.size*4;
-	return 1;
-}

+ 0 - 146
sys/src/libmach/kobj.c

@@ -1,146 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * kobj.c - identify and parse a sparc object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "kc/k.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static	void	skip(Biobuf*, int);
-
-
-int
-_isk(char *s)
-{
-	return  s[0] == ANAME				/* ANAME */
-		&& s[1] == D_FILE			/* type */
-		&& s[2] == 1				/* sym */
-		&& s[3] == '<';				/* name of file */
-}
-
-
-int
-_readk(Biobuf *bp, Prog *p)
-{
-	int as, n;
-	Addr a;
-
-	as = Bgetc(bp);			/* as */
-	if(as < 0)
-		return 0;
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = beswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 5);		/* reg (1 byte); lineno (4 bytes) */
-	a = addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int32_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp, 1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type) {
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_CREG: case D_PREG:
-		break;
-	case D_BRANCH:
-	case D_OREG:
-	case D_ASI:
-	case D_CONST:
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-		if(a.sym!=0 && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 62
sys/src/libmach/mips2ureg.h

@@ -1,62 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-struct Ureg
-{
-	uint32_t	status;
-	long	pc;
-	union
-	{
-		struct
-		{
-			long	sp;	/* r29 */
-			uint32_t	cause;
-		};
-		struct
-		{
-			long	usp;	/* r29 */
-			uint32_t	ucause;
-		};
-	};
-	uint32_t	badvaddr;
-	uint32_t	tlbvirt;
-
-	long	hhi;	long	hi;
-	long	hlo;	long	lo;
-	long	hr31;	long	r31;
-	long	hr30;	long	r30;
-	long	hr28;	long	r28;
-	long	hr27;	long	r27;
-	long	hr26;	long	r26;
-	long	hr25;	long	r25;
-	long	hr24;	long	r24;
-	long	hr23;	long	r23;
-	long	hr22;	long	r22;
-	long	hr21;	long	r21;
-	long	hr20;	long	r20;
-	long	hr19;	long	r19;
-	long	hr18;	long	r18;
-	long	hr17;	long	r17;
-	long	hr16;	long	r16;
-	long	hr15;	long	r15;
-	long	hr14;	long	r14;
-	long	hr13;	long	r13;
-	long	hr12;	long	r12;
-	long	hr11;	long	r11;
-	long	hr10;	long	r10;
-	long	hr9;	long	r9;
-	long	hr8;	long	r8;
-	long	hr7;	long	r7;
-	long	hr6;	long	r6;
-	long	hr5;	long	r5;
-	long	hr4;	long	r4;
-	long	hr3;	long	r3;
-	long	hr2;	long	r2;
-	long	hr1;	long	r1;
-};

+ 0 - 134
sys/src/libmach/q.c

@@ -1,134 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-#ifdef HARVEYNEXT
-/*
- * PowerPC definition
- *	forsyth@terzarima.net
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/power/include/ureg.h"
-#include <mach.h>
-
-
-#define	REGOFF(x)	(ulong) (&((struct Ureg *) 0)->x)
-
-#define SP		REGOFF(sp)
-#define PC		REGOFF(pc)
-#define	R3		REGOFF(r3)	/* return reg */
-#define	LR		REGOFF(lr)
-#define R31		REGOFF(r31)
-#define FP_REG(x)	(R31+4+8*(x))
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FPREGSIZE	(8*33)	
-
-Reglist powerreglist[] = {
-	{"CAUSE",	REGOFF(cause),	RINT|RRDONLY,	'X'},
-	{"SRR1",	REGOFF(srr1),	RINT|RRDONLY,	'X'},
-	{"PC",		REGOFF(pc),	RINT,		'X'},
-	{"LR",		REGOFF(lr),	RINT,		'X'},
-	{"CR",		REGOFF(cr),	RINT,		'X'},
-	{"XER",		REGOFF(xer),	RINT,		'X'},
-	{"CTR",		REGOFF(ctr),	RINT,		'X'},
-	{"PC",		PC,		RINT,		'X'},
-	{"SP",		SP,		RINT,		'X'},
-	{"R0",		REGOFF(r0),	RINT,		'X'},
-	/* R1 is SP */
-	{"R2",		REGOFF(r2),	RINT,		'X'},
-	{"R3",		REGOFF(r3),	RINT,		'X'},
-	{"R4",		REGOFF(r4),	RINT,		'X'},
-	{"R5",		REGOFF(r5),	RINT,		'X'},
-	{"R6",		REGOFF(r6),	RINT,		'X'},
-	{"R7",		REGOFF(r7),	RINT,		'X'},
-	{"R8",		REGOFF(r8),	RINT,		'X'},
-	{"R9",		REGOFF(r9),	RINT,		'X'},
-	{"R10",		REGOFF(r10),	RINT,		'X'},
-	{"R11",		REGOFF(r11),	RINT,		'X'},
-	{"R12",		REGOFF(r12),	RINT,		'X'},
-	{"R13",		REGOFF(r13),	RINT,		'X'},
-	{"R14",		REGOFF(r14),	RINT,		'X'},
-	{"R15",		REGOFF(r15),	RINT,		'X'},
-	{"R16",		REGOFF(r16),	RINT,		'X'},
-	{"R17",		REGOFF(r17),	RINT,		'X'},
-	{"R18",		REGOFF(r18),	RINT,		'X'},
-	{"R19",		REGOFF(r19),	RINT,		'X'},
-	{"R20",		REGOFF(r20),	RINT,		'X'},
-	{"R21",		REGOFF(r21),	RINT,		'X'},
-	{"R22",		REGOFF(r22),	RINT,		'X'},
-	{"R23",		REGOFF(r23),	RINT,		'X'},
-	{"R24",		REGOFF(r24),	RINT,		'X'},
-	{"R25",		REGOFF(r25),	RINT,		'X'},
-	{"R26",		REGOFF(r26),	RINT,		'X'},
-	{"R27",		REGOFF(r27),	RINT,		'X'},
-	{"R28",		REGOFF(r28),	RINT,		'X'},
-	{"R29",		REGOFF(r29),	RINT,		'X'},
-	{"R30",		REGOFF(r30),	RINT,		'X'},
-	{"R31",		REGOFF(r31),	RINT,		'X'},
-	{"F0",		FP_REG(0),	RFLT,		'F'},
-	{"F1",		FP_REG(1),	RFLT,		'F'},
-	{"F2",		FP_REG(2),	RFLT,		'F'},
-	{"F3",		FP_REG(3),	RFLT,		'F'},
-	{"F4",		FP_REG(4),	RFLT,		'F'},
-	{"F5",		FP_REG(5),	RFLT,		'F'},
-	{"F6",		FP_REG(6),	RFLT,		'F'},
-	{"F7",		FP_REG(7),	RFLT,		'F'},
-	{"F8",		FP_REG(8),	RFLT,		'F'},
-	{"F9",		FP_REG(9),	RFLT,		'F'},
-	{"F10",		FP_REG(10),	RFLT,		'F'},
-	{"F11",		FP_REG(11),	RFLT,		'F'},
-	{"F12",		FP_REG(12),	RFLT,		'F'},
-	{"F13",		FP_REG(13),	RFLT,		'F'},
-	{"F14",		FP_REG(14),	RFLT,		'F'},
-	{"F15",		FP_REG(15),	RFLT,		'F'},
-	{"F16",		FP_REG(16),	RFLT,		'F'},
-	{"F17",		FP_REG(17),	RFLT,		'F'},
-	{"F18",		FP_REG(18),	RFLT,		'F'},
-	{"F19",		FP_REG(19),	RFLT,		'F'},
-	{"F20",		FP_REG(20),	RFLT,		'F'},
-	{"F21",		FP_REG(21),	RFLT,		'F'},
-	{"F22",		FP_REG(22),	RFLT,		'F'},
-	{"F23",		FP_REG(23),	RFLT,		'F'},
-	{"F24",		FP_REG(24),	RFLT,		'F'},
-	{"F25",		FP_REG(25),	RFLT,		'F'},
-	{"F26",		FP_REG(26),	RFLT,		'F'},
-	{"F27",		FP_REG(27),	RFLT,		'F'},
-	{"F28",		FP_REG(28),	RFLT,		'F'},
-	{"F29",		FP_REG(29),	RFLT,		'F'},
-	{"F30",		FP_REG(30),	RFLT,		'F'},
-	{"F31",		FP_REG(31),	RFLT,		'F'},
-	{"FPSCR",	FP_REG(32)+4,	RFLT,		'X'},
-	{  0 }
-};
-
-	/* the machine description */
-Mach mpower =
-{
-	"power",
-	MPOWER,		/* machine type */
-	powerreglist,	/* register set */
-	REGSIZE,	/* number of bytes in register set */
-	FPREGSIZE,	/* number of bytes in FP register set */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	"LR",		/* name of link register */
-	"setSB",	/* static base register name */
-	0,		/* value */
-	0x100000,	/* page size */
-	0x80000000ULL,	/* kernel base */
-	0xF0000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 1372
sys/src/libmach/qdb.c

@@ -1,1372 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-/*
- * PowerPC-specific debugger interface,
- * including 64-bit modes
- *	forsyth@terzarima.net
- */
-
-static	char	*powerexcep(Map*, Rgetter);
-static	int	powerfoll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	powerinst(Map*, uint64_t, char, char*, int);
-static	int	powerinstlen(Map*, uint64_t);
-static	int	powerdas(Map*, uint64_t, char*, int);
-
-/*
- *	Machine description
- */
-Machdata powermach =
-{
-	{0x02, 0x8f, 0xff, 0xff},		/* break point */	/* BUG */
-	4,			/* break point size */
-
-	beswab,			/* short to local byte order */
-	beswal,			/* long to local byte order */
-	beswav,			/* vlong to local byte order */
-	risctrace,		/* print C traceback */
-	riscframe,		/* frame finder */
-	powerexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,		/* single precision float printer */
-	beieeedftos,		/* double precisioin float printer */
-	powerfoll,		/* following addresses */
-	powerinst,		/* print instruction */
-	powerdas,		/* dissembler */
-	powerinstlen,		/* instruction size */
-};
-
-static char *excname[] =
-{
-	"reserved 0",
-	"system reset",
-	"machine check",
-	"data access",
-	"instruction access",
-	"external interrupt",
-	"alignment",
-	"program exception",
-	"floating-point unavailable",
-	"decrementer",
-	"i/o controller interface error",
-	"reserved B",
-	"system call",
-	"trace trap",
-	"floating point assist",
-	"reserved",
-	"ITLB miss",
-	"DTLB load miss",
-	"DTLB store miss",
-	"instruction address breakpoint"
-	"SMI interrupt"
-	"reserved 15",
-	"reserved 16",
-	"reserved 17",
-	"reserved 18",
-	"reserved 19",
-	"reserved 1A",
-	/* the following are made up on a program exception */
-	"floating point exception",		/* FPEXC */
-	"illegal instruction",
-	"privileged instruction",
-	"trap",
-	"illegal operation",
-};
-
-static char*
-powerexcep(Map *map, Rgetter rget)
-{
-	int32_t c;
-	static char buf[32];
-
-	c = (*rget)(map, "CAUSE") >> 8;
-	if(c < nelem(excname))
-		return excname[c];
-	sprint(buf, "unknown trap #%lx", c);
-	return buf;
-}
-
-/*
- * disassemble PowerPC opcodes
- */
-
-#define	REGSP	1	/* should come from q.out.h, but there's a clash */
-#define	REGSB	2
-
-static	char FRAMENAME[] = ".frame";
-
-static Map *mymap;
-
-/*
- * ibm conventions for these: bit 0 is top bit
- *	from table 10-1
- */
-typedef struct {
-	uint8_t	aa;		/* bit 30 */
-	uint8_t	crba;		/* bits 11-15 */
-	uint8_t	crbb;		/* bits 16-20 */
-	int32_t	bd;		/* bits 16-29 */
-	uint8_t	crfd;		/* bits 6-8 */
-	uint8_t	crfs;		/* bits 11-13 */
-	uint8_t	bi;		/* bits 11-15 */
-	uint8_t	bo;		/* bits 6-10 */
-	uint8_t	crbd;		/* bits 6-10 */
-	union {
-		int16_t	d;	/* bits 16-31 */
-		int16_t	simm;
-		uint16_t	uimm;
-	};
-	uint8_t	fm;		/* bits 7-14 */
-	uint8_t	fra;		/* bits 11-15 */
-	uint8_t	frb;		/* bits 16-20 */
-	uint8_t	frc;		/* bits 21-25 */
-	uint8_t	frs;		/* bits 6-10 */
-	uint8_t	frd;		/* bits 6-10 */
-	uint8_t	crm;		/* bits 12-19 */
-	int32_t	li;		/* bits 6-29 || b'00' */
-	uint8_t	lk;		/* bit 31 */
-	uint8_t	mb;		/* bits 21-25 */
-	uint8_t	me;		/* bits 26-30 */
-	uint8_t	xmbe;		/* bits 26,21-25: mb[5] || mb[0:4], also xme */
-	uint8_t	xsh;		/* bits 30,16-20: sh[5] || sh[0:4] */
-	uint8_t	nb;		/* bits 16-20 */
-	uint8_t	op;		/* bits 0-5 */
-	uint8_t	oe;		/* bit 21 */
-	uint8_t	ra;		/* bits 11-15 */
-	uint8_t	rb;		/* bits 16-20 */
-	uint8_t	rc;		/* bit 31 */
-	union {
-		uint8_t	rs;	/* bits 6-10 */
-		uint8_t	rd;
-	};
-	uint8_t	sh;		/* bits 16-20 */
-	uint16_t	spr;		/* bits 11-20 */
-	uint8_t	to;		/* bits 6-10 */
-	uint8_t	imm;		/* bits 16-19 */
-	uint16_t	xo;		/* bits 21-30, 22-30, 26-30, or 30 (beware) */
-	uint64_t	imm64;
-	int32_t w0;
-	int32_t w1;
-	uint64_t	addr;		/* pc of instruction */
-	int16_t	target;
-	int16_t	m64;		/* 64-bit mode */
-	char	*curr;		/* current fill level in output buffer */
-	char	*end;		/* end of buffer */
-	int 	size;		/* number of longs in instr */
-	char	*err;		/* errmsg */
-} Instr;
-
-#define	IBF(v,a,b) (((unsigned long)(v)>>(32-(b)-1)) & ~(~0L<<(((b)-(a)+1))))
-#define	IB(v,b) IBF((v),(b),(b))
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static int
-decode(uint64_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if (get4(mymap, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->m64 = asstype == APOWER64;
-	i->aa = IB(w, 30);
-	i->crba = IBF(w, 11, 15);
-	i->crbb = IBF(w, 16, 20);
-	i->bd = IBF(w, 16, 29)<<2;
-	if(i->bd & 0x8000)
-		i->bd |= ~0L<<16;
-	i->crfd = IBF(w, 6, 8);
-	i->crfs = IBF(w, 11, 13);
-	i->bi = IBF(w, 11, 15);
-	i->bo = IBF(w, 6, 10);
-	i->crbd = IBF(w, 6, 10);
-	i->uimm = IBF(w, 16, 31);	/* also d, simm */
-	i->fm = IBF(w, 7, 14);
-	i->fra = IBF(w, 11, 15);
-	i->frb = IBF(w, 16, 20);
-	i->frc = IBF(w, 21, 25);
-	i->frs = IBF(w, 6, 10);
-	i->frd = IBF(w, 6, 10);
-	i->crm = IBF(w, 12, 19);
-	i->li = IBF(w, 6, 29)<<2;
-	if(IB(w, 6))
-		i->li |= ~0<<25;
-	i->lk = IB(w, 31);
-	i->mb = IBF(w, 21, 25);
-	i->me = IBF(w, 26, 30);
-	i->xmbe = (IB(w,26)<<5) | i->mb;
-	i->nb = IBF(w, 16, 20);
-	i->op = IBF(w, 0, 5);
-	i->oe = IB(w, 21);
-	i->ra = IBF(w, 11, 15);
-	i->rb = IBF(w, 16, 20);
-	i->rc = IB(w, 31);
-	i->rs = IBF(w, 6, 10);	/* also rd */
-	i->sh = IBF(w, 16, 20);
-	i->xsh = (IB(w, 30)<<5) | i->sh;
-	i->spr = IBF(w, 11, 20);
-	i->to = IBF(w, 6, 10);
-	i->imm = IBF(w, 16, 19);
-	i->xo = IBF(w, 21, 30);		/* bits 21-30, 22-30, 26-30, or 30 (beware) */
-	if(i->op == 58){	/* class of 64-bit loads */
-		i->xo = i->simm & 3;
-		i->simm &= ~3;
-	}
-	i->imm64 = i->simm;
-	if(i->op == 15)
-		i->imm64 <<= 16;
-	else if(i->op == 25 || i->op == 27 || i->op == 29)
-		i->imm64 = (uint64_t)(i->uimm<<16);
-	i->w0 = w;
-	i->target = -1;
-	i->addr = pc;
-	i->size = 1;
-	return 1;
-}
-
-static int
-mkinstr(uint64_t pc, Instr *i)
-{
-	Instr x;
-
-	if(decode(pc, i) < 0)
-		return -1;
-	/*
-	 * combine ADDIS/ORI (CAU/ORIL) into MOVW
-	 * also ORIS/ORIL for unsigned in 64-bit mode
-	 */
-	if ((i->op == 15 || i->op == 25) && i->ra==0) {
-		if(decode(pc+4, &x) < 0)
-			return -1;
-		if (x.op == 24 && x.rs == x.ra && x.ra == i->rd) {
-			i->imm64 |= (x.imm64 & 0xFFFF);
-			if(i->op != 15)
-				i->imm64 &= 0xFFFFFFFFUL;
-			i->w1 = x.w0;
-			i->target = x.rd;
-			i->size++;
-			return 1;
-		}
-	}
-	return 1;
-}
-
-static int
-plocal(Instr *i)
-{
-	int32_t offset;
-	Symbol s;
-
-	if (!findsym(i->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s))
-		return -1;
-	offset = s.value - i->imm64;
-	if (offset > 0) {
-		if(getauto(&s, offset, CAUTO, &s)) {
-			bprint(i, "%s+%lld(SP)", s.name, s.value);
-			return 1;
-		}
-	} else {
-		if (getauto(&s, -offset-4, CPARAM, &s)) {
-			bprint(i, "%s+%ld(FP)", s.name, -offset);
-			return 1;
-		}
-	}
-	return -1;
-}
-
-static int
-pglobal(Instr *i, uint64_t off, int anyoff, char *reg)
-{
-	Symbol s, s2;
-	uint64_t off1;
-
-	if(findsym(off, CANY, &s) &&
-	   off-s.value < 4096 &&
-	   (s.class == CDATA || s.class == CTEXT)) {
-		if(off==s.value && s.name[0]=='$'){
-			off1 = 0;
-			geta(mymap, s.value, &off1);
-			if(off1 && findsym(off1, CANY, &s2) && s2.value == off1){
-				bprint(i, "$%s%s", s2.name, reg);
-				return 1;
-			}
-		}
-		bprint(i, "%s", s.name);
-		if (s.value != off)
-			bprint(i, "+%llux", off-s.value);
-		bprint(i, reg);
-		return 1;
-	}
-	if(!anyoff)
-		return 0;
-	bprint(i, "%llux%s", off, reg);
-	return 1;
-}
-
-static void
-address(Instr *i)
-{
-	if (i->ra == REGSP && plocal(i) >= 0)
-		return;
-	if (i->ra == REGSB && mach->sb && pglobal(i, mach->sb+i->imm64, 0, "(SB)"))
-		return;
-	if(i->simm < 0)
-		bprint(i, "-%x(R%d)", -i->simm, i->ra);
-	else
-		bprint(i, "%llux(R%d)", i->imm64, i->ra);
-}
-
-static	char	*tcrbits[] = {"LT", "GT", "EQ", "VS"};
-static	char	*fcrbits[] = {"GE", "LE", "NE", "VC"};
-
-typedef struct Opcode Opcode;
-
-struct Opcode {
-	uint8_t	op;
-	uint16_t	xo;
-	uint16_t	xomask;
-	char	*mnemonic;
-	void	(*f)(Opcode *, Instr *);
-	char	*ken;
-	int	flags;
-};
-
-static void format(char *, Instr *, char *);
-
-static void
-branch(Opcode *o, Instr *i)
-{
-	char buf[8];
-	int bo, bi;
-
-	bo = i->bo & ~1;	/* ignore prediction bit */
-	if(bo==4 || bo==12 || bo==20) {	/* simple forms */
-		if(bo != 20) {
-			bi = i->bi&3;
-			sprint(buf, "B%s%%L", bo==12? tcrbits[bi]: fcrbits[bi]);
-			format(buf, i, nil);
-			bprint(i, "\t");
-			if(i->bi > 4)
-				bprint(i, "CR(%d),", i->bi/4);
-		} else
-			format("BR%L\t", i, nil);
-		if(i->op == 16)
-			format(0, i, "%J");
-		else if(i->op == 19 && i->xo == 528)
-			format(0, i, "(CTR)");
-		else if(i->op == 19 && i->xo == 16)
-			format(0, i, "(LR)");
-	} else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-addi(Opcode *o, Instr *i)
-{
-	if (i->op==14 && i->ra == 0)
-		format("MOVW", i, "%i,R%d");
-	else if (i->ra == REGSB) {
-		bprint(i, "MOVW\t$");
-		address(i);
-		bprint(i, ",R%d", i->rd);
-	} else if(i->op==14 && i->simm < 0) {
-		bprint(i, "SUB\t$%d,R%d", -i->simm, i->ra);
-		if(i->rd != i->ra)
-			bprint(i, ",R%d", i->rd);
-	} else if(i->ra == i->rd) {
-		format(o->mnemonic, i, "%i");
-		bprint(i, ",R%d", i->rd);
-	} else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-addis(Opcode *o, Instr *i)
-{
-	int32_t v;
-
-	v = i->imm64;
-	if (i->op==15 && i->ra == 0)
-		bprint(i, "MOVW\t$%lux,R%d", v, i->rd);
-	else if (i->op==15 && i->ra == REGSB) {
-		bprint(i, "MOVW\t$");
-		address(i);
-		bprint(i, ",R%d", i->rd);
-	} else if(i->op==15 && v < 0) {
-		bprint(i, "SUB\t$%ld,R%d", -v, i->ra);
-		if(i->rd != i->ra)
-			bprint(i, ",R%d", i->rd);
-	} else {
-		format(o->mnemonic, i, nil);
-		bprint(i, "\t$%ld,R%d", v, i->ra);
-		if(i->rd != i->ra)
-			bprint(i, ",R%d", i->rd);
-	}
-}
-
-static void
-andi(Opcode *o, Instr *i)
-{
-	if (i->ra == i->rs)
-		format(o->mnemonic, i, "%I,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-gencc(Opcode *o, Instr *i)
-{
-	format(o->mnemonic, i, o->ken);
-}
-
-static void
-gen(Opcode *o, Instr *i)
-{
-	format(o->mnemonic, i, o->ken);
-	if (i->rc)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-ldx(Opcode *o, Instr *i)
-{
-	if(i->ra == 0)
-		format(o->mnemonic, i, "(R%b),R%d");
-	else
-		format(o->mnemonic, i, "(R%b+R%a),R%d");
-	if(i->rc)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-stx(Opcode *o, Instr *i)
-{
-	if(i->ra == 0)
-		format(o->mnemonic, i, "R%d,(R%b)");
-	else
-		format(o->mnemonic, i, "R%d,(R%b+R%a)");
-	if(i->rc && i->xo != 150)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-fldx(Opcode *o, Instr *i)
-{
-	if(i->ra == 0)
-		format(o->mnemonic, i, "(R%b),F%d");
-	else
-		format(o->mnemonic, i, "(R%b+R%a),F%d");
-	if(i->rc)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-fstx(Opcode *o, Instr *i)
-{
-	if(i->ra == 0)
-		format(o->mnemonic, i, "F%d,(R%b)");
-	else
-		format(o->mnemonic, i, "F%d,(R%b+R%a)");
-	if(i->rc)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-dcb(Opcode *o, Instr *i)
-{
-	if(i->ra == 0)
-		format(o->mnemonic, i, "(R%b)");
-	else
-		format(o->mnemonic, i, "(R%b+R%a)");
-	if(i->rd)
-		bprint(i, " [illegal Rd]");
-	if(i->rc)
-		bprint(i, " [illegal Rc]");
-}
-
-static void
-lw(Opcode *o, Instr *i, char r)
-{
-	format(o->mnemonic, i, nil);
-	bprint(i, "\t");
-	address(i);
-	bprint(i, ",%c%d", r, i->rd);
-}
-
-static void
-load(Opcode *o, Instr *i)
-{
-	lw(o, i, 'R');
-}
-
-static void
-fload(Opcode *o, Instr *i)
-{
-	lw(o, i, 'F');
-}
-
-static void
-sw(Opcode *o, Instr *i, char r)
-{
-	int offset;
-	Symbol s;
-
-	if (i->rs == REGSP) {
-		if (findsym(i->addr, CTEXT, &s) && findlocal(&s, FRAMENAME, &s)) {
-			offset = s.value-i->imm64;
-			if (offset > 0 && getauto(&s, offset, CAUTO, &s)) {
-				format(o->mnemonic, i, nil);
-				bprint(i, "\t%c%d,%s-%d(SP)", r, i->rd, s.name, offset);
-				return;
-			}
-		}
-	}
-	if (i->rs == REGSB && mach->sb) {
-		format(o->mnemonic, i, nil);
-		bprint(i, "\t%c%d,", r, i->rd);
-		address(i);
-		return;
-	}
-	if (r == 'F')
-		format(o->mnemonic, i, "F%d,%l");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-store(Opcode *o, Instr *i)
-{
-	sw(o, i, 'R');
-}
-
-static void
-fstore(Opcode *o, Instr *i)
-{
-	sw(o, i, 'F');
-}
-
-static void
-shifti(Opcode *o, Instr *i)
-{
-	if (i->ra == i->rs)
-		format(o->mnemonic, i, "$%k,R%a");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-shift(Opcode *o, Instr *i)
-{
-	if (i->ra == i->rs)
-		format(o->mnemonic, i, "R%b,R%a");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-add(Opcode *o, Instr *i)
-{
-	if (i->rd == i->ra)
-		format(o->mnemonic, i, "R%b,R%d");
-	else if (i->rd == i->rb)
-		format(o->mnemonic, i, "R%a,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-sub(Opcode *o, Instr *i)
-{
-	format(o->mnemonic, i, nil);
-	bprint(i, "\t");
-	if(i->op == 31) {
-		bprint(i, "\tR%d,R%d", i->ra, i->rb);	/* subtract Ra from Rb */
-		if(i->rd != i->rb)
-			bprint(i, ",R%d", i->rd);
-	} else
-		bprint(i, "\tR%d,$%d,R%d", i->ra, i->simm, i->rd);
-}
-
-static void
-qdiv(Opcode *o, Instr *i)
-{
-	format(o->mnemonic, i, nil);
-	if(i->op == 31)
-		bprint(i, "\tR%d,R%d", i->rb, i->ra);
-	else
-		bprint(i, "\t$%d,R%d", i->simm, i->ra);
-	if(i->ra != i->rd)
-		bprint(i, ",R%d", i->rd);
-}
-
-static void
-and(Opcode *o, Instr *i)
-{
-	if (i->op == 31) {
-		/* Rb,Rs,Ra */
-		if (i->ra == i->rs)
-			format(o->mnemonic, i, "R%b,R%a");
-		else if (i->ra == i->rb)
-			format(o->mnemonic, i, "R%s,R%a");
-		else
-			format(o->mnemonic, i, o->ken);
-	} else {
-		/* imm,Rs,Ra */
-		if (i->ra == i->rs)
-			format(o->mnemonic, i, "%I,R%a");
-		else
-			format(o->mnemonic, i, o->ken);
-	}
-}
-
-static void
-or(Opcode *o, Instr *i)
-{
-	if (i->op == 31) {
-		/* Rb,Rs,Ra */
-		if (i->rs == 0 && i->ra == 0 && i->rb == 0)
-			format("NOP", i, nil);
-		else if (i->rs == i->rb)
-			format("MOVW", i, "R%b,R%a");
-		else
-			and(o, i);
-	} else
-		and(o, i);
-}
-
-static void
-shifted(Opcode *o, Instr *i)
-{
-	format(o->mnemonic, i, nil);
-	bprint(i, "\t$%lux,", (uint32_t)i->uimm<<16);
-	if (i->rs == i->ra)
-		bprint(i, "R%d", i->ra);
-	else
-		bprint(i, "R%d,R%d", i->rs, i->ra);
-}
-
-static void
-neg(Opcode *o, Instr *i)
-{
-	if (i->rd == i->ra)
-		format(o->mnemonic, i, "R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static	char	ir2[] = "R%a,R%d";		/* reverse of IBM order */
-static	char	ir3[] = "R%b,R%a,R%d";
-static	char	ir3r[] = "R%a,R%b,R%d";
-static	char	il3[] = "R%b,R%s,R%a";
-static	char	il2u[] = "%I,R%d,R%a";
-static	char	il3s[] = "$%k,R%s,R%a";
-static	char	il2[] = "R%s,R%a";
-static	char	icmp3[] = "R%a,R%b,%D";
-static	char	cr3op[] = "%b,%a,%d";
-static	char	ir2i[] = "%i,R%a,R%d";
-static	char	fp2[] = "F%b,F%d";
-static	char	fp3[] = "F%b,F%a,F%d";
-static	char	fp3c[] = "F%c,F%a,F%d";
-static	char	fp4[] = "F%a,F%c,F%b,F%d";
-static	char	fpcmp[] = "F%a,F%b,%D";
-static	char	ldop[] = "%l,R%d";
-static	char	stop[] = "R%d,%l";
-static	char	fldop[] = "%l,F%d";
-static	char	fstop[] = "F%d,%l";
-static	char	rldc[] = "R%b,R%s,$%E,R%a";
-static	char	rlim[] = "R%b,R%s,$%z,R%a";
-static	char	rlimi[] = "$%k,R%s,$%z,R%a";
-static	char	rldi[] = "$%e,R%s,$%E,R%a";
-
-#define	OEM	IBF(~0,22,30)
-#define	FP4	IBF(~0,26,30)
-#define	ALL	(~0)
-#define	RLDC	0xF
-#define	RLDI	0xE
-/*
-notes:
-	10-26: crfD = rD>>2; rD&3 mbz
-		also, L bit (bit 10) mbz or selects 64-bit operands
-*/
-
-static Opcode opcodes[] = {
-	{31,	266,	OEM,	"ADD%V%C",	add,	ir3},
-	{31,	 10,	OEM,	"ADDC%V%C",	add,	ir3},
-	{31,	138,	OEM,	"ADDE%V%C",	add,	ir3},
-	{14,	0,	0,	"ADD",		addi,	ir2i},
-	{12,	0,	0,	"ADDC",		addi,	ir2i},
-	{13,	0,	0,	"ADDCCC",	addi,	ir2i},
-	{15,	0,	0,	"ADD",		addis,	0},
-	{31,	234,	OEM,	"ADDME%V%C",	gencc,	ir2},
-	{31,	202,	OEM,	"ADDZE%V%C",	gencc,	ir2},
-
-	{31,	28,	ALL,	"AND%C",	and,	il3},
-	{31,	60,	ALL,	"ANDN%C",	and,	il3},
-	{28,	0,	0,	"ANDCC",	andi,	il2u},
-	{29,	0,	0,	"ANDCC",	shifted, 0},
-
-	{18,	0,	0,	"B%L",		gencc,	"%j"},
-	{16,	0,	0,	"BC%L",		branch,	"%d,%a,%J"},
-	{19,	528,	ALL,	"BC%L",		branch,	"%d,%a,(CTR)"},
-	{19,	16,	ALL,	"BC%L",		branch,	"%d,%a,(LR)"},
-
-	{31,	0,	ALL,	"CMP",		0,	icmp3},
-	{11,	0,	0,	"CMP",		0,	"R%a,%i,%D"},
-	{31,	32,	ALL,	"CMPU",		0,	icmp3},
-	{10,	0,	0,	"CMPU",		0,	"R%a,%I,%D"},
-
-	{31,	58,	ALL,	"CNTLZD%C",	gencc,	ir2},	/* 64 */
-	{31,	26,	ALL,	"CNTLZ%W%C",	gencc,	ir2},
-
-	{19,	257,	ALL,	"CRAND",	gen,	cr3op},
-	{19,	129,	ALL,	"CRANDN",	gen,	cr3op},
-	{19,	289,	ALL,	"CREQV",	gen,	cr3op},
-	{19,	225,	ALL,	"CRNAND",	gen,	cr3op},
-	{19,	33,	ALL,	"CRNOR",	gen,	cr3op},
-	{19,	449,	ALL,	"CROR",		gen,	cr3op},
-	{19,	417,	ALL,	"CRORN",	gen,	cr3op},
-	{19,	193,	ALL,	"CRXOR",	gen,	cr3op},
-
-	{31,	86,	ALL,	"DCBF",		dcb,	0},
-	{31,	470,	ALL,	"DCBI",		dcb,	0},
-	{31,	54,	ALL,	"DCBST",	dcb,	0},
-	{31,	278,	ALL,	"DCBT",		dcb,	0},
-	{31,	246,	ALL,	"DCBTST",	dcb,	0},
-	{31,	1014,	ALL,	"DCBZ",		dcb,	0},
-	{31,	454,	ALL,	"DCCCI",	dcb,	0},
-	{31,	966,	ALL,	"ICCCI",	dcb,	0},
-
-	{31,	489,	OEM,	"DIVD%V%C",	qdiv,	ir3},	/* 64 */
-	{31,	457,	OEM,	"DIVDU%V%C",	qdiv,	ir3},	/* 64 */
-	{31,	491,	OEM,	"DIVW%V%C",	qdiv,	ir3},
-	{31,	459,	OEM,	"DIVWU%V%C",	qdiv,	ir3},
-
-	{31,	310,	ALL,	"ECIWX",	ldx,	0},
-	{31,	438,	ALL,	"ECOWX",	stx,	0},
-	{31,	854,	ALL,	"EIEIO",	gen,	0},
-
-	{31,	284,	ALL,	"EQV%C",	gencc,	il3},
-
-	{31,	954,	ALL,	"EXTSB%C",	gencc,	il2},
-	{31,	922,	ALL,	"EXTSH%C",	gencc,	il2},
-	{31,	986,	ALL,	"EXTSW%C",	gencc,	il2},	/* 64 */
-
-	{63,	264,	ALL,	"FABS%C",	gencc,	fp2},
-	{63,	21,	ALL,	"FADD%C",	gencc,	fp3},
-	{59,	21,	ALL,	"FADDS%C",	gencc,	fp3},
-	{63,	32,	ALL,	"FCMPO",	gen,	fpcmp},
-	{63,	0,	ALL,	"FCMPU",	gen,	fpcmp},
-	{63,	846,	ALL,	"FCFID%C",	gencc,	fp2},	/* 64 */
-	{63,	814,	ALL,	"FCTID%C",	gencc,	fp2},	/* 64 */
-	{63,	815,	ALL,	"FCTIDZ%C",	gencc,	fp2},	/* 64 */
-	{63,	14,	ALL,	"FCTIW%C",	gencc,	fp2},
-	{63,	15,	ALL,	"FCTIWZ%C",	gencc,	fp2},
-	{63,	18,	ALL,	"FDIV%C",	gencc,	fp3},
-	{59,	18,	ALL,	"FDIVS%C",	gencc,	fp3},
-	{63,	29,	FP4,	"FMADD%C",	gencc,	fp4},
-	{59,	29,	FP4,	"FMADDS%C",	gencc,	fp4},
-	{63,	72,	ALL,	"FMOVD%C",	gencc,	fp2},
-	{63,	28,	FP4,	"FMSUB%C",	gencc,	fp4},
-	{59,	28,	FP4,	"FMSUBS%C",	gencc,	fp4},
-	{63,	25,	FP4,	"FMUL%C",	gencc,	fp3c},
-	{59,	25,	FP4,	"FMULS%C",	gencc,	fp3c},
-	{63,	136,	ALL,	"FNABS%C",	gencc,	fp2},
-	{63,	40,	ALL,	"FNEG%C",	gencc,	fp2},
-	{63,	31,	FP4,	"FNMADD%C",	gencc,	fp4},
-	{59,	31,	FP4,	"FNMADDS%C",	gencc,	fp4},
-	{63,	30,	FP4,	"FNMSUB%C",	gencc,	fp4},
-	{59,	30,	FP4,	"FNMSUBS%C",	gencc,	fp4},
-	{59,	24,	ALL,	"FRES%C",	gencc,	fp2},	/* optional */
-	{63,	12,	ALL,	"FRSP%C",	gencc,	fp2},
-	{63,	26,	ALL,	"FRSQRTE%C",	gencc,	fp2},	/* optional */
-	{63,	23,	FP4,	"FSEL%CC",	gencc,	fp4},	/* optional */
-	{63,	22,	ALL,	"FSQRT%C",	gencc,	fp2},	/* optional */
-	{59,	22,	ALL,	"FSQRTS%C",	gencc,	fp2},	/* optional */
-	{63,	20,	FP4,	"FSUB%C",	gencc,	fp3},
-	{59,	20,	FP4,	"FSUBS%C",	gencc,	fp3},
-
-	{31,	982,	ALL,	"ICBI",		dcb,	0},	/* optional */
-	{19,	150,	ALL,	"ISYNC",	gen,	0},
-
-	{34,	0,	0,	"MOVBZ",	load,	ldop},
-	{35,	0,	0,	"MOVBZU",	load,	ldop},
-	{31,	119,	ALL,	"MOVBZU",	ldx,	0},
-	{31,	87,	ALL,	"MOVBZ",	ldx,	0},
-	{50,	0,	0,	"FMOVD",	fload,	fldop},
-	{51,	0,	0,	"FMOVDU",	fload,	fldop},
-	{31,	631,	ALL,	"FMOVDU",	fldx,	0},
-	{31,	599,	ALL,	"FMOVD",	fldx,	0},
-	{48,	0,	0,	"FMOVS",	load,	fldop},
-	{49,	0,	0,	"FMOVSU",	load,	fldop},
-	{31,	567,	ALL,	"FMOVSU",	fldx,	0},
-	{31,	535,	ALL,	"FMOVS",	fldx,	0},
-	{42,	0,	0,	"MOVH",		load,	ldop},
-	{43,	0,	0,	"MOVHU",	load,	ldop},
-	{31,	375,	ALL,	"MOVHU",	ldx,	0},
-	{31,	343,	ALL,	"MOVH",		ldx,	0},
-	{31,	790,	ALL,	"MOVHBR",	ldx,	0},
-	{40,	0,	0,	"MOVHZ",	load,	ldop},
-	{41,	0,	0,	"MOVHZU",	load,	ldop},
-	{31,	311,	ALL,	"MOVHZU",	ldx,	0},
-	{31,	279,	ALL,	"MOVHZ",	ldx,	0},
-	{46,	0,	0,	"MOVMW",	load,	ldop},
-	{31,	597,	ALL,	"LSW",		gen,	"(R%a),$%n,R%d"},
-	{31,	533,	ALL,	"LSW",		ldx,	0},
-	{31,	20,	ALL,	"LWAR",		ldx,	0},
-	{31,	84,	ALL,	"LWARD",	ldx,	0},	/* 64 */
-
-	{58,	0,	ALL,	"MOVD",		load,	ldop},	/* 64 */
-	{58,	1,	ALL,	"MOVDU",	load,	ldop},	/* 64 */
-	{31,	53,	ALL,	"MOVDU",	ldx,	0},	/* 64 */
-	{31,	21,	ALL,	"MOVD",		ldx,	0},	/* 64 */
-
-	{31,	534,	ALL,	"MOVWBR",	ldx,	0},
-
-	{58,	2,	ALL,	"MOVW",		load,	ldop},	/* 64 (lwa) */
-	{31,	373,	ALL,	"MOVWU",	ldx,	0},	/* 64 */
-	{31,	341,	ALL,	"MOVW",		ldx,	0},	/* 64 */
-
-	{32,	0,	0,	"MOVW%Z",	load,	ldop},
-	{33,	0,	0,	"MOVW%ZU",	load,	ldop},
-	{31,	55,	ALL,	"MOVW%ZU",	ldx,	0},
-	{31,	23,	ALL,	"MOVW%Z",	ldx,	0},
-
-	{19,	0,	ALL,	"MOVFL",	gen,	"%S,%D"},
-	{63,	64,	ALL,	"MOVCRFS",	gen,	"%S,%D"},
-	{31,	512,	ALL,	"MOVW",		gen,	"XER,%D"},
-	{31,	19,	ALL,	"MOVW",		gen,	"CR,R%d"},
-
-	{63,	583,	ALL,	"MOVW%C",	gen,	"FPSCR, F%d"},	/* mffs */
-	{31,	83,	ALL,	"MOVW",		gen,	"MSR,R%d"},
-	{31,	339,	ALL,	"MOVW",		gen,	"%P,R%d"},
-	{31,	595,	ALL,	"MOVW",		gen,	"SEG(%a),R%d"},
-	{31,	659,	ALL,	"MOVW",		gen,	"SEG(R%b),R%d"},
-	{31,	323,	ALL,	"MOVW",		gen,	"DCR(%Q),R%d"},
-	{31,	451,	ALL,	"MOVW",		gen,	"R%s,DCR(%Q)"},
-	{31,	259,	ALL,	"MOVW",		gen,	"DCR(R%a),R%d"},
-	{31,	387,	ALL,	"MOVW",		gen,	"R%s,DCR(R%a)"},
-	{31,	144,	ALL,	"MOVFL",	gen,	"R%s,%m,CR"},
-	{63,	70,	ALL,	"MTFSB0%C",	gencc,	"%D"},
-	{63,	38,	ALL,	"MTFSB1%C",	gencc,	"%D"},
-	{63,	711,	ALL,	"MOVFL%C",	gencc,	"F%b,%M,FPSCR"},	/* mtfsf */
-	{63,	134,	ALL,	"MOVFL%C",	gencc,	"%K,%D"},
-	{31,	146,	ALL,	"MOVW",		gen,	"R%s,MSR"},
-	{31,	178,	ALL,	"MOVD",		gen,	"R%s,MSR"},
-	{31,	467,	ALL,	"MOVW",		gen,	"R%s,%P"},
-	{31,	210,	ALL,	"MOVW",		gen,	"R%s,SEG(%a)"},
-	{31,	242,	ALL,	"MOVW",		gen,	"R%s,SEG(R%b)"},
-
-	{31,	73,	ALL,	"MULHD%C",	gencc,	ir3},
-	{31,	9,	ALL,	"MULHDU%C",	gencc,	ir3},
-	{31,	233,	OEM,	"MULLD%V%C",	gencc,	ir3},
-
-	{31,	75,	ALL,	"MULHW%C",	gencc,	ir3},
-	{31,	11,	ALL,	"MULHWU%C",	gencc,	ir3},
-	{31,	235,	OEM,	"MULLW%V%C",	gencc,	ir3},
-
-	{7,	0,	0,	"MULLW",	qdiv,	"%i,R%a,R%d"},
-
-	{31,	476,	ALL,	"NAND%C",	gencc,	il3},
-	{31,	104,	OEM,	"NEG%V%C",	neg,	ir2},
-	{31,	124,	ALL,	"NOR%C",	gencc,	il3},
-	{31,	444,	ALL,	"OR%C",		or,	il3},
-	{31,	412,	ALL,	"ORN%C",	or,	il3},
-	{24,	0,	0,	"OR",		and,	"%I,R%d,R%a"},
-	{25,	0,	0,	"OR",		shifted, 0},
-
-	{19,	50,	ALL,	"RFI",		gen,	0},
-	{19,	51,	ALL,	"RFCI",		gen,	0},
-
-	{30,	8,	RLDC,	"RLDCL%C",	gencc,	rldc},	/* 64 */
-	{30,	9,	RLDC,	"RLDCR%C",	gencc,	rldc},	/* 64 */
-	{30,	0,	RLDI,	"RLDCL%C",	gencc,	rldi},	/* 64 */
-	{30,	1<<1, RLDI,	"RLDCR%C",	gencc,	rldi},	/* 64 */
-	{30,	2<<1, RLDI,	"RLDC%C",	gencc,	rldi},	/* 64 */
-	{30,	3<<1, RLDI,	"RLDMI%C",	gencc,	rldi},	/* 64 */
-
-	{20,	0,	0,	"RLWMI%C",	gencc,	rlimi},
-	{21,	0,	0,	"RLWNM%C",	gencc,	rlimi},
-	{23,	0,	0,	"RLWNM%C",	gencc,	rlim},
-
-	{17,	1,	ALL,	"SYSCALL",	gen,	0},
-
-	{31,	27,	ALL,	"SLD%C",	shift,	il3},	/* 64 */
-	{31,	24,	ALL,	"SLW%C",	shift,	il3},
-
-	{31,	794,	ALL,	"SRAD%C",	shift,	il3},	/* 64 */
-	{31,	(413<<1)|0,	ALL,	"SRAD%C",	shifti,	il3s},	/* 64 */
-	{31,	(413<<1)|1,	ALL,	"SRAD%C",	shifti,	il3s},	/* 64 */
-	{31,	792,	ALL,	"SRAW%C",	shift,	il3},
-	{31,	824,	ALL,	"SRAW%C",	shifti,	il3s},
-
-	{31,	539,	ALL,	"SRD%C",	shift,	il3},	/* 64 */
-	{31,	536,	ALL,	"SRW%C",	shift,	il3},
-
-	{38,	0,	0,	"MOVB",		store,	stop},
-	{39,	0,	0,	"MOVBU",	store,	stop},
-	{31,	247,	ALL,	"MOVBU",	stx,	0},
-	{31,	215,	ALL,	"MOVB",		stx,	0},
-	{54,	0,	0,	"FMOVD",	fstore,	fstop},
-	{55,	0,	0,	"FMOVDU",	fstore,	fstop},
-	{31,	759,	ALL,	"FMOVDU",	fstx,	0},
-	{31,	727,	ALL,	"FMOVD",	fstx,	0},
-	{52,	0,	0,	"FMOVS",	fstore,	fstop},
-	{53,	0,	0,	"FMOVSU",	fstore,	fstop},
-	{31,	695,	ALL,	"FMOVSU",	fstx,	0},
-	{31,	663,	ALL,	"FMOVS",	fstx,	0},
-	{44,	0,	0,	"MOVH",		store,	stop},
-	{31,	918,	ALL,	"MOVHBR",	stx,	0},
-	{45,	0,	0,	"MOVHU",	store,	stop},
-	{31,	439,	ALL,	"MOVHU",	stx,	0},
-	{31,	407,	ALL,	"MOVH",		stx,	0},
-	{47,	0,	0,	"MOVMW",	store,	stop},
-	{31,	725,	ALL,	"STSW",		gen,	"R%d,$%n,(R%a)"},
-	{31,	661,	ALL,	"STSW",		stx,	0},
-	{36,	0,	0,	"MOVW",		store,	stop},
-	{31,	662,	ALL,	"MOVWBR",	stx,	0},
-	{31,	150,	ALL,	"STWCCC",	stx,	0},
-	{31,	214,	ALL,	"STDCCC",	stx,	0},	/* 64 */
-	{37,	0,	0,	"MOVWU",	store,	stop},
-	{31,	183,	ALL,	"MOVWU",	stx,	0},
-	{31,	151,	ALL,	"MOVW",		stx,	0},
-
-	{62,	0,	0,	"MOVD%U",	store,	stop},	/* 64 */
-	{31,	149,	ALL,	"MOVD",		stx,	0,},	/* 64 */
-	{31,	181,	ALL,	"MOVDU",	stx,	0},	/* 64 */
-
-	{31,	498,	ALL,	"SLBIA",	gen,	0},	/* 64 */
-	{31,	434,	ALL,	"SLBIE",	gen,	"R%b"},	/* 64 */
-	{31,	466,	ALL,	"SLBIEX",	gen,	"R%b"},	/* 64 */
-	{31,	915,	ALL,	"SLBMFEE",	gen,	"R%b,R%d"},	/* 64 */
-	{31,	851,	ALL,	"SLBMFEV",	gen,	"R%b,R%d"},	/* 64 */
-	{31,	402,	ALL,	"SLBMTE",	gen,	"R%s,R%b"},	/* 64 */
-
-	{31,	40,	OEM,	"SUB%V%C",	sub,	ir3},
-	{31,	8,	OEM,	"SUBC%V%C",	sub,	ir3},
-	{31,	136,	OEM,	"SUBE%V%C",	sub,	ir3},
-	{8,	0,	0,	"SUBC",		gen,	"R%a,%i,R%d"},
-	{31,	232,	OEM,	"SUBME%V%C",	sub,	ir2},
-	{31,	200,	OEM,	"SUBZE%V%C",	sub,	ir2},
-
-	{31,	598,	ALL,	"SYNC",		gen,	0},	/* TO DO: there's a parameter buried in there */
-	{2,	0,	0,	"TD",		gen,	"%d,R%a,%i"},	/* 64 */
-	{31,	370,	ALL,	"TLBIA",	gen,	0},	/* optional */
-	{31,	306,	ALL,	"TLBIE",	gen,	"R%b"},	/* optional */
-	{31,	274,	ALL,	"TLBIEL",	gen,	"R%b"},	/* optional */
-	{31,	1010,	ALL,	"TLBLI",	gen,	"R%b"},	/* optional */
-	{31,	978,	ALL,	"TLBLD",	gen,	"R%b"},	/* optional */
-	{31,	566,	ALL,	"TLBSYNC",	gen,	0},	/* optional */
-	{31,	68,	ALL,	"TD",		gen,	"%d,R%a,R%b"},	/* 64 */
-	{31,	4,	ALL,	"TW",		gen,	"%d,R%a,R%b"},
-	{3,	0,	0,	"TW",		gen,	"%d,R%a,%i"},
-
-	{31,	316,	ALL,	"XOR",		and,	il3},
-	{26,	0,	0,	"XOR",		and,	il2u},
-	{27,	0,	0,	"XOR",		shifted, 0},
-
-	{0},
-};
-
-typedef struct Spr Spr;
-struct Spr {
-	int	n;
-	char	*name;
-};
-
-static	Spr	sprname[] = {
-	{0, "MQ"},
-	{1, "XER"},
-	{268, "TBL"},
-	{269, "TBU"},
-	{8, "LR"},
-	{9, "CTR"},
-	{528, "IBAT0U"},
-	{529, "IBAT0L"},
-	{530, "IBAT1U"},
-	{531, "IBAT1L"},
-	{532, "IBAT2U"},
-	{533, "IBAT2L"},
-	{534, "IBAT3U"},
-	{535, "IBAT3L"},
-	{536, "DBAT0U"},
-	{537, "DBAT0L"},
-	{538, "DBAT1U"},
-	{539, "DBAT1L"},
-	{540, "DBAT2U"},
-	{541, "DBAT2L"},
-	{542, "DBAT3U"},
-	{543, "DBAT3L"},
-	{25, "SDR1"},
-	{19, "DAR"},
-	{272, "SPRG0"},
-	{273, "SPRG1"},
-	{274, "SPRG2"},
-	{275, "SPRG3"},
-	{18, "DSISR"},
-	{26, "SRR0"},
-	{27, "SRR1"},
-	{284, "TBLW"},
-	{285, "TBUW"},	
-	{22, "DEC"},
-	{282, "EAR"},
-	{1008, "HID0"},
-	{1009, "HID1"},
-	{976, "DMISS"},
-	{977, "DCMP"},
-	{978, "HASH1"},
-	{979, "HASH2"},
-	{980, "IMISS"},
-	{981, "ICMP"},
-	{982, "RPA"},
-	{1010, "IABR"},
-	{1013, "DABR"},
-	{0,0},
-};
-
-static int
-shmask(uint64_t *m)
-{
-	int i;
-
-	for(i=0; i<63; i++)
-		if(*m & ((uint64_t)1<<i))
-			break;
-	if(i > 63)
-		return 0;
-	if(*m & ~((uint64_t)1<<i)){	/* more than one bit: do multiples of bytes */
-		i = (i/8)*8;
-		if(i == 0)
-			return 0;
-	}
-	*m >>= i;
-	return i;
-}
-
-static void
-format(char *mnemonic, Instr *i, char *f)
-{
-	int n, s;
-	uint32_t mask;
-	uint64_t vmask;
-
-	if (mnemonic)
-		format(0, i, mnemonic);
-	if (f == 0)
-		return;
-	if (mnemonic)
-		bprint(i, "\t");
-	for ( ; *f; f++) {
-		if (*f != '%') {
-			bprint(i, "%c", *f);
-			continue;
-		}
-		switch (*++f) {
-
-		case 'a':
-			bprint(i, "%d", i->ra);
-			break;
-
-		case 'b':
-			bprint(i, "%d", i->rb);
-			break;
-
-		case 'c':
-			bprint(i, "%d", i->frc);
-			break;
-
-		case 'd':
-		case 's':
-			bprint(i, "%d", i->rd);
-			break;
-
-		case 'C':
-			if(i->rc)
-				bprint(i, "CC");
-			break;
-
-		case 'D':
-			if(i->rd & 3)
-				bprint(i, "CR(INVAL:%d)", i->rd);
-			else if(i->op == 63)
-				bprint(i, "FPSCR(%d)", i->crfd);
-			else
-				bprint(i, "CR(%d)", i->crfd);
-			break;
-
-		case 'e':
-			bprint(i, "%d", i->xsh);
-			break;
-
-		case 'E':
-			switch(IBF(i->w0,27,30)){	/* low bit is top bit of shift in rldiX cases */
-			case 8:	i->mb = i->xmbe; i->me = 63; break;	/* rldcl */
-			case 9:	i->mb = 0; i->me = i->xmbe; break;	/* rldcr */
-			case 4: case 5:
-					i->mb = i->xmbe; i->me = 63-i->xsh; break;	/* rldic */
-			case 0: case 1:
-					i->mb = i->xmbe; i->me = 63; break;	/* rldicl */
-			case 2: case 3:
-					i->mb = 0; i->me = i->xmbe; break;	/* rldicr */
-			case 6: case 7:
-					i->mb = i->xmbe; i->me = 63-i->xsh; break;	/* rldimi */
-			}
-			vmask = (~(uint64_t)0>>i->mb) & (~(uint64_t)0<<(63-i->me));
-			s = shmask(&vmask);
-			if(s)
-				bprint(i, "(%llux<<%d)", vmask, s);
-			else
-				bprint(i, "%llux", vmask);
-			break;
-
-		case 'i':
-			bprint(i, "$%d", i->simm);
-			break;
-
-		case 'I':
-			bprint(i, "$%ux", i->uimm);
-			break;
-
-		case 'j':
-			if(i->aa)
-				pglobal(i, i->li, 1, "(SB)");
-			else
-				pglobal(i, i->addr+i->li, 1, "");
-			break;
-
-		case 'J':
-			if(i->aa)
-				pglobal(i, i->bd, 1, "(SB)");
-			else
-				pglobal(i, i->addr+i->bd, 1, "");
-			break;
-
-		case 'k':
-			bprint(i, "%d", i->sh);
-			break;
-
-		case 'K':
-			bprint(i, "$%x", i->imm);
-			break;
-
-		case 'L':
-			if(i->lk)
-				bprint(i, "L");
-			break;
-
-		case 'l':
-			if(i->simm < 0)
-				bprint(i, "-%x(R%d)", -i->simm, i->ra);
-			else
-				bprint(i, "%x(R%d)", i->simm, i->ra);
-			break;
-
-		case 'm':
-			bprint(i, "%ux", i->crm);
-			break;
-
-		case 'M':
-			bprint(i, "%ux", i->fm);
-			break;
-
-		case 'n':
-			bprint(i, "%d", i->nb==0? 32: i->nb);	/* eg, pg 10-103 */
-			break;
-
-		case 'P':
-			n = ((i->spr&0x1f)<<5)|((i->spr>>5)&0x1f);
-			for(s=0; sprname[s].name; s++)
-				if(sprname[s].n == n)
-					break;
-			if(sprname[s].name) {
-				if(s < 10)
-					bprint(i, sprname[s].name);
-				else
-					bprint(i, "SPR(%s)", sprname[s].name);
-			} else
-				bprint(i, "SPR(%d)", n);
-			break;
-
-		case 'Q':
-			n = ((i->spr&0x1f)<<5)|((i->spr>>5)&0x1f);
-			bprint(i, "%d", n);
-			break;
-
-		case 'S':
-			if(i->ra & 3)
-				bprint(i, "CR(INVAL:%d)", i->ra);
-			else if(i->op == 63)
-				bprint(i, "FPSCR(%d)", i->crfs);
-			else
-				bprint(i, "CR(%d)", i->crfs);
-			break;
-
-		case 'U':
-			if(i->rc)
-				bprint(i, "U");
-			break;
-
-		case 'V':
-			if(i->oe)
-				bprint(i, "V");
-			break;
-
-		case 'w':
-			bprint(i, "[%lux]", i->w0);
-			break;
-
-		case 'W':
-			if(i->m64)
-				bprint(i, "W");
-			break;
-
-		case 'Z':
-			if(i->m64)
-				bprint(i, "Z");
-			break;
-
-		case 'z':
-			if(i->mb <= i->me)
-				mask = ((uint32_t)~0L>>i->mb) & (~0L<<(31-i->me));
-			else
-				mask = ~(((uint32_t)~0L>>(i->me+1)) & (~0L<<(31-(i->mb-1))));
-			bprint(i, "%lux", mask);
-			break;
-
-		case '\0':
-			bprint(i, "%%");
-			return;
-
-		default:
-			bprint(i, "%%%c", *f);
-			break;
-		}
-	}
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-	Opcode *o;
-
-	mymap = map;
-	memset(&i, 0, sizeof(i));
-	i.curr = buf;
-	i.end = buf+n-1;
-	if(mkinstr(pc, &i) < 0)
-		return -1;
-	for(o = opcodes; o->mnemonic != 0; o++)
-		if(i.op == o->op && (i.xo & o->xomask) == o->xo) {
-			if (o->f)
-				(*o->f)(o, &i);
-			else
-				format(o->mnemonic, &i, o->ken);
-			return i.size*4;
-		}
-	bprint(&i, "unknown %lux", i.w0);
-	return i.size*4;
-}
-
-static int
-powerinst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	USED(modifier);
-	return printins(map, pc, buf, n);
-}
-
-static int
-powerdas(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr instr;
-
-	mymap = map;
-	memset(&instr, 0, sizeof(instr));
-	instr.curr = buf;
-	instr.end = buf+n-1;
-	if (mkinstr(pc, &instr) < 0)
-		return -1;
-	if (instr.end-instr.curr > 8)
-		instr.curr = _hexify(instr.curr, instr.w0, 7);
-	if (instr.end-instr.curr > 9 && instr.size == 2) {
-		*instr.curr++ = ' ';
-		instr.curr = _hexify(instr.curr, instr.w1, 7);
-	}
-	*instr.curr = 0;
-	return instr.size*4;
-}
-
-static int
-powerinstlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	return i.size*4;
-}
-
-static int
-powerfoll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	char *reg;
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	foll[0] = pc+4;
-	foll[1] = pc+4;
-	switch(i.op) {
-	default:
-		return 1;
-
-	case 18:	/* branch */
-		foll[0] = i.li;
-		if(!i.aa)
-			foll[0] += pc;
-		break;
-			
-	case 16:	/* conditional branch */
-		foll[0] = i.bd;
-		if(!i.aa)
-			foll[0] += pc;
-		break;
-
-	case 19:	/* conditional branch to register */
-		if(i.xo == 528)
-			reg = "CTR";
-		else if(i.xo == 16)
-			reg = "LR";
-		else
-			return 1;	/* not a branch */
-		foll[0] = (*rget)(map, reg);
-		break;
-	}
-	if(i.lk)
-		return 2;
-	return 1;
-}

+ 0 - 154
sys/src/libmach/qobj.c

@@ -1,154 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * qobj.c - identify and parse a PowerPC object file
- *	forsyth@terzarima.net
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "qc/q.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_isq(char *s)
-{
-	return  (s[0]&0377) == ANAME			/* ANAME */
-		&& (s[1]&0377) == ANAME>>8
-		&& s[2] == D_FILE			/* type */
-		&& s[3] == 1				/* sym */
-		&& s[4] == '<';				/* name of file */
-}
-
-int
-_readq(Biobuf *bp, Prog *p)
-{
-	int as, n, c;
-	Addr a;
-
-	as = Bgetc(bp);			/* as(low) */
-	if(as < 0)
-		return 0;
-	c = Bgetc(bp);		/* as(high) */
-	if(c < 0)
-		return 0;
-	as |= ((c & 0xff) << 8);
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = beswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	n = Bgetc(bp);	/* reg and flag */
-	skip(bp, 4);		/* lineno(4) */
-	a = addr(bp);
-	if(n & 0x40)
-		addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int32_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp,1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type){
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_CREG:
-	case D_FPSCR: case D_MSR: case D_SREG:
-		break;
-	case D_SPR:
-	case D_OREG:
-	case D_DCR:
-	case D_CONST:
-	case D_BRANCH:
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-		if(a.sym && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 108
sys/src/libmach/setmach.c

@@ -37,112 +37,12 @@ extern	Machdata	mipsmach, mipsmachle, sparcmach, m68020mach, i386mach,
  */
 Machtab	machines[] =
 {
-#ifdef FOO
-	{	"68020",			/*68020*/
-		F68020,
-		F68020B,
-		A68020,
-		&m68020,
-		&m68020mach,	},
-	{	"68020",			/*Next 68040 bootable*/
-		F68020,
-		FNEXTB,
-		A68020,
-		&m68020,
-		&m68020mach,	},
-	{	"mips2LE",			/*plan 9 mips2 little endian*/
-		FMIPS2LE,
-		0,
-		AMIPS,
-		&mmips2le,
-		&mipsmach2le, 	},
-	{	"mipsLE",				/*plan 9 mips little endian*/
-		FMIPSLE,
-		0,
-		AMIPS,
-		&mmips,
-		&mipsmachle, 	},
-	{	"mips",				/*plan 9 mips*/
-		FMIPS,
-		FMIPSB,
-		AMIPS,
-		&mmips,
-		&mipsmach, 	},
-	{	"mips2",			/*plan 9 mips2*/
-		FMIPS2BE,
-		FMIPSB,
-		AMIPS,
-		&mmips2be,
-		&mipsmach, 	},		/* shares debuggers with native mips */
-	{	"mipsco",			/*native mips - must follow plan 9*/
-		FMIPS,
-		FMIPSB,
-		AMIPSCO,
-		&mmips,
-		&mipsmach,	},
-	{	"sparc",			/*plan 9 sparc */
-		FSPARC,
-		FSPARCB,
-		ASPARC,
-		&msparc,
-		&sparcmach,	},
-	{	"sunsparc",			/*native sparc - must follow plan 9*/
-		FSPARC,
-		FSPARCB,
-		ASUNSPARC,
-		&msparc,
-		&sparcmach,	},
-	{	"386",				/*plan 9 386*/
-		FI386,
-		FI386B,
-		AI386,
-		&mi386,
-		&i386mach,	},
-	{	"86",				/*8086 - a peach of a machine*/
-		FI386,
-		FI386B,
-		AI8086,
-		&mi386,
-		&i386mach,	},
-#endif
 	{	"amd64",			/*amd64*/
 		FAMD64,
 		FAMD64B,
 		AAMD64,
 		&mamd64,
 		&i386mach,	},
-#ifdef FOO
-	{	"arm",				/*ARM*/
-		FARM,
-		FARMB,
-		AARM,
-		&marm,
-		&armmach,	},
-	{	"power",			/*PowerPC*/
-		FPOWER,
-		FPOWERB,
-		APOWER,
-		&mpower,
-		&powermach,	},
-	{	"power64",			/*PowerPC*/
-		FPOWER64,
-		FPOWER64B,
-		APOWER64,
-		&mpower64,
-		&powermach,	},
-	{	"alpha",			/*Alpha*/
-		FALPHA,
-		FALPHAB,
-		AALPHA,
-		&malpha,
-		&alphamach,	},
-	{	"sparc64",			/*plan 9 sparc64 */
-		FSPARC64,
-		FSPARCB,			/* XXX? */
-		ASPARC64,
-		&msparc64,
-		&sparc64mach,	},
-#endif
 	{	0		},		/*the terminator*/
 };
 
@@ -169,14 +69,6 @@ int
 machbyname(char *name)
 {
 	Machtab *mp;
-#ifdef FOO
-	if (!name) {
-		asstype = AMIPS;
-		machdata = &mipsmach;
-		mach = &mmips;
-		return 1;
-	}
-#endif
 	for (mp = machines; mp->name; mp++){
 		if (strcmp(mp->name, name) == 0) {
 			asstype = mp->asstype;

+ 0 - 129
sys/src/libmach/sparc64.c

@@ -1,129 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * sparc64 definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "sparc64/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(unsigned long)(&((struct Ureg *) 0)->x)
-
-#define R1		REGOFF(r1)
-#define R7		REGOFF(r7)
-#define PC		REGOFF(pc)
-#define	R15		REGOFF(r15)
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FP_REG(x)	(REGSIZE+4*(x))
-#define	FPREGSIZE	(33*4)
-
-Reglist sparc64reglist[] = {
-	{"Y",		REGOFF(y),	RINT|RRDONLY, 'X'},
-	{"TT",		REGOFF(tt),	RINT|RRDONLY, 'X'},
-	{"PSTATE",	REGOFF(pstate),	RINT|RRDONLY, 'X'},
-	{"PC",		REGOFF(pc),	RINT, 'X'},
-	{"SP",		REGOFF(sp),	RINT, 'X'},	/* also R1 */
-	{"R2",		REGOFF(r2),	RINT, 'X'},
-	{"R3",		REGOFF(r3),	RINT, 'X'},
-	{"R4",		REGOFF(r4),	RINT, 'X'},
-	{"R5",		REGOFF(r5),	RINT, 'X'},
-	{"R6",		REGOFF(r6),	RINT, 'X'},
-	{"R7",		REGOFF(r7),	RINT, 'X'},
-	{"R8",		REGOFF(r8),	RINT, 'X'},
-	{"R9",		REGOFF(r9),	RINT, 'X'},
-	{"R10",		REGOFF(r10),	RINT, 'X'},
-	{"R11",		REGOFF(r11),	RINT, 'X'},
-	{"R12",		REGOFF(r12),	RINT, 'X'},
-	{"R13",		REGOFF(r13),	RINT, 'X'},
-	{"R14",		REGOFF(r14),	RINT, 'X'},
-	{"R15",		REGOFF(r15),	RINT, 'X'},
-	{"R16",		REGOFF(r16),	RINT, 'X'},
-	{"R17",		REGOFF(r17),	RINT, 'X'},
-	{"R18",		REGOFF(r18),	RINT, 'X'},
-	{"R19",		REGOFF(r19),	RINT, 'X'},
-	{"R20",		REGOFF(r20),	RINT, 'X'},
-	{"R21",		REGOFF(r21),	RINT, 'X'},
-	{"R22",		REGOFF(r22),	RINT, 'X'},
-	{"R23",		REGOFF(r23),	RINT, 'X'},
-	{"R24",		REGOFF(r24),	RINT, 'X'},
-	{"R25",		REGOFF(r25),	RINT, 'X'},
-	{"R26",		REGOFF(r26),	RINT, 'X'},
-	{"R27",		REGOFF(r27),	RINT, 'X'},
-	{"R28",		REGOFF(r28),	RINT, 'X'},
-	{"R29",		REGOFF(r29),	RINT, 'X'},
-	{"R30",		REGOFF(r30),	RINT, 'X'},
-	{"R31",		REGOFF(r31),	RINT, 'X'},
-	{"NPC",		REGOFF(npc),	RINT, 'X'},
-
-	{"F0",		FP_REG(0),	RFLT, 'F'},
-	{"F1",		FP_REG(1),	RFLT, 'f'},
-	{"F2",		FP_REG(2),	RFLT, 'F'},
-	{"F3",		FP_REG(3),	RFLT, 'f'},
-	{"F4",		FP_REG(4),	RFLT, 'F'},
-	{"F5",		FP_REG(5),	RFLT, 'f'},
-	{"F6",		FP_REG(6),	RFLT, 'F'},
-	{"F7",		FP_REG(7),	RFLT, 'f'},
-	{"F8",		FP_REG(8),	RFLT, 'F'},
-	{"F9",		FP_REG(9),	RFLT, 'f'},
-	{"F10",		FP_REG(10),	RFLT, 'F'},
-	{"F11",		FP_REG(11),	RFLT, 'f'},
-	{"F12",		FP_REG(12),	RFLT, 'F'},
-	{"F13",		FP_REG(13),	RFLT, 'f'},
-	{"F14",		FP_REG(14),	RFLT, 'F'},
-	{"F15",		FP_REG(15),	RFLT, 'f'},
-	{"F16",		FP_REG(16),	RFLT, 'F'},
-	{"F17",		FP_REG(17),	RFLT, 'f'},
-	{"F18",		FP_REG(18),	RFLT, 'F'},
-	{"F19",		FP_REG(19),	RFLT, 'f'},
-	{"F20",		FP_REG(20),	RFLT, 'F'},
-	{"F21",		FP_REG(21),	RFLT, 'f'},
-	{"F22",		FP_REG(22),	RFLT, 'F'},
-	{"F23",		FP_REG(23),	RFLT, 'f'},
-	{"F24",		FP_REG(24),	RFLT, 'F'},
-	{"F25",		FP_REG(25),	RFLT, 'f'},
-	{"F26",		FP_REG(26),	RFLT, 'F'},
-	{"F27",		FP_REG(27),	RFLT, 'f'},
-	{"F28",		FP_REG(28),	RFLT, 'F'},
-	{"F29",		FP_REG(29),	RFLT, 'f'},
-	{"F30",		FP_REG(30),	RFLT, 'F'},
-	{"F31",		FP_REG(31),	RFLT, 'f'},
-	{"FSR",		FP_REG(32),	RINT, 'X'},
-	{"FPRS",	FP_REG(33),	RINT, 'X'},
-	{  0 }
-};
-
-/*
- * sparc64 has same stack format as mips
- */
-Mach msparc64 =
-{
-	"sparc64",
-	MSPARC64,	/* machine type */
-	sparc64reglist,	/* register list */
-	REGSIZE,	/* register set size in bytes */
-	FPREGSIZE,	/* floating point register size in bytes */
-	"PC",		/* name of PC */
-	"R1",		/* name of SP */
-	"R15",		/* name of link register */
-	"setSB",	/* static base register name */
-	0,		/* value */
-	0x2000,		/* page size */
-	0x80000000ULL,	/* kernel base */
-	0x80000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};

+ 0 - 2
sys/src/libmach/sparc64/README

@@ -1,2 +0,0 @@
-Stub data for omitted architectures,
-to make distribution easy to build.

+ 0 - 273
sys/src/libmach/sparc64/u.out.h

@@ -1,273 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#define	NSNAME	8
-#define	NSYM	50
-#define	NREG	32
-#define NOPROF	(1<<0)
-#define DUPOK	(1<<1)
-
-enum
-{
-	REGZERO		= 0,	/* always zero */
-	REGSP		= 1,	/* stack pointer */
-	REGSB		= 2,	/* static pointer */
-	REGSB1		= 3,	/* (possible) second static pointer */
-	REGEXT		= 6,	/* first external register, grows-- */
-	REGRET		= 7,	/* return register and first temp, grows++ */
-	REGTMP		= 14,	/* used by the loader */
-	REGLINK		= 15,	/* subroutine linkage */
-	REGARG		= 7,	/* first arg passed in */
-
-	FREGRET		= 0,
-	FREGEXT		= 22,	/* first external register */
-	FREGZERO	= 24,	/* both float and double */
-	FREGHALF	= 26,	/* double */
-	FREGONE		= 28,	/* double */
-	FREGTWO		= 30	/* double */
-/*
- * GENERAL:
- *
- * compiler allocates R7 up as temps
- * compiler allocates external registers R6 down
- * compiler allocates register variables F4-F22
- * compiler allocates external registers F22 down
- */
-};
-
-enum	as
-{
-	AXXX	= 0,
-	AADD,
-	AADDCC,
-	AADDX,
-	AADDXCC,
-	AAND,
-	AANDCC,
-	AANDN,
-	AANDNCC,
-	ABA,
-	ABCC,
-	ABCS,
-	ABE,
-	ABG,
-	ABGE,
-	ABGU,
-	ABL,
-	ABLE,
-	ABLEU,
-	ABN,
-	ABNE,
-	ABNEG,
-	ABPOS,
-	ABVC,
-	ABVS,
-	ACB0,
-	ACB01,
-	ACB012,
-	ACB013,
-	ACB02,
-	ACB023,
-	ACB03,
-	ACB1,
-	ACB12,
-	ACB123,
-	ACB13,
-	ACB2,
-	ACB23,
-	ACB3,
-	ACBA,
-	ACBN,
-	ACMP,		/* pseudo op */
-	ACPOP1,
-	ACPOP2,
-	ADATA,
-	ADIV,
-	ADIVL,
-	AFABSD,		/* pseudo op */
-	AFABSF,
-	AFABSX,		/* pseudo op */
-	AFADDD,
-	AFADDF,
-	AFADDX,
-	AFBA,
-	AFBE,
-	AFBG,
-	AFBGE,
-	AFBL,
-	AFBLE,
-	AFBLG,
-	AFBN,
-	AFBNE,
-	AFBO,
-	AFBU,
-	AFBUE,
-	AFBUG,
-	AFBUGE,
-	AFBUL,
-	AFBULE,
-	AFCMPD,
-	AFCMPED,
-	AFCMPEF,
-	AFCMPEX,
-	AFCMPF,
-	AFCMPX,
-	AFDIVD,
-	AFDIVF,
-	AFDIVX,
-	AFMOVD,		/* pseudo op */
-	AFMOVDF,
-	AFMOVDW,
-	AFMOVDX,
-	AFMOVF,
-	AFMOVFD,
-	AFMOVFW,
-	AFMOVFX,
-	AFMOVWD,
-	AFMOVWF,
-	AFMOVWX,
-	AFMOVX,		/* pseudo op */
-	AFMOVXD,
-	AFMOVXF,
-	AFMOVXW,
-	AFMULD,
-	AFMULF,
-	AFMULX,
-	AFNEGD,		/* pseudo op */
-	AFNEGF,
-	AFNEGX,		/* pseudo op */
-	AFSQRTD,
-	AFSQRTF,
-	AFSQRTX,
-	AFSUBD,
-	AFSUBF,
-	AFSUBX,
-	AGLOBL,
-	AGOK,
-	AHISTORY,
-	AIFLUSH,
-	AJMPL,
-	AJMP,
-	AMOD,
-	AMODL,
-	AMOVB,
-	AMOVBU,
-	AMOVD,
-	AMOVH,
-	AMOVHU,
-	AMOVW,
-	AMUL,
-	AMULSCC,
-				AXXXdummy,		// to temporarily make ANAME/ASIGNAME different than .k's
-	ANAME,
-	ANOP,
-	AOR,
-	AORCC,
-	AORN,
-	AORNCC,
-	ARESTORE,
-	ARETT,
-	ARETURN,
-	ASAVE,
-	ASLL,
-	ASRA,
-	ASRL,
-	ASUB,
-	ASUBCC,
-	ASUBX,
-	ASUBXCC,
-	ASWAP,
-	ATA,
-	ATADDCC,
-	ATADDCCTV,
-	ATAS,
-	ATCC,
-	ATCS,
-	ATE,
-	ATEXT,
-	ATG,
-	ATGE,
-	ATGU,
-	ATL,
-	ATLE,
-	ATLEU,
-	ATN,
-	ATNE,
-	ATNEG,
-	ATPOS,
-	ATSUBCC,
-	ATSUBCCTV,
-	ATVC,
-	ATVS,
-	AUNIMP,
-	AWORD,
-	AXNOR,
-	AXNORCC,
-	AXOR,
-	AXORCC,
-	AEND,
-	ADYNT,
-	AINIT,
-	ASIGNAME,
-	ALAST
-};
-
-/* type/name */
-enum
-{
-	D_GOK	= 0,
-	D_NONE,
-
-/* name */
-	D_EXTERN,
-	D_STATIC,
-	D_AUTO,
-	D_PARAM,
-
-/* type */
-	D_BRANCH,
-	D_OREG,
-	D_ASI,
-	D_CONST,
-	D_FCONST,
-	D_SCONST,
-	D_REG,
-	D_FREG,
-	D_CREG,
-	D_PREG,
-	D_FILE,
-	D_FILE1,
-
-/* reg names iff type is D_PREG */
-	D_CPQ	= 0,
-	D_CSR,
-	D_FPQ,
-	D_FSR,
-	D_PSR,
-	D_TBR,
-	D_WIM,
-	D_Y
-};
-
-/*
- * this is the ranlib header
- */
-#define	SYMDEF	"__.SYMDEF"
-
-/*
- * this is the simulated IEEE floating point
- */
-typedef	struct	ieee	Ieee;
-struct	ieee
-{
-	long	l;	/* contains ls-man	0xffffffff */
-	long	h;	/* contains sign	0x80000000
-				    exp		0x7ff00000
-				    ms-man	0x000fffff */
-};

+ 0 - 60
sys/src/libmach/sparc64/ureg.h

@@ -1,60 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-
-/*
- * sparc64 registers.
- * Currently just 32-bit registers (also somewhat compatible with
- * the sparc32 ureg).
- */
-struct Ureg
-{
-	uint32_t	r0;			/* unnecessary; just for symmetry */
-	union{
-		uint32_t	sp;		/* r1 */
-		uint32_t	usp;		/* r1 */
-		uint32_t	r1;
-	};
-	uint32_t	r2;
-	uint32_t	r3;
-	uint32_t	r4;
-	uint32_t	r5;
-	uint32_t	r6;
-	uint32_t	r7;
-	uint32_t	r8;
-	uint32_t	r9;
-	uint32_t	r10;
-	uint32_t	r11;
-	uint32_t	r12;
-	uint32_t	r13;
-	uint32_t	r14;
-	uint32_t	r15;
-	uint32_t	r16;
-	uint32_t	r17;
-	uint32_t	r18;
-	uint32_t	r19;
-	uint32_t	r20;
-	uint32_t	r21;
-	uint32_t	r22;
-	uint32_t	r23;
-	uint32_t	r24;
-	uint32_t	r25;
-	uint32_t	r26;
-	uint32_t	r27;
-	uint32_t	r28;
-	uint32_t	r29;
-	uint32_t	r30;
-	uint32_t	r31;
-	uint32_t	y;
-	uint32_t	tt;
-	uint32_t	pstate;
-	uint32_t	npc;
-	uint32_t	pc;
-	uint32_t	pad;	/* so structure is double word aligned */
-};

+ 0 - 1087
sys/src/libmach/sparc64db.c

@@ -1,1087 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-/*
- * Sparc64-specific debugger interface
- */
-
-static	char	*sparc64excep(Map*, Rgetter);
-static	int	sparc64foll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	sparc64inst(Map*, uint64_t, char, char*, int);
-static	int	sparc64das(Map*, uint64_t, char*, int);
-static	int	sparc64instlen(Map*, uint64_t);
-
-Machdata sparc64mach =
-{
-	{0x91, 0xd0, 0x20, 0x01},	/* breakpoint: TA $1 */
-	4,			/* break point size */
-
-	beswab,			/* convert short to local byte order */
-	beswal,			/* convert long to local byte order */
-	beswav,			/* convert vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* frame finder */
-	sparc64excep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,		/* single precision float printer */
-	beieeedftos,		/* double precision float printer */
-	sparc64foll,		/* following addresses */
-	sparc64inst,		/* print instruction */
-	sparc64das,		/* dissembler */
-	sparc64instlen,		/* instruction size */
-};
-
-static char *trapname[] =
-{
-	0,
-	"power on reset",
-	"watchdog reset",
-	"external reset",
-	"software reset",
-	"RED",
-	0, 0,
-	"instruction access exception",
-	"instruction access MMU miss",
-	"instruction access error",
-	0, 0, 0, 0, 0,
-	"illegal instruction",
-	"privileged opcode",
-	"unimplemented LDD",
-	"unimplemented STD",
-	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	"fp disabled",
-	"fp exception ieee 754",
-	"fp exception other",
-	0, 0, 0, 0,
-	"division by zero",
-	"internal processor error",
-	0, 0, 0, 0, 0, 0,
-	"data access exception",
-	"data access MMU miss",
-	"data access error",
-	"data access protection",
-	"mem address not aligned",
-	"LDDF mem address not aligned",
-	"STDF mem address not aligned",
-	"privileged action",
-	"LDQF mem address nto aligned",
-	"STQF mem address not aligned",
-};
-
-static char*
-excname(uint32_t tt)
-{
-	static char buf[32];
-
-	if(tt < sizeof trapname/sizeof(char*) && trapname[tt])
-		return trapname[tt];
-	if(tt >= 258)
-		sprint(buf, "trap instruction %ld", tt-128);
-	else if(65<=tt && tt<=79)
-		sprint(buf, "interrupt level %ld", tt-64);
-	else switch(tt){
-	case 64:
-		return "async data error";
-	case 96:
-		return "mondo interrupt";
-	case 100:
-		return "instruction access MMU miss";
-	case 104:
-		return "data access MMU miss";
-	case 108:
-		return "data access protection";
-	case 256:
-		return "syscall";
-	case 257:
-		return "breakpoint";
-	default:
-		sprint(buf, "unknown trap %ld", tt);
-	}
-	return buf;
-}
-
-static char*
-sparc64excep(Map *map, Rgetter rget)
-{
-	int32_t tt;
-
-	tt = (*rget)(map, "TT");
-	return excname(tt);
-}
-
-	/* Sparc disassembler and related functions */
-
-struct opcode {
-	char	*mnemonic;
-	void	(*f)(struct instr*, char*);
-	int	flag;
-};
-
-static	char FRAMENAME[] = ".frame";
-
-typedef struct instr Instr;
-
-struct instr {
-	uint8_t	op;		/* bits 31-30 */
-	uint8_t	rd;		/* bits 29-25 */
-	uint8_t	op2;		/* bits 24-22 */
-	uint8_t	a;		/* bit  29    */
-	uint8_t	cond;		/* bits 28-25 */
-	uint8_t	op3;		/* bits 24-19 */
-	uint8_t	rs1;		/* bits 18-14 */
-	uint8_t	i;		/* bit  13    */
-	uint8_t	asi;		/* bits 12-05 */
-	uint8_t	rs2;		/* bits 04-00 */
-	int16_t	simm13;		/* bits 12-00, signed */
-	uint16_t	opf;		/* bits 13-05 */
-	uint32_t	immdisp22;	/* bits 21-00 */
-	uint32_t	simmdisp22;	/* bits 21-00, signed */
-	uint32_t	disp30;		/* bits 30-00 */
-	uint32_t	imm32;		/* SETHI+ADD constant */
-	int	target;		/* SETHI+ADD dest reg */
-	int32_t	w0;
-	int32_t	w1;
-	uint64_t	addr;		/* pc of instruction */
-	char	*curr;		/* current fill level in output buffer */
-	char	*end;		/* end of buffer */
-	int 	size;		/* number of longs in instr */
-	char	*err;		/* errmsg */
-};
-
-static	Map	*mymap;		/* disassembler context */
-static	int	dascase;
-
-static int	mkinstr(uint64_t, Instr*);
-static void	bra1(Instr*, char*, char*[]);
-static void	bra(Instr*, char*);
-static void	fbra(Instr*, char*);
-static void	cbra(Instr*, char*);
-static void	unimp(Instr*, char*);
-static void	fpop(Instr*, char*);
-static void	shift(Instr*, char*);
-static void	sethi(Instr*, char*);
-static void	load(Instr*, char*);
-static void	loada(Instr*, char*);
-static void	store(Instr*, char*);
-static void	storea(Instr*, char*);
-static void	add(Instr*, char*);
-static void	cmp(Instr*, char*);
-static void	wr(Instr*, char*);
-static void	jmpl(Instr*, char*);
-static void	rd(Instr*, char*);
-static void	loadf(Instr*, char*);
-static void	storef(Instr*, char*);
-static void	loadc(Instr*, char*);
-static void	loadcsr(Instr*, char*);
-static void	trap(Instr*, char*);
-
-static struct opcode sparc64op0[8] = {
-	[0]	"UNIMP",	unimp,	0,	/* page 137 */
-	[2]	"B",		bra,	0,	/* page 119 */
-	[4]	"SETHI",	sethi,	0,	/* page 104 */
-	[6]	"FB",		fbra,	0,	/* page 121 */
-	[7]	"CB",		cbra,	0,	/* page 123 */
-};
-
-static struct opcode sparc64op2[64] = {
-	[0x00]	"ADD",		add,	0,	/* page 108 */
-	[0x10]	"ADDCC",	add,	0,
-	[0x08]	"ADDX",		add,	0,
-	[0x18]	"ADDXCC",	add,	0,
-
-	[0x20]	"TADD",		add,	0,	/* page 109 */
-	[0x22]	"TADDCCTV",	add,	0,
-
-	[0x04]	"SUB",		add,	0,	/* page 110 */
-	[0x14]	"SUBCC",	cmp,	0,
-	[0x0C]	"SUBX",		add,	0,
-	[0x1C]	"SUBXCC",	add,	0,
-
-	[0x21]	"TSUB",		add,	0,	/* page 111 */
-	[0x23]	"TSUBCCTV",	add,	0,
-
-	[0x24]	"MULSCC",	add,	0,	/* page 112 */
-
-	[0x0A]	"UMUL",		add,	0,	/* page 113 */
-	[0x0B]	"SMUL",		add,	0,
-	[0x1A]	"UMULCC",	add,	0,
-	[0x1B]	"SMULCC",	add,	0,
-
-	[0x0E]	"UDIV",		add,	0,	/* page 115 */
-	[0x0F]	"SDIV",		add,	0,
-	[0x1E]	"UDIVCC",	add,	0,
-	[0x1F]	"SDIVCC",	add,	0,
-
-	[0x01]	"AND",		add,	0,	/* page 106 */
-	[0x11]	"ANDCC",	add,	0,
-	[0x05]	"ANDN",		add,	0,
-	[0x15]	"ANDNCC",	add,	0,
-	[0x02]	"OR",		add,	0,
-	[0x12]	"ORCC",		add,	0,
-	[0x06]	"ORN",		add,	0,
-	[0x16]	"ORNCC",	add,	0,
-	[0x03]	"XOR",		add,	0,
-	[0x13]	"XORCC",	add,	0,
-	[0x07]	"XORN",		add,	0,
-	[0x17]	"XORNCC",	add,	0,
-
-	[0x25]	"SLL",		shift,	0,	/* page 107 */
-	[0x26]	"SRL",		shift,	0,
-	[0x27]	"SRA",		shift,	0,
-
-	[0x3C]	"SAVE",		add,	0,	/* page 117 */
-	[0x3D]	"RESTORE",	add,	0,
-
-	[0x38]	"JMPL",		jmpl,	0,	/* page 126 */
-
-	[0x39]	"RETT",		add,	0,	/* page 127 */
-
-	[0x3A]	"T",		trap,	0,	/* page 129 */
-
-	[0x28]	"rdy",		rd,	0,	/* page 131 */
-	[0x29]	"rdpsr",	rd,	0,
-	[0x2A]	"rdwim",	rd,	0,
-	[0x2B]	"rdtbr",	rd,	0,
-
-	[0x30]	"wry",		wr,	0,	/* page 133 */
-	[0x31]	"wrpsr",	wr,	0,
-	[0x32]	"wrwim",	wr,	0,
-	[0x33]	"wrtbr",	wr,	0,
-
-	[0x3B]	"flush",	add,	0,	/* page 138 */
-
-	[0x34]	"FPOP",		fpop,	0,	/* page 140 */
-	[0x35]	"FPOP",		fpop,	0,
-};
-
-static struct opcode sparc64op3[64]={
-	[0x09]	"ldsb",		load,	0,	/* page 90 */
-	[0x19]	"ldsba",	loada,	0,
-	[0x0A]	"ldsh",		load,	0,
-	[0x1A]	"ldsha",	loada,	0,
-	[0x01]	"ldub",		load,	0,
-	[0x11]	"lduba",	loada,	0,
-	[0x02]	"lduh",		load,	0,
-	[0x12]	"lduha",	loada,	0,
-	[0x00]	"ld",		load,	0,
-	[0x10]	"lda",		loada,	0,
-	[0x03]	"ldd",		load,	0,
-	[0x13]	"ldda",		loada,	0,
-
-	[0x20]	"ldf",		loadf,	0,	/* page 92 */
-	[0x23]	"lddf",		loadf,	0,
-	[0x21]	"ldfsr",	loadf,0,
-
-	[0x30]	"ldc",		loadc,	0,	/* page 94 */
-	[0x33]	"lddc",		loadc,	0,
-	[0x31]	"ldcsr",	loadcsr,0,
-
-	[0x05]	"stb",		store,	0,	/* page 95 */
-	[0x15]	"stba",		storea,	0,
-	[0x06]	"sth",		store,	0,
-	[0x16]	"stha",		storea,	0,
-	[0x04]	"st",		store,	0,
-	[0x14]	"sta",		storea,	0,
-	[0x07]	"std",		store,	0,
-	[0x17]	"stda",		storea,	0,
-
-	[0x24]	"stf",		storef,	0,	/* page 97 */
-	[0x27]	"stdf",		storef,	0,
-	[0x25]	"stfsr",	storef,0,
-	[0x26]	"stdfq",	storef,0,
-
-	[0x34]	"stc",		loadc,	0,	/* page 99 */
-	[0x37]	"stdc",		loadc,	0,
-	[0x35]	"stcsr",	loadcsr,0,
-	[0x36]	"stdcq",	loadcsr,0,
-
-	[0x0D]	"ldstub",	store,	0,	/* page 101 */
-	[0x1D]	"ldstuba",	storea,	0,
-
-	[0x0F]	"swap",		load,	0,	/* page 102 */
-	[0x1F]	"swapa",	loada,	0,
-};
-
-#pragma	varargck	argpos	bprint	2
-#pragma	varargck	type	"T"	char*
-
-/* convert to lower case from upper, according to dascase */
-static int
-Tfmt(Fmt *f)
-{
-	char buf[128];
-	char *s, *t, *oa;
-
-	oa = va_arg(f->args, char*);
-	if(dascase){
-		for(s=oa,t=buf; *t = *s; s++,t++)
-			if('A'<=*t && *t<='Z')
-				*t += 'a'-'A';
-		return fmtstrcpy(f, buf);
-	}
-	return fmtstrcpy(f, oa);
-}
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static int
-decode(uint32_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if (get4(mymap, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->op = (w >> 30) & 0x03;
-	i->rd = (w >> 25) & 0x1F;
-	i->op2 = (w >> 22) & 0x07;
-	i->a = (w >> 29) & 0x01;
-	i->cond = (w >> 25) & 0x0F;
-	i->op3 = (w >> 19) & 0x3F;
-	i->rs1 = (w >> 14) & 0x1F;
-	i->i = (w >> 13) & 0x01;
-	i->asi = (w >> 5) & 0xFF;
-	i->rs2 = (w >> 0) & 0x1F;
-	i->simm13 = (w >> 0) & 0x1FFF;
-	if(i->simm13 & (1<<12))
-		i->simm13 |= ~((1<<13)-1);
-	i->opf = (w >> 5) & 0x1FF;
-	i->immdisp22 = (w >> 0) & 0x3FFFFF;
-	i->simmdisp22 = i->immdisp22;
-	if(i->simmdisp22 & (1<<21))
-		i->simmdisp22 |= ~((1<<22)-1);
-	i->disp30 = (w >> 0) & 0x3FFFFFFF;
-	i->w0 = w;
-	i->target = -1;
-	i->addr = pc;
-	i->size = 1;
-	return 1;
-}
-
-static int
-mkinstr(uint64_t pc, Instr *i)
-{
-	Instr xi;
-
-	if (decode(pc, i) < 0)
-		return -1;
-	if(i->op==0 && i->op2==4 && !dascase){	/* SETHI */
-		if (decode(pc+4, &xi) < 0)
-			return -1;
-		if(xi.op==2 && xi.op3==0)		/* ADD */
-		if(xi.i == 1 && xi.rs1 == i->rd){	/* immediate to same reg */
-			i->imm32 = xi.simm13 + (i->immdisp22<<10);
-			i->target = xi.rd;
-			i->w1 = xi.w0;
-			i->size++;
-			return 1;
-		}
-	}
-	if(i->op==2 && i->opf==1 && !dascase){	/* FMOVS */
-		if (decode(pc+4, &xi) < 0)
-			return -1;
-		if(i->op==2 && i->opf==1)		/* FMOVS */
-		if(xi.rd==i->rd+1 && xi.rs2==i->rs2+1){	/* next pair */
-			i->w1 = xi.w0;
-			i->size++;
-		}
-	}
-	return 1;
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr instr;
-	void (*f)(Instr*, char*);
-
-	mymap = map;
-	memset(&instr, 0, sizeof(instr));
-	instr.curr = buf;
-	instr.end = buf+n-1;
-	if (mkinstr(pc, &instr) < 0)
-		return -1;
-	switch(instr.op){
-	case 0:
-		f = sparc64op0[instr.op2].f;
-		if(f)
-			(*f)(&instr, sparc64op0[instr.op2].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-
-	case 1:
-		bprint(&instr, "CALL\t");
-		instr.curr += symoff(instr.curr, instr.end-instr.curr,
-					pc+instr.disp30*4, CTEXT);
-		if (!dascase)
-			bprint(&instr, "(SB)");
-		break;
-
-	case 2:
-		f = sparc64op2[instr.op3].f;
-		if(f)
-			(*f)(&instr, sparc64op2[instr.op3].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-
-	case 3:
-		f = sparc64op3[instr.op3].f;
-		if(f)
-			(*f)(&instr, sparc64op3[instr.op3].mnemonic);
-		else
-			bprint(&instr, "unknown %lux", instr.w0);
-		break;
-	}
-	if (instr.err) {
-		if (instr.curr != buf)
-			bprint(&instr, "\t\t;");
-		bprint(&instr, instr.err);
-	}
-	return instr.size*4;
-}
-
-static int
-sparc64inst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	static int fmtinstalled = 0;
-
-		/* a modifier of 'I' toggles the dissassembler type */
-	if (!fmtinstalled) {
-		fmtinstalled = 1;
-		fmtinstall('T', Tfmt);
-	}
-	if ((asstype == ASUNSPARC && modifier == 'i')
-		|| (asstype == ASPARC && modifier == 'I'))
-		dascase = 'a'-'A';
-	else
-		dascase = 0;
-	return printins(map, pc, buf, n);
-}
-
-static int
-sparc64das(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr instr;
-
-	mymap = map;
-	memset(&instr, 0, sizeof(instr));
-	instr.curr = buf;
-	instr.end = buf+n-1;
-	if (mkinstr(pc, &instr) < 0)
-		return -1;
-	if (instr.end-instr.curr > 8)
-		instr.curr = _hexify(instr.curr, instr.w0, 7);
-	if (instr.end-instr.curr > 9 && instr.size == 2) {
-		*instr.curr++ = ' ';
-		instr.curr = _hexify(instr.curr, instr.w1, 7);
-	}
-	*instr.curr = 0;
-	return instr.size*4;
-}
-
-static int
-sparc64instlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	return i.size*4;
-}
-
-static int
-plocal(Instr *i)
-{
-	int32_t offset;
-	Symbol s;
-
-	if (!findsym(i->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s))
-		return -1;
-	if (s.value > i->simm13) {
-		if(getauto(&s, s.value-i->simm13, CAUTO, &s)) {
-			bprint(i, "%s+%lld(SP)", s.name, s.value);
-			return 1;
-		}
-	} else {
-		offset = i->simm13-s.value;
-		if (getauto(&s, offset-4, CPARAM, &s)) {
-			bprint(i, "%s+%ld(FP)", s.name, offset);
-			return 1;
-		}
-	}
-	return -1;
-}
-
-static void
-address(Instr *i)
-{
-	Symbol s, s2;
-	uint64_t off, off1;
-
-	if (i->rs1 == 1 && plocal(i) >= 0)
-		return;
-	off = mach->sb+i->simm13;
-	if(i->rs1 == 2	&& findsym(off, CANY, &s)
-			&& s.value-off < 4096
-			&& (s.class == CDATA || s.class == CTEXT)) {
-		if(off==s.value && s.name[0]=='$'){
-			off1 = 0;
-			geta(mymap, s.value, &off1);
-			if(off1 && findsym(off1, CANY, &s2) && s2.value == off1){
-				bprint(i, "$%s(SB)", s2.name);
-				return;
-			}
-		}
-		bprint(i, "%s", s.name);
-		if (s.value != off)
-			bprint(i, "+%llux", s.value-off);
-		bprint(i, "(SB)");
-		return;
-	}
-	bprint(i, "%ux(R%d)", i->simm13, i->rs1);
-}
-
-static void
-unimp(Instr *i, char *m)
-{
-	bprint(i, "%T", m);
-}
-
-static char	*bratab[16] = {		/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X9]	"NE",
-	[0X1]	"E",
-	[0XA]	"G",
-	[0X2]	"LE",
-	[0XB]	"GE",
-	[0X3]	"L",
-	[0XC]	"GU",
-	[0X4]	"LEU",
-	[0XD]	"CC",
-	[0X5]	"CS",
-	[0XE]	"POS",
-	[0X6]	"NEG",
-	[0XF]	"VC",
-	[0X7]	"VS",
-};
-
-static char	*fbratab[16] = {	/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X7]	"U",
-	[0X6]	"G",
-	[0X5]	"UG",
-	[0X4]	"L",
-	[0X3]	"UL",
-	[0X2]	"LG",
-	[0X1]	"NE",
-	[0X9]	"E",
-	[0XA]	"UE",
-	[0XB]	"GE",
-	[0XC]	"UGE",
-	[0XD]	"LE",
-	[0XE]	"ULE",
-	[0XF]	"O",
-};
-
-static char	*cbratab[16] = {	/* page 91 */
-	[0X8]	"A",
-	[0X0]	"N",
-	[0X7]	"3",
-	[0X6]	"2",
-	[0X5]	"23",
-	[0X4]	"1",
-	[0X3]	"13",
-	[0X2]	"12",
-	[0X1]	"123",
-	[0X9]	"0",
-	[0XA]	"03",
-	[0XB]	"02",
-	[0XC]	"023",
-	[0XD]	"01",
-	[0XE]	"013",
-	[0XF]	"012",
-};
-
-static void
-bra1(Instr *i, char *m, char *tab[])
-{
-	int32_t imm;
-
-	imm = i->simmdisp22;
-	if(i->a)
-		bprint(i, "%T%T.%c\t", m, tab[i->cond], 'A'+dascase);
-	else
-		bprint(i, "%T%T\t", m, tab[i->cond]);
-	i->curr += symoff(i->curr, i->end-i->curr, i->addr+4*imm, CTEXT);
-	if (!dascase)
-		bprint(i, "(SB)");
-}
-
-static void
-bra(Instr *i, char *m)			/* page 91 */
-{
-	bra1(i, m, bratab);
-}
-
-static void
-fbra(Instr *i, char *m)			/* page 93 */
-{
-	bra1(i, m, fbratab);
-}
-
-static void
-cbra(Instr *i, char *m)			/* page 95 */
-{
-	bra1(i, m, cbratab);
-}
-
-static void
-trap(Instr *i, char *m)			/* page 101 */
-{
-	if(i->i == 0)
-		bprint(i, "%T%T\tR%d+R%d", m, bratab[i->cond], i->rs2, i->rs1);
-	else
-		bprint(i, "%T%T\t$%ux+R%d", m, bratab[i->cond], i->simm13, i->rs1);
-}
-
-static void
-sethi(Instr *i, char *m)		/* page 89 */
-{
-	uint32_t imm;
-
-	imm = i->immdisp22<<10;
-	if(dascase){
-		bprint(i, "%T\t%lux, R%d", m, imm, i->rd);
-		return;
-	}
-	if(imm==0 && i->rd==0){
-		bprint(i, "NOP");
-		return;
-	}
-	if(i->target < 0){
-		bprint(i, "MOVW\t$%lux, R%d", imm, i->rd);
-		return;
-	}
-	bprint(i, "MOVW\t$%lux, R%d", i->imm32, i->target);
-}
-
-static char ldtab[] = {
-	'W',
-	'B',
-	'H',
-	'D',
-};
-
-static char*
-moveinstr(int op3, char *m)
-{
-	char *s;
-	int c;
-	static char buf[8];
-
-	if(!dascase){
-		/* batshit cases */
-		if(op3 == 0xF || op3 == 0x1F)
-			return "SWAP";
-		if(op3 == 0xD || op3 == 0x1D)
-			return "TAS";	/* really LDSTUB */
-		c = ldtab[op3&3];
-		s = "";
-		if((op3&11)==1 || (op3&11)==2)
-			s="U";
-		sprint(buf, "MOV%c%s", c, s);
-		return buf;
-	}
-	return m;
-}
-
-static void
-load(Instr *i, char *m)			/* page 68 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), R%d", m, i->rs1, i->rs2, i->rd);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", R%d", i->rd);
-	}
-}
-
-static void
-loada(Instr *i, char *m)		/* page 68 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d, %d), R%d", m, i->rs1, i->rs2, i->asi, i->rd);
-	else
-		bprint(i, "unknown ld asi %lux", i->w0);
-}
-
-static void
-store(Instr *i, char *m)		/* page 74 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\tR%d, (R%d+R%d)",
-				m, i->rd, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\tR%d, ", m, i->rd);
-		address(i);
-	}
-}
-
-static void
-storea(Instr *i, char *m)		/* page 74 */
-{
-	m = moveinstr(i->op3, m);
-	if(i->i == 0)
-		bprint(i, "%s\tR%d, (R%d+R%d, %d)", m, i->rd, i->rs1, i->rs2, i->asi);
-	else
-		bprint(i, "%s\tR%d, %d(R%d, %d), ???", m, i->rd, i->simm13, i->rs1, i->asi);
-}
-
-static void
-shift(Instr *i, char *m)		/* page 88 */
-{
-	if(i->i == 0){
-		if(i->rs1 == i->rd)
-			if(dascase)
-				bprint(i, "%T\tR%d, R%d", m, i->rs1, i->rs2);
-			else
-				bprint(i, "%T\tR%d, R%d", m, i->rs2, i->rs1);
-		else
-			if(dascase)
-				bprint(i, "%T\tR%d, R%d, R%d", m, i->rs1, i->rs2, i->rd);
-			else
-				bprint(i, "%T\tR%d, R%d, R%d", m, i->rs2, i->rs1, i->rd);
-	}else{
-		if(i->rs1 == i->rd)
-			if(dascase)
-				bprint(i, "%T\t$%d,R%d", m, i->simm13&0x1F, i->rs1);
-			else
-				bprint(i, "%T\tR%d, $%d", m,  i->rs1, i->simm13&0x1F);
-		else
-			if(dascase)
-				bprint(i, "%T\tR%d, $%d, R%d",m,i->rs1,i->simm13&0x1F,i->rd);
-			else
-				bprint(i, "%T\t$%d, R%d, R%d",m,i->simm13&0x1F,i->rs1,i->rd);
-	}
-}
-
-static void
-add(Instr *i, char *m)			/* page 82 */
-{
-	if(i->i == 0){
-		if(dascase)
-			bprint(i, "%T\tR%d, R%d", m, i->rs1, i->rs2);
-		else
-			if(i->op3==2 && i->rs1==0 && i->rd)  /* OR R2, R0, R1 */
-				bprint(i, "MOVW\tR%d", i->rs2);
-			else
-				bprint(i, "%T\tR%d, R%d", m, i->rs2, i->rs1);
-	}else{
-		if(dascase)
-			bprint(i, "%T\tR%d, $%ux", m, i->rs1, i->simm13);
-		else
-			if(i->op3==0 && i->rd && i->rs1==0)	/* ADD $x, R0, R1 */
-				bprint(i, "MOVW\t$%ux", i->simm13);
-			else if(i->op3==0 && i->rd && i->rs1==2){
-				/* ADD $x, R2, R1 -> MOVW $x(SB), R1 */
-				bprint(i, "MOVW\t$");
-				address(i);
-			} else
-				bprint(i, "%T\t$%ux, R%d", m, i->simm13, i->rs1);
-	}
-	if(i->rs1 != i->rd)
-		bprint(i, ", R%d", i->rd);
-}
-
-static void
-cmp(Instr *i, char *m)
-{
-	if(dascase || i->rd){
-		add(i, m);
-		return;
-	}
-	if(i->i == 0)
-		bprint(i, "CMP\tR%d, R%d", i->rs1, i->rs2);
-	else
-		bprint(i, "CMP\tR%d, $%ux", i->rs1, i->simm13);
-}
-
-static char *regtab[4] = {
-	"Y",
-	"PSTATE",
-	"WIM",	/* XXX not any more */
-	"TT",
-};
-
-static void
-wr(Instr *i, char *m)			/* page 82 */
-{
-	if(dascase){
-		if(i->i == 0)
-			bprint(i, "%s\tR%d, R%d", m, i->rs1, i->rs2);
-		else
-			bprint(i, "%s\tR%d, $%ux", m, i->rs1, i->simm13);
-	}else{
-		if(i->i && i->simm13==0)
-			bprint(i, "MOVW\tR%d", i->rs1);
-		else if(i->i == 0)
-			bprint(i, "wr\tR%d, R%d", i->rs2, i->rs1);
-		else
-			bprint(i, "wr\t$%ux, R%d", i->simm13, i->rs1);
-	}
-	bprint(i, ", %s", regtab[i->op3&3]);
-}
-
-static void
-rd(Instr *i, char *m)			/* page 103 */
-{
-	if(i->rs1==15 && i->rd==0){
-		m = "stbar";
-		if(!dascase)
-			m = "STBAR";
-		bprint(i, "%s", m);
-	}else{
-		if(!dascase)
-			m = "MOVW";
-		bprint(i, "%s\t%s, R%d", m, regtab[i->op3&3], i->rd);
-	}
-}
-
-static void
-jmpl(Instr *i, char *m)			/* page 82 */
-{
-	if(i->i == 0){
-		if(i->rd == 15)
-			bprint(i, "%T\t(R%d+R%d)", "CALL", i->rs2, i->rs1);
-		else
-			bprint(i, "%T\t(R%d+R%d), R%d", m, i->rs2, i->rs1, i->rd);
-	}else{
-		if(!dascase && i->simm13==8 && i->rs1==15 && i->rd==0)
-			bprint(i, "RETURN");
-		else{
-			bprint(i, "%T\t", m);
-			address(i);
-			bprint(i, ", R%d", i->rd);
-		}
-	}
-}
-
-static void
-loadf(Instr *i, char *m)		/* page 70 */
-{
-	if(!dascase){
-		m = "FMOVD";
-		if(i->op3 == 0x20)
-			m = "FMOVF";
-		else if(i->op3 == 0x21)
-			m = "MOVW";
-	}
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d)", m, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-	}
-	if(i->op3 == 0x21)
-		bprint(i, ", FSR");
-	else
-		bprint(i, ", R%d", i->rd);
-}
-
-static
-void storef(Instr *i, char *m)		/* page 70 */
-{
-	if(!dascase){
-		m = "FMOVD";
-		if(i->op3 == 0x25 || i->op3 == 0x26)
-			m = "MOVW";
-		else if(i->op3 == 0x20)
-			m = "FMOVF";
-	}
-	bprint(i, "%s\t", m);
-	if(i->op3 == 0x25)
-		bprint(i, "FSR, ");
-	else if(i->op3 == 0x26)
-		bprint(i, "FQ, ");
-	else
-		bprint(i, "R%d, ", i->rd);
-	if(i->i == 0)
-		bprint(i, "(R%d+R%d)", i->rs1, i->rs2);
-	else
-		address(i);
-}
-
-static
-void loadc(Instr *i, char *m)		/* page 72 */
-{
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), C%d", m, i->rs1, i->rs2, i->rd);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", C%d", i->rd);
-	}
-}
-
-static
-void loadcsr(Instr *i, char *m)		/* page 72 */
-{
-	if(i->i == 0)
-		bprint(i, "%s\t(R%d+R%d), CSR", m, i->rs1, i->rs2);
-	else{
-		bprint(i, "%s\t", m);
-		address(i);
-		bprint(i, ", CSR");
-	}
-}
-
-static struct{
-	int	opf;
-	char	*name;
-} fptab1[] = {				/* ignores rs1 */
-	0xC4,	"FITOS",		/* page 109 */
-	0xC8,	"FITOD",
-	0xCC,	"FITOX",
-
-	0xD1,	"FSTOI",		/* page 110 */
-	0xD2,	"FDTOI",
-	0xD3,	"FXTOI",
-
-	0xC9,	"FSTOD",		/* page 111 */
-	0xCD,	"FSTOX",
-	0xC6,	"FDTOS",
-	0xCE,	"FDTOX",
-	0xC7,	"FXTOS",
-	0xCB,	"FXTOD",
-
-	0x01,	"FMOVS",		/* page 112 */
-	0x05,	"FNEGS",
-	0x09,	"FABSS",
-
-	0x29,	"FSQRTS", 		/* page 113 */
-	0x2A,	"FSQRTD",
-	0x2B,	"FSQRTX",
-
-	0,	0,
-};
-
-static struct{
-	int	opf;
-	char	*name;
-} fptab2[] = {				/* uses rs1 */
-
-	0x41,	"FADDS",		/* page 114 */
-	0x42,	"FADDD",
-	0x43,	"FADDX",
-	0x45,	"FSUBS",
-	0x46,	"FSUBD",
-	0x47,	"FSUBX",
-
-	0x49,	"FMULS",		/* page 115 */
-	0x4A,	"FMULD",
-	0x4B,	"FMULX",
-	0x4D,	"FDIVS",
-	0x4E,	"FDIVD",
-	0x4F,	"FDIVX",
-
-	0x51,	"FCMPS",		/* page 116 */
-	0x52,	"FCMPD",
-	0x53,	"FCMPX",
-	0x55,	"FCMPES",
-	0x56,	"FCMPED",
-	0x57,	"FCMPEX",
-
-	0, 0
-};
-
-static void
-fpop(Instr *i, char *m)			/* page 108-116 */
-{
-	int j;
-
-	if(dascase==0 && i->size==2){
-		bprint(i, "FMOVD\tF%d, F%d", i->rs2, i->rd);
-		return;
-	}
-	for(j=0; fptab1[j].name; j++)
-		if(fptab1[j].opf == i->opf){
-			bprint(i, "%T\tF%d, F%d", fptab1[j].name, i->rs2, i->rd);
-			return;
-		}
-	for(j=0; fptab2[j].name; j++)
-		if(fptab2[j].opf == i->opf){
-			bprint(i, "%T\tF%d, F%d, F%d", fptab2[j].name, i->rs1, i->rs2, i->rd);
-			return;
-		}
-	bprint(i, "%T%ux\tF%d, F%d, F%d", m, i->opf, i->rs1, i->rs2, i->rd);
-}
-
-static int
-sparc64foll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	uint32_t w, r1, r2;
-	char buf[8];
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	w = i.w0;
-	switch(w & 0xC1C00000){
-	case 0x00800000:		/* branch on int cond */
-	case 0x01800000:		/* branch on fp cond */
-	case 0x01C00000:		/* branch on copr cond */
-		foll[0] = pc+8;
-		foll[1] = pc + (i.simmdisp22<<2);
-		return 2;
-	}
-
-	if((w&0xC0000000) == 0x40000000){	/* CALL */
-		foll[0] = pc + (i.disp30<<2);
-		return 1;
-	}
-
-	if((w&0xC1F80000) == 0x81C00000){	/* JMPL */
-		sprint(buf, "R%ld", (w>>14)&0xF);
-		r1 = (*rget)(map, buf);
-		if(w & 0x2000)			/* JMPL R1+simm13 */
-			r2 = i.simm13;
-		else{				/* JMPL R1+R2 */
-			sprint(buf, "R%ld", w&0xF);
-			r2 = (*rget)(map, buf);
-		}
-		foll[0] = r1 + r2;
-		return 1;
-	}
-	foll[0] = pc+i.size*4;
-	return 1;
-}

+ 0 - 146
sys/src/libmach/sparc64obj.c

@@ -1,146 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * uobj.c - identify and parse a sparc64 object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "sparc64/u.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static	void	skip(Biobuf*, int);
-
-
-int
-_isu(char *s)
-{
-	return  s[0] == ANAME				/* ANAME */
-		&& s[1] == D_FILE			/* type */
-		&& s[2] == 1				/* sym */
-		&& s[3] == '<';				/* name of file */
-}
-
-
-int
-_readu(Biobuf *bp, Prog *p)
-{
-	int as, n;
-	Addr a;
-
-	as = Bgetc(bp);			/* as */
-	if(as < 0)
-		return 0;
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = beswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 5);		/* reg (1 byte); lineno (4 bytes) */
-	a = addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int32_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp, 1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type) {
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_CREG: case D_PREG:
-		break;
-	case D_BRANCH:
-	case D_OREG:
-	case D_ASI:
-	case D_CONST:
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-		if(a.sym!=0 && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}

+ 0 - 129
sys/src/libmach/v.c

@@ -1,129 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#ifdef HARVEYMIPS
-/*
- * mips definition
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include "/mips/include/ureg.h"
-#include <mach.h>
-
-#define	REGOFF(x)	(ulong)(&((struct Ureg *) 0)->x)
-
-#define SP		REGOFF(sp)
-#define PC		REGOFF(pc)
-#define	R1		REGOFF(r1)
-#define	R31		REGOFF(r31)
-#define	FP_REG(x)	(R1+4+4*(x))
-
-#define	REGSIZE		sizeof(struct Ureg)
-#define	FPREGSIZE	(4*33)
-
-Reglist mipsreglist[] = {
-	{"STATUS",	REGOFF(status),		RINT|RRDONLY, 'X'},
-	{"CAUSE",	REGOFF(cause),		RINT|RRDONLY, 'X'},
-	{"BADVADDR",	REGOFF(badvaddr),	RINT|RRDONLY, 'X'},
-	{"TLBVIRT",	REGOFF(tlbvirt),	RINT|RRDONLY, 'X'},
-	{"HI",		REGOFF(hi),		RINT|RRDONLY, 'X'},
-	{"LO",		REGOFF(lo),		RINT|RRDONLY, 'X'},
-	{"PC",		PC,		RINT, 'X'},
-	{"SP",		SP,		RINT, 'X'},
-	{"R31",		R31,		RINT, 'X'},
-	{"R30",		REGOFF(r30),	RINT, 'X'},
-	{"R28",		REGOFF(r28),	RINT, 'X'},
-	{"R27",		REGOFF(r27),	RINT, 'X'},
-	{"R26",		REGOFF(r26),	RINT, 'X'},
-	{"R25",		REGOFF(r25),	RINT, 'X'},
-	{"R24",		REGOFF(r24),	RINT, 'X'},
-	{"R23",		REGOFF(r23),	RINT, 'X'},
-	{"R22",		REGOFF(r22),	RINT, 'X'},
-	{"R21",		REGOFF(r21),	RINT, 'X'},
-	{"R20",		REGOFF(r20),	RINT, 'X'},
-	{"R19",		REGOFF(r19),	RINT, 'X'},
-	{"R18",		REGOFF(r18),	RINT, 'X'},
-	{"R17",		REGOFF(r17),	RINT, 'X'},
-	{"R16",		REGOFF(r16),	RINT, 'X'},
-	{"R15",		REGOFF(r15),	RINT, 'X'},
-	{"R14",		REGOFF(r14),	RINT, 'X'},
-	{"R13",		REGOFF(r13),	RINT, 'X'},
-	{"R12",		REGOFF(r12),	RINT, 'X'},
-	{"R11",		REGOFF(r11),	RINT, 'X'},
-	{"R10",		REGOFF(r10),	RINT, 'X'},
-	{"R9",		REGOFF(r9),	RINT, 'X'},
-	{"R8",		REGOFF(r8),	RINT, 'X'},
-	{"R7",		REGOFF(r7),	RINT, 'X'},
-	{"R6",		REGOFF(r6),	RINT, 'X'},
-	{"R5",		REGOFF(r5),	RINT, 'X'},
-	{"R4",		REGOFF(r4),	RINT, 'X'},
-	{"R3",		REGOFF(r3),	RINT, 'X'},
-	{"R2",		REGOFF(r2),	RINT, 'X'},
-	{"R1",		REGOFF(r1),	RINT, 'X'},
-	{"F0",		FP_REG(0),	RFLT, 'F'},
-	{"F1",		FP_REG(1),	RFLT, 'f'},
-	{"F2",		FP_REG(2),	RFLT, 'F'},
-	{"F3",		FP_REG(3),	RFLT, 'f'},
-	{"F4",		FP_REG(4),	RFLT, 'F'},
-	{"F5",		FP_REG(5),	RFLT, 'f'},
-	{"F6",		FP_REG(6),	RFLT, 'F'},
-	{"F7",		FP_REG(7),	RFLT, 'f'},
-	{"F8",		FP_REG(8),	RFLT, 'F'},
-	{"F9",		FP_REG(9),	RFLT, 'f'},
-	{"F10",		FP_REG(10),	RFLT, 'F'},
-	{"F11",		FP_REG(11),	RFLT, 'f'},
-	{"F12",		FP_REG(12),	RFLT, 'F'},
-	{"F13",		FP_REG(13),	RFLT, 'f'},
-	{"F14",		FP_REG(14),	RFLT, 'F'},
-	{"F15",		FP_REG(15),	RFLT, 'f'},
-	{"F16",		FP_REG(16),	RFLT, 'F'},
-	{"F17",		FP_REG(17),	RFLT, 'f'},
-	{"F18",		FP_REG(18),	RFLT, 'F'},
-	{"F19",		FP_REG(19),	RFLT, 'f'},
-	{"F20",		FP_REG(20),	RFLT, 'F'},
-	{"F21",		FP_REG(21),	RFLT, 'f'},
-	{"F22",		FP_REG(22),	RFLT, 'F'},
-	{"F23",		FP_REG(23),	RFLT, 'f'},
-	{"F24",		FP_REG(24),	RFLT, 'F'},
-	{"F25",		FP_REG(25),	RFLT, 'f'},
-	{"F26",		FP_REG(26),	RFLT, 'F'},
-	{"F27",		FP_REG(27),	RFLT, 'f'},
-	{"F28",		FP_REG(28),	RFLT, 'F'},
-	{"F29",		FP_REG(29),	RFLT, 'f'},
-	{"F30",		FP_REG(30),	RFLT, 'F'},
-	{"F31",		FP_REG(31),	RFLT, 'f'},
-	{"FPCR",	FP_REG(32),	RFLT, 'X'},
-	{  0 }
-};
-
-	/* the machine description */
-Mach mmips =
-{
-	"mips",
-	MMIPS,		/* machine type */
-	mipsreglist,	/* register set */
-	REGSIZE,	/* number of bytes in reg set */
-	FPREGSIZE,	/* number of bytes in fp reg set */
-	"PC",		/* name of PC */
-	"SP",		/* name of SP */
-	"R31",		/* name of link register */
-	"setR30",	/* static base register name */
-	0,		/* value */
-	16*1024,	/* page size */
-	0x80000000ULL,	/* kernel base */
-	0x80000000ULL,	/* kernel text mask */
-	0x7FFFFFFFULL,	/* user stack top */
-	4,		/* quantization of pc */
-	4,		/* szaddr */
-	4,		/* szreg */
-	4,		/* szfloat */
-	8,		/* szdouble */
-};
-#endif

+ 0 - 569
sys/src/libmach/vcodas.c

@@ -1,569 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-
-	/* mips native disassembler */
-
-typedef struct {
-	uint64_t addr;			/* pc of instr */
-	uint8_t op;			/* bits 31-26 */
-	uint8_t rs;			/* bits 25-21 */
-	uint8_t rt;			/* bits 20-16 */
-	uint8_t rd;			/* bits 15-11 */
-	uint8_t sa;			/* bits 10-6 */
-	uint8_t function;			/* bits 5-0 */
-	int32_t immediate;			/* bits 15-0 */
-	uint32_t cofun;			/* bits 24-0 */
-	uint32_t target;			/* bits 25-0 */
-	int32_t w0;
-	char *curr;			/* current fill point */
-	char *end;			/* end of buffer */
-	char *err;
-} Instr;
-
-typedef struct {
-	char *mnemonic;
-	char *mipsco;
-} Opcode;
-
-static char mipscoload[] = "r%t,%l";
-static char mipscoalui[] = "r%t,r%s,%i";
-static char mipscoalu3op[] = "r%d,r%s,r%t";
-static char mipscoboc[] = "r%s,r%t,%b";
-static char mipscoboc0[] = "r%s,%b";
-static char mipscorsrt[] = "r%s,r%t";
-static char mipscorsi[] = "r%s,%i";
-static char mipscoxxx[] = "%w";
-static char mipscofp3[] = "f%a,f%d,f%t";	/* fd,fs,ft */
-static char mipscofp2[] = "f%a,f%d";		/* fd,fs */
-static char mipscofpc[] = "f%d,f%t";		/* fs,ft */
-
-static Opcode opcodes[64] = {
-	0,		0,
-	0,		0,
-	"j",		"%j",
-	"jal",		"%j",
-	"beq",		mipscoboc,
-	"bne",		mipscoboc,
-	"blez",		mipscoboc0,
-	"bgtz",		mipscoboc0,
-	"addi",		mipscoalui,
-	"addiu",	mipscoalui,
-	"slti",		mipscoalui,
-	"sltiu",	mipscoalui,
-	"andi",		mipscoalui,
-	"ori",		mipscoalui,
-	"xori",		mipscoalui,
-	"lui",		"r%t,%u",
-	"cop0",		0,
-	"cop1",		0,
-	"cop2",		0,
-	"cop3",		0,
-	"beql",		mipscoboc,
-	"bnel",		mipscoboc,
-	"blezl",	mipscoboc0,
-	"bgtzl",	mipscoboc0,
-	"instr18",	mipscoxxx,
-	"instr19",	mipscoxxx,
-	"instr1A",	mipscoxxx,
-	"instr1B",	mipscoxxx,
-	"instr1C",	mipscoxxx,
-	"instr1D",	mipscoxxx,
-	"instr1E",	mipscoxxx,
-	"instr1F",	mipscoxxx,
-	"lb",		mipscoload,
-	"lh",		mipscoload,
-	"lwl",		mipscoload,
-	"lw",		mipscoload,
-	"lbu",		mipscoload,
-	"lhu",		mipscoload,
-	"lwr",		mipscoload,
-	"instr27",	mipscoxxx,
-	"sb",		mipscoload,
-	"sh",		mipscoload,
-	"swl",		mipscoload,
-	"sw",		mipscoload,
-	"instr2C",	mipscoxxx,
-	"instr2D",	mipscoxxx,
-	"swr",		mipscoload,
-	"cache",	"",
-	"ll",		mipscoload,
-	"lwc1",		mipscoload,
-	"lwc2",		mipscoload,
-	"lwc3",		mipscoload,
-	"instr34",	mipscoxxx,
-	"ld",		mipscoload,
-	"ld",		mipscoload,
-	"ld",		mipscoload,
-	"sc",		mipscoload,
-	"swc1",		mipscoload,
-	"swc2",		mipscoload,
-	"swc3",		mipscoload,
-	"instr3C",	mipscoxxx,
-	"sd",		mipscoload,
-	"sd",		mipscoload,
-	"sd",		mipscoload,
-};
-
-static Opcode sopcodes[64] = {
-	"sll",		"r%d,r%t,$%a",
-	"special01",	mipscoxxx,
-	"srl",		"r%d,r%t,$%a",
-	"sra",		"r%d,r%t,$%a",
-	"sllv",		"r%d,r%t,R%s",
-	"special05",	mipscoxxx,
-	"srlv",		"r%d,r%t,r%s",
-	"srav",		"r%d,r%t,r%s",
-	"jr",		"r%s",
-	"jalr",		"r%d,r%s",
-	"special0A",	mipscoxxx,
-	"special0B",	mipscoxxx,
-	"syscall",	"",
-	"break",	"",
-	"special0E",	mipscoxxx,
-	"sync",		"",
-	"mfhi",		"r%d",
-	"mthi",		"r%s",
-	"mflo",		"r%d",
-	"mtlo",		"r%s",
-	"special14",	mipscoxxx,
-	"special15",	mipscoxxx,
-	"special16",	mipscoxxx,
-	"special17",	mipscoxxx,
-	"mult",		mipscorsrt,
-	"multu",	mipscorsrt,
-	"div",		mipscorsrt,
-	"divu",		mipscorsrt,
-	"special1C",	mipscoxxx,
-	"special1D",	mipscoxxx,
-	"special1E",	mipscoxxx,
-	"special1F",	mipscoxxx,
-	"add",		mipscoalu3op,
-	"addu",		mipscoalu3op,
-	"sub",		mipscoalu3op,
-	"subu",		mipscoalu3op,
-	"and",		mipscoalu3op,
-	"or",		mipscoalu3op,
-	"xor",		mipscoalu3op,
-	"nor",		mipscoalu3op,
-	"special28",	mipscoxxx,
-	"special29",	mipscoxxx,
-	"slt",		mipscoalu3op,
-	"sltu",		mipscoalu3op,
-	"special2C",	mipscoxxx,
-	"special2D",	mipscoxxx,
-	"special2E",	mipscoxxx,
-	"special2F",	mipscoxxx,
-	"tge",		mipscorsrt,
-	"tgeu",		mipscorsrt,
-	"tlt",		mipscorsrt,
-	"tltu",		mipscorsrt,
-	"teq",		mipscorsrt,
-	"special35",	mipscoxxx,
-	"tne",		mipscorsrt,
-	"special37",	mipscoxxx,
-	"special38",	mipscoxxx,
-	"special39",	mipscoxxx,
-	"special3A",	mipscoxxx,
-	"special3B",	mipscoxxx,
-	"special3C",	mipscoxxx,
-	"special3D",	mipscoxxx,
-	"special3E",	mipscoxxx,
-	"special3F",	mipscoxxx,
-};
-
-static Opcode ropcodes[32] = {
-	"bltz",		mipscoboc0,
-	"bgez",		mipscoboc0,
-	"bltzl",	mipscoboc0,
-	"bgezl",	mipscoboc0,
-	"regimm04",	mipscoxxx,
-	"regimm05",	mipscoxxx,
-	"regimm06",	mipscoxxx,
-	"regimm07",	mipscoxxx,
-	"tgei",		mipscorsi,
-	"tgeiu",	mipscorsi,
-	"tlti",		mipscorsi,
-	"tltiu",	mipscorsi,
-	"teqi",		mipscorsi,
-	"regimm0D",	mipscoxxx,
-	"tnei",		mipscorsi,
-	"regimm0F",	mipscoxxx,
-	"bltzal",	mipscoboc0,
-	"bgezal",	mipscoboc0,
-	"bltzall",	mipscoboc0,
-	"bgezall",	mipscoboc0,
-	"regimm14",	mipscoxxx,
-	"regimm15",	mipscoxxx,
-	"regimm16",	mipscoxxx,
-	"regimm17",	mipscoxxx,
-	"regimm18",	mipscoxxx,
-	"regimm19",	mipscoxxx,
-	"regimm1A",	mipscoxxx,
-	"regimm1B",	mipscoxxx,
-	"regimm1C",	mipscoxxx,
-	"regimm1D",	mipscoxxx,
-	"regimm1E",	mipscoxxx,
-	"regimm1F",	mipscoxxx,
-};
-
-static Opcode fopcodes[64] = {
-	"add.%f",	mipscofp3,
-	"sub.%f",	mipscofp3,
-	"mul.%f",	mipscofp3,
-	"div.%f",	mipscofp3,
-	"sqrt.%f",	mipscofp2,
-	"abs.%f",	mipscofp2,
-	"mov.%f",	mipscofp2,
-	"neg.%f",	mipscofp2,
-	"finstr08",	mipscoxxx,
-	"finstr09",	mipscoxxx,
-	"finstr0A",	mipscoxxx,
-	"finstr0B",	mipscoxxx,
-	"round.w.%f",	mipscofp2,
-	"trunc.w%f",	mipscofp2,
-	"ceil.w%f",	mipscofp2,
-	"floor.w%f",	mipscofp2,
-	"finstr10",	mipscoxxx,
-	"finstr11",	mipscoxxx,
-	"finstr12",	mipscoxxx,
-	"finstr13",	mipscoxxx,
-	"finstr14",	mipscoxxx,
-	"finstr15",	mipscoxxx,
-	"finstr16",	mipscoxxx,
-	"finstr17",	mipscoxxx,
-	"finstr18",	mipscoxxx,
-	"finstr19",	mipscoxxx,
-	"finstr1A",	mipscoxxx,
-	"finstr1B",	mipscoxxx,
-	"finstr1C",	mipscoxxx,
-	"finstr1D",	mipscoxxx,
-	"finstr1E",	mipscoxxx,
-	"finstr1F",	mipscoxxx,
-	"cvt.s.%f",	mipscofp2,
-	"cvt.d.%f",	mipscofp2,
-	"cvt.e.%f",	mipscofp2,
-	"cvt.q.%f",	mipscofp2,
-	"cvt.w.%f",	mipscofp2,
-	"finstr25",	mipscoxxx,
-	"finstr26",	mipscoxxx,
-	"finstr27",	mipscoxxx,
-	"finstr28",	mipscoxxx,
-	"finstr29",	mipscoxxx,
-	"finstr2A",	mipscoxxx,
-	"finstr2B",	mipscoxxx,
-	"finstr2C",	mipscoxxx,
-	"finstr2D",	mipscoxxx,
-	"finstr2E",	mipscoxxx,
-	"finstr2F",	mipscoxxx,
-	"c.f.%f",	mipscofpc,
-	"c.un.%f",	mipscofpc,
-	"c.eq.%f",	mipscofpc,
-	"c.ueq.%f",	mipscofpc,
-	"c.olt.%f",	mipscofpc,
-	"c.ult.%f",	mipscofpc,
-	"c.ole.%f",	mipscofpc,
-	"c.ule.%f",	mipscofpc,
-	"c.sf.%f",	mipscofpc,
-	"c.ngle.%f",	mipscofpc,
-	"c.seq.%f",	mipscofpc,
-	"c.ngl.%f",	mipscofpc,
-	"c.lt.%f",	mipscofpc,
-	"c.nge.%f",	mipscofpc,
-	"c.le.%f",	mipscofpc,
-	"c.ngt.%f",	mipscofpc,
-};
-
-static char fsub[16] = {
-	's', 'd', 'e', 'q', 'w', '?', '?', '?',
-	'?', '?', '?', '?', '?', '?', '?', '?'
-};
-
-
-static int
-mkinstr(Instr *i, Map *map, uint64_t pc)
-{
-	uint32_t w;
-
-	if (get4(map, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-	i->addr = pc;
-	i->op = (w >> 26) & 0x3F;
-	i->rs = (w >> 21) & 0x1F;
-	i->rt = (w >> 16) & 0x1F;
-	i->rd = (w >> 11) & 0x1F;
-	i->sa = (w >> 6) & 0x1F;
-	i->function = w & 0x3F;
-	i->immediate = w & 0x0000FFFF;
-	if (i->immediate & 0x8000)
-		i->immediate |= ~0x0000FFFF;
-	i->cofun = w & 0x01FFFFFF;
-	i->target = w & 0x03FFFFFF;
-	i->w0 = w;
-	return 1;
-}
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-static void
-format(char *mnemonic, Instr *i, char *f)
-{
-	if (mnemonic)
-		format(0, i, mnemonic);
-	if (f == 0)
-		return;
-	if (i->curr < i->end)
-		*i->curr++ = '\t';
-	for ( ; *f && i->curr < i->end; f++) {
-		if (*f != '%') {
-			*i->curr++ = *f;
-			continue;
-		}
-		switch (*++f) {
-
-		case 's':
-			bprint(i, "%d", i->rs);
-			break;
-
-		case 't':
-			bprint(i, "%d", i->rt);
-			break;
-
-		case 'd':
-			bprint(i, "%d", i->rd);
-			break;
-
-		case 'a':
-			bprint(i, "%d", i->sa);
-			break;
-
-		case 'l':
-			if (i->rs == 30) {
-				i->curr += symoff(i->curr, i->end-i->curr, i->immediate+mach->sb, CANY);
-				bprint(i, "(SB)");
-			} else 
-				bprint(i, "%lx(r%d)", i->immediate, i->rs);
-			break;
-
-		case 'i':
-			bprint(i, "$%lx", i->immediate);
-			break;
-
-		case 'u':
-			*i->curr++ = '$';
-			i->curr += symoff(i->curr, i->end-i->curr, i->immediate, CANY);
-			bprint(i, "(SB)");
-			break;
-
-		case 'j':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(i->target<<2)|(i->addr & 0xF0000000), CANY);
-			bprint(i, "(SB)");
-			break;
-
-		case 'b':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(i->immediate<<2)+i->addr+4, CANY);
-			break;
-
-		case 'c':
-			bprint(i, "%lux", i->cofun);
-			break;
-
-		case 'w':
-			bprint(i, "[%lux]", i->w0);
-			break;
-
-		case 'f':
-			*i->curr++ = fsub[i->rs & 0x0F];
-			break;
-
-		case '\0':
-			*i->curr++ = '%';
-			return;
-
-		default:
-			bprint(i, "%%%c", *f);
-			break;
-		}
-	}
-}
-
-static void
-copz(int cop, Instr *i)
-{
-	char *f, *m, buf[16];
-
-	m = buf;
-	f = "%t,%d";
-	switch (i->rs) {
-
-	case 0:
-		sprint(buf, "mfc%d", cop);
-		break;
-
-	case 2:
-		sprint(buf, "cfc%d", cop);
-		break;
-
-	case 4:
-		sprint(buf, "mtc%d", cop);
-		break;
-
-	case 6:
-		sprint(buf, "ctc%d", cop);
-		break;
-
-	case 8:
-		f = "%b";
-		switch (i->rt) {
-
-		case 0:
-			sprint(buf, "bc%df", cop);
-			break;
-
-		case 1:
-			sprint(buf, "bc%dt", cop);
-			break;
-
-		case 2:
-			sprint(buf, "bc%dfl", cop);
-			break;
-
-		case 3:
-			sprint(buf, "bc%dtl", cop);
-			break;
-
-		default:
-			sprint(buf, "cop%d", cop);
-			f = mipscoxxx;
-			break;
-		}
-		break;
-
-	default:
-		sprint(buf, "cop%d", cop);
-		if (i->rs & 0x10)
-			f = "function %c";
-		else
-			f = mipscoxxx;
-		break;
-	}
-	format(m, i, f);
-}
-
-static void
-cop0(Instr *i)
-{
-	char *m = 0;
-
-	if (i->rs >= 0x10) {
-		switch (i->cofun) {
-	
-		case 1:
-			m = "tlbr";
-			break;
-	
-		case 2:
-			m = "tlbwi";
-			break;
-	
-		case 6:
-			m = "tlbwr";
-			break;
-	
-		case 8:
-			m = "tlbp";
-			break;
-	
-		case 16:
-			m = "rfe";
-			break;
-	
-		case 24:
-			m = "eret";
-			break;
-	
-		case 32:
-			m = "wait";
-			break;
-		}
-		if (m) {
-			format(m, i, 0);
-			if (i->curr < i->end)
-				*i->curr++ = 0;
-			return;
-		}
-	}
-	copz(0, i);
-}
-
-int
-_mipscoinst(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-	Opcode *o;
-	uint8_t op;
-
-	i.curr = buf;
-	i.end = buf+n-1;
-	if (mkinstr(&i, map, pc) < 0)
-		return -1;
-	switch (i.op) {
-
-	case 0x00:					/* SPECIAL */
-		o = sopcodes;
-		op = i.function;
-		break;
-
-	case 0x01:					/* REGIMM */
-		o = ropcodes;
-		op = i.rt;
-		break;
-
-	case 0x10:					/* COP0 */
-		cop0(&i);
-		return 4;
-
-	case 0x11:					/* COP1 */
-		if (i.rs & 0x10) {
-			o = fopcodes;
-			op = i.function;
-			break;
-		}
-		/*FALLTHROUGH*/
-	case 0x12:					/* COP2 */
-	case 0x13:					/* COP3 */
-		copz(i.op-0x10, &i);
-		return 4;
-
-	default:
-		o = opcodes;
-		op = i.op;
-		break;
-	}
-	format(o[op].mnemonic, &i, o[op].mipsco);
-	return 4;
-}

+ 0 - 1187
sys/src/libmach/vdb.c

@@ -1,1187 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-/*
- * Mips-specific debugger interface
- */
-
-static	char	*mipsexcep(Map*, Rgetter);
-static	int	mipsfoll(Map*, uint64_t, Rgetter, uint64_t*);
-static	int	mipsinst(Map*, uint64_t, char, char*, int);
-static	int	mipsdas(Map*, uint64_t, char*, int);
-static	int	mipsinstlen(Map*, uint64_t);
-
-/*
- *	Debugger interface
- */
-Machdata mipsmach =
-{
-	{0, 0, 0, 0xD},		/* break point */
-	4,			/* break point size */
-
-	beswab,			/* short to local byte order */
-	beswal,			/* long to local byte order */
-	beswav,			/* vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	mipsexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,		/* single precision float printer */
-	/*
-	 * this works for doubles in memory, but FP register pairs have
-	 * the words in little-endian order, so they will print as
-	 * denormalised doubles.
-	 */
-	beieeedftos,		/* double precision float printer */
-	mipsfoll,		/* following addresses */
-	mipsinst,		/* print instruction */
-	mipsdas,		/* dissembler */
-	mipsinstlen,		/* instruction size */
-};
-
-Machdata mipsmachle =
-{
-	{0, 0, 0, 0xD},		/* break point */
-	4,			/* break point size */
-
-	leswab,			/* short to local byte order */
-	leswal,			/* long to local byte order */
-	leswav,			/* vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	mipsexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	leieeesftos,		/* single precision float printer */
-	leieeedftos,		/* double precision float printer */
-	mipsfoll,		/* following addresses */
-	mipsinst,		/* print instruction */
-	mipsdas,		/* dissembler */
-	mipsinstlen,		/* instruction size */
-};
-
-/*
- *	mips r4k little-endian
- */
-Machdata mipsmach2le =
-{
-	{0, 0, 0, 0xD},		/* break point */
-	4,			/* break point size */
-
-	leswab,			/* short to local byte order */
-	leswal,			/* long to local byte order */
-	leswav,			/* vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	mipsexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	leieeesftos,		/* single precision float printer */
-	leieeedftos,		/* double precision float printer */
-	mipsfoll,		/* following addresses */
-	mipsinst,		/* print instruction */
-	mipsdas,		/* dissembler */
-	mipsinstlen,		/* instruction size */
-};
-
-/*
- *	mips r4k big-endian
- */
-Machdata mipsmach2be =
-{
-	{0, 0, 0, 0xD},		/* break point */
-	4,			/* break point size */
-
-	beswab,			/* short to local byte order */
-	beswal,			/* long to local byte order */
-	beswav,			/* vlong to local byte order */
-	risctrace,		/* C traceback */
-	riscframe,		/* Frame finder */
-	mipsexcep,		/* print exception */
-	0,			/* breakpoint fixup */
-	beieeesftos,		/* single precision float printer */
-	beieeedftos,		/* double precision float printer */
-	mipsfoll,		/* following addresses */
-	mipsinst,		/* print instruction */
-	mipsdas,		/* dissembler */
-	mipsinstlen,		/* instruction size */
-};
-
-
-static char *excname[] =
-{
-	"external interrupt",
-	"TLB modification",
-	"TLB miss (load or fetch)",
-	"TLB miss (store)",
-	"address error (load or fetch)",
-	"address error (store)",
-	"bus error (fetch)",
-	"bus error (data load or store)",
-	"system call",
-	"breakpoint",
-	"reserved instruction",
-	"coprocessor unusable",
-	"arithmetic overflow",
-	"undefined 13",
-	"undefined 14",
-	"system call",
-	/* the following is made up */
-	"floating point exception"		/* FPEXC */
-};
-
-static char*
-mipsexcep(Map *map, Rgetter rget)
-{
-	int e;
-	int32_t c;
-
-	c = (*rget)(map, "CAUSE");
-	/* i don't think this applies to any current machines */
-	if(0 && c & 0x00002000)	/* INTR3 */
-		e = 16;		/* Floating point exception */
-	else
-		e = (c>>2)&0x0F;
-	return excname[e];
-}
-
-	/* mips disassembler and related functions */
-
-static	char FRAMENAME[] = ".frame";
-
-typedef struct {
-	uint64_t addr;
-	uint8_t op;			/* bits 31-26 */
-	uint8_t rs;			/* bits 25-21 */
-	uint8_t rt;			/* bits 20-16 */
-	uint8_t rd;			/* bits 15-11 */
-	uint8_t sa;			/* bits 10-6 */
-	uint8_t function;			/* bits 5-0 */
-	int32_t immediate;			/* bits 15-0 */
-	uint32_t cofun;			/* bits 24-0 */
-	uint32_t target;			/* bits 25-0 */
-	int32_t w0;
-	int32_t w1;
-	int size;			/* instruction size */
-	char *curr;			/* fill point in buffer */
-	char *end;			/* end of buffer */
-	char *err;			/* error message */
-} Instr;
-
-static Map *mymap;
-
-static int
-decode(uint64_t pc, Instr *i)
-{
-	uint32_t w;
-
-	if (get4(mymap, pc, &w) < 0) {
-		werrstr("can't read instruction: %r");
-		return -1;
-	}
-
-	i->addr = pc;
-	i->size = 1;
-	i->op = (w >> 26) & 0x3F;
-	i->rs = (w >> 21) & 0x1F;
-	i->rt = (w >> 16) & 0x1F;
-	i->rd = (w >> 11) & 0x1F;
-	i->sa = (w >> 6) & 0x1F;
-	i->function = w & 0x3F;
-	i->immediate = w & 0x0000FFFF;
-	if (i->immediate & 0x8000)
-		i->immediate |= ~0x0000FFFF;
-	i->cofun = w & 0x01FFFFFF;
-	i->target = w & 0x03FFFFFF;
-	i->w0 = w;
-	return 1;
-}
-
-static int
-mkinstr(uint64_t pc, Instr *i)
-{
-	Instr x;
-
-	if (decode(pc, i) < 0)
-		return -1;
-	/*
-	 * if it's a LUI followed by an ORI,
-	 * it's an immediate load of a large constant.
-	 * fix the LUI immediate in any case.
-	 */
-	if (i->op == 0x0F) {
-		if (decode(pc+4, &x) < 0)
-			return 0;
-		i->immediate <<= 16;
-		if (x.op == 0x0D && x.rs == x.rt && x.rt == i->rt) {
-			i->immediate |= (x.immediate & 0xFFFF);
-			i->w1 = x.w0;
-			i->size++;
-			return 1;
-		}
-	}
-	/*
-	 * if it's a LWC1 followed by another LWC1
-	 * into an adjacent register, it's a load of
-	 * a floating point double.
-	 */
-	else if (i->op == 0x31 && (i->rt & 0x01)) {
-		if (decode(pc+4, &x) < 0)
-			return 0;
-		if (x.op == 0x31 && x.rt == (i->rt - 1) && x.rs == i->rs) {
-			i->rt -= 1;
-			i->w1 = x.w0;
-			i->size++;
-			return 1;
-		}
-	}
-	/*
-	 * similarly for double stores
-	 */
-	else if (i->op == 0x39 && (i->rt & 0x01)) {
-		if (decode(pc+4, &x) < 0)
-			return 0;
-		if (x.op == 0x39 && x.rt == (i->rt - 1) && x.rs == i->rs) {
-			i->rt -= 1;
-			i->w1 = x.w0;
-			i->size++;
-		}
-	}
-	return 1;
-}
-
-#pragma	varargck	argpos	bprint		2
-
-static void
-bprint(Instr *i, char *fmt, ...)
-{
-	va_list arg;
-
-	va_start(arg, fmt);
-	i->curr = vseprint(i->curr, i->end, fmt, arg);
-	va_end(arg);
-}
-
-typedef struct Opcode Opcode;
-
-struct Opcode {
-	char *mnemonic;
-	void (*f)(Opcode *, Instr *);
-	char *ken;
-};
-
-static void format(char *, Instr *, char *);
-
-static void
-branch(Opcode *o, Instr *i)
-{
-	if (i->rs == 0 && i->rt == 0)
-		format("JMP", i, "%b");
-	else if (i->rs == 0)
-		format(o->mnemonic, i, "R%t,%b");
-	else if (i->rt < 2)
-		format(o->mnemonic, i, "R%s,%b");
-	else
-		format(o->mnemonic, i, "R%s,R%t,%b");
-}
-
-static void
-addi(Opcode *o, Instr *i)
-{
-	if (i->rs == i->rt)
-		format(o->mnemonic, i, "%i,R%t");
-	else if (i->rs == 0)
-		format("MOVW", i, "%i,R%t");
-	else if (i->rs == 30) {
-		bprint(i, "MOVW\t$");
-		i->curr += symoff(i->curr, i->end-i->curr,
-					i->immediate+mach->sb, CANY);
-		bprint(i, "(SB),R%d", i->rt);
-	}
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-andi(Opcode *o, Instr *i)
-{
-	if (i->rs == i->rt)
-		format(o->mnemonic, i, "%i,R%t");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static int
-plocal(Instr *i, char *m, char r, int store)
-{
-	int offset;
-	char *reg;
-	Symbol s;
-
-	if (!findsym(i->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s))
-		return 0;
-	if (s.value > i->immediate) {
-		if(!getauto(&s, s.value-i->immediate, CAUTO, &s))
-			return 0;
-		reg = "(SP)";
-		offset = i->immediate;
-	} else {
-		offset = i->immediate-s.value;
-		if (!getauto(&s, offset-4, CPARAM, &s))
-			return 0;
-		reg = "(FP)";
-	}
-	if (store)
-		bprint(i, "%s\t%c%d,%s+%d%s", m, r, i->rt, s.name, offset, reg);
-	else
-		bprint(i, "%s\t%s+%d%s,%c%d", m, s.name, offset, reg, r, i->rt);
-	return 1;
-}
-
-static void
-lw(Opcode *o, Instr *i, char r)
-{
-	char *m;
-
-	if (r == 'F') {
-		if (i->size == 2)
-			m = "MOVD";
-		else
-			m = "MOVF";
-	}
-	else
-		m = o->mnemonic;
-	if (i->rs == 29 && plocal(i, m, r, 0))
-			return;
-
-	if (i->rs == 30 && mach->sb) {
-		bprint(i, "%s\t", m);
-		i->curr += symoff(i->curr, i->end-i->curr, i->immediate+mach->sb, CANY);
-		bprint(i, "(SB),%c%d", r, i->rt);
-		return;
-	}
-	if (r == 'F')
-		format(m, i, "%l,F%t");
-	else
-		format(m, i, o->ken);
-}
-
-static void
-load(Opcode *o, Instr *i)
-{
-	lw(o, i, 'R');
-}
-
-static void
-lwc1(Opcode *o, Instr *i)
-{
-	lw(o, i, 'F');
-}
-
-static void
-sw(Opcode *o, Instr *i, char r)
-{
-	char *m;
-
-	if (r == 'F') {
-		if (i->size == 2)
-			m = "MOVD";
-		else
-			m = "MOVF";
-	}
-	else
-		m = o->mnemonic;
-	if (i->rs == 29 && plocal(i, m, r, 1))
-			return;
-
-	if (i->rs == 30 && mach->sb) {
-		bprint(i, "%s\t%c%d,", m, r, i->rt);
-		i->curr += symoff(i->curr, i->end-i->curr, i->immediate+mach->sb, CANY);
-		bprint(i, "(SB)");
-		return;
-	}
-	if (r == 'F')
-		format(m, i, "F%t,%l");
-	else
-		format(m, i, o->ken);
-}
-
-static void
-store(Opcode *o, Instr *i)
-{
-	sw(o, i, 'R');
-}
-
-static void
-swc1(Opcode *o, Instr *i)
-{
-	sw(o, i, 'F');
-}
-
-static void
-sll(Opcode *o, Instr *i)
-{
-	if (i->w0 == 0)
-		bprint(i, "NOOP");		/* unofficial nop */
-	else if (i->w0 == 0xc0)			/* 0xc0: SLL $3,R0 */
-		bprint(i, "EHB");
-	else if (i->rd == i->rt)
-		format(o->mnemonic, i, "$%a,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-sl32(Opcode *o, Instr *i)
-{
-	i->sa += 32;
-	if (i->rd == i->rt)
-		format(o->mnemonic, i, "$%a,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-sllv(Opcode *o, Instr *i)
-{
-	if (i->rd == i->rt)
-		format(o->mnemonic, i, "R%s,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-jal(Opcode *o, Instr *i)
-{
-	if (i->rd == 31)
-		format("JAL", i, "(R%s)");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-add(Opcode *o, Instr *i)
-{
-	if (i->rd == i->rs)
-		format(o->mnemonic, i, "R%t,R%d");
-	else if (i->rd == i->rt)
-		format(o->mnemonic, i, "R%s,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-sub(Opcode *o, Instr *i)
-{
-	if (i->rd == i->rs)
-		format(o->mnemonic, i, "R%t,R%d");
-	else
-		format(o->mnemonic, i, o->ken);
-}
-
-static void
-or(Opcode *o, Instr *i)
-{
-	if (i->rs == 0 && i->rt == 0)
-		format("MOVW", i, "$0,R%d");
-	else if (i->rs == 0)
-		format("MOVW", i, "R%t,R%d");
-	else if (i->rt == 0)
-		format("MOVW", i, "R%s,R%d");
-	else
-		add(o, i);
-}
-
-static void
-nor(Opcode *o, Instr *i)
-{
-	if (i->rs == 0 && i->rt == 0 && i->rd == 0)
-		format("NOP", i, 0);
-	else
-		add(o, i);
-}
-
-static char mipscoload[] = "r%t,%l";
-static char mipsload[] = "%l,R%t";
-static char mipsstore[] = "R%t,%l";
-static char mipsalui[] = "%i,R%s,R%t";
-static char mipsalu3op[] = "R%t,R%s,R%d";
-static char mipsrtrs[] = "R%t,R%s";
-static char mipscorsrt[] = "r%s,r%t";
-static char mipscorsi[] = "r%s,%i";
-static char mipscoxxx[] = "%w";
-static char mipscofp3[] = "f%a,f%d,f%t";	/* fd,fs,ft */
-static char mipsfp3[] = "F%t,F%d,F%a";
-static char mipscofp2[] = "f%a,f%d";		/* fd,fs */
-static char mipsfp2[] = "F%d,F%a";
-static char mipscofpc[] = "f%d,f%t";		/* fs,ft */
-static char mipsfpc[] = "F%t,F%d";
-
-static Opcode opcodes[64] = {
-	0,		0,	0,
-	0,		0,	0,
-	"JMP",		0,	"%j",
-	"JAL",		0,	"%j",
-	"BEQ",	   branch,	0,
-	"BNE",	   branch,	0,
-	"BLEZ",	   branch,	0,
-	"BGTZ",	   branch,	0,
-	"ADD",	     addi,	mipsalui,
-	"ADDU",	     addi,	mipsalui,
-	"SGT",		0,	mipsalui,
-	"SGTU",		0,	mipsalui,
-	"AND",	     andi,	mipsalui,
-	"OR",	     andi,	mipsalui,
-	"XOR",	     andi,	mipsalui,
-	"MOVW",		0,	"$%u,R%t",
-	"cop0",		0,	0,
-	"cop1",		0,	0,
-	"cop2",		0,	0,
-	"cop3",		0,	0,
-	"BEQL",	   branch,	0,
-	"BNEL",	   branch,	0,
-	"BLEZL",   branch,	0,
-	"BGTZL",   branch,	0,
-	"instr18",	0,	mipscoxxx,
-	"instr19",	0,	mipscoxxx,
-	"MOVVL",     load,	mipsload,
-	"MOVVR",     load,	mipsload,
-	"instr1C",	0,	mipscoxxx,
-	"instr1D",	0,	mipscoxxx,
-	"instr1E",	0,	mipscoxxx,
-	"instr1F",	0,	mipscoxxx,
-	"MOVB",	     load,	mipsload,
-	"MOVH",	     load,	mipsload,
-	"lwl",		0,	mipscoload,
-	"MOVW",	     load,	mipsload,
-	"MOVBU",     load,	mipsload,
-	"MOVHU",     load,	mipsload,
-	"lwr",		0,	mipscoload,
-	"instr27",	0,	mipscoxxx,
-	"MOVB",	    store,	mipsstore,
-	"MOVH",	    store,	mipsstore,
-	"swl",		0,	mipscoload,
-	"MOVW",	    store,	mipsstore,
-	"MOVVL",    store,	mipsstore,
-	"MOVVR",    store,	mipsstore,
-	"swr",		0,	mipscoload,
-	"CACHE",	0,	"%C,%l",
-	"ll",		0,	mipscoload,
-	"MOVW",	     lwc1,	mipscoload,
-	"lwc2",		0,	mipscoload,
-	"lwc3",		0,	mipscoload,
-	"instr34",	0,	mipscoxxx,
-	"ldc1",		0,	mipscoload,
-	"ldc2",		0,	mipscoload,
-	"MOVV",	    load,	mipsload,
-	"sc",		0,	mipscoload,
-	"swc1",	     swc1,	mipscoload,
-	"swc2",		0,	mipscoload,
-	"swc3",		0,	mipscoload,
-	"instr3C",	0,	mipscoxxx,
-	"sdc1",		0,	mipscoload,
-	"sdc2",		0,	mipscoload,
-	"MOVV",	    store,	mipsstore,
-};
-
-static Opcode sopcodes[64] = {
-	"SLL",	      sll,	"$%a,R%t,R%d",
-	"special01",	0,	mipscoxxx,
-	"SRL",	      sll,	"$%a,R%t,R%d",
-	"SRA",	      sll,	"$%a,R%t,R%d",
-	"SLL",	     sllv,	"R%s,R%t,R%d",
-	"special05",	0,	mipscoxxx,
-	"SRL",	     sllv,	"R%s,R%t,R%d",
-	"SRA",	     sllv,	"R%s,R%t,R%d",
-	"JMP",		0,	"(R%s)",
-	"jal",	      jal,	"r%d,r%s",
-	"special0A",	0,	mipscoxxx,
-	"special0B",	0,	mipscoxxx,
-	"SYSCALL",	0,	0,
-	"BREAK",	0,	0,
-	"special0E",	0,	mipscoxxx,
-	"SYNC",		0,	0,
-	"MOVW",		0,	"HI,R%d",
-	"MOVW",		0,	"R%s,HI",
-	"MOVW",		0,	"LO,R%d",
-	"MOVW",		0,	"R%s,LO",
-	"SLLV",	     sllv,	"R%s,R%t,R%d",
-	"special15",	0,	mipscoxxx,
-	"SRLV",	     sllv,	"R%s,R%t,R%d",
-	"SRAV",	     sllv,	"R%s,R%t,R%d",
-	"MUL",		0,	mipsrtrs,
-	"MULU",		0,	mipsrtrs,
-	"DIV",		0,	mipsrtrs,
-	"DIVU",		0,	mipsrtrs,
-	"special1C",	0,	mipscoxxx,
-	"special1D",	0,	mipscoxxx,
-	"DDIV",		0,	"R%s,R%t",
-	"special1F",	0,	mipscoxxx,
-	"ADD",	      add,	mipsalu3op,
-	"ADDU",	      add,	mipsalu3op,
-	"SUB",	      sub,	mipsalu3op,
-	"SUBU",	      sub,	mipsalu3op,
-	"AND",	      add,	mipsalu3op,
-	"OR",	       or,	mipsalu3op,
-	"XOR",	      add,	mipsalu3op,
-	"NOR",	      nor,	mipsalu3op,
-	"special28",	0,	mipscoxxx,
-	"special29",	0,	mipscoxxx,
-	"SGT",		0,	mipsalu3op,
-	"SGTU",		0,	mipsalu3op,
-	"special2C",	0,	mipscoxxx,
-	"special2D",	0,	mipscoxxx,
-	"special2E",	0,	mipscoxxx,
-	"DSUBU",	0,	"R%s,R%t,R%d",
-	"tge",		0,	mipscorsrt,
-	"tgeu",		0,	mipscorsrt,
-	"tlt",		0,	mipscorsrt,
-	"tltu",		0,	mipscorsrt,
-	"teq",		0,	mipscorsrt,
-	"special35",	0,	mipscoxxx,
-	"tne",		0,	mipscorsrt,
-	"special37",	0,	mipscoxxx,
-	"SLLV",	      sll,	"$%a,R%t,R%d",
-	"special39",	0,	mipscoxxx,
-	"SRLV",	      sll,	"$%a,R%t,R%d",
-	"SRAV",	      sll,	"$%a,R%t,R%d",
-	"SLLV",	     sl32,	"$%a,R%t,R%d",
-	"special3D",	0,	mipscoxxx,
-	"SRLV",	     sl32,	"$%a,R%t,R%d",
-	"SRAV",	     sl32,	"$%a,R%t,R%d",
-};
-
-static Opcode ropcodes[32] = {
-	"BLTZ",	   branch,	0,
-	"BGEZ",	   branch,	0,
-	"BLTZL",   branch,	0,
-	"BGEZL",   branch,	0,
-	"regimm04",	0,	mipscoxxx,
-	"regimm05",	0,	mipscoxxx,
-	"regimm06",	0,	mipscoxxx,
-	"regimm07",	0,	mipscoxxx,
-	"tgei",		0,	mipscorsi,
-	"tgeiu",	0,	mipscorsi,
-	"tlti",		0,	mipscorsi,
-	"tltiu",	0,	mipscorsi,
-	"teqi",		0,	mipscorsi,
-	"regimm0D",	0,	mipscoxxx,
-	"tnei",		0,	mipscorsi,
-	"regimm0F",	0,	mipscoxxx,
-	"BLTZAL",  branch,	0,
-	"BGEZAL",  branch,	0,
-	"BLTZALL", branch,	0,
-	"BGEZALL", branch,	0,
-	"regimm14",	0,	mipscoxxx,
-	"regimm15",	0,	mipscoxxx,
-	"regimm16",	0,	mipscoxxx,
-	"regimm17",	0,	mipscoxxx,
-	"regimm18",	0,	mipscoxxx,
-	"regimm19",	0,	mipscoxxx,
-	"regimm1A",	0,	mipscoxxx,
-	"regimm1B",	0,	mipscoxxx,
-	"regimm1C",	0,	mipscoxxx,
-	"regimm1D",	0,	mipscoxxx,
-	"regimm1E",	0,	mipscoxxx,
-	"regimm1F",	0,	mipscoxxx,
-};
-
-static Opcode fopcodes[64] = {
-	"ADD%f",	0,	mipsfp3,
-	"SUB%f",	0,	mipsfp3,
-	"MUL%f",	0,	mipsfp3,
-	"DIV%f",	0,	mipsfp3,
-	"sqrt.%f",	0,	mipscofp2,
-	"ABS%f",	0,	mipsfp2,
-	"MOV%f",	0,	mipsfp2,
-	"NEG%f",	0,	mipsfp2,
-	"finstr08",	0,	mipscoxxx,
-	"finstr09",	0,	mipscoxxx,
-	"finstr0A",	0,	mipscoxxx,
-	"finstr0B",	0,	mipscoxxx,
-	"round.w.%f",	0,	mipscofp2,
-	"trunc.w%f",	0,	mipscofp2,
-	"ceil.w%f",	0,	mipscofp2,
-	"floor.w%f",	0,	mipscofp2,
-	"finstr10",	0,	mipscoxxx,
-	"finstr11",	0,	mipscoxxx,
-	"finstr12",	0,	mipscoxxx,
-	"finstr13",	0,	mipscoxxx,
-	"finstr14",	0,	mipscoxxx,
-	"finstr15",	0,	mipscoxxx,
-	"finstr16",	0,	mipscoxxx,
-	"finstr17",	0,	mipscoxxx,
-	"finstr18",	0,	mipscoxxx,
-	"finstr19",	0,	mipscoxxx,
-	"finstr1A",	0,	mipscoxxx,
-	"finstr1B",	0,	mipscoxxx,
-	"finstr1C",	0,	mipscoxxx,
-	"finstr1D",	0,	mipscoxxx,
-	"finstr1E",	0,	mipscoxxx,
-	"finstr1F",	0,	mipscoxxx,
-	"cvt.s.%f",	0,	mipscofp2,
-	"cvt.d.%f",	0,	mipscofp2,
-	"cvt.e.%f",	0,	mipscofp2,
-	"cvt.q.%f",	0,	mipscofp2,
-	"cvt.w.%f",	0,	mipscofp2,
-	"finstr25",	0,	mipscoxxx,
-	"finstr26",	0,	mipscoxxx,
-	"finstr27",	0,	mipscoxxx,
-	"finstr28",	0,	mipscoxxx,
-	"finstr29",	0,	mipscoxxx,
-	"finstr2A",	0,	mipscoxxx,
-	"finstr2B",	0,	mipscoxxx,
-	"finstr2C",	0,	mipscoxxx,
-	"finstr2D",	0,	mipscoxxx,
-	"finstr2E",	0,	mipscoxxx,
-	"finstr2F",	0,	mipscoxxx,
-	"c.f.%f",	0,	mipscofpc,
-	"c.un.%f",	0,	mipscofpc,
-	"CMPEQ%f",	0,	mipsfpc,
-	"c.ueq.%f",	0,	mipscofpc,
-	"c.olt.%f",	0,	mipscofpc,
-	"c.ult.%f",	0,	mipscofpc,
-	"c.ole.%f",	0,	mipscofpc,
-	"c.ule.%f",	0,	mipscofpc,
-	"c.sf.%f",	0,	mipscofpc,
-	"c.ngle.%f",	0,	mipscofpc,
-	"c.seq.%f",	0,	mipscofpc,
-	"c.ngl.%f",	0,	mipscofpc,
-	"CMPGT%f",	0,	mipsfpc,
-	"c.nge.%f",	0,	mipscofpc,
-	"CMPGE%f",	0,	mipsfpc,
-	"c.ngt.%f",	0,	mipscofpc,
-};
-
-static char *cop0regs[32] = {
-	"INDEX", "RANDOM", "TLBPHYS", "EntryLo0",
-	"CONTEXT", "PageMask", "Wired",	"Error",
-	"BADVADDR", "Count", "TLBVIRT", "Compare",
-	"STATUS", "CAUSE", "EPC", "PRID",
-	"Config", "LLadr", "WatchLo", "WatchHi",
-	"20", "21", "22", "23",
-	"24", "25", "26", "CacheErr",
-	"TagLo", "TagHi", "ErrorEPC", "31"
-};
-
-static char fsub[16] = {
-	'F', 'D', 'e', 'q', 'W', '?', '?', '?',
-	'?', '?', '?', '?', '?', '?', '?', '?'
-};
-
-static char *cacheps[] = {
-	"I", "D", "SI", "SD"
-};
-
-static char *cacheop[] = {
-	"IWBI", "ILT", "IST", "CDE", "HI", "HWBI", "HWB", "HSV"
-};
-
-static void
-format(char *mnemonic, Instr *i, char *f)
-{
-	if (mnemonic)
-		format(0, i, mnemonic);
-	if (f == 0)
-		return;
-	if (mnemonic)
-		if (i->curr < i->end)
-			*i->curr++ = '\t';
-	for ( ; *f && i->curr < i->end; f++) {
-		if (*f != '%') {
-			*i->curr++ = *f;
-			continue;
-		}
-		switch (*++f) {
-
-		case 's':
-			bprint(i, "%d", i->rs);
-			break;
-
-		case 't':
-			bprint(i, "%d", i->rt);
-			break;
-
-		case 'd':
-			bprint(i, "%d", i->rd);
-			break;
-
-		case 'a':
-			bprint(i, "%d", i->sa);
-			break;
-
-		case 'l':
-			bprint(i, "%lx(R%d)",i->immediate, i->rs);
-			break;
-
-		case 'i':
-			bprint(i, "$%lx", i->immediate);
-			break;
-
-		case 'u':
-			i->curr += symoff(i->curr, i->end-i->curr, i->immediate, CANY);
-			bprint(i, "(SB)");
-			break;
-
-		case 'j':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(i->target<<2)|(i->addr & 0xF0000000), CANY);
-			bprint(i, "(SB)");
-			break;
-
-		case 'b':
-			i->curr += symoff(i->curr, i->end-i->curr,
-				(i->immediate<<2)+i->addr+4, CANY);
-			break;
-
-		case 'c':
-			bprint(i, "$%lx", i->cofun);
-			break;
-
-		case 'w':
-			bprint(i, "[%lux]", i->w0);
-			break;
-
-		case 'm':
-			bprint(i, "M(%s)", cop0regs[i->rd]);
-			break;
-
-		case 'f':
-			*i->curr++ = fsub[i->rs & 0x0F];
-			break;
-
-		case 'C':
-			bprint(i, "%s%s", cacheps[i->rt & 3], cacheop[(i->rt>>2) & 7]);
-			break;
-
-		case '\0':
-			*i->curr++ = '%';
-			return;
-
-		default:
-			bprint(i, "%%%c", *f);
-			break;
-		}
-	}
-	*i->curr = 0;
-}
-
-static void
-copz(int cop, Instr *i)
-{
-	char *f, *m, buf[16];
-
-	m = buf;
-	f = "%t,%d";
-	switch (i->rs) {
-
-	case 0:
-		sprint(buf, "mfc%d", cop);
-		break;
-
-	case 2:
-		sprint(buf, "cfc%d", cop);
-		break;
-
-	case 4:
-		sprint(buf, "mtc%d", cop);
-		break;
-
-	case 6:
-		sprint(buf, "ctc%d", cop);
-		break;
-
-	case 8:
-		f = "%b";
-		switch (i->rt) {
-
-		case 0:
-			sprint(buf, "bc%df", cop);
-			break;
-
-		case 1:
-			sprint(buf, "bc%dt", cop);
-			break;
-
-		case 2:
-			sprint(buf, "bc%dfl", cop);
-			break;
-
-		case 3:
-			sprint(buf, "bc%dtl", cop);
-			break;
-
-		default:
-			sprint(buf, "cop%d", cop);
-			f = mipscoxxx;
-			break;
-		}
-		break;
-
-	default:
-		sprint(buf, "cop%d", cop);
-		if (i->rs & 0x10)
-			f = "function %c";
-		else
-			f = mipscoxxx;
-		break;
-	}
-	format(m, i, f);
-}
-
-static void
-cop0(Instr *i)
-{
-	char *m = 0;
-
-	if (i->rs < 8) {
-		switch (i->rs) {
-
-		case 0:
-		case 1:
-			format("MOVW", i, "%m,R%t");
-			return;
-
-		case 4:
-		case 5:
-			format("MOVW", i, "R%t,%m");
-			return;
-		}
-	}
-	else if (i->rs >= 0x10) {
-		switch (i->cofun) {
-	
-		case 1:
-			m = "TLBR";
-			break;
-	
-		case 2:
-			m = "TLBWI";
-			break;
-	
-		case 6:
-			m = "TLBWR";
-			break;
-	
-		case 8:
-			m = "TLBP";
-			break;
-	
-		case 16:
-			m = "RFE";
-			break;
-	
-		case 24:
-			m = "ERET";
-			break;
-
-		case 32:
-			m = "WAIT";
-			break;
-		}
-		if (m) {
-			format(m, i, 0);
-			return;
-		}
-	}
-	copz(0, i);
-}
-
-static void
-cop1(Instr *i)
-{
-	char *m = "MOVW";
-
-	switch (i->rs) {
-
-	case 0:
-		format(m, i, "F%d,R%t");
-		return;
-
-	case 2:
-		format(m, i, "FCR%d,R%t");
-		return;
-
-	case 4:
-		format(m, i, "R%t,F%d");
-		return;
-
-	case 6:
-		format(m, i, "R%t,FCR%d");
-		return;
-
-	case 8:
-		switch (i->rt) {
-
-		case 0:
-			format("BFPF", i, "%b");
-			return;
-
-		case 1:
-			format("BFPT", i, "%b");
-			return;
-		}
-		break;
-	}
-	copz(1, i);
-}
-
-static int
-printins(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-	Opcode *o;
-	uint8_t op;
-
-	i.curr = buf;
-	i.end = buf+n-1;
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	switch (i.op) {
-
-	case 0x00:					/* SPECIAL */
-		o = sopcodes;
-		op = i.function;
-		break;
-
-	case 0x01:					/* REGIMM */
-		o = ropcodes;
-		op = i.rt;
-		break;
-
-	case 0x10:					/* COP0 */
-		cop0(&i);
-		return i.size*4;
-
-	case 0x11:					/* COP1 */
-		if (i.rs & 0x10) {
-			o = fopcodes;
-			op = i.function;
-			break;
-		}
-		cop1(&i);
-		return i.size*4;
-
-	case 0x12:					/* COP2 */
-	case 0x13:					/* COP3 */
-		copz(i.op-0x10, &i);
-		return i.size*4;
-
-	default:
-		o = opcodes;
-		op = i.op;
-		break;
-	}
-	if (o[op].f)
-		(*o[op].f)(&o[op], &i);
-	else
-		format(o[op].mnemonic, &i, o[op].ken);
-	return i.size*4;
-}
-
-extern	int	_mipscoinst(Map *, uint64_t, char*, int);
-
-	/* modifier 'I' toggles the default disassembler type */
-static int
-mipsinst(Map *map, uint64_t pc, char modifier, char *buf, int n)
-{
-	if ((asstype == AMIPSCO && modifier == 'i')
-		|| (asstype == AMIPS && modifier == 'I'))
-		return _mipscoinst(map, pc, buf, n);
-	else
-		return printins(map, pc, buf, n);
-}
-
-static int
-mipsdas(Map *map, uint64_t pc, char *buf, int n)
-{
-	Instr i;
-
-	i.curr = buf;
-	i.end = buf+n;
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	if (i.end-i.curr > 8)
-		i.curr = _hexify(buf, i.w0, 7);
-	if (i.size == 2 && i.end-i.curr > 9) {
-		*i.curr++ = ' ';
-		i.curr = _hexify(i.curr, i.w1, 7);
-	}
-	*i.curr = 0;
-	return i.size*4;
-}
-
-static int
-mipsinstlen(Map *map, uint64_t pc)
-{
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	return i.size*4;
-}
-
-static int
-mipsfoll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
-{
-	uint32_t w, l;
-	char buf[8];
-	Instr i;
-
-	mymap = map;
-	if (mkinstr(pc, &i) < 0)
-		return -1;
-	w = i.w0;
-	if((w&0xF3600000) == 0x41000000){	/* branch on coprocessor */
-    Conditional:
-		foll[0] = pc+8;
-		l = ((w&0xFFFF)<<2);
-		if(w & 0x8000)
-			l |= 0xFFFC0000;
-		foll[1] = pc+4 + l;
-		return 2;
-	}
-
-	l = (w&0xFC000000)>>26;
-	switch(l){
-	case 0:		/* SPECIAL */
-		if((w&0x3E) == 0x08){	/* JR, JALR */
-			sprint(buf, "R%ld", (w>>21)&0x1F);
-			foll[0] = (*rget)(map, buf);
-			return 1;
-		}
-		foll[0] = pc+i.size*4;
-		return 1;
-	case 0x30:	/* Load-Linked followed by NOP, STC */
-		foll[0] = pc+12;
-		return 1;
-	case 1:		/* BCOND */
-	case 4:		/* BEQ */
-	case 20:	/* BEQL */
-	case 5:		/* BNE */
-	case 21:	/* BNEL */
-	case 6:		/* BLEZ */
-	case 22:	/* BLEZL */
-	case 7:		/* BGTZ */
-	case 23:	/* BGTZL */
-		goto Conditional;
-	case 2:		/* J */
-	case 3:		/* JAL */
-		foll[0] = (pc&0xF0000000) | ((w&0x03FFFFFF)<<2);
-		return 1;
-	}
-
-	foll[0] = pc+i.size*4;
-	return 1;
-}

+ 0 - 143
sys/src/libmach/vobj.c

@@ -1,143 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-/*
- * vobj.c - identify and parse a mips object file
- */
-#include <u.h>
-#include <libc.h>
-#include <bio.h>
-#include <mach.h>
-#include "vc/v.out.h"
-#include "obj.h"
-
-typedef struct Addr	Addr;
-struct Addr
-{
-	char	type;
-	char	sym;
-	char	name;
-};
-static Addr addr(Biobuf*);
-static char type2char(int);
-static void skip(Biobuf*, int);
-
-int
-_isv(char *s)
-{
-	return  s[0] == ANAME				/* ANAME */
-		&& s[1] == D_FILE			/* type */
-		&& s[2] == 1				/* sym */
-		&& s[3] == '<';				/* name of file */
-}
-
-int
-_readv(Biobuf *bp, Prog *p)
-{
-	int as, n;
-	Addr a;
-
-	as = Bgetc(bp);			/* as */
-	if(as < 0)
-		return 0;
-	p->kind = aNone;
-	p->sig = 0;
-	if(as == ANAME || as == ASIGNAME){
-		if(as == ASIGNAME){
-			Bread(bp, &p->sig, 4);
-			p->sig = leswal(p->sig);
-		}
-		p->kind = aName;
-		p->type = type2char(Bgetc(bp));		/* type */
-		p->sym = Bgetc(bp);			/* sym */
-		n = 0;
-		for(;;) {
-			as = Bgetc(bp);
-			if(as < 0)
-				return 0;
-			n++;
-			if(as == 0)
-				break;
-		}
-		p->id = malloc(n);
-		if(p->id == 0)
-			return 0;
-		Bseek(bp, -n, 1);
-		if(Bread(bp, p->id, n) != n)
-			return 0;
-		return 1;
-	}
-	if(as == ATEXT)
-		p->kind = aText;
-	else if(as == AGLOBL)
-		p->kind = aData;
-	skip(bp, 5);		/* reg(1), lineno(4) */
-	a = addr(bp);
-	addr(bp);
-	if(a.type != D_OREG || a.name != D_STATIC && a.name != D_EXTERN)
-		p->kind = aNone;
-	p->sym = a.sym;
-	return 1;
-}
-
-static Addr
-addr(Biobuf *bp)
-{
-	Addr a;
-	int32_t off;
-
-	a.type = Bgetc(bp);	/* a.type */
-	skip(bp,1);		/* reg */
-	a.sym = Bgetc(bp);	/* sym index */
-	a.name = Bgetc(bp);	/* sym type */
-	switch(a.type){
-	default:
-	case D_NONE: case D_REG: case D_FREG: case D_MREG:
-	case D_FCREG: case D_LO: case D_HI:
-		break;
-	case D_OREG:
-	case D_CONST:
-	case D_BRANCH:
-		off = Bgetc(bp);
-		off |= Bgetc(bp) << 8;
-		off |= Bgetc(bp) << 16;
-		off |= Bgetc(bp) << 24;
-		if(off < 0)
-			off = -off;
-		if(a.sym && (a.name==D_PARAM || a.name==D_AUTO))
-			_offset(a.sym, off);
-		break;
-	case D_SCONST:
-		skip(bp, NSNAME);
-		break;
-	case D_FCONST:
-		skip(bp, 8);
-		break;
-	}
-	return a;
-}
-
-static char
-type2char(int t)
-{
-	switch(t){
-	case D_EXTERN:		return 'U';
-	case D_STATIC:		return 'b';
-	case D_AUTO:		return 'a';
-	case D_PARAM:		return 'p';
-	default:		return UNKNOWN;
-	}
-}
-
-static void
-skip(Biobuf *bp, int n)
-{
-	while (n-- > 0)
-		Bgetc(bp);
-}