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@@ -4,8 +4,9 @@
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* 82543GC Intel PRO/1000 T
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* 82544EI Intel PRO/1000 XT
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* 82540EM Intel PRO/1000 MT
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- * 82541GI (unfinished)
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- *
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+ * 82541GI
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+ * 82547GI
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+ * 82546GB
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* To Do:
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* finish autonegotiation code;
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* integrate fiber stuff back in (this ONLY handles
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@@ -26,6 +27,18 @@
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#include "etherif.h"
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#include "ethermii.h"
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+enum {
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+ i82542 = (0x1000<<16)|0x8086,
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+ i82543gc = (0x1004<<16)|0x8086,
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+ i82544ei = (0x1008<<16)|0x8086,
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+ i82547ei = (0x1019<<16)|0x8086,
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+ i82540em = (0x100E<<16)|0x8086,
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+ i82540eplp = (0x101E<<16)|0x8086,
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+ i82547gi = (0x1075<<16)|0x8086,
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+ i82541gi = (0x1076<<16)|0x8086,
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+ i82546gb = (0x1079<<16)|0x8086,
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+};
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+
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enum {
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Ctrl = 0x00000000, /* Device Control */
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Status = 0x00000008, /* Device Status */
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@@ -361,7 +374,7 @@ enum { /* Rd errors */
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};
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typedef struct Td Td;
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-struct Td { /* Transmit Descriptor */
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+struct Td { /* Transmit Descriptor */
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union {
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uint addr[2]; /* Data */
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struct { /* Context */
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@@ -613,6 +626,7 @@ igbeifstat(Ether* edev, void* a, long n, ulong offset)
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l += snprint(p+l, 2*READSTR-l, "ixcs: %ud %ud %ud\n",
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ctlr->ixsm, ctlr->ipcs, ctlr->tcpcs);
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l += snprint(p+l, 2*READSTR-l, "rdtr: %ud\n", ctlr->rdtr);
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+ l += snprint(p+l, 2*READSTR-l, "Ctrlext: %08x\n", csr32r(ctlr, Ctrlext));
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l += snprint(p+l, 2*READSTR-l, "eeprom:");
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for(i = 0; i < 0x40; i++){
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@@ -788,14 +802,13 @@ igbelproc(void* arg)
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if(miistatus(ctlr->mii) < 0)
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//continue;
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goto enable;
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-print("lproc status ok\n");
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phy = ctlr->mii->curphy;
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ctrl = csr32r(ctlr, Ctrl);
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switch(ctlr->id){
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- case (0x1004<<16)|0x8086: /* 82543GC */
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- case (0x1008<<16)|0x8086: /* 82544EI */
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+ case i82543gc:
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+ case i82544ei:
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default:
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if(!(ctrl & Asde)){
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ctrl &= ~(SspeedMASK|Ilos|Fd);
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@@ -808,9 +821,11 @@ print("lproc status ok\n");
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ctrl |= Fd;
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}
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break;
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+
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+ case i82540em:
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+ case i82540eplp:
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+ case i82547gi:
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+ case i82541gi:
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break;
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}
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@@ -833,7 +848,6 @@ print("lproc status ok\n");
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if(phy->tfc)
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ctrl |= Tfce;
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csr32w(ctlr, Ctrl, ctrl);
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-print("ctrl %8.8uX\n", ctrl);
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enable:
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ctlr->lim = 0;
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@@ -855,11 +869,14 @@ igbetxinit(Ctlr* ctlr)
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default:
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r = 6;
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break;
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- case (0x1004<<16)|0x8086: /* 82543GC */
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- case (0x1008<<16)|0x8086: /* 82544EI */
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- case (0x100E<<16)|0x8086: /* 82440EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82543gc:
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+ case i82544ei:
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+ case i82547ei:
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+ case i82540em:
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+ case i82540eplp:
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+ case i82541gi:
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+ case i82546gb:
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+ case i82547gi:
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r = 8;
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break;
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}
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@@ -890,9 +907,11 @@ igbetxinit(Ctlr* ctlr)
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switch(ctlr->id){
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default:
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break;
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82540em:
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+ case i82540eplp:
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+ case i82547gi:
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+ case i82546gb:
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+ case i82541gi:
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r = csr32r(ctlr, Txdctl);
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r &= ~WthreshMASK;
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r |= Gran|(4<<WthreshSHIFT);
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@@ -1018,9 +1037,11 @@ igberxinit(Ctlr* ctlr)
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igbereplenish(ctlr);
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switch(ctlr->id){
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82540em:
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+ case i82540eplp:
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+ case i82541gi:
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+ case i82546gb:
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+ case i82547gi:
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csr32w(ctlr, Radv, 64);
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break;
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}
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@@ -1379,7 +1400,7 @@ igbemii(Ctlr* ctlr)
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ctrl |= Slu;
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switch(ctlr->id){
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- case (0x1004<<16)|0x8086: /* 82543GC */
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+ case i82543gc:
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ctrl |= Frcdplx|Frcspd;
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csr32w(ctlr, Ctrl, ctrl);
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@@ -1406,10 +1427,13 @@ igbemii(Ctlr* ctlr)
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ctlr->mii->mir = i82543miimir;
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ctlr->mii->miw = i82543miimiw;
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break;
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- case (0x1008<<16)|0x8086: /* 82544EI*/
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82544ei:
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+ case i82547ei:
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+ case i82540em:
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+ case i82540eplp:
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+ case i82547gi:
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+ case i82541gi:
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+ case i82546gb:
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ctrl &= ~(Frcdplx|Frcspd);
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csr32w(ctlr, Ctrl, ctrl);
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ctlr->mii->mir = igbemiimir;
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@@ -1435,27 +1459,28 @@ igbemii(Ctlr* ctlr)
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* Set appropriate values then reset the PHY to have
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* changes noted.
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*/
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- r = miimir(ctlr->mii, 0x10);
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- r |= 0x0800; /* assert CRS on Tx */
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- r |= 0x0060; /* auto-crossover all speeds */
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- r |= 0x0002; /* polarity reversal enabled */
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- miimiw(ctlr->mii, 0x10, r);
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-
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- r = miimir(ctlr->mii, 0x14);
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- r |= 0x0070; /* +25MHz clock */
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- r &= ~0x0F00;
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- r |= 0x0100; /* 1x downshift */
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- miimiw(ctlr->mii, 0x14, r);
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-
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- miireset(ctlr->mii);
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-
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- p = 0;
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- if(ctlr->txcw & TxcwPs)
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- p |= AnaP;
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- if(ctlr->txcw & TxcwAs)
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- p |= AnaAP;
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- miiane(ctlr->mii, ~0, p, ~0);
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+ if (ctlr->id != i82547gi && ctlr->id != i82541gi && ctlr->id != i82546gb) {
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+ r = miimir(ctlr->mii, 16);
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+ r |= 0x0800; /* assert CRS on Tx */
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+ r |= 0x0060; /* auto-crossover all speeds */
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+ r |= 0x0002; /* polarity reversal enabled */
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+ miimiw(ctlr->mii, 16, r);
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+
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+ r = miimir(ctlr->mii, 20);
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+ r |= 0x0070; /* +25MHz clock */
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+ r &= ~0x0F00;
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+ r |= 0x0100; /* 1x downshift */
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+ miimiw(ctlr->mii, 20, r);
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+
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+ miireset(ctlr->mii);
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+ p = 0;
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+ if(ctlr->txcw & TxcwPs)
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+ p |= AnaP;
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+ if(ctlr->txcw & TxcwAs)
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+ p |= AnaAP;
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+ miiane(ctlr->mii, ~0, p, ~0);
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+ }
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return 0;
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}
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@@ -1558,9 +1583,11 @@ at93c46r(Ctlr* ctlr)
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default:
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areq = 0;
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break;
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82540em:
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+ case i82540eplp:
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+ case i82541gi:
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+ case i82547gi:
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+ case i82546gb:
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areq = 1;
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csr32w(ctlr, Eecd, eecd|Areq);
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for(i = 0; i < 1000; i++){
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@@ -1623,8 +1650,8 @@ igbedetach(Ctlr* ctlr)
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}
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if(csr32r(ctlr, Ctrl) & Devrst)
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return -1;
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-
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- csr32w(ctlr, Ctrlext, Eerst);
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+ r = csr32r(ctlr, Ctrlext);
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+ csr32w(ctlr, Ctrlext, r|Eerst);
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delay(1);
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for(timeo = 0; timeo < 1000; timeo++){
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if(!(csr32r(ctlr, Ctrlext) & Eerst))
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@@ -1637,9 +1664,11 @@ igbedetach(Ctlr* ctlr)
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switch(ctlr->id){
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default:
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break;
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- case (0x100E<<16)|0x8086: /* 82540EM */
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- case (0x101E<<16)|0x8086: /* 82540EPLP */
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-//check case (0x1076<<16)|0x8086: /* 82541GI */
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+ case i82540em:
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+ case i82540eplp:
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+ case i82541gi:
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+ case i82547gi:
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+ case i82546gb:
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r = csr32r(ctlr, Manc);
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r &= ~Arpen;
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csr32w(ctlr, Manc, r);
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@@ -1687,6 +1716,8 @@ igbereset(Ctlr* ctlr)
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* There are 16 addresses. The first should be the MAC address.
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* The others are cleared and not marked valid (MS bit of Rah).
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*/
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+ if (ctlr->id == i82546gb && BUSFNO(ctlr->pcidev->tbdf) == 1)
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+ ctlr->eeprom[Ea+2] += 0x100; // second interface
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for(i = Ea; i < Eaddrlen/2; i++){
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ctlr->ra[2*i] = ctlr->eeprom[i];
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ctlr->ra[2*i+1] = ctlr->eeprom[i]>>8;
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@@ -1712,56 +1743,59 @@ igbereset(Ctlr* ctlr)
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* Just in case the Eerst didn't load the defaults
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* (doesn't appear to fully on the 8243GC), do it manually.
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*/
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- txcw = csr32r(ctlr, Txcw);
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- txcw &= ~(TxcwAne|TxcwPauseMASK|TxcwFd);
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- ctrl = csr32r(ctlr, Ctrl);
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- ctrl &= ~(SwdpioloMASK|Frcspd|Ilos|Lrst|Fd);
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-
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- if(ctlr->eeprom[Icw1] & 0x0400){
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- ctrl |= Fd;
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- txcw |= TxcwFd;
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- }
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- if(ctlr->eeprom[Icw1] & 0x0200)
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- ctrl |= Lrst;
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- if(ctlr->eeprom[Icw1] & 0x0010)
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- ctrl |= Ilos;
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- if(ctlr->eeprom[Icw1] & 0x0800)
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- ctrl |= Frcspd;
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- swdpio = (ctlr->eeprom[Icw1] & 0x01E0)>>5;
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- ctrl |= swdpio<<SwdpioloSHIFT;
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- csr32w(ctlr, Ctrl, ctrl);
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+ if (ctlr->id == i82543gc) { // 82543
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+ txcw = csr32r(ctlr, Txcw);
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+ txcw &= ~(TxcwAne|TxcwPauseMASK|TxcwFd);
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+ ctrl = csr32r(ctlr, Ctrl);
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+ ctrl &= ~(SwdpioloMASK|Frcspd|Ilos|Lrst|Fd);
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- ctrl = csr32r(ctlr, Ctrlext);
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- ctrl &= ~(Ips|SwdpiohiMASK);
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- swdpio = (ctlr->eeprom[Icw2] & 0x00F0)>>4;
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- if(ctlr->eeprom[Icw1] & 0x1000)
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- ctrl |= Ips;
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- ctrl |= swdpio<<SwdpiohiSHIFT;
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- csr32w(ctlr, Ctrlext, ctrl);
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-
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- if(ctlr->eeprom[Icw2] & 0x0800)
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- txcw |= TxcwAne;
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- pause = (ctlr->eeprom[Icw2] & 0x3000)>>12;
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- txcw |= pause<<TxcwPauseSHIFT;
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- switch(pause){
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- default:
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- ctlr->fcrtl = 0x00002000;
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- ctlr->fcrth = 0x00004000;
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- txcw |= TxcwAs|TxcwPs;
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- break;
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- case 0:
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- ctlr->fcrtl = 0x00002000;
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- ctlr->fcrth = 0x00004000;
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- break;
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- case 2:
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- ctlr->fcrtl = 0;
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- ctlr->fcrth = 0;
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- txcw |= TxcwAs;
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- break;
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+ if(ctlr->eeprom[Icw1] & 0x0400){
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+ ctrl |= Fd;
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+ txcw |= TxcwFd;
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+ }
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+ if(ctlr->eeprom[Icw1] & 0x0200)
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+ ctrl |= Lrst;
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+ if(ctlr->eeprom[Icw1] & 0x0010)
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+ ctrl |= Ilos;
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+ if(ctlr->eeprom[Icw1] & 0x0800)
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+ ctrl |= Frcspd;
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+ swdpio = (ctlr->eeprom[Icw1] & 0x01E0)>>5;
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+ ctrl |= swdpio<<SwdpioloSHIFT;
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+ csr32w(ctlr, Ctrl, ctrl);
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+
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+ ctrl = csr32r(ctlr, Ctrlext);
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+ ctrl &= ~(Ips|SwdpiohiMASK);
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+ swdpio = (ctlr->eeprom[Icw2] & 0x00F0)>>4;
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+ if(ctlr->eeprom[Icw1] & 0x1000)
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+ ctrl |= Ips;
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+ ctrl |= swdpio<<SwdpiohiSHIFT;
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+ csr32w(ctlr, Ctrlext, ctrl);
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+
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+ if(ctlr->eeprom[Icw2] & 0x0800)
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+ txcw |= TxcwAne;
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+ pause = (ctlr->eeprom[Icw2] & 0x3000)>>12;
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+ txcw |= pause<<TxcwPauseSHIFT;
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+ switch(pause){
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+ default:
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+ ctlr->fcrtl = 0x00002000;
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+ ctlr->fcrth = 0x00004000;
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+ txcw |= TxcwAs|TxcwPs;
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+ break;
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+ case 0:
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+ ctlr->fcrtl = 0x00002000;
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+ ctlr->fcrth = 0x00004000;
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+ break;
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+ case 2:
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+ ctlr->fcrtl = 0;
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+ ctlr->fcrth = 0;
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+ txcw |= TxcwAs;
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+ break;
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+ }
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+ ctlr->txcw = txcw;
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+ csr32w(ctlr, Txcw, txcw);
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}
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- ctlr->txcw = txcw;
|
|
|
- csr32w(ctlr, Txcw, txcw);
|
|
|
|
|
|
+
|
|
|
/*
|
|
|
* Flow control - values from the datasheet.
|
|
|
*/
|
|
|
@@ -1794,11 +1828,14 @@ igbepci(void)
|
|
|
switch((p->did<<16)|p->vid){
|
|
|
default:
|
|
|
continue;
|
|
|
- case (0x1004<<16)|0x8086: /* 82543GC - copper */
|
|
|
- case (0x1008<<16)|0x8086: /* 82544EI - copper */
|
|
|
- case (0x100E<<16)|0x8086: /* 82540EM - copper */
|
|
|
- case (0x101E<<16)|0x8086: /* 82540EPLP - copper */
|
|
|
- case (0x1076<<16)|0x8086: /* 82541GI */
|
|
|
+ case i82543gc:
|
|
|
+ case i82544ei:
|
|
|
+ case i82547ei:
|
|
|
+ case i82540em:
|
|
|
+ case i82540eplp:
|
|
|
+ case i82547gi:
|
|
|
+ case i82541gi:
|
|
|
+ case i82546gb:
|
|
|
break;
|
|
|
}
|
|
|
|
David du Colombier