The Great Reformatting

Run `clang-format` across the kernel.

Signed-off-by: Dan Cross <cross@gajendra.net>

.clang-format

@@ -46,7 +46,7 @@ Cpp11BracedListStyle: true
 Standard:        Cpp11
 IndentWidth:     8
 TabWidth:        8
-UseTab: ForIndentation
+UseTab: Always
 BreakBeforeBraces: Linux
 ReflowComments: true
 SortIncludes: false
@@ -58,7 +58,7 @@ SpacesInCStyleCastParentheses: false
 SpaceAfterCStyleCast: false
 SpacesInContainerLiterals: true
 SpaceBeforeAssignmentOperators: true
-ContinuationIndentWidth: 4
+ContinuationIndentWidth: 8
 CommentPragmas:  '^ IWYU pragma:'
 ForEachMacros:   [ foreach, Q_FOREACH, BOOST_FOREACH ]
 SpaceBeforeParens: Never

sys/src/9/386/aoe.h

@@ -24,7 +24,7 @@ enum {
 };
 
 enum {
-	AEcmd	= 1,
+	AEcmd = 1,
 	AEarg,
 	AEdev,
 	AEcfg,
@@ -32,56 +32,56 @@ enum {
 };
 
 enum {
-	Aoetype	= 0x88a2,
-	Aoesectsz = 512,			/* standard sector size */
-	Aoever	= 1,
+	Aoetype = 0x88a2,
+	Aoesectsz = 512, /* standard sector size */
+	Aoever = 1,
 
-	AFerr	= 1<<2,
-	AFrsp	= 1<<3,
+	AFerr = 1 << 2,
+	AFrsp = 1 << 3,
 
-	AAFwrite= 1,
-	AAFext	= 1<<6,
+	AAFwrite = 1,
+	AAFext = 1 << 6,
 };
 
 typedef struct {
-	uint8_t	dst[Eaddrlen];
-	uint8_t	src[Eaddrlen];
-	uint8_t	type[2];
-	uint8_t	verflag;
-	uint8_t	error;
-	uint8_t	major[2];
-	uint8_t	minor;
-	uint8_t	cmd;
-	uint8_t	tag[4];
-	uint8_t	payload[];
+	uint8_t dst[Eaddrlen];
+	uint8_t src[Eaddrlen];
+	uint8_t type[2];
+	uint8_t verflag;
+	uint8_t error;
+	uint8_t major[2];
+	uint8_t minor;
+	uint8_t cmd;
+	uint8_t tag[4];
+	uint8_t payload[];
 } Aoehdr;
 
-#define AOEHDRSZ	offsetof(Aoehdr, payload[0])
+#define AOEHDRSZ offsetof(Aoehdr, payload[0])
 
 typedef struct {
 	Aoehdr;
-	uint8_t	aflag;
-	uint8_t	errfeat;
-	uint8_t	scnt;
-	uint8_t	cmdstat;
-	uint8_t	lba[6];
-	uint8_t	res[2];
-	uint8_t	_payload[];
+	uint8_t aflag;
+	uint8_t errfeat;
+	uint8_t scnt;
+	uint8_t cmdstat;
+	uint8_t lba[6];
+	uint8_t res[2];
+	uint8_t _payload[];
 } Aoeata;
 
-#define AOEATASZ	offsetof(Aoeata, payload[0])
+#define AOEATASZ offsetof(Aoeata, payload[0])
 
 typedef struct {
 	Aoehdr;
-	uint8_t	bufcnt[2];
-	uint8_t	fwver[2];
-	uint8_t	scnt;
-	uint8_t	verccmd;
-	uint8_t	cslen[2];
-	uint8_t	payload[];
+	uint8_t bufcnt[2];
+	uint8_t fwver[2];
+	uint8_t scnt;
+	uint8_t verccmd;
+	uint8_t cslen[2];
+	uint8_t payload[];
 } Aoeqc;
 
-#define AOEQCSZ		offsetof(Aoeqc, payload[0])
+#define AOEQCSZ offsetof(Aoeqc, payload[0])
 
 extern char Echange[];
 extern char Enotup[];

sys/src/9/386/devrtc.c

@@ -7,61 +7,59 @@
  * in the LICENSE file.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
 
 /*
  *  real time clock and non-volatile ram
  */
 
 enum {
-	Paddr=		0x70,	/* address port */
-	Pdata=		0x71,	/* data port */
+	Paddr = 0x70, /* address port */
+	Pdata = 0x71, /* data port */
 
-	Seconds=	0x00,
-	Minutes=	0x02,
-	Hours=		0x04,
-	Mday=		0x07,
-	Month=		0x08,
-	Year=		0x09,
-	Status=		0x0A,
+	Seconds = 0x00,
+	Minutes = 0x02,
+	Hours = 0x04,
+	Mday = 0x07,
+	Month = 0x08,
+	Year = 0x09,
+	Status = 0x0A,
 
-	Nvoff=		128,	/* where usable nvram lives */
-	Nvsize=		256,
+	Nvoff = 128, /* where usable nvram lives */
+	Nvsize = 256,
 
-	Nbcd=		6,
+	Nbcd = 6,
 };
 
-typedef struct Rtc	Rtc;
-struct Rtc
-{
-	int	sec;
-	int	min;
-	int	hour;
-	int	mday;
-	int	mon;
-	int	year;
+typedef struct Rtc Rtc;
+struct Rtc {
+	int sec;
+	int min;
+	int hour;
+	int mday;
+	int mon;
+	int year;
 };
 
-
-enum{
+enum {
 	Qdir = 0,
 	Qrtc,
 	Qnvram,
 };
 
-Dirtab rtcdir[]={
-	{".",	{Qdir, 0, QTDIR},	0,	0555},
-	{"nvram",	{Qnvram, 0},	Nvsize,	0664},
-	{"rtc",		{Qrtc, 0},	0,	0664},
+Dirtab rtcdir[] = {
+	{".", {Qdir, 0, QTDIR}, 0, 0555},
+	{"nvram", {Qnvram, 0}, Nvsize, 0664},
+	{"rtc", {Qrtc, 0}, 0, 0664},
 };
 
-static uint32_t rtc2sec(Rtc*);
-static void sec2rtc(uint32_t, Rtc*);
+static uint32_t rtc2sec(Rtc *);
+static void sec2rtc(uint32_t, Rtc *);
 
 void
 rtcinit(void)
@@ -70,47 +68,47 @@ rtcinit(void)
 		panic("rtcinit: ioalloc failed");
 }
 
-static Chan*
-rtcattach(char* spec)
+static Chan *
+rtcattach(char *spec)
 {
 	return devattach('r', spec);
 }
 
-static Walkqid*
-rtcwalk(Chan* c, Chan *nc, char** name, int nname)
+static Walkqid *
+rtcwalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	return devwalk(c, nc, name, nname, rtcdir, nelem(rtcdir), devgen);
 }
 
 static int32_t
-rtcstat(Chan* c, uint8_t* dp, int32_t n)
+rtcstat(Chan *c, uint8_t *dp, int32_t n)
 {
 	return devstat(c, dp, n, rtcdir, nelem(rtcdir), devgen);
 }
 
-static Chan*
-rtcopen(Chan* c, int omode)
+static Chan *
+rtcopen(Chan *c, int omode)
 {
 	Proc *up = externup();
 	omode = openmode(omode);
 	switch((uint32_t)c->qid.path){
 	case Qrtc:
-		if(strcmp(up->user, eve)!=0 && omode!=OREAD)
+		if(strcmp(up->user, eve) != 0 && omode != OREAD)
 			error(Eperm);
 		break;
 	case Qnvram:
-		if(strcmp(up->user, eve)!=0)
+		if(strcmp(up->user, eve) != 0)
 			error(Eperm);
 	}
 	return devopen(c, omode, rtcdir, nelem(rtcdir), devgen);
 }
 
 static void
-rtcclose(Chan* c)
+rtcclose(Chan *c)
 {
 }
 
-#define GETBCD(o) ((bcdclock[o]&0xf) + 10*(bcdclock[o]>>4))
+#define GETBCD(o) ((bcdclock[o] & 0xf) + 10 * (bcdclock[o] >> 4))
 
 static int32_t
 rtcextract(void)
@@ -126,12 +124,18 @@ rtcextract(void)
 			continue;
 
 		/* read clock values */
-		outb(Paddr, Seconds);	bcdclock[0] = inb(Pdata);
-		outb(Paddr, Minutes);	bcdclock[1] = inb(Pdata);
-		outb(Paddr, Hours);	bcdclock[2] = inb(Pdata);
-		outb(Paddr, Mday);	bcdclock[3] = inb(Pdata);
-		outb(Paddr, Month);	bcdclock[4] = inb(Pdata);
-		outb(Paddr, Year);	bcdclock[5] = inb(Pdata);
+		outb(Paddr, Seconds);
+		bcdclock[0] = inb(Pdata);
+		outb(Paddr, Minutes);
+		bcdclock[1] = inb(Pdata);
+		outb(Paddr, Hours);
+		bcdclock[2] = inb(Pdata);
+		outb(Paddr, Mday);
+		bcdclock[3] = inb(Pdata);
+		outb(Paddr, Month);
+		bcdclock[4] = inb(Pdata);
+		outb(Paddr, Year);
+		bcdclock[5] = inb(Pdata);
 
 		outb(Paddr, Status);
 		if((inb(Pdata) & 0x80) == 0)
@@ -177,13 +181,14 @@ rtctime(void)
 	}
 	iunlock(&nvrtlock);
 
-	if(i == 100) print("we are boofheads\n");
+	if(i == 100)
+		print("we are boofheads\n");
 
 	return t;
 }
 
 static int32_t
-rtcread(Chan* c, void* buf, int32_t n, int64_t off)
+rtcread(Chan *c, void *buf, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	uint32_t t;
@@ -209,7 +214,7 @@ rtcread(Chan* c, void* buf, int32_t n, int64_t off)
 		for(t = offset; t < offset + n; t++){
 			if(t >= Nvsize)
 				break;
-			outb(Paddr, Nvoff+t);
+			outb(Paddr, Nvoff + t);
 			*a++ = inb(Pdata);
 		}
 		iunlock(&nvrtlock);
@@ -228,10 +233,10 @@ rtcread(Chan* c, void* buf, int32_t n, int64_t off)
 	return 0;
 }
 
-#define PUTBCD(n,o) bcdclock[o] = (n % 10) | (((n / 10) % 10)<<4)
+#define PUTBCD(n, o) bcdclock[o] = (n % 10) | (((n / 10) % 10) << 4)
 
 static int32_t
-rtcwrite(Chan* c, void* buf, int32_t n, int64_t off)
+rtcwrite(Chan *c, void *buf, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	int t;
@@ -242,10 +247,9 @@ rtcwrite(Chan* c, void* buf, int32_t n, int64_t off)
 	char *cp, *ep;
 	uint32_t offset = off;
 
-	if(offset!=0)
+	if(offset != 0)
 		error(Ebadarg);
 
-
 	switch((uint32_t)c->qid.path){
 	case Qrtc:
 		/*
@@ -254,7 +258,7 @@ rtcwrite(Chan* c, void* buf, int32_t n, int64_t off)
 		cp = ep = buf;
 		ep += n;
 		while(cp < ep){
-			if(*cp>='0' && *cp<='9')
+			if(*cp >= '0' && *cp <= '9')
 				break;
 			cp++;
 		}
@@ -275,12 +279,18 @@ rtcwrite(Chan* c, void* buf, int32_t n, int64_t off)
 		 *  write the clock
 		 */
 		ilock(&nvrtlock);
-		outb(Paddr, Seconds);	outb(Pdata, bcdclock[0]);
-		outb(Paddr, Minutes);	outb(Pdata, bcdclock[1]);
-		outb(Paddr, Hours);	outb(Pdata, bcdclock[2]);
-		outb(Paddr, Mday);	outb(Pdata, bcdclock[3]);
-		outb(Paddr, Month);	outb(Pdata, bcdclock[4]);
-		outb(Paddr, Year);	outb(Pdata, bcdclock[5]);
+		outb(Paddr, Seconds);
+		outb(Pdata, bcdclock[0]);
+		outb(Paddr, Minutes);
+		outb(Pdata, bcdclock[1]);
+		outb(Paddr, Hours);
+		outb(Pdata, bcdclock[2]);
+		outb(Paddr, Mday);
+		outb(Pdata, bcdclock[3]);
+		outb(Paddr, Month);
+		outb(Pdata, bcdclock[4]);
+		outb(Paddr, Year);
+		outb(Pdata, bcdclock[5]);
 		iunlock(&nvrtlock);
 		return n;
 	case Qnvram:
@@ -301,7 +311,7 @@ rtcwrite(Chan* c, void* buf, int32_t n, int64_t off)
 		for(t = offset; t < offset + n; t++){
 			if(t >= Nvsize)
 				break;
-			outb(Paddr, Nvoff+t);
+			outb(Paddr, Nvoff + t);
 			outb(Pdata, *a++);
 		}
 		iunlock(&nvrtlock);
@@ -335,28 +345,24 @@ Dev rtcdevtab = {
 };
 
 #define SEC2MIN 60L
-#define SEC2HOUR (60L*SEC2MIN)
-#define SEC2DAY (24L*SEC2HOUR)
+#define SEC2HOUR (60L * SEC2MIN)
+#define SEC2DAY (24L * SEC2HOUR)
 
 /*
  *  days per month plus days/year
  */
-static	int	dmsize[] =
-{
-	365, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
-static	int	ldmsize[] =
-{
-	366, 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
+static int dmsize[] = {
+	365, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
+static int ldmsize[] = {
+	366, 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
 
 /*
  *  return the days/month for the given year
  */
-static int*
+static int *
 yrsize(int y)
 {
-	if((y%4) == 0 && ((y%100) != 0 || (y%400) == 0))
+	if((y % 4) == 0 && ((y % 100) != 0 || (y % 400) == 0))
 		return ldmsize;
 	else
 		return dmsize;
@@ -389,7 +395,7 @@ rtc2sec(Rtc *rtc)
 	for(i = 1; i < rtc->mon; i++)
 		secs += d2m[i] * SEC2DAY;
 
-	secs += (rtc->mday-1) * SEC2DAY;
+	secs += (rtc->mday - 1) * SEC2DAY;
 	secs += rtc->hour * SEC2HOUR;
 	secs += rtc->min * SEC2MIN;
 	secs += rtc->sec;
@@ -412,7 +418,7 @@ sec2rtc(uint32_t secs, Rtc *rtc)
 	 */
 	hms = secs % SEC2DAY;
 	day = secs / SEC2DAY;
-	if(hms < 0) {
+	if(hms < 0){
 		hms += SEC2DAY;
 		day -= 1;
 	}
@@ -433,8 +439,8 @@ sec2rtc(uint32_t secs, Rtc *rtc)
 		for(d = 1970; day >= *yrsize(d); d++)
 			day -= *yrsize(d);
 	else
-		for (d = 1970; day < 0; d--)
-			day += *yrsize(d-1);
+		for(d = 1970; day < 0; d--)
+			day += *yrsize(d - 1);
 	rtc->year = d;
 
 	/*

sys/src/9/386/nv_dma.h

@@ -1,4 +1,4 @@
- /***************************************************************************\
+/***************************************************************************\
 |*                                                                           *|
 |*       Copyright 2003 NVIDIA, Corporation.  All rights reserved.           *|
 |*                                                                           *|
@@ -39,140 +39,136 @@
 
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dma.h,v 1.2 2003/07/31 21:41:26 mvojkovi Exp $ */
 
-#define SURFACE_FORMAT                                              0x00000300
-#define SURFACE_FORMAT_DEPTH8                                       0x00000001
-#define SURFACE_FORMAT_DEPTH15                                      0x00000002
-#define SURFACE_FORMAT_DEPTH16                                      0x00000004
-#define SURFACE_FORMAT_DEPTH24                                      0x00000006
-#define SURFACE_PITCH                                               0x00000304
-#define SURFACE_PITCH_SRC                                           15:0
-#define SURFACE_PITCH_DST                                           31:16
-#define SURFACE_OFFSET_SRC                                          0x00000308
-#define SURFACE_OFFSET_DST                                          0x0000030C
+#define SURFACE_FORMAT 0x00000300
+#define SURFACE_FORMAT_DEPTH8 0x00000001
+#define SURFACE_FORMAT_DEPTH15 0x00000002
+#define SURFACE_FORMAT_DEPTH16 0x00000004
+#define SURFACE_FORMAT_DEPTH24 0x00000006
+#define SURFACE_PITCH 0x00000304
+#define SURFACE_PITCH_SRC 15 : 0
+#define SURFACE_PITCH_DST 31 : 16
+#define SURFACE_OFFSET_SRC 0x00000308
+#define SURFACE_OFFSET_DST 0x0000030C
 
-#define ROP_SET                                                     0x00002300
+#define ROP_SET 0x00002300
 
-#define PATTERN_FORMAT                                              0x00004300
-#define PATTERN_FORMAT_DEPTH8                                       0x00000003
-#define PATTERN_FORMAT_DEPTH16                                      0x00000001
-#define PATTERN_FORMAT_DEPTH24                                      0x00000003
-#define PATTERN_COLOR_0                                             0x00004310
-#define PATTERN_COLOR_1                                             0x00004314
-#define PATTERN_PATTERN_0                                           0x00004318
-#define PATTERN_PATTERN_1                                           0x0000431C
+#define PATTERN_FORMAT 0x00004300
+#define PATTERN_FORMAT_DEPTH8 0x00000003
+#define PATTERN_FORMAT_DEPTH16 0x00000001
+#define PATTERN_FORMAT_DEPTH24 0x00000003
+#define PATTERN_COLOR_0 0x00004310
+#define PATTERN_COLOR_1 0x00004314
+#define PATTERN_PATTERN_0 0x00004318
+#define PATTERN_PATTERN_1 0x0000431C
 
-#define CLIP_POINT                                                  0x00006300
-#define CLIP_POINT_X                                                15:0
-#define CLIP_POINT_Y                                                31:16
-#define CLIP_SIZE                                                   0x00006304
-#define CLIP_SIZE_WIDTH                                             15:0
-#define CLIP_SIZE_HEIGHT                                            31:16
+#define CLIP_POINT 0x00006300
+#define CLIP_POINT_X 15 : 0
+#define CLIP_POINT_Y 31 : 16
+#define CLIP_SIZE 0x00006304
+#define CLIP_SIZE_WIDTH 15 : 0
+#define CLIP_SIZE_HEIGHT 31 : 16
 
-#define LINE_FORMAT                                                 0x00008300
-#define LINE_FORMAT_DEPTH8                                          0x00000003
-#define LINE_FORMAT_DEPTH16                                         0x00000001
-#define LINE_FORMAT_DEPTH24                                         0x00000003
-#define LINE_COLOR                                                  0x00008304
-#define LINE_MAX_LINES                                              16
-#define LINE_LINES(i)                                               0x00008400\
-                                                                    +(i)*8
-#define LINE_LINES_POINT0_X                                         15:0
-#define LINE_LINES_POINT0_Y                                         31:16 
-#define LINE_LINES_POINT1_X                                         47:32
-#define LINE_LINES_POINT1_Y                                         63:48
+#define LINE_FORMAT 0x00008300
+#define LINE_FORMAT_DEPTH8 0x00000003
+#define LINE_FORMAT_DEPTH16 0x00000001
+#define LINE_FORMAT_DEPTH24 0x00000003
+#define LINE_COLOR 0x00008304
+#define LINE_MAX_LINES 16
+#define LINE_LINES(i) 0x00008400 + (i)*8
+#define LINE_LINES_POINT0_X 15 : 0
+#define LINE_LINES_POINT0_Y 31 : 16
+#define LINE_LINES_POINT1_X 47 : 32
+#define LINE_LINES_POINT1_Y 63 : 48
 
-#define BLIT_POINT_SRC                                              0x0000A300
-#define BLIT_POINT_SRC_X                                            15:0
-#define BLIT_POINT_SRC_Y                                            31:16
-#define BLIT_POINT_DST                                              0x0000A304
-#define BLIT_POINT_DST_X                                            15:0
-#define BLIT_POINT_DST_Y                                            31:16
-#define BLIT_SIZE                                                   0x0000A308
-#define BLIT_SIZE_WIDTH                                             15:0
-#define BLIT_SIZE_HEIGHT                                            31:16
+#define BLIT_POINT_SRC 0x0000A300
+#define BLIT_POINT_SRC_X 15 : 0
+#define BLIT_POINT_SRC_Y 31 : 16
+#define BLIT_POINT_DST 0x0000A304
+#define BLIT_POINT_DST_X 15 : 0
+#define BLIT_POINT_DST_Y 31 : 16
+#define BLIT_SIZE 0x0000A308
+#define BLIT_SIZE_WIDTH 15 : 0
+#define BLIT_SIZE_HEIGHT 31 : 16
 
-#define RECT_FORMAT                                                 0x0000C300
-#define RECT_FORMAT_DEPTH8                                          0x00000003
-#define RECT_FORMAT_DEPTH16                                         0x00000001
-#define RECT_FORMAT_DEPTH24                                         0x00000003
-#define RECT_SOLID_COLOR                                            0x0000C3FC
-#define RECT_SOLID_RECTS_MAX_RECTS                                  32
-#define RECT_SOLID_RECTS(i)                                         0x0000C400\
-                                                                    +(i)*8
-#define RECT_SOLID_RECTS_Y                                          15:0
-#define RECT_SOLID_RECTS_X                                          31:16
-#define RECT_SOLID_RECTS_HEIGHT                                     47:32
-#define RECT_SOLID_RECTS_WIDTH                                      63:48
+#define RECT_FORMAT 0x0000C300
+#define RECT_FORMAT_DEPTH8 0x00000003
+#define RECT_FORMAT_DEPTH16 0x00000001
+#define RECT_FORMAT_DEPTH24 0x00000003
+#define RECT_SOLID_COLOR 0x0000C3FC
+#define RECT_SOLID_RECTS_MAX_RECTS 32
+#define RECT_SOLID_RECTS(i) 0x0000C400 + (i)*8
+#define RECT_SOLID_RECTS_Y 15 : 0
+#define RECT_SOLID_RECTS_X 31 : 16
+#define RECT_SOLID_RECTS_HEIGHT 47 : 32
+#define RECT_SOLID_RECTS_WIDTH 63 : 48
 
-#define RECT_EXPAND_ONE_COLOR_CLIP                                  0x0000C7EC
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_X                         15:0
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_Y                         31:16
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_X                         47:32
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_Y                         63:48
-#define RECT_EXPAND_ONE_COLOR_COLOR                                 0x0000C7F4
-#define RECT_EXPAND_ONE_COLOR_SIZE                                  0x0000C7F8
-#define RECT_EXPAND_ONE_COLOR_SIZE_WIDTH                            15:0
-#define RECT_EXPAND_ONE_COLOR_SIZE_HEIGHT                           31:16
-#define RECT_EXPAND_ONE_COLOR_POINT                                 0x0000C7FC
-#define RECT_EXPAND_ONE_COLOR_POINT_X                               15:0
-#define RECT_EXPAND_ONE_COLOR_POINT_Y                               31:16
-#define RECT_EXPAND_ONE_COLOR_DATA_MAX_DWORDS                       128
-#define RECT_EXPAND_ONE_COLOR_DATA(i)                               0x0000C800\
-                                                                    +(i)*4
+#define RECT_EXPAND_ONE_COLOR_CLIP 0x0000C7EC
+#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_X 15 : 0
+#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_Y 31 : 16
+#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_X 47 : 32
+#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_Y 63 : 48
+#define RECT_EXPAND_ONE_COLOR_COLOR 0x0000C7F4
+#define RECT_EXPAND_ONE_COLOR_SIZE 0x0000C7F8
+#define RECT_EXPAND_ONE_COLOR_SIZE_WIDTH 15 : 0
+#define RECT_EXPAND_ONE_COLOR_SIZE_HEIGHT 31 : 16
+#define RECT_EXPAND_ONE_COLOR_POINT 0x0000C7FC
+#define RECT_EXPAND_ONE_COLOR_POINT_X 15 : 0
+#define RECT_EXPAND_ONE_COLOR_POINT_Y 31 : 16
+#define RECT_EXPAND_ONE_COLOR_DATA_MAX_DWORDS 128
+#define RECT_EXPAND_ONE_COLOR_DATA(i) 0x0000C800 + (i)*4
 
-#define RECT_EXPAND_TWO_COLOR_CLIP                                  0x0000CBE4
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_X                         15:0
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_Y                         31:16
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_X                         47:32
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_Y                         63:48
-#define RECT_EXPAND_TWO_COLOR_COLOR_0                               0x0000CBEC
-#define RECT_EXPAND_TWO_COLOR_COLOR_1                               0x0000CBF0
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN                               0x0000CBF4
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN_WIDTH                         15:0
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN_HEIGHT                        31:16
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT                              0x0000CBF8
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_WIDTH                        15:0
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_HEIGHT                       31:16
-#define RECT_EXPAND_TWO_COLOR_POINT                                 0x0000CBFC
-#define RECT_EXPAND_TWO_COLOR_POINT_X                               15:0
-#define RECT_EXPAND_TWO_COLOR_POINT_Y                               31:16
-#define RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS                       128
-#define RECT_EXPAND_TWO_COLOR_DATA(i)                               0x0000CC00\
-                                                                    +(i)*4
+#define RECT_EXPAND_TWO_COLOR_CLIP 0x0000CBE4
+#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_X 15 : 0
+#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_Y 31 : 16
+#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_X 47 : 32
+#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_Y 63 : 48
+#define RECT_EXPAND_TWO_COLOR_COLOR_0 0x0000CBEC
+#define RECT_EXPAND_TWO_COLOR_COLOR_1 0x0000CBF0
+#define RECT_EXPAND_TWO_COLOR_SIZE_IN 0x0000CBF4
+#define RECT_EXPAND_TWO_COLOR_SIZE_IN_WIDTH 15 : 0
+#define RECT_EXPAND_TWO_COLOR_SIZE_IN_HEIGHT 31 : 16
+#define RECT_EXPAND_TWO_COLOR_SIZE_OUT 0x0000CBF8
+#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_WIDTH 15 : 0
+#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_HEIGHT 31 : 16
+#define RECT_EXPAND_TWO_COLOR_POINT 0x0000CBFC
+#define RECT_EXPAND_TWO_COLOR_POINT_X 15 : 0
+#define RECT_EXPAND_TWO_COLOR_POINT_Y 31 : 16
+#define RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS 128
+#define RECT_EXPAND_TWO_COLOR_DATA(i) 0x0000CC00 + (i)*4
 
-#define STRETCH_BLIT_FORMAT                                         0x0000E300
-#define STRETCH_BLIT_FORMAT_DEPTH8                                  0x00000004
-#define STRETCH_BLIT_FORMAT_DEPTH16                                 0x00000007
-#define STRETCH_BLIT_FORMAT_DEPTH24                                 0x00000004
-#define STRETCH_BLIT_FORMAT_X8R8G8B8                                0x00000004
-#define STRETCH_BLIT_FORMAT_YUYV                                    0x00000005
-#define STRETCH_BLIT_FORMAT_UYVY                                    0x00000006
-#define STRETCH_BLIT_CLIP_POINT                                     0x0000E308
-#define STRETCH_BLIT_CLIP_POINT_X                                   15:0 
-#define STRETCH_BLIT_CLIP_POINT_Y                                   31:16
-#define STRETCH_BLIT_CLIP_SIZE                                      0x0000E30C
-#define STRETCH_BLIT_CLIP_SIZE_WIDTH                                15:0
-#define STRETCH_BLIT_CLIP_SIZE_HEIGHT                               31:16
-#define STRETCH_BLIT_DST_POINT                                      0x0000E310
-#define STRETCH_BLIT_DST_POINT_X                                    15:0
-#define STRETCH_BLIT_DST_POINT_Y                                    31:16
-#define STRETCH_BLIT_DST_SIZE                                       0x0000E314
-#define STRETCH_BLIT_DST_SIZE_WIDTH                                 15:0
-#define STRETCH_BLIT_DST_SIZE_HEIGHT                                31:16
-#define STRETCH_BLIT_DU_DX                                          0x0000E318
-#define STRETCH_BLIT_DV_DY                                          0x0000E31C
-#define STRETCH_BLIT_SRC_SIZE                                       0x0000E400
-#define STRETCH_BLIT_SRC_SIZE_WIDTH                                 15:0
-#define STRETCH_BLIT_SRC_SIZE_HEIGHT                                31:16
-#define STRETCH_BLIT_SRC_FORMAT                                     0x0000E404
-#define STRETCH_BLIT_SRC_FORMAT_PITCH                               15:0
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN                              23:16
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CENTER                       0x00000001
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CORNER                       0x00000002
-#define STRETCH_BLIT_SRC_FORMAT_FILTER                              31:24
-#define STRETCH_BLIT_SRC_FORMAT_FILTER_POINT_SAMPLE                 0x00000000
-#define STRETCH_BLIT_SRC_FORMAT_FILTER_BILINEAR                     0x00000001
-#define STRETCH_BLIT_SRC_OFFSET                                     0x0000E408
-#define STRETCH_BLIT_SRC_POINT                                      0x0000E40C
-#define STRETCH_BLIT_SRC_POINT_U                                    15:0
-#define STRETCH_BLIT_SRC_POINT_V                                    31:16
+#define STRETCH_BLIT_FORMAT 0x0000E300
+#define STRETCH_BLIT_FORMAT_DEPTH8 0x00000004
+#define STRETCH_BLIT_FORMAT_DEPTH16 0x00000007
+#define STRETCH_BLIT_FORMAT_DEPTH24 0x00000004
+#define STRETCH_BLIT_FORMAT_X8R8G8B8 0x00000004
+#define STRETCH_BLIT_FORMAT_YUYV 0x00000005
+#define STRETCH_BLIT_FORMAT_UYVY 0x00000006
+#define STRETCH_BLIT_CLIP_POINT 0x0000E308
+#define STRETCH_BLIT_CLIP_POINT_X 15 : 0
+#define STRETCH_BLIT_CLIP_POINT_Y 31 : 16
+#define STRETCH_BLIT_CLIP_SIZE 0x0000E30C
+#define STRETCH_BLIT_CLIP_SIZE_WIDTH 15 : 0
+#define STRETCH_BLIT_CLIP_SIZE_HEIGHT 31 : 16
+#define STRETCH_BLIT_DST_POINT 0x0000E310
+#define STRETCH_BLIT_DST_POINT_X 15 : 0
+#define STRETCH_BLIT_DST_POINT_Y 31 : 16
+#define STRETCH_BLIT_DST_SIZE 0x0000E314
+#define STRETCH_BLIT_DST_SIZE_WIDTH 15 : 0
+#define STRETCH_BLIT_DST_SIZE_HEIGHT 31 : 16
+#define STRETCH_BLIT_DU_DX 0x0000E318
+#define STRETCH_BLIT_DV_DY 0x0000E31C
+#define STRETCH_BLIT_SRC_SIZE 0x0000E400
+#define STRETCH_BLIT_SRC_SIZE_WIDTH 15 : 0
+#define STRETCH_BLIT_SRC_SIZE_HEIGHT 31 : 16
+#define STRETCH_BLIT_SRC_FORMAT 0x0000E404
+#define STRETCH_BLIT_SRC_FORMAT_PITCH 15 : 0
+#define STRETCH_BLIT_SRC_FORMAT_ORIGIN 23 : 16
+#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CENTER 0x00000001
+#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CORNER 0x00000002
+#define STRETCH_BLIT_SRC_FORMAT_FILTER 31 : 24
+#define STRETCH_BLIT_SRC_FORMAT_FILTER_POINT_SAMPLE 0x00000000
+#define STRETCH_BLIT_SRC_FORMAT_FILTER_BILINEAR 0x00000001
+#define STRETCH_BLIT_SRC_OFFSET 0x0000E408
+#define STRETCH_BLIT_SRC_POINT 0x0000E40C
+#define STRETCH_BLIT_SRC_POINT_U 15 : 0
+#define STRETCH_BLIT_SRC_POINT_V 31 : 16

sys/src/9/386/pci.c

@@ -24,22 +24,21 @@ void virtiosetup();
 int
 pcicapoff(Pcidev *p);
 
-enum
-{
-	PciADDR		= 0xCF8,	/* CONFIG_ADDRESS */
-	PciDATA		= 0xCFC,	/* CONFIG_DATA */
+enum {
+	PciADDR = 0xCF8, /* CONFIG_ADDRESS */
+	PciDATA = 0xCFC, /* CONFIG_DATA */
 
-	Maxfn			= 7,
-	Maxdev			= 31,
-	Maxbus			= 255,
+	Maxfn = 7,
+	Maxdev = 31,
+	Maxbus = 255,
 
 	/* command register */
-	IOen		= (1<<0),
-	MEMen		= (1<<1),
-	MASen		= (1<<2),
-	MemWrInv	= (1<<4),
-	PErrEn		= (1<<6),
-	SErrEn		= (1<<8),
+	IOen = (1 << 0),
+	MEMen = (1 << 1),
+	MASen = (1 << 2),
+	MemWrInv = (1 << 4),
+	PErrEn = (1 << 6),
+	SErrEn = (1 << 8),
 
 	Write,
 	Read,
@@ -48,11 +47,11 @@ enum
 static Lock pcicfglock;
 static Lock pcicfginitlock;
 static int pcicfgmode = -1;
-static Pcidev* pciroot;
-static Pcidev* pcilist;
-static Pcidev* pcitail;
+static Pcidev *pciroot;
+static Pcidev *pcilist;
+static Pcidev *pcitail;
 
-static char* bustypes[] = {
+static char *bustypes[] = {
 	"CBUSI",
 	"CBUSII",
 	"EISA",
@@ -77,7 +76,7 @@ static int
 pcicfgrw(int, int, int, int, int);
 
 static int
-tbdffmt(Fmt* fmt)
+tbdffmt(Fmt *fmt)
 {
 	char *p;
 	int l, r;
@@ -94,7 +93,7 @@ tbdffmt(Fmt* fmt)
 			l = snprint(p, READSTR, bustypes[type]);
 		else
 			l = snprint(p, READSTR, "%d", type);
-		snprint(p+l, READSTR-l, ".%d.%d.%d",
+		snprint(p + l, READSTR - l, ".%d.%d.%d",
 			BUSBNO(tbdf), BUSDNO(tbdf), BUSFNO(tbdf));
 		break;
 
@@ -124,7 +123,7 @@ pcibarsize(Pcidev *p, int rno)
 }
 
 static int
-pcilscan(int bno, char *path, Pcidev** list)
+pcilscan(int bno, char *path, Pcidev **list)
 {
 	Pcidev *p, *head, *tail;
 	int dno, fno, i, hdt, l, maxfno, maxubn, sbn, tbdf, ubn, capoff;
@@ -153,7 +152,7 @@ pcilscan(int bno, char *path, Pcidev** list)
 			p->capcnt = 0;
 			p->tbdf = tbdf;
 			p->vid = l;
-			p->did = l>>16;
+			p->did = l >> 16;
 			p->path = path;
 
 			if(pcilist != nil)
@@ -185,23 +184,23 @@ pcilscan(int bno, char *path, Pcidev** list)
 			 * If appropriate, read the base address registers
 			 * and work out the sizes.
 			 */
-			switch(p->ccrb) {
+			switch(p->ccrb){
 			default:
 				if((hdt & 0x7F) != 0)
 					break;
-				for(i = 0; i < nelem(p->mem); i++) {
-					p->mem[i].bar = pcicfgr32(p, PciBAR0+4*i);
-					p->mem[i].size = pcibarsize(p, PciBAR0+4*i);
+				for(i = 0; i < nelem(p->mem); i++){
+					p->mem[i].bar = pcicfgr32(p, PciBAR0 + 4 * i);
+					p->mem[i].size = pcibarsize(p, PciBAR0 + 4 * i);
 				}
 				break;
 
-			/*
+				/*
 			 * Some virtio-pci devices have ccrb == 0x00, their BARs and
 			 * sizes also should be picked here.
 			 */
 
-			case 0x05:		/* memory controller */
-			case 0x06:		/* bridge device */
+			case 0x05: /* memory controller */
+			case 0x06: /* bridge device */
 				break;
 			}
 
@@ -214,7 +213,7 @@ pcilscan(int bno, char *path, Pcidev** list)
 
 			capoff = pcicapoff(p);
 			int off = capoff;
-			while(capoff != -1) {
+			while(capoff != -1){
 				off = pcicfgr8(p, off);
 				if((off < 0x40) || (off & 3))
 					break;
@@ -233,10 +232,10 @@ pcilscan(int bno, char *path, Pcidev** list)
 				off++;
 			}
 
-			if(p->capcnt > 0) {
+			if(p->capcnt > 0){
 				p->capidx = malloc(p->capcnt * sizeof(Pcicap *));
 				Pcicap *pcp = p->caplist;
-				for(int pix = 0; ; pix++) {
+				for(int pix = 0;; pix++){
 					p->capidx[pix] = pcp;
 					pcp = pcp->link;
 					if(pcp == nil)
@@ -252,7 +251,7 @@ pcilscan(int bno, char *path, Pcidev** list)
 	}
 
 	*list = head;
-	for(p = head; p != nil; p = p->link) {
+	for(p = head; p != nil; p = p->link){
 		/*
 		 * Find PCI-PCI bridges and recursively descend the tree.
 		 */
@@ -270,10 +269,10 @@ pcilscan(int bno, char *path, Pcidev** list)
 		sbn = pcicfgr8(p, PciSBN);
 		ubn = pcicfgr8(p, PciUBN);
 
-		if(sbn == 0 || ubn == 0) {
+		if(sbn == 0 || ubn == 0){
 			print("%T: unconfigured bridge\n", p->tbdf);
 
-			sbn = maxubn+1;
+			sbn = maxubn + 1;
 			/*
 			 * Make sure memory, I/O and master enables are
 			 * off, set the primary, secondary and subordinate
@@ -283,14 +282,13 @@ pcilscan(int bno, char *path, Pcidev** list)
 			 * Initialisation of the bridge should be done here.
 			 */
 			pcicfgw32(p, PciPCR, 0xFFFF0000);
-			pcicfgw32(p, PciPBN, Maxbus<<16 | sbn<<8 | bno);
+			pcicfgw32(p, PciPBN, Maxbus << 16 | sbn << 8 | bno);
 			pcicfgw16(p, PciSPSR, 0xFFFF);
 			char *bus = mallocz(256, 1);
 			snprint(bus, 256, "%s/%d.%d.0", path, BUSBNO(p->tbdf), BUSDNO(p->tbdf));
 			maxubn = pcilscan(sbn, bus, &p->bridge);
-			pcicfgw32(p, PciPBN, maxubn<<16 | sbn<<8 | bno);
-		}
-		else {
+			pcicfgw32(p, PciPBN, maxubn << 16 | sbn << 8 | bno);
+		} else {
 			/*
 			 * You can't go back.
 			 * This shouldn't be possible, but the
@@ -299,7 +297,7 @@ pcilscan(int bno, char *path, Pcidev** list)
 			 * way down. Need to look more closely at
 			 * this.
 			 */
-			if(ubn > maxubn) {
+			if(ubn > maxubn){
 				maxubn = ubn;
 			}
 			char *bus = mallocz(256, 1);
@@ -312,38 +310,36 @@ pcilscan(int bno, char *path, Pcidev** list)
 }
 
 typedef struct Bridge Bridge;
-struct Bridge
-{
-	uint16_t	vid;
-	uint16_t	did;
-	uint8_t	(*get)(Pcidev *, uint8_t);
-	void	(*set)(Pcidev *, uint8_t, uint8_t);
+struct Bridge {
+	uint16_t vid;
+	uint16_t did;
+	uint8_t (*get)(Pcidev *, uint8_t);
+	void (*set)(Pcidev *, uint8_t, uint8_t);
 };
 
 typedef struct Slot Slot;
 struct Slot {
-	uint8_t	bus;			// Pci bus number
-	uint8_t	dev;			// Pci device number
-	uint8_t	maps[12];		// Avoid structs!  Link and mask.
-	uint8_t	slot;			// Add-in/built-in slot
-	uint8_t	reserved;
+	uint8_t bus;		 // Pci bus number
+	uint8_t dev;		 // Pci device number
+	uint8_t maps[12];	 // Avoid structs!  Link and mask.
+	uint8_t slot;		 // Add-in/built-in slot
+	uint8_t reserved;
 };
 
 typedef struct Router Router;
 struct Router {
-	uint8_t	signature[4];	// Routing table signature
-	uint8_t	version[2];		// Version number
-	uint8_t	size[2];		// Total table size
-	uint8_t	bus;			// Interrupt router bus number
-	uint8_t	devfn;			// Router's devfunc
-	uint8_t	pciirqs[2];		// Exclusive PCI irqs
-	uint8_t	compat[4];		// Compatible PCI interrupt router
-	uint8_t	miniport[4];	// Miniport data
-	uint8_t	reserved[11];
-	uint8_t	checksum;
+	uint8_t signature[4];	     // Routing table signature
+	uint8_t version[2];	     // Version number
+	uint8_t size[2];	     // Total table size
+	uint8_t bus;		     // Interrupt router bus number
+	uint8_t devfn;		     // Router's devfunc
+	uint8_t pciirqs[2];	     // Exclusive PCI irqs
+	uint8_t compat[4];	     // Compatible PCI interrupt router
+	uint8_t miniport[4];	     // Miniport data
+	uint8_t reserved[11];
+	uint8_t checksum;
 };
 
-
 static void
 pcireservemem(void)
 {
@@ -351,9 +347,9 @@ pcireservemem(void)
 	Pcidev *p;
 
 	for(p = nil; (p = pcimatch(p, 0, 0)) != nil;)
-		for(i=0; i<nelem(p->mem); i++)
-			if(p->mem[i].bar && (p->mem[i].bar&1) == 0)
-				pamapinsert(p->mem[i].bar&~0x0F, p->mem[i].size, PamDEV);
+		for(i = 0; i < nelem(p->mem); i++)
+			if(p->mem[i].bar && (p->mem[i].bar & 1) == 0)
+				pamapinsert(p->mem[i].bar & ~0x0F, p->mem[i].size, PamDEV);
 }
 
 static void
@@ -380,7 +376,7 @@ pcicfginit(void)
 	n = inl(PciADDR);
 	if(!(n & 0x7F000000)){
 		outl(PciADDR, 0x80000000);
-		outb(PciADDR+3, 0);
+		outb(PciADDR + 3, 0);
 		if(inl(PciADDR) & 0x80000000)
 			pcicfgmode = 1;
 	}
@@ -392,7 +388,7 @@ pcicfginit(void)
 	}
 
 	list = &pciroot;
-	for(bno = 0; bno <= Maxbus; bno++) {
+	for(bno = 0; bno <= Maxbus; bno++){
 		sbno = bno;
 		bno = pcilscan(bno, "0.0.0", list);
 
@@ -405,7 +401,7 @@ pcicfginit(void)
 		 * it has no valid mappings anymore.
 		 */
 		for(p = pciroot; p != nil; p = p->link){
-			if (p->ccrb == 6 && p->ccru == 7) {
+			if(p->ccrb == 6 && p->ccru == 7){
 				/* reset the cardbus */
 				pcicfgw16(p, PciBCR, 0x40 | pcicfgr16(p, PciBCR));
 				delay(50);
@@ -436,37 +432,37 @@ pcicfgrw(int tbdf, int r, int data, int rw, int w)
 		return -1;
 
 	lock(&pcicfglock);
-	o = r & (4-w);
-	er = (r&0xfc) | ((r & 0xf00)<<16);
-	outl(PciADDR, 0x80000000|BUSBDF(tbdf)|er);
+	o = r & (4 - w);
+	er = (r & 0xfc) | ((r & 0xf00) << 16);
+	outl(PciADDR, 0x80000000 | BUSBDF(tbdf) | er);
 	if(rw == Read){
 		x = -1;
 		switch(w){
 		case 1:
-			x = inb(PciDATA+o);
+			x = inb(PciDATA + o);
 			break;
 		case 2:
-			x = ins(PciDATA+o);
+			x = ins(PciDATA + o);
 			break;
 		case 4:
-			x = inl(PciDATA+o);
+			x = inl(PciDATA + o);
 			break;
 		}
-	}else{
+	} else {
 		x = 0;
 		switch(w){
 		case 1:
-			outb(PciDATA+o, data);
+			outb(PciDATA + o, data);
 			break;
 		case 2:
-			outs(PciDATA+o, data);
+			outs(PciDATA + o, data);
 			break;
 		case 4:
-			outl(PciDATA+o, data);
+			outl(PciDATA + o, data);
 			break;
 		}
 	}
-//	outl(PciADDR, 0);
+	//	outl(PciADDR, 0);
 	unlock(&pcicfglock);
 
 	return x;
@@ -508,42 +504,41 @@ pcicfgw32(Pcidev *p, int rno, int data)
 	pcicfgrw(p->tbdf, rno, data, Write, 4);
 }
 
-Pcidev*
-pcimatch(Pcidev* prev, int vid, int did)
+Pcidev *
+pcimatch(Pcidev *prev, int vid, int did)
 {
 	pcicfginit();
-	prev = prev? prev->list: pcilist;
+	prev = prev ? prev->list : pcilist;
 	for(; prev != nil; prev = prev->list){
-		if((vid == 0 || prev->vid == vid)
-		&& (did == 0 || prev->did == did))
+		if((vid == 0 || prev->vid == vid) && (did == 0 || prev->did == did))
 			break;
 	}
 	return prev;
 }
 
-Pcidev*
+Pcidev *
 pcimatchtbdf(int tbdf)
 {
 	Pcidev *p;
 
-	for(p = nil; (p = pcimatch(p, 0, 0)) != nil; )
+	for(p = nil; (p = pcimatch(p, 0, 0)) != nil;)
 		if(p->tbdf == tbdf)
 			break;
 	return p;
 }
 
 void
-pcishowdev(Pcidev* t)
+pcishowdev(Pcidev *t)
 {
 	int i;
 	char intpin = 'x';
 	/* intpin numbers can range from 1 to 8. */
-	intpin = "xABCDEFGHxxxxxxx"[t->intp&0xf];
+	intpin = "xABCDEFGHxxxxxxx"[t->intp & 0xf];
 	print("%d  %2d/%d %.2x %.2x %.2x %.4x %.4x %c %3d  ",
 	      BUSBNO(t->tbdf), BUSDNO(t->tbdf), BUSFNO(t->tbdf),
 	      t->ccrb, t->ccru, t->ccrp, t->vid, t->did, intpin, t->intl);
 
-	for(i = 0; i < nelem(t->mem); i++) {
+	for(i = 0; i < nelem(t->mem); i++){
 		if(t->mem[i].size == 0)
 			continue;
 		print("%d:%.8llx %d ", i, t->mem[i].bar, t->mem[i].size);
@@ -552,12 +547,12 @@ pcishowdev(Pcidev* t)
 		print("ioa:%.8llx %d ", t->ioa.bar, t->ioa.size);
 	if(t->mema.bar || t->mema.size)
 
-	if(t->bridge)
-		print("->%d", BUSBNO(t->bridge->tbdf));
+		if(t->bridge)
+			print("->%d", BUSBNO(t->bridge->tbdf));
 	print("\n");
 }
 static void
-pcilhinv(Pcidev* p)
+pcilhinv(Pcidev *p)
 {
 	Pcidev *t;
 
@@ -569,7 +564,7 @@ pcilhinv(Pcidev* p)
 }
 
 void
-pcihinv(Pcidev* p)
+pcihinv(Pcidev *p)
 {
 	pcicfginit();
 	lock(&pcicfginitlock);
@@ -593,28 +588,28 @@ pcireset(void)
 }
 
 void
-pcisetbme(Pcidev* p)
+pcisetbme(Pcidev *p)
 {
 	p->pcr |= MASen;
 	pcicfgw16(p, PciPCR, p->pcr);
 }
 
 void
-pciclrbme(Pcidev* p)
+pciclrbme(Pcidev *p)
 {
 	p->pcr &= ~MASen;
 	pcicfgw16(p, PciPCR, p->pcr);
 }
 
 void
-pcisetmwi(Pcidev* p)
+pcisetmwi(Pcidev *p)
 {
 	p->pcr |= MemWrInv;
 	pcicfgw16(p, PciPCR, p->pcr);
 }
 
 void
-pciclrmwi(Pcidev* p)
+pciclrmwi(Pcidev *p)
 {
 	p->pcr &= ~MemWrInv;
 	pcicfgw16(p, PciPCR, p->pcr);
@@ -630,16 +625,16 @@ pcicapoff(Pcidev *p)
 {
 	int off;
 	/* status register bit 4 has capabilities */
-	if((pcicfgr16(p, PciPSR) & 1<<4) == 0)
+	if((pcicfgr16(p, PciPSR) & 1 << 4) == 0)
 		return -1;
 	switch(pcicfgr8(p, PciHDT) & 0x7f){
 	default:
 		return -1;
-	case 0:				/* etc */
-	case 1:				/* pci to pci bridge */
+	case 0: /* etc */
+	case 1: /* pci to pci bridge */
 		off = 0x34;
 		break;
-	case 2:				/* cardbus bridge */
+	case 2: /* cardbus bridge */
 		off = 0x14;
 		break;
 	}
@@ -675,32 +670,32 @@ pcicap(Pcidev *p, int cap)
 }
 
 enum {
-	Pmgcap	= 2,		/* capabilities; 2 bytes*/
-	Pmgctl	= 4,		/* ctl/status; 2 bytes */
-	Pmgbrg	= 6,		/* bridge support */
-	Pmgdata	= 7,
+	Pmgcap = 2, /* capabilities; 2 bytes*/
+	Pmgctl = 4, /* ctl/status; 2 bytes */
+	Pmgbrg = 6, /* bridge support */
+	Pmgdata = 7,
 };
 
 int
-pcigetpms(Pcidev* p)
+pcigetpms(Pcidev *p)
 {
 	int ptr;
 
 	if((ptr = pcicap(p, PciCapPMG)) == -1)
 		return -1;
-	return pcicfgr16(p, ptr+Pmgctl) & 0x0003;
+	return pcicfgr16(p, ptr + Pmgctl) & 0x0003;
 }
 
 int
-pcisetpms(Pcidev* p, int state)
+pcisetpms(Pcidev *p, int state)
 {
 	int pmc, pmcsr, ptr;
 
 	if((ptr = pcicap(p, PciCapPMG)) == -1)
 		return -1;
 
-	pmc = pcicfgr16(p, ptr+Pmgcap);
-	pmcsr = pcicfgr16(p, ptr+Pmgctl);
+	pmc = pcicfgr16(p, ptr + Pmgcap);
+	pmcsr = pcicfgr16(p, ptr + Pmgctl);
 
 	switch(state){
 	default:
@@ -718,6 +713,6 @@ pcisetpms(Pcidev* p, int state)
 	case 3:
 		break;
 	}
-	pcicfgw16(p, ptr+4, (pmcsr & ~3)  | state);
+	pcicfgw16(p, ptr + 4, (pmcsr & ~3) | state);
 	return pmcsr & 3;
 }

sys/src/9/386/uarti8250.c

@@ -17,153 +17,161 @@
  * 8250 UART and compatibles.
  */
 enum {
-	Uart0		= 0x3F8,	/* COM1 */
-	Uart0IRQ	= 4,
-	Uart1		= 0x2F8,	/* COM2 */
-	Uart1IRQ	= 3,
+	Uart0 = 0x3F8, /* COM1 */
+	Uart0IRQ = 4,
+	Uart1 = 0x2F8, /* COM2 */
+	Uart1IRQ = 3,
 
-	UartFREQ	= 1843200,
+	UartFREQ = 1843200,
 };
 
-enum {					/* registers */
-	Rbr		= 0,		/* Receiver Buffer (RO) */
-	Thr		= 0,		/* Transmitter Holding (WO) */
-	Ier		= 1,		/* Interrupt Enable */
-	Iir		= 2,		/* Interrupt Identification (RO) */
-	Fcr		= 2,		/* FIFO Control (WO) */
-	Lcr		= 3,		/* Line Control */
-	Mcr		= 4,		/* Modem Control */
-	Lsr		= 5,		/* Line Status */
-	Msr		= 6,		/* Modem Status */
-	Scr		= 7,		/* Scratch Pad */
-	Dll		= 0,		/* Divisor Latch LSB */
-	Dlm		= 1,		/* Divisor Latch MSB */
+enum {		/* registers */
+       Rbr = 0, /* Receiver Buffer (RO) */
+       Thr = 0, /* Transmitter Holding (WO) */
+       Ier = 1, /* Interrupt Enable */
+       Iir = 2, /* Interrupt Identification (RO) */
+       Fcr = 2, /* FIFO Control (WO) */
+       Lcr = 3, /* Line Control */
+       Mcr = 4, /* Modem Control */
+       Lsr = 5, /* Line Status */
+       Msr = 6, /* Modem Status */
+       Scr = 7, /* Scratch Pad */
+       Dll = 0, /* Divisor Latch LSB */
+       Dlm = 1, /* Divisor Latch MSB */
 };
 
-enum {					/* Ier */
-	Erda		= 0x01,		/* Enable Received Data Available */
-	Ethre		= 0x02,		/* Enable Thr Empty */
-	Erls		= 0x04,		/* Enable Receiver Line Status */
-	Ems		= 0x08,		/* Enable Modem Status */
+enum {		     /* Ier */
+       Erda = 0x01,  /* Enable Received Data Available */
+       Ethre = 0x02, /* Enable Thr Empty */
+       Erls = 0x04,  /* Enable Receiver Line Status */
+       Ems = 0x08,   /* Enable Modem Status */
 };
 
-enum {					/* Iir */
-	Ims		= 0x00,		/* Ms interrupt */
-	Ip		= 0x01,		/* Interrupt Pending (not) */
-	Ithre		= 0x02,		/* Thr Empty */
-	Irda		= 0x04,		/* Received Data Available */
-	Irls		= 0x06,		/* Receiver Line Status */
-	Ictoi		= 0x0C,		/* Character Time-out Indication */
-	IirMASK		= 0x3F,
-	Ifena		= 0xC0,		/* FIFOs enabled */
+enum {		     /* Iir */
+       Ims = 0x00,   /* Ms interrupt */
+       Ip = 0x01,    /* Interrupt Pending (not) */
+       Ithre = 0x02, /* Thr Empty */
+       Irda = 0x04,  /* Received Data Available */
+       Irls = 0x06,  /* Receiver Line Status */
+       Ictoi = 0x0C, /* Character Time-out Indication */
+       IirMASK = 0x3F,
+       Ifena = 0xC0, /* FIFOs enabled */
 };
 
-enum {					/* Fcr */
-	FIFOena		= 0x01,		/* FIFO enable */
-	FIFOrclr	= 0x02,		/* clear Rx FIFO */
-	FIFOtclr	= 0x04,		/* clear Tx FIFO */
-	FIFO1		= 0x00,		/* Rx FIFO trigger level 1 byte */
-	FIFO4		= 0x40,		/*	4 bytes */
-	FIFO8		= 0x80,		/*	8 bytes */
-	FIFO14		= 0xC0,		/*	14 bytes */
+enum {			/* Fcr */
+       FIFOena = 0x01,	/* FIFO enable */
+       FIFOrclr = 0x02, /* clear Rx FIFO */
+       FIFOtclr = 0x04, /* clear Tx FIFO */
+       FIFO1 = 0x00,	/* Rx FIFO trigger level 1 byte */
+       FIFO4 = 0x40,	/*	4 bytes */
+       FIFO8 = 0x80,	/*	8 bytes */
+       FIFO14 = 0xC0,	/*	14 bytes */
 };
 
-enum {					/* Lcr */
-	Wls5		= 0x00,		/* Word Length Select 5 bits/byte */
-	Wls6		= 0x01,		/*	6 bits/byte */
-	Wls7		= 0x02,		/*	7 bits/byte */
-	Wls8		= 0x03,		/*	8 bits/byte */
-	WlsMASK		= 0x03,
-	Stb		= 0x04,		/* 2 stop bits */
-	Pen		= 0x08,		/* Parity Enable */
-	Eps		= 0x10,		/* Even Parity Select */
-	Stp		= 0x20,		/* Stick Parity */
-	Brk		= 0x40,		/* Break */
-	Dlab		= 0x80,		/* Divisor Latch Access Bit */
+enum {		    /* Lcr */
+       Wls5 = 0x00, /* Word Length Select 5 bits/byte */
+       Wls6 = 0x01, /*	6 bits/byte */
+       Wls7 = 0x02, /*	7 bits/byte */
+       Wls8 = 0x03, /*	8 bits/byte */
+       WlsMASK = 0x03,
+       Stb = 0x04,  /* 2 stop bits */
+       Pen = 0x08,  /* Parity Enable */
+       Eps = 0x10,  /* Even Parity Select */
+       Stp = 0x20,  /* Stick Parity */
+       Brk = 0x40,  /* Break */
+       Dlab = 0x80, /* Divisor Latch Access Bit */
 };
 
-enum {					/* Mcr */
-	Dtr		= 0x01,		/* Data Terminal Ready */
-	Rts		= 0x02,		/* Ready To Send */
-	Out1		= 0x04,		/* no longer in use */
-	Ie		= 0x08,		/* IRQ Enable */
-	Dm		= 0x10,		/* Diagnostic Mode loopback */
+enum {		    /* Mcr */
+       Dtr = 0x01,  /* Data Terminal Ready */
+       Rts = 0x02,  /* Ready To Send */
+       Out1 = 0x04, /* no longer in use */
+       Ie = 0x08,   /* IRQ Enable */
+       Dm = 0x10,   /* Diagnostic Mode loopback */
 };
 
-enum {					/* Lsr */
-	Dr		= 0x01,		/* Data Ready */
-	Oe		= 0x02,		/* Overrun Error */
-	Pe		= 0x04,		/* Parity Error */
-	Fe		= 0x08,		/* Framing Error */
-	Bi		= 0x10,		/* Break Interrupt */
-	Thre		= 0x20,		/* Thr Empty */
-	Temt		= 0x40,		/* Tramsmitter Empty */
-	FIFOerr		= 0x80,		/* error in receiver FIFO */
+enum {		       /* Lsr */
+       Dr = 0x01,      /* Data Ready */
+       Oe = 0x02,      /* Overrun Error */
+       Pe = 0x04,      /* Parity Error */
+       Fe = 0x08,      /* Framing Error */
+       Bi = 0x10,      /* Break Interrupt */
+       Thre = 0x20,    /* Thr Empty */
+       Temt = 0x40,    /* Tramsmitter Empty */
+       FIFOerr = 0x80, /* error in receiver FIFO */
 };
 
-enum {					/* Msr */
-	Dcts		= 0x01,		/* Delta Cts */
-	Ddsr		= 0x02,		/* Delta Dsr */
-	Teri		= 0x04,		/* Trailing Edge of Ri */
-	Ddcd		= 0x08,		/* Delta Dcd */
-	Cts		= 0x10,		/* Clear To Send */
-	Dsr		= 0x20,		/* Data Set Ready */
-	Ri		= 0x40,		/* Ring Indicator */
-	Dcd		= 0x80,		/* Data Set Ready */
+enum {		    /* Msr */
+       Dcts = 0x01, /* Delta Cts */
+       Ddsr = 0x02, /* Delta Dsr */
+       Teri = 0x04, /* Trailing Edge of Ri */
+       Ddcd = 0x08, /* Delta Dcd */
+       Cts = 0x10,  /* Clear To Send */
+       Dsr = 0x20,  /* Data Set Ready */
+       Ri = 0x40,   /* Ring Indicator */
+       Dcd = 0x80,  /* Data Set Ready */
 };
 
 typedef struct Ctlr {
-	int	io;
-	int	irq;
-	int	tbdf;
-	int	iena;
-	void*	vector;
-	int	poll;
+	int io;
+	int irq;
+	int tbdf;
+	int iena;
+	void *vector;
+	int poll;
 
-	unsigned char	sticky[8];
+	unsigned char sticky[8];
 
 	Lock Lock;
-	int	hasfifo;
-	int	checkfifo;
-	int	fena;
+	int hasfifo;
+	int checkfifo;
+	int fena;
 } Ctlr;
 
 extern PhysUart i8250physuart;
 
 static Ctlr i8250ctlr[2] = {
-{	.io	= Uart0,
-	.irq	= Uart0IRQ,
-	.tbdf	= -1,
-	.poll	= 1 | 0, },
-
-{	.io	= Uart1,
-	.irq	= Uart1IRQ,
-	.tbdf	= -1,
-	.poll	= 1, },
+	{
+		.io = Uart0,
+		.irq = Uart0IRQ,
+		.tbdf = -1,
+		.poll = 1 | 0,
+	},
+
+	{
+		.io = Uart1,
+		.irq = Uart1IRQ,
+		.tbdf = -1,
+		.poll = 1,
+	},
 };
 
 static Uart i8250uart[2] = {
-{	.regs	= &i8250ctlr[0],
-	.name	= "COM1",
-	.freq	= UartFREQ,
-	.phys	= &i8250physuart,
-	.special= 0,
-	.next	= &i8250uart[1], },
-
-{	.regs	= &i8250ctlr[1],
-	.name	= "COM2",
-	.freq	= UartFREQ,
-	.phys	= &i8250physuart,
-	.special= 0,
-	.next	= nil, },
+	{
+		.regs = &i8250ctlr[0],
+		.name = "COM1",
+		.freq = UartFREQ,
+		.phys = &i8250physuart,
+		.special = 0,
+		.next = &i8250uart[1],
+	},
+
+	{
+		.regs = &i8250ctlr[1],
+		.name = "COM2",
+		.freq = UartFREQ,
+		.phys = &i8250physuart,
+		.special = 0,
+		.next = nil,
+	},
 };
 
-#define csr8r(c, r)	inb((c)->io+(r))
-#define csr8w(c, r, v)	outb((c)->io+(r), (c)->sticky[(r)]|(v))
-#define csr8o(c, r, v)	outb((c)->io+(r), (v))
+#define csr8r(c, r) inb((c)->io + (r))
+#define csr8w(c, r, v) outb((c)->io + (r), (c)->sticky[(r)] | (v))
+#define csr8o(c, r, v) outb((c)->io + (r), (v))
 
 static int32_t
-i8250status(Uart* uart, void* buf, int32_t n, int32_t offset)
+i8250status(Uart *uart, void *buf, int32_t n, int32_t offset)
 {
 	char *p;
 	Ctlr *ctlr;
@@ -186,9 +194,9 @@ i8250status(Uart* uart, void* buf, int32_t n, int32_t offset)
 		uart->hup_dsr,
 		(lcr & WlsMASK) + 5,
 		(ier & Ems) != 0,
-		(lcr & Pen) ? ((lcr & Eps) ? 'e': 'o'): 'n',
+		(lcr & Pen) ? ((lcr & Eps) ? 'e' : 'o') : 'n',
 		(mcr & Rts) != 0,
-		(lcr & Stb) ? 2: 1,
+		(lcr & Stb) ? 2 : 1,
 		ctlr->fena,
 
 		uart->dev,
@@ -197,11 +205,10 @@ i8250status(Uart* uart, void* buf, int32_t n, int32_t offset)
 		uart->oerr,
 		uart->berr,
 		uart->serr,
-		(msr & Cts) ? " cts": "",
-		(msr & Dsr) ? " dsr": "",
-		(msr & Dcd) ? " dcd": "",
-		(msr & Ri) ? " ring": ""
-	);
+		(msr & Cts) ? " cts" : "",
+		(msr & Dsr) ? " dsr" : "",
+		(msr & Dcd) ? " dcd" : "",
+		(msr & Ri) ? " ring" : "");
 	n = readstr(offset, buf, n, p);
 	free(p);
 
@@ -209,7 +216,7 @@ i8250status(Uart* uart, void* buf, int32_t n, int32_t offset)
 }
 
 static void
-i8250fifo(Uart* uart, int level)
+i8250fifo(Uart *uart, int level)
 {
 	Ctlr *ctlr;
 
@@ -239,16 +246,16 @@ i8250fifo(Uart* uart, int level)
 	case 0:
 		break;
 	case 1:
-		level = FIFO1|FIFOena;
+		level = FIFO1 | FIFOena;
 		break;
 	case 4:
-		level = FIFO4|FIFOena;
+		level = FIFO4 | FIFOena;
 		break;
 	case 8:
-		level = FIFO8|FIFOena;
+		level = FIFO8 | FIFOena;
 		break;
 	default:
-		level = FIFO14|FIFOena;
+		level = FIFO14 | FIFOena;
 		break;
 	}
 	csr8w(ctlr, Fcr, level);
@@ -257,7 +264,7 @@ i8250fifo(Uart* uart, int level)
 }
 
 static void
-i8250dtr(Uart* uart, int on)
+i8250dtr(Uart *uart, int on)
 {
 	Ctlr *ctlr;
 
@@ -273,7 +280,7 @@ i8250dtr(Uart* uart, int on)
 }
 
 static void
-i8250rts(Uart* uart, int on)
+i8250rts(Uart *uart, int on)
 {
 	Ctlr *ctlr;
 
@@ -289,7 +296,7 @@ i8250rts(Uart* uart, int on)
 }
 
 static void
-i8250modemctl(Uart* uart, int on)
+i8250modemctl(Uart *uart, int on)
 {
 	Ctlr *ctlr;
 
@@ -300,8 +307,7 @@ i8250modemctl(Uart* uart, int on)
 		csr8w(ctlr, Ier, ctlr->sticky[Ier]);
 		uart->modem = 1;
 		uart->cts = csr8r(ctlr, Msr) & Cts;
-	}
-	else{
+	} else {
 		ctlr->sticky[Ier] &= ~Ems;
 		csr8w(ctlr, Ier, ctlr->sticky[Ier]);
 		uart->modem = 0;
@@ -314,17 +320,17 @@ i8250modemctl(Uart* uart, int on)
 }
 
 static int
-i8250parity(Uart* uart, int parity)
+i8250parity(Uart *uart, int parity)
 {
 	int lcr;
 	Ctlr *ctlr;
 
 	ctlr = uart->regs;
-	lcr = ctlr->sticky[Lcr] & ~(Eps|Pen);
+	lcr = ctlr->sticky[Lcr] & ~(Eps | Pen);
 
 	switch(parity){
 	case 'e':
-		lcr |= Eps|Pen;
+		lcr |= Eps | Pen;
 		break;
 	case 'o':
 		lcr |= Pen;
@@ -343,7 +349,7 @@ i8250parity(Uart* uart, int parity)
 }
 
 static int
-i8250stop(Uart* uart, int stop)
+i8250stop(Uart *uart, int stop)
 {
 	int lcr;
 	Ctlr *ctlr;
@@ -369,7 +375,7 @@ i8250stop(Uart* uart, int stop)
 }
 
 static int
-i8250bits(Uart* uart, int bits)
+i8250bits(Uart *uart, int bits)
 {
 	int lcr;
 	Ctlr *ctlr;
@@ -402,7 +408,7 @@ i8250bits(Uart* uart, int bits)
 }
 
 static int
-i8250baud(Uart* uart, int baud)
+i8250baud(Uart *uart, int baud)
 {
 	uint32_t bgc;
 	Ctlr *ctlr;
@@ -414,11 +420,11 @@ i8250baud(Uart* uart, int baud)
 	 */
 	if(uart->freq == 0 || baud <= 0)
 		return -1;
-	bgc = (uart->freq+8*baud-1)/(16*baud);
+	bgc = (uart->freq + 8 * baud - 1) / (16 * baud);
 
 	ctlr = uart->regs;
 	csr8w(ctlr, Lcr, Dlab);
-	csr8o(ctlr, Dlm, bgc>>8);
+	csr8o(ctlr, Dlm, bgc >> 8);
 	csr8o(ctlr, Dll, bgc);
 	csr8w(ctlr, Lcr, 0);
 
@@ -428,7 +434,7 @@ i8250baud(Uart* uart, int baud)
 }
 
 static void
-i8250break(Uart* uart, int ms)
+i8250break(Uart *uart, int ms)
 {
 	Proc *up = externup();
 	Ctlr *ctlr;
@@ -446,7 +452,7 @@ i8250break(Uart* uart, int ms)
 }
 
 static void
-i8250kick(Uart* uart)
+i8250kick(Uart *uart)
 {
 	int i;
 	Ctlr *ctlr;
@@ -475,7 +481,7 @@ i8250kick(Uart* uart)
 // many years ago. Also, modem status handling is gone.
 // Now eia0 "interrupts" work again. But serial console still does not.
 static void
-i8250interrupt(Ureg* ureg, void* arg)
+i8250interrupt(Ureg *ureg, void *arg)
 {
 	Ctlr *ctlr;
 	Uart *uart;
@@ -497,7 +503,7 @@ i8250interrupt(Ureg* ureg, void* arg)
 	// Just kick it for now.
 
 	lsr = csr8r(ctlr, Lsr);
-	if (lsr & (Thre | Temt))
+	if(lsr & (Thre | Temt))
 		uartkick(uart);
 	/*
 	 * Consume any received data.
@@ -506,15 +512,15 @@ i8250interrupt(Ureg* ureg, void* arg)
 	 * overrun is an indication that something has
 	 * already been tossed.
 	 */
-	if(lsr & (FIFOerr|Oe))
+	if(lsr & (FIFOerr | Oe))
 		uart->oerr++;
 	if(lsr & Pe)
 		uart->perr++;
 	if(lsr & Fe)
 		uart->ferr++;
-	if (lsr & Dr) {
+	if(lsr & Dr){
 		r = csr8r(ctlr, Rbr);
-		if(!(lsr & (Bi|Fe|Pe)))
+		if(!(lsr & (Bi | Fe | Pe)))
 			uartrecv(uart, r);
 		// This is a kludge but it's turning out to be a
 		// lifesaver until we get consoles to be better.
@@ -523,14 +529,14 @@ i8250interrupt(Ureg* ureg, void* arg)
 		// polling stops.
 		// So we'd need to walk and open the console
 		// in the kernel and keep the chan around I suppose.
-		if (r == '\r')
+		if(r == '\r')
 			r = '\n';
 		kbdputc(nil, r);
 	}
 }
 
 static void
-i8250disable(Uart* uart)
+i8250disable(Uart *uart)
 {
 	Ctlr *ctlr;
 
@@ -552,7 +558,7 @@ i8250disable(Uart* uart)
 }
 
 static void
-i8250enable(Uart* uart, int ie)
+i8250enable(Uart *uart, int ie)
 {
 	Ctlr *ctlr;
 
@@ -560,7 +566,7 @@ i8250enable(Uart* uart, int ie)
 
 	// old school uarts, with poll or tbdf = -1, can no longer
 	// be supported for interrupts. Sorry.
-	if (ctlr->poll || (ctlr->tbdf == -1))
+	if(ctlr->poll || (ctlr->tbdf == -1))
 		ie = 0;
 
 	/*
@@ -600,10 +606,9 @@ i8250enable(Uart* uart, int ie)
 			ctlr->vector = intrenable(ctlr->irq, i8250interrupt, uart, ctlr->tbdf, uart->name);
 			ctlr->iena = 1;
 		}
-		ctlr->sticky[Ier] = Ethre|Erda;
+		ctlr->sticky[Ier] = Ethre | Erda;
 		ctlr->sticky[Mcr] |= Ie;
-	}
-	else{
+	} else {
 		ctlr->sticky[Ier] = 0;
 		ctlr->sticky[Mcr] = 0;
 	}
@@ -625,7 +630,7 @@ i8250enable(Uart* uart, int ie)
 		i8250interrupt(nil, uart);
 }
 
-void*
+void *
 i8250alloc(int io, int irq, int tbdf)
 {
 	Ctlr *ctlr;
@@ -639,7 +644,7 @@ i8250alloc(int io, int irq, int tbdf)
 	return ctlr;
 }
 
-static Uart*
+static Uart *
 i8250pnp(void)
 {
 	int i, found = 0;
@@ -661,21 +666,21 @@ i8250pnp(void)
 		print("Check i8250 %s:", uart->name);
 		ctlr = uart->regs;
 		csr8o(ctlr, Scr, 0x55);
-		if(csr8r(ctlr, Scr) != 0x55) {
+		if(csr8r(ctlr, Scr) != 0x55){
 			print("Scr test failed, ignoring it\n");
 			// Take it out of the list, iff it is not the first.
-			if (uart != first)
-				(uart-1)->next = uart->next;
+			if(uart != first)
+				(uart - 1)->next = uart->next;
 			continue;
 		}
-		if(ioalloc(ctlr->io, 8, 0, uart->name) < 0) {
+		if(ioalloc(ctlr->io, 8, 0, uart->name) < 0){
 			print("ioalloc(%#x, 8) failed; ignoring it\n", ctlr->io);
 			// Take it out of the list, iff it is not the first.
-			if (uart != first)
-				(uart-1)->next = uart->next;
+			if(uart != first)
+				(uart - 1)->next = uart->next;
 			continue;
 		}
-		if (head == nil)
+		if(head == nil)
 			head = uart;
 		found++;
 	}
@@ -685,7 +690,7 @@ i8250pnp(void)
 }
 
 static int
-i8250getc(Uart* uart)
+i8250getc(Uart *uart)
 {
 	Ctlr *ctlr;
 
@@ -696,7 +701,7 @@ i8250getc(Uart* uart)
 }
 
 static void
-i8250putc(Uart* uart, int c)
+i8250putc(Uart *uart, int c)
 {
 	int i;
 	Ctlr *ctlr;
@@ -710,7 +715,7 @@ i8250putc(Uart* uart, int c)
 }
 
 static void
-i8250poll(Uart* uart)
+i8250poll(Uart *uart)
 {
 	Ctlr *ctlr;
 
@@ -730,45 +735,43 @@ i8250poll(Uart* uart)
 	i8250interrupt(nil, uart);
 }
 
-
 PhysUart i8250physuart = {
-	.name		= "i8250",
-	.pnp		= i8250pnp,
-	.enable		= i8250enable,
-	.disable	= i8250disable,
-	.kick		= i8250kick,
-	.dobreak	= i8250break,
-	.baud		= i8250baud,
-	.bits		= i8250bits,
-	.stop		= i8250stop,
-	.parity		= i8250parity,
-	.modemctl	= i8250modemctl,
-	.rts		= i8250rts,
-	.dtr		= i8250dtr,
-	.status		= i8250status,
-	.fifo		= i8250fifo,
-	.getc		= i8250getc,
-	.putc		= i8250putc,
-	.poll		= i8250poll,
+	.name = "i8250",
+	.pnp = i8250pnp,
+	.enable = i8250enable,
+	.disable = i8250disable,
+	.kick = i8250kick,
+	.dobreak = i8250break,
+	.baud = i8250baud,
+	.bits = i8250bits,
+	.stop = i8250stop,
+	.parity = i8250parity,
+	.modemctl = i8250modemctl,
+	.rts = i8250rts,
+	.dtr = i8250dtr,
+	.status = i8250status,
+	.fifo = i8250fifo,
+	.getc = i8250getc,
+	.putc = i8250putc,
+	.poll = i8250poll,
 };
 
-
-extern void (*consuartputs)(char*, int);
+extern void (*consuartputs)(char *, int);
 static Uart *i8250consuart;
 
 static void
 i8250consputs(char *s, int n)
 {
 	int i;
-	for(i = 0; i < n; i++) {
-		if (s[i] == '\n')
+	for(i = 0; i < n; i++){
+		if(s[i] == '\n')
 			i8250putc(i8250consuart, '\r');
-		i8250putc(i8250consuart,  s[i]);
+		i8250putc(i8250consuart, s[i]);
 	}
 }
 
 void
-i8250console(char* cfg)
+i8250console(char *cfg)
 {
 	int i;
 	Uart *uart;
@@ -811,13 +814,13 @@ i8250uartconsole(Uart *uart, char *cmd)
 	 */
 	Ctlr *ctlr = uart->regs;
 	csr8o(ctlr, Scr, 0x55);
-	if (csr8r(ctlr, Scr) != 0x55) {
+	if(csr8r(ctlr, Scr) != 0x55){
 		return;
 	}
 
 	(*uart->phys->enable)(uart, 0);
 	uartctl(uart, "b115200 l8 pn s1 i1");
-	if (cmd != nil && *cmd != '\0') {
+	if(cmd != nil && *cmd != '\0'){
 		uartctl(uart, cmd);
 	}
 

sys/src/9/386/uartpci.c

@@ -17,10 +17,10 @@
 
 extern PhysUart i8250physuart;
 extern PhysUart pciphysuart;
-extern void* i8250alloc(int, int, int);
+extern void *i8250alloc(int, int, int);
 
-static Uart*
-uartpci(int ctlrno, Pcidev* p, int barno, int first_offset, int n, int freq, char* name)
+static Uart *
+uartpci(int ctlrno, Pcidev *p, int barno, int first_offset, int n, int freq, char *name)
 {
 	int i, io;
 	void *ctlr;
@@ -34,7 +34,7 @@ uartpci(int ctlrno, Pcidev* p, int barno, int first_offset, int n, int freq, cha
 		return nil;
 	}
 
-	head = uart = malloc(sizeof(Uart)*n);
+	head = uart = malloc(sizeof(Uart) * n);
 
 	for(i = 0; i < n; i++){
 		ctlr = i8250alloc(io, p->intl, p->tbdf);
@@ -48,14 +48,14 @@ uartpci(int ctlrno, Pcidev* p, int barno, int first_offset, int n, int freq, cha
 		uart->freq = freq;
 		uart->phys = &i8250physuart;
 		if(uart != head)
-			(uart-1)->next = uart;
+			(uart - 1)->next = uart;
 		uart++;
 	}
 
 	return head;
 }
 
-static Uart*
+static Uart *
 uartpcipnp(void)
 {
 	Pcidev *p;
@@ -75,22 +75,22 @@ uartpcipnp(void)
 		if(p->ccrb != 0x07 || p->ccru > 2)
 			continue;
 
-		switch((p->did<<16)|p->vid){
+		switch((p->did << 16) | p->vid){
 		default:
 			continue;
-		case (0x3253<<16)|0x1c00:	/* WCH CH382 (vid not in pci db) */
+		case(0x3253 << 16) | 0x1c00: /* WCH CH382 (vid not in pci db) */
 			uart = uartpci(ctlrno, p, 0, 0xc0, 2, 1843200, "WCH-CH382");
-			if (uart == nil) {
+			if(uart == nil){
 				continue;
 			}
 			break;
-		case (0x9835<<16)|0x9710:	/* StarTech PCI2S550 */
+		case(0x9835 << 16) | 0x9710: /* StarTech PCI2S550 */
 			uart = uartpci(ctlrno, p, 0, 0, 1, 1843200, "PCI2S550-0");
 			if(uart == nil)
 				continue;
 			uart->next = uartpci(ctlrno, p, 1, 0, 1, 1843200, "PCI2S550-1");
 			break;
-		case (0x950A<<16)|0x1415:	/* Oxford Semi OX16PCI954 */
+		case(0x950A << 16) | 0x1415: /* Oxford Semi OX16PCI954 */
 			/*
 			 * These are common devices used by 3rd-party
 			 * manufacturers.
@@ -98,18 +98,18 @@ uartpcipnp(void)
 			 * match, mostly to get the clock frequency right.
 			 */
 			subid = pcicfgr16(p, PciSVID);
-			subid |= pcicfgr16(p, PciSID)<<16;
+			subid |= pcicfgr16(p, PciSID) << 16;
 			switch(subid){
 			default:
 				continue;
-			case (0x2000<<16)|0x131F:/* SIIG CyberSerial PCIe */
+			case(0x2000 << 16) | 0x131F: /* SIIG CyberSerial PCIe */
 				uart = uartpci(ctlrno, p, 0, 0, 1, 18432000, "CyberSerial-1S");
 				if(uart == nil)
 					continue;
 				break;
 			}
 			break;
-		case (0x9501<<16)|0x1415:	/* Oxford Semi OX16PCI954 */
+		case(0x9501 << 16) | 0x1415: /* Oxford Semi OX16PCI954 */
 			/*
 			 * These are common devices used by 3rd-party
 			 * manufacturers.
@@ -117,19 +117,19 @@ uartpcipnp(void)
 			 * match, mostly to get the clock frequency right.
 			 */
 			subid = pcicfgr16(p, PciSVID);
-			subid |= pcicfgr16(p, PciSID)<<16;
+			subid |= pcicfgr16(p, PciSID) << 16;
 			switch(subid){
 			default:
 				continue;
-			case (0<<16)|0x1415:	/* StarTech PCI4S550 */
+			case(0 << 16) | 0x1415: /* StarTech PCI4S550 */
 				uart = uartpci(ctlrno, p, 0, 0, 1, 18432000, "PCI4S550-0");
 				if(uart == nil)
 					continue;
 				break;
 			}
 			break;
-		case (0x9050<<16)|0x10B5:	/* Perle PCI-Fast4 series */
-		case (0x9030<<16)|0x10B5:	/* Perle Ultraport series */
+		case(0x9050 << 16) | 0x10B5: /* Perle PCI-Fast4 series */
+		case(0x9030 << 16) | 0x10B5: /* Perle Ultraport series */
 			/*
 			 * These devices consists of a PLX bridge (the above
 			 * PCI VID+DID) behind which are some 16C654 UARTs.
@@ -137,25 +137,25 @@ uartpcipnp(void)
 			 * match.
 			 */
 			subid = pcicfgr16(p, PciSVID);
-			subid |= pcicfgr16(p, PciSID)<<16;
+			subid |= pcicfgr16(p, PciSID) << 16;
 			switch(subid){
 			default:
 				continue;
-			case (0x0011<<16)|0x12E0:	/* Perle PCI-Fast16 */
+			case(0x0011 << 16) | 0x12E0: /* Perle PCI-Fast16 */
 				n = 16;
 				name = "PCI-Fast16";
 				break;
-			case (0x0021<<16)|0x12E0:	/* Perle PCI-Fast8 */
+			case(0x0021 << 16) | 0x12E0: /* Perle PCI-Fast8 */
 				n = 8;
 				name = "PCI-Fast8";
 				break;
-			case (0x0031<<16)|0x12E0:	/* Perle PCI-Fast4 */
+			case(0x0031 << 16) | 0x12E0: /* Perle PCI-Fast4 */
 				n = 4;
 				name = "PCI-Fast4";
 				break;
-			case (0x0021<<16)|0x155F:	/* Perle Ultraport8 */
+			case(0x0021 << 16) | 0x155F: /* Perle Ultraport8 */
 				n = 8;
-				name = "Ultraport8";	/* 16C754 UARTs */
+				name = "Ultraport8"; /* 16C754 UARTs */
 				break;
 			}
 			uart = uartpci(ctlrno, p, 2, 0, n, 7372800, name);
@@ -177,19 +177,19 @@ uartpcipnp(void)
 }
 
 PhysUart pciphysuart = {
-	.name		= "UartPCI",
-	.pnp		= uartpcipnp,
-	.enable		= nil,
-	.disable	= nil,
-	.kick		= nil,
-	.dobreak	= nil,
-	.baud		= nil,
-	.bits		= nil,
-	.stop		= nil,
-	.parity		= nil,
-	.modemctl	= nil,
-	.rts		= nil,
-	.dtr		= nil,
-	.status		= nil,
-	.fifo		= nil,
+	.name = "UartPCI",
+	.pnp = uartpcipnp,
+	.enable = nil,
+	.disable = nil,
+	.kick = nil,
+	.dobreak = nil,
+	.baud = nil,
+	.bits = nil,
+	.stop = nil,
+	.parity = nil,
+	.modemctl = nil,
+	.rts = nil,
+	.dtr = nil,
+	.status = nil,
+	.fifo = nil,
 };

sys/src/9/386/vganvidia.c

@@ -1,6 +1,6 @@
 /* Portions of this file derived from work with the following copyright */
 
- /***************************************************************************\
+/***************************************************************************\
 |*                                                                           *|
 |*       Copyright 2003 NVIDIA, Corporation.  All rights reserved.           *|
 |*                                                                           *|
@@ -47,7 +47,7 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
@@ -69,33 +69,33 @@ enum {
 #define SKIPS 8
 
 struct {
-	uint32_t	*dmabase;
-	int		dmacurrent;
-	int		dmaput;
-	int		dmafree;
-	int		dmamax;
+	uint32_t *dmabase;
+	int dmacurrent;
+	int dmaput;
+	int dmafree;
+	int dmamax;
 } nv;
 
-static Pcidev*
+static Pcidev *
 nvidiapci(void)
 {
 	Pcidev *p;
 
 	p = nil;
 	while((p = pcimatch(p, 0x10DE, 0)) != nil){
-		if(p->did >= 0x20 && p->ccrb == 3)	/* video card */
+		if(p->did >= 0x20 && p->ccrb == 3) /* video card */
 			return p;
 	}
 	return nil;
 }
 
 static void
-nvidialinear(VGAscr* scr, int size, int align)
+nvidialinear(VGAscr *scr, int size, int align)
 {
 }
 
 static void
-nvidiaenable(VGAscr* scr)
+nvidiaenable(VGAscr *scr)
 {
 	Pcidev *p;
 	uint32_t *q;
@@ -112,26 +112,26 @@ nvidiaenable(VGAscr* scr)
 	scr->mmio = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
-	addvgaseg("nvidiammio", p->mem[0].bar&~0x0F, p->mem[0].size);
+	addvgaseg("nvidiammio", p->mem[0].bar & ~0x0F, p->mem[0].size);
 
 	vgalinearpci(scr);
 	if(scr->apsize)
 		addvgaseg("nvidiascreen", scr->paddr, scr->apsize);
 
 	/* find video memory size */
-	switch (scr->id & 0x0ff0) {
+	switch(scr->id & 0x0ff0){
 	case 0x0020:
 	case 0x00A0:
-		q = (void*)((uint8_t*)scr->mmio + Pfb);
+		q = (void *)((uint8_t *)scr->mmio + Pfb);
 		tmp = *q;
-		if (tmp & 0x0100) {
+		if(tmp & 0x0100){
 			scr->storage = ((tmp >> 12) & 0x0F) * 1024 + 1024 * 2;
 		} else {
 			tmp &= 0x03;
-			if (tmp)
-				scr->storage = (1024*1024*2) << tmp;
+			if(tmp)
+				scr->storage = (1024 * 1024 * 2) << tmp;
 			else
-				scr->storage = 1024*1024*32;
+				scr->storage = 1024 * 1024 * 32;
 		}
 		break;
 	case 0x01A0:
@@ -145,17 +145,17 @@ nvidiaenable(VGAscr* scr)
 		scr->storage = (((tmp >> 4) & 127) + 1) * 1024 * 1024;
 		break;
 	default:
-		q = (void*)((uint8_t*)scr->mmio + Pfb + 0x020C);
+		q = (void *)((uint8_t *)scr->mmio + Pfb + 0x020C);
 		tmp = (*q >> 20) & 0xFFF;
-		if (tmp == 0)
+		if(tmp == 0)
 			tmp = 16;
-		scr->storage = tmp*1024*1024;
+		scr->storage = tmp * 1024 * 1024;
 		break;
 	}
 }
 
 static void
-nvidiacurdisable(VGAscr* scr)
+nvidiacurdisable(VGAscr *scr)
 {
 	if(scr->mmio == 0)
 		return;
@@ -163,24 +163,23 @@ nvidiacurdisable(VGAscr* scr)
 	vgaxo(Crtx, 0x31, vgaxi(Crtx, 0x31) & ~0x01);
 }
 
-
 static void
-nvidiacurload(VGAscr* scr, Cursor* curs)
+nvidiacurload(VGAscr *scr, Cursor *curs)
 {
-	uint32_t*	p;
-	int	i,j;
-	uint16_t	c,s;
-	uint32_t	tmp;
+	uint32_t *p;
+	int i, j;
+	uint16_t c, s;
+	uint32_t tmp;
 
 	if(scr->mmio == 0)
 		return;
 
 	vgaxo(Crtx, 0x31, vgaxi(Crtx, 0x31) & ~0x01);
 
-	switch (scr->id & 0x0ff0) {
+	switch(scr->id & 0x0ff0){
 	case 0x0020:
 	case 0x00A0:
-		p = (void*)((uint8_t*)scr->mmio + Pramin + 0x1E00 * 4);
+		p = (void *)((uint8_t *)scr->mmio + Pramin + 0x1E00 * 4);
 		break;
 	default:
 		/*
@@ -188,36 +187,36 @@ nvidiacurload(VGAscr* scr, Cursor* curs)
 		 * have allocated less storage than aux/vga
 		 * expected.
 		 */
-		tmp = scr->apsize - 96*1024;
-		p = (void*)((uint8_t*)scr->vaddr + tmp);
-		vgaxo(Crtx, 0x30, 0x80|(tmp>>17));
-		vgaxo(Crtx, 0x31, (tmp>>11)<<2);
-		vgaxo(Crtx, 0x2F, tmp>>24);
+		tmp = scr->apsize - 96 * 1024;
+		p = (void *)((uint8_t *)scr->vaddr + tmp);
+		vgaxo(Crtx, 0x30, 0x80 | (tmp >> 17));
+		vgaxo(Crtx, 0x31, (tmp >> 11) << 2);
+		vgaxo(Crtx, 0x2F, tmp >> 24);
 		break;
 	}
 
-	for(i=0; i<16; i++) {
-		c = (curs->clr[2 * i] << 8) | curs->clr[2 * i+1];
-		s = (curs->set[2 * i] << 8) | curs->set[2 * i+1];
+	for(i = 0; i < 16; i++){
+		c = (curs->clr[2 * i] << 8) | curs->clr[2 * i + 1];
+		s = (curs->set[2 * i] << 8) | curs->set[2 * i + 1];
 		tmp = 0;
-		for (j=0; j<16; j++){
-			if(s&0x8000)
+		for(j = 0; j < 16; j++){
+			if(s & 0x8000)
 				tmp |= 0x80000000;
-			else if(c&0x8000)
+			else if(c & 0x8000)
 				tmp |= 0xFFFF0000;
-			if (j&0x1){
+			if(j & 0x1){
 				*p++ = tmp;
 				tmp = 0;
 			} else {
-				tmp>>=16;
+				tmp >>= 16;
 			}
-			c<<=1;
-			s<<=1;
+			c <<= 1;
+			s <<= 1;
 		}
-		for (j=0; j<8; j++)
+		for(j = 0; j < 8; j++)
 			*p++ = 0;
 	}
-	for (i=0; i<256; i++)
+	for(i = 0; i < 256; i++)
 		*p++ = 0;
 
 	scr->Cursor.offset = curs->offset;
@@ -227,21 +226,21 @@ nvidiacurload(VGAscr* scr, Cursor* curs)
 }
 
 static int
-nvidiacurmove(VGAscr* scr, Point p)
+nvidiacurmove(VGAscr *scr, Point p)
 {
-	uint32_t*	cursorpos;
+	uint32_t *cursorpos;
 
 	if(scr->mmio == 0)
 		return 1;
 
-	cursorpos = (void*)((uint8_t*)scr->mmio + hwCurPos);
-	*cursorpos = ((p.y+scr->Cursor.offset.y)<<16)|((p.x+scr->Cursor.offset.x) & 0xFFFF);
+	cursorpos = (void *)((uint8_t *)scr->mmio + hwCurPos);
+	*cursorpos = ((p.y + scr->Cursor.offset.y) << 16) | ((p.x + scr->Cursor.offset.x) & 0xFFFF);
 
 	return 0;
 }
 
 static void
-nvidiacurenable(VGAscr* scr)
+nvidiacurenable(VGAscr *scr)
 {
 	nvidiaenable(scr);
 	if(scr->mmio == 0)
@@ -258,13 +257,13 @@ nvidiacurenable(VGAscr* scr)
 void
 writeput(VGAscr *scr, int data)
 {
-	uint8_t	*p, scratch;
-	uint32_t	*fifo;
+	uint8_t *p, scratch;
+	uint32_t *fifo;
 
-	outb(0x3D0,0);
+	outb(0x3D0, 0);
 	p = scr->vaddr;
 	scratch = *p;
-	fifo = (void*)((uint8_t*)scr->mmio + Fifo);
+	fifo = (void *)((uint8_t *)scr->mmio + Fifo);
 	fifo[0x10] = (data << 2);
 	USED(scratch);
 }
@@ -272,16 +271,16 @@ writeput(VGAscr *scr, int data)
 uint32_t
 readget(VGAscr *scr)
 {
-	uint32_t	*fifo;
+	uint32_t *fifo;
 
-	fifo = (void*)((uint8_t*)scr->mmio + Fifo);
+	fifo = (void *)((uint8_t *)scr->mmio + Fifo);
 	return (fifo[0x0011] >> 2);
 }
 
 void
 nvdmakickoff(VGAscr *scr)
 {
-	if(nv.dmacurrent != nv.dmaput) {
+	if(nv.dmacurrent != nv.dmaput){
 		nv.dmaput = nv.dmacurrent;
 		writeput(scr, nv.dmaput);
 	}
@@ -300,18 +299,19 @@ nvdmawait(VGAscr *scr, int size)
 
 	size++;
 
-	while(nv.dmafree < size) {
+	while(nv.dmafree < size){
 		dmaget = readget(scr);
 
-		if(nv.dmaput >= dmaget) {
+		if(nv.dmaput >= dmaget){
 			nv.dmafree = nv.dmamax - nv.dmacurrent;
-			if(nv.dmafree < size) {
+			if(nv.dmafree < size){
 				nvdmanext(0x20000000);
-				if(dmaget <= SKIPS) {
-					if (nv.dmaput <= SKIPS) /* corner case - will be idle */
+				if(dmaget <= SKIPS){
+					if(nv.dmaput <= SKIPS) /* corner case - will be idle */
 						writeput(scr, SKIPS + 1);
-					do { dmaget = readget(scr); }
-					while(dmaget <= SKIPS);
+					do {
+						dmaget = readget(scr);
+					} while(dmaget <= SKIPS);
 				}
 				writeput(scr, SKIPS);
 				nv.dmacurrent = nv.dmaput = SKIPS;
@@ -322,11 +322,10 @@ nvdmawait(VGAscr *scr, int size)
 	}
 }
 
-
 static void
 nvdmastart(VGAscr *scr, uint32_t tag, int size)
 {
-	if (nv.dmafree <= size)
+	if(nv.dmafree <= size)
 		nvdmawait(scr, size);
 	nvdmanext((size << 18) | tag);
 	nv.dmafree -= (size + 1);
@@ -335,10 +334,10 @@ nvdmastart(VGAscr *scr, uint32_t tag, int size)
 static void
 waitforidle(VGAscr *scr)
 {
-	uint32_t*	pgraph;
+	uint32_t *pgraph;
 	int x;
 
-	pgraph = (void*)((uint8_t*)scr->mmio + Pgraph);
+	pgraph = (void *)((uint8_t *)scr->mmio + Pgraph);
 
 	x = 0;
 	while((readget(scr) != nv.dmaput) && x++ < 1000000)
@@ -347,7 +346,7 @@ waitforidle(VGAscr *scr)
 		iprint("idle stat %lud put %d scr %#p pc %#p\n", readget(scr), nv.dmaput, scr, getcallerpc());
 
 	x = 0;
-	while(pgraph[0x00000700/4] & 0x01 && x++ < 1000000)
+	while(pgraph[0x00000700 / 4] & 0x01 && x++ < 1000000)
 		;
 
 	if(x >= 1000000)
@@ -357,10 +356,10 @@ waitforidle(VGAscr *scr)
 static void
 nvresetgraphics(VGAscr *scr)
 {
-	uint32_t	surfaceFormat, patternFormat, rectFormat, lineFormat;
-	int		pitch, i;
+	uint32_t surfaceFormat, patternFormat, rectFormat, lineFormat;
+	int pitch, i;
 
-	pitch = scr->gscreen->width*BY2WD;
+	pitch = scr->gscreen->width * BY2WD;
 
 	/*
 	 * DMA is at the end of the virtual window,
@@ -368,9 +367,9 @@ nvresetgraphics(VGAscr *scr)
 	 */
 	if(nv.dmabase == nil){
 		if(scr->storage <= scr->apsize)
-			nv.dmabase = (uint32_t*)((uint8_t*)scr->vaddr + scr->storage - 128*1024);
-		else{
-			nv.dmabase = (void*)vmap(scr->paddr + scr->storage - 128*1024, 128*1024);
+			nv.dmabase = (uint32_t *)((uint8_t *)scr->vaddr + scr->storage - 128 * 1024);
+		else {
+			nv.dmabase = (void *)vmap(scr->paddr + scr->storage - 128 * 1024, 128 * 1024);
 			if(nv.dmabase == 0){
 				hwaccel = 0;
 				hwblank = 0;
@@ -380,7 +379,7 @@ nvresetgraphics(VGAscr *scr)
 		}
 	}
 
-	for(i=0; i<SKIPS; i++)
+	for(i = 0; i < SKIPS; i++)
 		nv.dmabase[i] = 0x00000000;
 
 	nv.dmabase[0x0 + SKIPS] = 0x00040000;
@@ -405,7 +404,7 @@ nvresetgraphics(VGAscr *scr)
 	nv.dmamax = 8191;
 	nv.dmafree = nv.dmamax - nv.dmacurrent;
 
-	switch(scr->gscreen->depth) {
+	switch(scr->gscreen->depth){
 	case 32:
 	case 24:
 		surfaceFormat = SURFACE_FORMAT_DEPTH24;
@@ -456,7 +455,6 @@ nvresetgraphics(VGAscr *scr)
 	waitforidle(scr);
 }
 
-
 static int
 nvidiahwfill(VGAscr *scr, Rectangle r, uint32_t sval)
 {
@@ -468,7 +466,7 @@ nvidiahwfill(VGAscr *scr, Rectangle r, uint32_t sval)
 	nvdmanext((Dx(r) << 16) | Dy(r));
 
 	//if ( (Dy(r) * Dx(r)) >= 512)
-		nvdmakickoff(scr);
+	nvdmakickoff(scr);
 
 	waitforidle(scr);
 
@@ -484,7 +482,7 @@ nvidiahwscroll(VGAscr *scr, Rectangle r, Rectangle sr)
 	nvdmanext((Dy(r) << 16) | Dx(r));
 
 	//if ( (Dy(r) * Dx(r)) >= 512)
-		nvdmakickoff(scr);
+	nvdmakickoff(scr);
 
 	waitforidle(scr);
 
@@ -492,7 +490,7 @@ nvidiahwscroll(VGAscr *scr, Rectangle r, Rectangle sr)
 }
 
 void
-nvidiablank(VGAscr* scr, int blank)
+nvidiablank(VGAscr *scr, int blank)
 {
 	uint8_t seq1, crtc1A;
 
@@ -501,7 +499,7 @@ nvidiablank(VGAscr* scr, int blank)
 
 	if(blank){
 		seq1 |= 0x20;
-//		crtc1A |= 0xC0;
+		//		crtc1A |= 0xC0;
 		crtc1A |= 0x80;
 	}
 

sys/src/9/386/vgavesa.c

@@ -23,7 +23,7 @@
 #include "../port/error.h"
 #include "../../386/include/ureg.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
@@ -36,12 +36,18 @@ enum {
 static void *hardscreen;
 static uint8_t modebuf[0x1000];
 
-#define WORD(p) ((p)[0] | ((p)[1]<<8))
-#define LONG(p) ((p)[0] | ((p)[1]<<8) | ((p)[2]<<16) | ((p)[3]<<24))
-#define PWORD(p, v) (p)[0] = (v); (p)[1] = (v)>>8
-#define PLONG(p, v) (p)[0] = (v); (p)[1] = (v)>>8; (p)[2] = (v)>>16; (p)[3] = (v)>>24
-
-static uint8_t*
+#define WORD(p) ((p)[0] | ((p)[1] << 8))
+#define LONG(p) ((p)[0] | ((p)[1] << 8) | ((p)[2] << 16) | ((p)[3] << 24))
+#define PWORD(p, v)   \
+	(p)[0] = (v); \
+	(p)[1] = (v) >> 8
+#define PLONG(p, v)         \
+	(p)[0] = (v);       \
+	(p)[1] = (v) >> 8;  \
+	(p)[2] = (v) >> 16; \
+	(p)[3] = (v) >> 24
+
+static uint8_t *
 vbesetup(Ureg *u, int ax)
 {
 	// Yes, it's a PA, but it's a real mode PA, and 32 bits are fine.
@@ -51,8 +57,8 @@ vbesetup(Ureg *u, int ax)
 	memset(modebuf, 0, sizeof modebuf);
 	memset(u, 0, sizeof *u);
 	u->ax = ax;
-	u->es = (pa>>4)&0xF000;
-	u->di = pa&0xFFFF;
+	u->es = (pa >> 4) & 0xF000;
+	u->di = pa & 0xFFFF;
 	return modebuf;
 }
 
@@ -76,11 +82,12 @@ vbecall(Ureg *u)
 	pa = PADDR(RMBUF);
 	cmem->dev->write(cmem, modebuf, sizeof modebuf, pa);
 	u->trap = 0x10;
-	if(DBGFLG) print("vbecall: sizeof u is %d\n", sizeof *u);
+	if(DBGFLG)
+		print("vbecall: sizeof u is %d\n", sizeof *u);
 	creg->dev->write(creg, u, sizeof *u, 0);
 
 	creg->dev->read(creg, u, sizeof *u, 0);
-	if((u->ax&0xFFFF) != 0x004F)
+	if((u->ax & 0xFFFF) != 0x004F)
 		error("vesa bios error");
 	cmem->dev->read(cmem, modebuf, sizeof modebuf, pa);
 
@@ -97,9 +104,9 @@ vbecheck(void)
 	uint8_t *p;
 
 	p = vbesetup(&u, 0x4F00);
-	strcpy((char*)p, "VBE2");
+	strcpy((char *)p, "VBE2");
 	vbecall(&u);
-	if(memcmp((char*)p, "VESA", 4) != 0)
+	if(memcmp((char *)p, "VESA", 4) != 0)
 		error("bad vesa signature");
 	if(p[5] < 2)
 		error("bad vesa version");
@@ -115,7 +122,7 @@ vbegetmode(void)
 	return u.bx;
 }
 
-static uint8_t*
+static uint8_t *
 vbemodeinfo(int mode)
 {
 	uint8_t *p;
@@ -135,7 +142,7 @@ vesalinear(VGAscr *scr, int _1, int _2)
 	uint32_t paddr;
 	Pcidev *pci;
 
-	if(hardscreen) {
+	if(hardscreen){
 		scr->vaddr = 0;
 		scr->paddr = scr->apsize = 0;
 		return;
@@ -150,13 +157,13 @@ vesalinear(VGAscr *scr, int _1, int _2)
 	 */
 	mode &= 0x3FFF;
 	p = vbemodeinfo(mode);
-	if(!(WORD(p+0) & (1<<4)))
+	if(!(WORD(p + 0) & (1 << 4)))
 		error("not in VESA graphics mode");
-	if(!(WORD(p+0) & (1<<7)))
+	if(!(WORD(p + 0) & (1 << 7)))
 		error("not in linear graphics mode");
 
-	paddr = LONG(p+40);
-	size = WORD(p+20)*WORD(p+16);
+	paddr = LONG(p + 40);
+	size = WORD(p + 20) * WORD(p + 16);
 	size = ROUNDUP(size, PGSZ);
 
 	/*
@@ -168,8 +175,8 @@ vesalinear(VGAscr *scr, int _1, int _2)
 	while(!havesize && (pci = pcimatch(pci, 0, 0)) != nil){
 		if(pci->ccrb != Pcibcdisp)
 			continue;
-		for(i=0; i<nelem(pci->mem); i++)
-			if(paddr == (pci->mem[i].bar&~0x0F)){
+		for(i = 0; i < nelem(pci->mem); i++)
+			if(paddr == (pci->mem[i].bar & ~0x0F)){
 				if(pci->mem[i].size > size)
 					size = pci->mem[i].size;
 				havesize = 1;
@@ -179,13 +186,13 @@ vesalinear(VGAscr *scr, int _1, int _2)
 
 	/* no pci - heuristic guess */
 	if(!havesize){
-		if(size < 4*1024*1024)
-			size = 4*1024*1024;
+		if(size < 4 * 1024 * 1024)
+			size = 4 * 1024 * 1024;
 		else
-			size = ROUND(size, 1024*1024);
+			size = ROUND(size, 1024 * 1024);
 	}
-	if(size > 16*1024*1024)		/* arbitrary */
-		size = 16*1024*1024;
+	if(size > 16 * 1024 * 1024) /* arbitrary */
+		size = 16 * 1024 * 1024;
 
 	vgalinearaddr(scr, paddr, size);
 	if(scr->apsize)
@@ -208,8 +215,8 @@ vesaflush(VGAscr *scr, Rectangle r)
 		return;
 	if(rectclip(&r, scr->gscreen->r) == 0)
 		return;
-	sp = (uint32_t*)(scr->gscreendata->bdata + scr->gscreen->zero);
-	t = (r.max.x * scr->gscreen->depth + 2*BI2WD-1) / BI2WD;
+	sp = (uint32_t *)(scr->gscreendata->bdata + scr->gscreen->zero);
+	t = (r.max.x * scr->gscreen->depth + 2 * BI2WD - 1) / BI2WD;
 	w = (r.min.x * scr->gscreen->depth) / BI2WD;
 	w = (t - w) * BY2WD;
 	wid = scr->gscreen->width;

sys/src/9/amd64/acore.c

@@ -40,7 +40,7 @@
  * saving, so it does not have to be restored.
  */
 
-extern void acfpusysprocsetup(Proc*);
+extern void acfpusysprocsetup(Proc *);
 
 extern void _acsysret(void);
 extern void _actrapret(void);
@@ -54,7 +54,7 @@ ACVctl *acvctl[256];
 static void
 testiccfn(void)
 {
-	print("called: %s\n", ( char *)machp()->NIX.icc->data);
+	print("called: %s\n", (char *)machp()->NIX.icc->data);
 }
 
 void
@@ -69,7 +69,7 @@ testicc(int i)
 		}
 		print("calling core %d... ", i);
 		mp->NIX.icc->flushtlb = 0;
-		snprint(( char *)mp->NIX.icc->data, ICCLNSZ, "<%d>", i);
+		snprint((char *)mp->NIX.icc->data, ICCLNSZ, "<%d>", i);
 		mfence();
 		mp->NIX.icc->fn = testiccfn;
 		mwait(&mp->NIX.icc->fn);
@@ -86,8 +86,8 @@ acstackok(void)
 	char dummy;
 	char *sstart;
 
-	sstart = (char *)machp() - PGSZ - 4*PTSZ - MACHSTKSZ;
-	if(&dummy < sstart + 4*KiB){
+	sstart = (char *)machp() - PGSZ - 4 * PTSZ - MACHSTKSZ;
+	if(&dummy < sstart + 4 * KiB){
 		print("ac kernel stack overflow, cpu%d stopped\n", machp()->machno);
 		DONE();
 	}
@@ -125,7 +125,6 @@ acmmuswitch(void)
 
 	DBG("acmmuswitch mpl4 %#p mach0pml4 %#p m0pml4 %#p\n", machp()->MMU.pml4->pa, mach0pml4.pa, sys->machptr[0]->MMU.pml4->pa);
 
-
 	cr3put(machp()->MMU.pml4->pa);
 }
 
@@ -276,7 +275,7 @@ acsyscall(void)
 void
 acsysret(void)
 {
-panic("acsysret");
+	panic("acsysret");
 #if 0
 	DBG("acsysret\n");
 	if(m->proc != nil)
@@ -293,11 +292,11 @@ dumpreg(void *u)
 }
 
 char *rolename[] =
-{
-	[NIXAC] = "AC",
-	[NIXTC] = "TC",
-	[NIXKC] = "KC",
-	[NIXXC] = "XC",
+	{
+		[NIXAC] = "AC",
+		[NIXTC] = "TC",
+		[NIXKC] = "KC",
+		[NIXXC] = "XC",
 };
 
 void

sys/src/9/amd64/acpi.h

@@ -72,12 +72,11 @@ typedef struct Dmar Dmar;
 typedef struct Drhd Drhd;
 typedef struct DevScope DevScope;
 
-enum
-{
-	Sdthdrsz	= 36,	/* size of SDT header */
+enum {
+	Sdthdrsz = 36, /* size of SDT header */
 
 	/* ACPI regions. Gas ids */
-	Rsysmem	= 0,
+	Rsysmem = 0,
 	Rsysio,
 	Rpcicfg,
 	Rembed,
@@ -85,56 +84,55 @@ enum
 	Rcmos,
 	Rpcibar,
 	Ripmi,
-	Rfixedhw	= 0x7f,
+	Rfixedhw = 0x7f,
 
 	/* ACPI PM1 control */
-	Pm1SciEn		= 0x1,		/* Generate SCI and not SMI */
+	Pm1SciEn = 0x1, /* Generate SCI and not SMI */
 
 	/* ACPI tbdf as encoded in acpi region base addresses */
-	Rpciregshift	= 0,
-	Rpciregmask	= 0xFFFF,
-	Rpcifunshift	= 16,
-	Rpcifunmask	= 0xFFFF,
-	Rpcidevshift	= 32,
-	Rpcidevmask	= 0xFFFF,
-	Rpcibusshift	= 48,
-	Rpcibusmask	= 0xFFFF,
+	Rpciregshift = 0,
+	Rpciregmask = 0xFFFF,
+	Rpcifunshift = 16,
+	Rpcifunmask = 0xFFFF,
+	Rpcidevshift = 32,
+	Rpcidevmask = 0xFFFF,
+	Rpcibusshift = 48,
+	Rpcibusmask = 0xFFFF,
 
 	/* Apic structure types */
-	ASlapic = 0,	/* processor local apic */
-	ASioapic,	/* I/O apic */
-	ASintovr,	/* Interrupt source override */
-	ASnmi,		/* NMI source */
-	ASlnmi,		/* local apic nmi */
-	ASladdr,	/* local apic address override */
-	ASiosapic,	/* I/O sapic */
-	ASlsapic,	/* local sapic */
-	ASintsrc,	/* platform interrupt sources */
-	ASlx2apic,	/* local x2 apic */
-	ASlx2nmi,	/* local x2 apic NMI */
+	ASlapic = 0, /* processor local apic */
+	ASioapic,    /* I/O apic */
+	ASintovr,    /* Interrupt source override */
+	ASnmi,	     /* NMI source */
+	ASlnmi,	     /* local apic nmi */
+	ASladdr,     /* local apic address override */
+	ASiosapic,   /* I/O sapic */
+	ASlsapic,    /* local sapic */
+	ASintsrc,    /* platform interrupt sources */
+	ASlx2apic,   /* local x2 apic */
+	ASlx2nmi,    /* local x2 apic NMI */
 
 	/* Apic flags */
-	AFbus	= 0,	/* polarity/trigger like in ISA */
-	AFhigh	= 1,	/* active high */
-	AFlow	= 3,	/* active low */
-	AFpmask	= 3,	/* polarity bits */
-	AFedge	= 1<<2,	/* edge triggered */
-	AFlevel	= 3<<2,	/* level triggered */
-	AFtmask	= 3<<2,	/* trigger bits */
+	AFbus = 0,	  /* polarity/trigger like in ISA */
+	AFhigh = 1,	  /* active high */
+	AFlow = 3,	  /* active low */
+	AFpmask = 3,	  /* polarity bits */
+	AFedge = 1 << 2,  /* edge triggered */
+	AFlevel = 3 << 2, /* level triggered */
+	AFtmask = 3 << 2, /* trigger bits */
 
 	/* SRAT types */
-	SRlapic = 0,	/* Local apic/sapic affinity */
-	SRmem,		/* Memory affinity */
-	SRlx2apic,	/* x2 apic affinity */
+	SRlapic = 0, /* Local apic/sapic affinity */
+	SRmem,	     /* Memory affinity */
+	SRlx2apic,   /* x2 apic affinity */
 
 	/* Arg for _PIC */
-	Ppic = 0,	/* PIC interrupt model */
-	Papic,		/* APIC interrupt model */
-	Psapic,		/* SAPIC interrupt model */
+	Ppic = 0, /* PIC interrupt model */
+	Papic,	  /* APIC interrupt model */
+	Psapic,	  /* SAPIC interrupt model */
 
-
-	CMregion = 0,			/* regio name spc base len accsz*/
-	CMgpe,				/* gpe name id */
+	CMregion = 0, /* regio name spc base len accsz*/
+	CMgpe,	      /* gpe name id */
 
 	/* Table types. */
 	RSDP = 0,
@@ -167,12 +165,12 @@ enum
 	ATSR,
 	RHSA,
 	ANDD,
-	NACPITBLS,			/* Number of ACPI tables */
+	NACPITBLS, /* Number of ACPI tables */
 
 	/* Atable constants */
-	SIGSZ		= 4+1,	/* Size of the signature (including NUL) */
-	OEMIDSZ		= 6+1,	/* Size of the OEM ID (including NUL) */
-	OEMTBLIDSZ	= 8+1,	/* Size of the OEM Table ID (including NUL) */
+	SIGSZ = 4 + 1,	    /* Size of the signature (including NUL) */
+	OEMIDSZ = 6 + 1,    /* Size of the OEM ID (including NUL) */
+	OEMTBLIDSZ = 8 + 1, /* Size of the OEM Table ID (including NUL) */
 
 };
 
@@ -191,74 +189,70 @@ enum
  * same array.
  */
 struct Atable {
-	Qid qid;        	/* QID corresponding to this table. */
-	Qid rqid;		/* This table's 'raw' QID. */
-	Qid pqid;		/* This table's 'pretty' QID. */
-	Qid tqid;		/* This table's 'table' QID. */
-	int type;		/* This table's type */
-	void *tbl;		/* pointer to the converted table, e.g. madt. */
-	char name[16];		/* name of this table */
-
-	Atable *parent;		/* Parent pointer */
-	Atable **children;	/* children of this node (an array). */
-	Dirtab *cdirs;		/* child directory entries of this node. */
-	size_t nchildren;	/* count of this node's children */
-	Atable *next;		/* Pointer to the next sibling. */
-
-	size_t rawsize;		/* Total size of raw table */
-	uint8_t *raw;		/* Raw data. */
+	Qid qid;       /* QID corresponding to this table. */
+	Qid rqid;      /* This table's 'raw' QID. */
+	Qid pqid;      /* This table's 'pretty' QID. */
+	Qid tqid;      /* This table's 'table' QID. */
+	int type;      /* This table's type */
+	void *tbl;     /* pointer to the converted table, e.g. madt. */
+	char name[16]; /* name of this table */
+
+	Atable *parent;	   /* Parent pointer */
+	Atable **children; /* children of this node (an array). */
+	Dirtab *cdirs;	   /* child directory entries of this node. */
+	size_t nchildren;  /* count of this node's children */
+	Atable *next;	   /* Pointer to the next sibling. */
+
+	size_t rawsize; /* Total size of raw table */
+	uint8_t *raw;	/* Raw data. */
 };
 
-struct Gpe
-{
-	uintptr_t	stsio;		/* port used for status */
-	int		stsbit;		/* bit number */
-	uintptr_t	enio;		/* port used for enable */
-	int		enbit;		/* bit number */
-	int		nb;		/* event number */
-	char*		obj;		/* handler object  */
-	int		id;		/* id as supplied by user */
+struct Gpe {
+	uintptr_t stsio; /* port used for status */
+	int stsbit;	 /* bit number */
+	uintptr_t enio;	 /* port used for enable */
+	int enbit;	 /* bit number */
+	int nb;		 /* event number */
+	char *obj;	 /* handler object  */
+	int id;		 /* id as supplied by user */
 };
 
-struct Parse
-{
-	char*	sig;
-	Atable*	(*f)(unsigned char*, int);	/* return nil to keep vmap */
+struct Parse {
+	char *sig;
+	Atable *(*f)(unsigned char *, int); /* return nil to keep vmap */
 };
 
-struct Regio{
-	void		*arg;
-	uint8_t		(*get8)(uintptr_t, void*);
-	void		(*set8)(uintptr_t, uint8_t, void*);
-	uint16_t	(*get16)(uintptr_t, void*);
-	void		(*set16)(uintptr_t, uint16_t, void*);
-	uint32_t	(*get32)(uintptr_t, void*);
-	void		(*set32)(uintptr_t, uint32_t, void*);
-	uint64_t	(*get64)(uintptr_t, void*);
-	void		(*set64)(uintptr_t, uint64_t, void*);
+struct Regio {
+	void *arg;
+	uint8_t (*get8)(uintptr_t, void *);
+	void (*set8)(uintptr_t, uint8_t, void *);
+	uint16_t (*get16)(uintptr_t, void *);
+	void (*set16)(uintptr_t, uint16_t, void *);
+	uint32_t (*get32)(uintptr_t, void *);
+	void (*set32)(uintptr_t, uint32_t, void *);
+	uint64_t (*get64)(uintptr_t, void *);
+	void (*set64)(uintptr_t, uint64_t, void *);
 };
 
-struct Reg
-{
-	char*		name;
-	int		spc;		/* io space */
-	uint64_t	base;		/* address, physical */
-	unsigned char*	p;		/* address, kmapped */
-	uint64_t	len;
-	int		tbdf;
-	int		accsz;		/* access size */
+struct Reg {
+	char *name;
+	int spc;	  /* io space */
+	uint64_t base;	  /* address, physical */
+	unsigned char *p; /* address, kmapped */
+	uint64_t len;
+	int tbdf;
+	int accsz; /* access size */
 };
 
 /* Generic address structure.
  */
-struct Gas
-{
-	uint8_t		spc;	/* address space id */
-	uint8_t		len;	/* register size in bits */
-	uint8_t		off;	/* bit offset */
-	uint8_t		accsz;	/* 1: byte; 2: word; 3: dword; 4: qword */
-	uint64_t	addr;	/* address (or acpi encoded tbdf + reg) */
-} __attribute__ ((packed));
+struct Gas {
+	uint8_t spc;   /* address space id */
+	uint8_t len;   /* register size in bits */
+	uint8_t off;   /* bit offset */
+	uint8_t accsz; /* 1: byte; 2: word; 3: dword; 4: qword */
+	uint64_t addr; /* address (or acpi encoded tbdf + reg) */
+} __attribute__((packed));
 
 /* Root system description table pointer.
  * Used to locate the root system description table RSDT
@@ -272,68 +266,63 @@ struct Gas
 
 #define RSDPTR "RSD PTR "
 
-struct Rsdp
-{
-	uint8_t	signature[8];			/* "RSD PTR " */
-	uint8_t	rchecksum;
-	uint8_t	oemid[6];
-	uint8_t	revision;
-	uint8_t	raddr[4];			/* RSDT */
-	uint8_t	length[4];
-	uint8_t	xaddr[8];			/* XSDT */
-	uint8_t	xchecksum;			/* XSDT */
-	uint8_t	_33_[3];			/* reserved */
-}  __attribute__ ((packed));
+struct Rsdp {
+	uint8_t signature[8]; /* "RSD PTR " */
+	uint8_t rchecksum;
+	uint8_t oemid[6];
+	uint8_t revision;
+	uint8_t raddr[4]; /* RSDT */
+	uint8_t length[4];
+	uint8_t xaddr[8];  /* XSDT */
+	uint8_t xchecksum; /* XSDT */
+	uint8_t _33_[3];   /* reserved */
+} __attribute__((packed));
 
 /* Header for ACPI description tables
  */
-struct Sdthdr
-{
-	uint8_t	sig[4];			/* "FACP" or whatever */
-	uint8_t	length[4];
-	uint8_t	rev;
-	uint8_t	csum;
-	uint8_t	oemid[6];
-	uint8_t	oemtblid[8];
-	uint8_t	oemrev[4];
-	uint8_t	creatorid[4];
-	uint8_t	creatorrev[4];
-}  __attribute__ ((packed));
+struct Sdthdr {
+	uint8_t sig[4]; /* "FACP" or whatever */
+	uint8_t length[4];
+	uint8_t rev;
+	uint8_t csum;
+	uint8_t oemid[6];
+	uint8_t oemtblid[8];
+	uint8_t oemrev[4];
+	uint8_t creatorid[4];
+	uint8_t creatorrev[4];
+} __attribute__((packed));
 
 /* Firmware ACPI control structure
  */
-struct Facs
-{
-	uint8_t 	sig[4];
-	uint32_t 	len;
-	uint32_t	hwsig;
-	uint32_t	wakingv;
-	uint32_t	glock;
-	uint32_t	flags;
-	uint64_t	xwakingv;
-	uint8_t		vers;
-	uint8_t		reserved1[3];
-	uint32_t	ospmflags;
-	uint8_t		reserved2[24];
-}  __attribute__ ((packed));
+struct Facs {
+	uint8_t sig[4];
+	uint32_t len;
+	uint32_t hwsig;
+	uint32_t wakingv;
+	uint32_t glock;
+	uint32_t flags;
+	uint64_t xwakingv;
+	uint8_t vers;
+	uint8_t reserved1[3];
+	uint32_t ospmflags;
+	uint8_t reserved2[24];
+} __attribute__((packed));
 
 /* Maximum System Characteristics table
  */
-struct Msct
-{
-	size_t 		ndoms;		/* number of discovered domains */
-	int		nclkdoms;	/* number of clock domains */
-	uint64_t	maxpa;		/* max physical address */
-	Mdom*		dom;		/* domain information list */
+struct Msct {
+	size_t ndoms;	/* number of discovered domains */
+	int nclkdoms;	/* number of clock domains */
+	uint64_t maxpa; /* max physical address */
+	Mdom *dom;	/* domain information list */
 };
 
-struct Mdom
-{
-	Mdom*	next;
-	int	start;		/* start dom id */
-	int	end;		/* end dom id */
-	int	maxproc;	/* max processor capacity */
-	uint64_t maxmem;	/* max memory capacity */
+struct Mdom {
+	Mdom *next;
+	int start;	 /* start dom id */
+	int end;	 /* end dom id */
+	int maxproc;	 /* max processor capacity */
+	uint64_t maxmem; /* max memory capacity */
 };
 
 /* Multiple APIC description table
@@ -342,93 +331,90 @@ struct Mdom
  * Addresses are processor-relative physical addresses.
  * Only enabled devices are linked, others are filtered out.
  */
-struct Madt
-{
-	uint64_t	lapicpa;	/* local APIC addr */
-	int		pcat;		/* the machine has PC/AT 8259s */
-	Apicst*		st;		/* list of Apic related structures */
+struct Madt {
+	uint64_t lapicpa; /* local APIC addr */
+	int pcat;	  /* the machine has PC/AT 8259s */
+	Apicst *st;	  /* list of Apic related structures */
 };
 
-struct Apicst
-{
-	int	type;
-	Apicst*	next;
-	union{
-		struct{
-			int	pid;	/* processor id */
-			int	id;	/* apic no */
+struct Apicst {
+	int type;
+	Apicst *next;
+	union {
+		struct {
+			int pid; /* processor id */
+			int id;	 /* apic no */
 		} lapic;
-		struct{
-			int	id;	/* io apic id */
-			uint32_t	ibase;	/* interrupt base addr. */
-			uint64_t	addr;	/* base address */
+		struct {
+			int id;		/* io apic id */
+			uint32_t ibase; /* interrupt base addr. */
+			uint64_t addr;	/* base address */
 		} ioapic, iosapic;
-		struct{
-			int	irq;	/* bus intr. source (ISA only) */
-			int	intr;	/* system interrupt */
-			int	flags;	/* apic flags */
+		struct {
+			int irq;   /* bus intr. source (ISA only) */
+			int intr;  /* system interrupt */
+			int flags; /* apic flags */
 		} intovr;
-		struct{
-			int	intr;	/* system interrupt */
-			int	flags;	/* apic flags */
+		struct {
+			int intr;  /* system interrupt */
+			int flags; /* apic flags */
 		} nmi;
-		struct{
-			int	pid;	/* processor id */
-			int	flags;	/* lapic flags */
-			int	lint;	/* lapic LINTn for nmi */
+		struct {
+			int pid;   /* processor id */
+			int flags; /* lapic flags */
+			int lint;  /* lapic LINTn for nmi */
 		} lnmi;
-		struct{
-			int	pid;	/* processor id */
-			int	id;	/* apic id */
-			int	eid;	/* apic eid */
-			int	puid;	/* processor uid */
-			char*	puids;	/* same thing */
+		struct {
+			int pid;     /* processor id */
+			int id;	     /* apic id */
+			int eid;     /* apic eid */
+			int puid;    /* processor uid */
+			char *puids; /* same thing */
 		} lsapic;
-		struct{
-			int	pid;	/* processor id */
-			int	peid;	/* processor eid */
-			int	iosv;	/* io sapic vector */
-			int	intr;	/* global sys intr. */
-			int	type;	/* intr type */
-			int	flags;	/* apic flags */
-			int	any;	/* err sts at any proc */
+		struct {
+			int pid;   /* processor id */
+			int peid;  /* processor eid */
+			int iosv;  /* io sapic vector */
+			int intr;  /* global sys intr. */
+			int type;  /* intr type */
+			int flags; /* apic flags */
+			int any;   /* err sts at any proc */
 		} intsrc;
-		struct{
-			int	id;	/* x2 apic id */
-			int	puid;	/* processor uid */
+		struct {
+			int id;	  /* x2 apic id */
+			int puid; /* processor uid */
 		} lx2apic;
-		struct{
-			int	puid;
-			int	flags;
-			int	intr;
+		struct {
+			int puid;
+			int flags;
+			int intr;
 		} lx2nmi;
 	};
 };
 
 /* System resource affinity table
  */
-struct Srat
-{
-	int	type;
-	Srat*	next;
-	union{
-		struct{
-			int	dom;	/* proximity domain */
-			int	apic;	/* apic id */
-			int	sapic;	/* sapic id */
-			int	clkdom;	/* clock domain */
+struct Srat {
+	int type;
+	Srat *next;
+	union {
+		struct {
+			int dom;    /* proximity domain */
+			int apic;   /* apic id */
+			int sapic;  /* sapic id */
+			int clkdom; /* clock domain */
 		} lapic;
-		struct{
-			int	dom;	/* proximity domain */
-			uint64_t	addr;	/* base address */
-			uint64_t	len;
-			int	hplug;	/* hot pluggable */
-			int	nvram;	/* non volatile */
+		struct {
+			int dom;       /* proximity domain */
+			uint64_t addr; /* base address */
+			uint64_t len;
+			int hplug; /* hot pluggable */
+			int nvram; /* non volatile */
 		} mem;
-		struct{
-			int	dom;	/* proximity domain */
-			int	apic;	/* x2 apic id */
-			int	clkdom;	/* clock domain */
+		struct {
+			int dom;    /* proximity domain */
+			int apic;   /* x2 apic id */
+			int clkdom; /* clock domain */
 		} lx2apic;
 	};
 };
@@ -441,8 +427,8 @@ struct Slit {
 };
 
 struct SlEntry {
-	int dom;	/* proximity domain */
-	uint dist;	/* distance to proximity domain */
+	int dom;   /* proximity domain */
+	uint dist; /* distance to proximity domain */
 };
 
 /* Fixed ACPI description table.
@@ -452,68 +438,66 @@ struct SlEntry {
  * P_* blocks are for processor features.
  * Has address for the DSDT.
  */
-struct Fadt
-{
-	uint32_t	facs;
-	uint32_t	dsdt;
+struct Fadt {
+	uint32_t facs;
+	uint32_t dsdt;
 	/* 1 reserved */
-	uint8_t		pmprofile;
-	uint16_t	sciint;
-	uint32_t	smicmd;
-	uint8_t		acpienable;
-	uint8_t		acpidisable;
-	uint8_t		s4biosreq;
-	uint8_t		pstatecnt;
-	uint32_t	pm1aevtblk;
-	uint32_t	pm1bevtblk;
-	uint32_t	pm1acntblk;
-	uint32_t	pm1bcntblk;
-	uint32_t	pm2cntblk;
-	uint32_t	pmtmrblk;
-	uint32_t	gpe0blk;
-	uint32_t	gpe1blk;
-	uint8_t		pm1evtlen;
-	uint8_t		pm1cntlen;
-	uint8_t		pm2cntlen;
-	uint8_t		pmtmrlen;
-	uint8_t		gpe0blklen;
-	uint8_t		gpe1blklen;
-	uint8_t		gp1base;
-	uint8_t		cstcnt;
-	uint16_t	plvl2lat;
-	uint16_t	plvl3lat;
-	uint16_t	flushsz;
-	uint16_t	flushstride;
-	uint8_t		dutyoff;
-	uint8_t		dutywidth;
-	uint8_t		dayalrm;
-	uint8_t		monalrm;
-	uint8_t		century;
-	uint16_t	iapcbootarch;
+	uint8_t pmprofile;
+	uint16_t sciint;
+	uint32_t smicmd;
+	uint8_t acpienable;
+	uint8_t acpidisable;
+	uint8_t s4biosreq;
+	uint8_t pstatecnt;
+	uint32_t pm1aevtblk;
+	uint32_t pm1bevtblk;
+	uint32_t pm1acntblk;
+	uint32_t pm1bcntblk;
+	uint32_t pm2cntblk;
+	uint32_t pmtmrblk;
+	uint32_t gpe0blk;
+	uint32_t gpe1blk;
+	uint8_t pm1evtlen;
+	uint8_t pm1cntlen;
+	uint8_t pm2cntlen;
+	uint8_t pmtmrlen;
+	uint8_t gpe0blklen;
+	uint8_t gpe1blklen;
+	uint8_t gp1base;
+	uint8_t cstcnt;
+	uint16_t plvl2lat;
+	uint16_t plvl3lat;
+	uint16_t flushsz;
+	uint16_t flushstride;
+	uint8_t dutyoff;
+	uint8_t dutywidth;
+	uint8_t dayalrm;
+	uint8_t monalrm;
+	uint8_t century;
+	uint16_t iapcbootarch;
 	/* 1 reserved */
-	uint32_t	flags;
-	Gas		resetreg;
-	uint8_t		resetval;
+	uint32_t flags;
+	Gas resetreg;
+	uint8_t resetval;
 	/* 3 reserved */
-	uint64_t	xfacs;
-	uint64_t	xdsdt;
-	Gas		xpm1aevtblk;
-	Gas		xpm1bevtblk;
-	Gas		xpm1acntblk;
-	Gas		xpm1bcntblk;
-	Gas		xpm2cntblk;
-	Gas		xpmtmrblk;
-	Gas		xgpe0blk;
-	Gas		xgpe1blk;
+	uint64_t xfacs;
+	uint64_t xdsdt;
+	Gas xpm1aevtblk;
+	Gas xpm1bevtblk;
+	Gas xpm1acntblk;
+	Gas xpm1bcntblk;
+	Gas xpm2cntblk;
+	Gas xpmtmrblk;
+	Gas xgpe0blk;
+	Gas xgpe1blk;
 };
 
 /* XSDT/RSDT. 4/8 byte addresses starting at p.
  */
-struct Xsdt
-{
+struct Xsdt {
 	size_t len;
 	size_t asize;
-	uint8_t*	p;
+	uint8_t *p;
 };
 
 /* DMAR.
@@ -535,7 +519,7 @@ struct Drhd {
 	int flags;
 	int segment;
 	uintptr_t rba;
-	uintptr_t all;	// This drhd scope is for everything.
+	uintptr_t all;	      // This drhd scope is for everything.
 	size_t nscope;
 	struct DevScope *scopes;
 };
@@ -551,8 +535,8 @@ struct Dmar {
 
 int acpiinit(void);
 Atable *mkatable(Atable *parent,
-                        int type, char *name, uint8_t *raw,
-                        size_t rawsize, size_t addsize);
+		 int type, char *name, uint8_t *raw,
+		 size_t rawsize, size_t addsize);
 Atable *finatable(Atable *t, PSlice *slice);
 Atable *finatable_nochildren(Atable *t);
 
@@ -560,4 +544,4 @@ extern Atable *apics;
 extern Atable *dmar;
 extern Atable *srat;
 
-extern uintmem acpimblocksize(uintmem, int*);
+extern uintmem acpimblocksize(uintmem, int *);

sys/src/9/amd64/ahci.h

@@ -14,33 +14,33 @@
 
 /* ata errors */
 enum {
-	Emed	= 1<<0,		/* media error */
-	Enm	= 1<<1,		/* no media */
-	Eabrt	= 1<<2,		/* abort */
-	Emcr	= 1<<3,		/* media change request */
-	Eidnf	= 1<<4,		/* no user-accessible address */
-	Emc	= 1<<5,		/* media change */
-	Eunc	= 1<<6,		/* data error */
-	Ewp	= 1<<6,		/* write protect */
-	Eicrc	= 1<<7,		/* interface crc error */
-
-	Efatal	= Eidnf|Eicrc,	/* must sw reset */
+	Emed = 1 << 0,	/* media error */
+	Enm = 1 << 1,	/* no media */
+	Eabrt = 1 << 2, /* abort */
+	Emcr = 1 << 3,	/* media change request */
+	Eidnf = 1 << 4, /* no user-accessible address */
+	Emc = 1 << 5,	/* media change */
+	Eunc = 1 << 6,	/* data error */
+	Ewp = 1 << 6,	/* write protect */
+	Eicrc = 1 << 7, /* interface crc error */
+
+	Efatal = Eidnf | Eicrc, /* must sw reset */
 };
 
 /* ata status */
 enum {
-	ASerr	= 1<<0,		/* error */
-	ASdrq	= 1<<3,		/* request */
-	ASdf	= 1<<5,		/* fault */
-	ASdrdy	= 1<<6,		/* ready */
-	ASbsy	= 1<<7,		/* busy */
+	ASerr = 1 << 0,	 /* error */
+	ASdrq = 1 << 3,	 /* request */
+	ASdf = 1 << 5,	 /* fault */
+	ASdrdy = 1 << 6, /* ready */
+	ASbsy = 1 << 7,	 /* busy */
 
-	ASobs	= 1<<1|1<<2|1<<4,
+	ASobs = 1 << 1 | 1 << 2 | 1 << 4,
 };
 
 /* pci configuration */
 enum {
-	Abar	= 5,
+	Abar = 5,
 };
 
 /*
@@ -56,166 +56,166 @@ enum {
 
 /* cap bits: supported features */
 enum {
-	Hs64a	= 1<<31,	/* 64-bit addressing */
-	Hsncq	= 1<<30,	/* ncq */
-	Hssntf	= 1<<29,	/* snotification reg. */
-	Hsmps	= 1<<28,	/* mech pres switch */
-	Hsss	= 1<<27,	/* staggered spinup */
-	Hsalp	= 1<<26,	/* aggressive link pm */
-	Hsal	= 1<<25,	/* activity led */
-	Hsclo	= 1<<24,	/* command-list override */
-	Hsam	= 1<<18,	/* ahci-mode only */
-	Hspm	= 1<<17,	/* port multiplier */
-	Hfbss	= 1<<16,	/* fis-based switching */
-	Hpmb	= 1<<15,	/* multiple-block pio */
-	Hssc	= 1<<14,	/* slumber state */
-	Hpsc	= 1<<13,	/* partial-slumber state */
-	Hcccs	= 1<<7,		/* coal */
-	Hems	= 1<<6,		/* enclosure mgmt. */
-	Hsxs	= 1<<5,		/* external sata */
+	Hs64a = 1 << 31,  /* 64-bit addressing */
+	Hsncq = 1 << 30,  /* ncq */
+	Hssntf = 1 << 29, /* snotification reg. */
+	Hsmps = 1 << 28,  /* mech pres switch */
+	Hsss = 1 << 27,	  /* staggered spinup */
+	Hsalp = 1 << 26,  /* aggressive link pm */
+	Hsal = 1 << 25,	  /* activity led */
+	Hsclo = 1 << 24,  /* command-list override */
+	Hsam = 1 << 18,	  /* ahci-mode only */
+	Hspm = 1 << 17,	  /* port multiplier */
+	Hfbss = 1 << 16,  /* fis-based switching */
+	Hpmb = 1 << 15,	  /* multiple-block pio */
+	Hssc = 1 << 14,	  /* slumber state */
+	Hpsc = 1 << 13,	  /* partial-slumber state */
+	Hcccs = 1 << 7,	  /* coal */
+	Hems = 1 << 6,	  /* enclosure mgmt. */
+	Hsxs = 1 << 5,	  /* external sata */
 };
 
 /* cap2 bits: supported features */
 enum {
-	Hdeso	= 1<<5,		/* devsleep entrance from slumber only */
-	Hsadm	= 1<<4,		/* supports aggressive device sleep mgmt */
-	Hsds	= 1<<3,		/* supports sleep device */
-	Hapst	= 1<<2,		/* automatic partial to slumber transitions */
-	Hnvmp	= 1<<1,		/* nvmhci/nvme present */
-	Hboh	= 1<<0,		/* bios/os handoff */
+	Hdeso = 1 << 5, /* devsleep entrance from slumber only */
+	Hsadm = 1 << 4, /* supports aggressive device sleep mgmt */
+	Hsds = 1 << 3,	/* supports sleep device */
+	Hapst = 1 << 2, /* automatic partial to slumber transitions */
+	Hnvmp = 1 << 1, /* nvmhci/nvme present */
+	Hboh = 1 << 0,	/* bios/os handoff */
 };
 
 /* ghc bits */
 enum {
-	Hae	= 1<<31,	/* enable ahci */
-	Hie	= 1<<1,		/* " interrupts */
-	Hhr	= 1<<0,		/* hba reset */
+	Hae = 1 << 31, /* enable ahci */
+	Hie = 1 << 1,  /* " interrupts */
+	Hhr = 1 << 0,  /* hba reset */
 };
 
 typedef struct {
-	uint32_t	cap;
-	uint32_t	ghc;
-	uint32_t	isr;
-	uint32_t	pi;		/* ports implemented */
-	uint32_t	ver;
-	uint32_t	ccc;		/* coaleasing control */
-	uint32_t	cccports;
-	uint32_t	emloc;
-	uint32_t	emctl;
-	uint32_t	cap2;		/* host capabilities extended */
-	uint32_t	bohc;		/* bios/os handoff control and status */
+	uint32_t cap;
+	uint32_t ghc;
+	uint32_t isr;
+	uint32_t pi; /* ports implemented */
+	uint32_t ver;
+	uint32_t ccc; /* coaleasing control */
+	uint32_t cccports;
+	uint32_t emloc;
+	uint32_t emctl;
+	uint32_t cap2; /* host capabilities extended */
+	uint32_t bohc; /* bios/os handoff control and status */
 } Ahba;
 
 enum {
-	Acpds	= 1<<31,	/* cold port detect status */
-	Atfes	= 1<<30,	/* task file error status */
-	Ahbfs	= 1<<29,	/* hba fatal */
-	Ahbds	= 1<<28,	/* hba error (parity error) */
-	Aifs	= 1<<27,	/* interface fatal  §6.1.2 */
-	Ainfs	= 1<<26,	/* interface error (recovered) */
-	Aofs	= 1<<24,	/* too many bytes from disk */
-	Aipms	= 1<<23,	/* incorrect prt mul status */
-	Aprcs	= 1<<22,	/* PhyRdy change status Pxserr.diag.n */
-	Adpms	= 1<<7,		/* mechanical presence status */
-	Apcs 	= 1<<6,		/* port connect  diag.x */
-	Adps 	= 1<<5,		/* descriptor processed */
-	Aufs 	= 1<<4,		/* unknown fis diag.f */
-	Asdbs	= 1<<3,		/* set device bits fis received w/ i bit set */
-	Adss	= 1<<2,		/* dma setup */
-	Apio	= 1<<1,		/* pio setup fis */
-	Adhrs	= 1<<0,		/* device to host register fis */
-
-	IEM	= Acpds|Atfes|Ahbds|Ahbfs|Ahbds|Aifs|Ainfs|Aprcs|Apcs|Adps|
-			Aufs|Asdbs|Adss|Adhrs,
-	Ifatal	= Atfes|Ahbfs|Ahbds|Aifs,
+	Acpds = 1 << 31, /* cold port detect status */
+	Atfes = 1 << 30, /* task file error status */
+	Ahbfs = 1 << 29, /* hba fatal */
+	Ahbds = 1 << 28, /* hba error (parity error) */
+	Aifs = 1 << 27,	 /* interface fatal  §6.1.2 */
+	Ainfs = 1 << 26, /* interface error (recovered) */
+	Aofs = 1 << 24,	 /* too many bytes from disk */
+	Aipms = 1 << 23, /* incorrect prt mul status */
+	Aprcs = 1 << 22, /* PhyRdy change status Pxserr.diag.n */
+	Adpms = 1 << 7,	 /* mechanical presence status */
+	Apcs = 1 << 6,	 /* port connect  diag.x */
+	Adps = 1 << 5,	 /* descriptor processed */
+	Aufs = 1 << 4,	 /* unknown fis diag.f */
+	Asdbs = 1 << 3,	 /* set device bits fis received w/ i bit set */
+	Adss = 1 << 2,	 /* dma setup */
+	Apio = 1 << 1,	 /* pio setup fis */
+	Adhrs = 1 << 0,	 /* device to host register fis */
+
+	IEM = Acpds | Atfes | Ahbds | Ahbfs | Ahbds | Aifs | Ainfs | Aprcs | Apcs | Adps |
+	      Aufs | Asdbs | Adss | Adhrs,
+	Ifatal = Atfes | Ahbfs | Ahbds | Aifs,
 };
 
 /* serror bits */
 enum {
-	SerrX	= 1<<26,	/* exchanged */
-	SerrF	= 1<<25,	/* unknown fis */
-	SerrT	= 1<<24,	/* transition error */
-	SerrS	= 1<<23,	/* link sequence */
-	SerrH	= 1<<22,	/* handshake */
-	SerrC	= 1<<21,	/* crc */
-	SerrD	= 1<<20,	/* not used by ahci */
-	SerrB	= 1<<19,	/* 10-tp-8 decode */
-	SerrW	= 1<<18,	/* comm wake */
-	SerrI	= 1<<17,	/* phy internal */
-	SerrN	= 1<<16,	/* phyrdy change */
-
-	ErrE	= 1<<11,	/* internal */
-	ErrP	= 1<<10,	/* ata protocol violation */
-	ErrC	= 1<<9,		/* communication */
-	ErrT	= 1<<8,		/* transient */
-	ErrM	= 1<<1,		/* recoverd comm */
-	ErrI	= 1<<0,		/* recovered data integrety */
-
-	ErrAll	= ErrE|ErrP|ErrC|ErrT|ErrM|ErrI,
-	SerrAll	= SerrX|SerrF|SerrT|SerrS|SerrH|SerrC|SerrD|SerrB|SerrW|
-			SerrI|SerrN|ErrAll,
-	SerrBad	= 0x7f<<19,
+	SerrX = 1 << 26, /* exchanged */
+	SerrF = 1 << 25, /* unknown fis */
+	SerrT = 1 << 24, /* transition error */
+	SerrS = 1 << 23, /* link sequence */
+	SerrH = 1 << 22, /* handshake */
+	SerrC = 1 << 21, /* crc */
+	SerrD = 1 << 20, /* not used by ahci */
+	SerrB = 1 << 19, /* 10-tp-8 decode */
+	SerrW = 1 << 18, /* comm wake */
+	SerrI = 1 << 17, /* phy internal */
+	SerrN = 1 << 16, /* phyrdy change */
+
+	ErrE = 1 << 11, /* internal */
+	ErrP = 1 << 10, /* ata protocol violation */
+	ErrC = 1 << 9,	/* communication */
+	ErrT = 1 << 8,	/* transient */
+	ErrM = 1 << 1,	/* recoverd comm */
+	ErrI = 1 << 0,	/* recovered data integrety */
+
+	ErrAll = ErrE | ErrP | ErrC | ErrT | ErrM | ErrI,
+	SerrAll = SerrX | SerrF | SerrT | SerrS | SerrH | SerrC | SerrD | SerrB | SerrW |
+		  SerrI | SerrN | ErrAll,
+	SerrBad = 0x7f << 19,
 };
 
 /* cmd register bits */
 enum {
-	Aicc	= 1<<28,	/* interface communcations control. 4 bits */
-	Aasp	= 1<<27,	/* aggressive slumber & partial sleep */
-	Aalpe 	= 1<<26,	/* aggressive link pm enable */
-	Adlae	= 1<<25,	/* drive led on atapi */
-	Aatapi	= 1<<24,	/* device is atapi */
-	Aesp	= 1<<21,	/* external sata port */
-	Acpd	= 1<<20,	/* cold presence detect */
-	Ampsp	= 1<<19,	/* mechanical pres. */
-	Ahpcp	= 1<<18,	/* hot plug capable */
-	Apma	= 1<<17,	/* pm attached */
-	Acps	= 1<<16,	/* cold presence state */
-	Acr	= 1<<15,	/* cmdlist running */
-	Afr	= 1<<14,	/* fis running */
-	Ampss	= 1<<13,	/* mechanical presence switch state */
-	Accs	= 1<<8,		/* current command slot 12:08 */
-	Afre	= 1<<4,		/* fis enable receive */
-	Aclo	= 1<<3,		/* command list override */
-	Apod	= 1<<2,		/* power on dev (requires cold-pres. detect) */
-	Asud	= 1<<1,		/* spin-up device;  requires ss capability */
-	Ast	= 1<<0,		/* start */
-
-	Arun	= Ast|Acr|Afre|Afr,
+	Aicc = 1 << 28,	  /* interface communcations control. 4 bits */
+	Aasp = 1 << 27,	  /* aggressive slumber & partial sleep */
+	Aalpe = 1 << 26,  /* aggressive link pm enable */
+	Adlae = 1 << 25,  /* drive led on atapi */
+	Aatapi = 1 << 24, /* device is atapi */
+	Aesp = 1 << 21,	  /* external sata port */
+	Acpd = 1 << 20,	  /* cold presence detect */
+	Ampsp = 1 << 19,  /* mechanical pres. */
+	Ahpcp = 1 << 18,  /* hot plug capable */
+	Apma = 1 << 17,	  /* pm attached */
+	Acps = 1 << 16,	  /* cold presence state */
+	Acr = 1 << 15,	  /* cmdlist running */
+	Afr = 1 << 14,	  /* fis running */
+	Ampss = 1 << 13,  /* mechanical presence switch state */
+	Accs = 1 << 8,	  /* current command slot 12:08 */
+	Afre = 1 << 4,	  /* fis enable receive */
+	Aclo = 1 << 3,	  /* command list override */
+	Apod = 1 << 2,	  /* power on dev (requires cold-pres. detect) */
+	Asud = 1 << 1,	  /* spin-up device;  requires ss capability */
+	Ast = 1 << 0,	  /* start */
+
+	Arun = Ast | Acr | Afre | Afr,
 };
 
 /* ctl register bits */
 enum {
-	Aipm	= 1<<8,		/* interface power mgmt. 3=off */
-	Aspd	= 1<<4,
-	Adet	= 1<<0,		/* device detection */
+	Aipm = 1 << 8, /* interface power mgmt. 3=off */
+	Aspd = 1 << 4,
+	Adet = 1 << 0, /* device detection */
 };
 
-#define	sstatus	scr0
-#define	sctl	scr2
-#define	serror	scr1
-#define	sactive	scr3
+#define sstatus scr0
+#define sctl scr2
+#define serror scr1
+#define sactive scr3
 
 typedef struct {
-	uint32_t	list;		/* PxCLB must be 1kb aligned. */
-	uint32_t	listhi;
-	uint32_t	fis;		/* 256-byte aligned */
-	uint32_t	fishi;
-	uint32_t	isr;
-	uint32_t	ie;		/* interrupt enable */
-	uint32_t	cmd;
-	uint32_t	res1;
-	uint32_t	task;
-	uint32_t	sig;
-	uint32_t	scr0;
-	uint32_t	scr2;
-	uint32_t	scr1;
-	uint32_t	scr3;
-	uint32_t	ci;		/* command issue */
-	uint32_t	ntf;		/* scr4 */
-	uint32_t	fbs;		/* FIS-based switching control */
-	uint32_t	devslp;		/* device sleep */
-	unsigned char	res2[40];	/* reserved */
-	unsigned char	vendor[16];
+	uint32_t list; /* PxCLB must be 1kb aligned. */
+	uint32_t listhi;
+	uint32_t fis; /* 256-byte aligned */
+	uint32_t fishi;
+	uint32_t isr;
+	uint32_t ie; /* interrupt enable */
+	uint32_t cmd;
+	uint32_t res1;
+	uint32_t task;
+	uint32_t sig;
+	uint32_t scr0;
+	uint32_t scr2;
+	uint32_t scr1;
+	uint32_t scr3;
+	uint32_t ci;		/* command issue */
+	uint32_t ntf;		/* scr4 */
+	uint32_t fbs;		/* FIS-based switching control */
+	uint32_t devslp;	/* device sleep */
+	unsigned char res2[40]; /* reserved */
+	unsigned char vendor[16];
 } Aport;
 
 enum {
@@ -225,88 +225,88 @@ enum {
 	 *  7-4 current interface speed (generation #)
 	 *  3-0 device detection
 	 */
-	Intslumber	= 0x600,
-	Intpartpwr	= 0x200,
-	Intactive	= 0x100,
-	Intpm		= 0xf00,
-
-	Devphyoffline	= 4,
-	Devphycomm	= 2,		/* phy communication established */
-	Devpresent	= 1,
-	Devdet		= Devpresent | Devphycomm | Devphyoffline,
+	Intslumber = 0x600,
+	Intpartpwr = 0x200,
+	Intactive = 0x100,
+	Intpm = 0xf00,
+
+	Devphyoffline = 4,
+	Devphycomm = 2, /* phy communication established */
+	Devpresent = 1,
+	Devdet = Devpresent | Devphycomm | Devphyoffline,
 };
 
 /* in host's memory; not memory mapped */
 typedef struct {
-	unsigned char	*base;
-	unsigned char	*d;
-	unsigned char	*p;
-	unsigned char	*r;
-	unsigned char	*u;
-	uint32_t	*devicebits;
+	unsigned char *base;
+	unsigned char *d;
+	unsigned char *p;
+	unsigned char *r;
+	unsigned char *u;
+	uint32_t *devicebits;
 } Afis;
 
 enum {
-	Lprdtl	= 1<<16,	/* physical region descriptor table len */
-	Lpmp	= 1<<12,	/* port multiplier port */
-	Lclear	= 1<<10,	/* clear busy on R_OK */
-	Lbist	= 1<<9,
-	Lreset	= 1<<8,
-	Lpref	= 1<<7,		/* prefetchable */
-	Lwrite	= 1<<6,
-	Latapi	= 1<<5,
-	Lcfl	= 1<<0,		/* command fis length in double words */
+	Lprdtl = 1 << 16, /* physical region descriptor table len */
+	Lpmp = 1 << 12,	  /* port multiplier port */
+	Lclear = 1 << 10, /* clear busy on R_OK */
+	Lbist = 1 << 9,
+	Lreset = 1 << 8,
+	Lpref = 1 << 7, /* prefetchable */
+	Lwrite = 1 << 6,
+	Latapi = 1 << 5,
+	Lcfl = 1 << 0, /* command fis length in double words */
 };
 
 /* in hosts memory; memory mapped */
 typedef struct {
-	uint32_t	flags;
-	uint32_t	len;
-	uint32_t	ctab;
-	uint32_t	ctabhi;
-	unsigned char	reserved[16];
+	uint32_t flags;
+	uint32_t len;
+	uint32_t ctab;
+	uint32_t ctabhi;
+	unsigned char reserved[16];
 } Alist;
 
 typedef struct {
-	uint32_t	dba;
-	uint32_t	dbahi;
-	uint32_t	pad;
-	uint32_t	count;
+	uint32_t dba;
+	uint32_t dbahi;
+	uint32_t pad;
+	uint32_t count;
 } Aprdt;
 
 typedef struct {
-	unsigned char	cfis[0x40];
-	unsigned char	atapi[0x10];
-	unsigned char	pad[0x30];
-	Aprdt	prdt;
+	unsigned char cfis[0x40];
+	unsigned char atapi[0x10];
+	unsigned char pad[0x30];
+	Aprdt prdt;
 } Actab;
 
 enum {
-	Ferror	= 1,
-	Fdone	= 2,
+	Ferror = 1,
+	Fdone = 2,
 };
 
 enum {
-	Dllba 	= 1,
-	Dsmart	= 1<<1,
-	Dpower	= 1<<2,
-	Dnop	= 1<<3,
-	Datapi	= 1<<4,
-	Datapi16= 1<<5,
+	Dllba = 1,
+	Dsmart = 1 << 1,
+	Dpower = 1 << 2,
+	Dnop = 1 << 3,
+	Datapi = 1 << 4,
+	Datapi16 = 1 << 5,
 };
 
 typedef struct {
 	QLock ql;
 	Rendez Rendez;
-	unsigned char	flag;
-	unsigned char	feat;
-	unsigned char	smart;
-	Afis	fis;
-	Alist	*list;
-	Actab	*ctab;
+	unsigned char flag;
+	unsigned char feat;
+	unsigned char smart;
+	Afis fis;
+	Alist *list;
+	Actab *ctab;
 } Aportm;
 
 typedef struct {
-	Aport	*p;
-	Aportm	*pm;
+	Aport *p;
+	Aportm *pm;
 } Aportc;

sys/src/9/amd64/amd64.h

@@ -8,172 +8,172 @@
  */
 
 /* Cr0 */
-#define Pe		0x00000001		/* Protected Mode Enable */
-#define Mp		0x00000002		/* Monitor Coprocessor */
-#define Em		0x00000004		/* Emulate Coprocessor */
-#define Ts		0x00000008		/* Task Switched */
-#define Et		0x00000010		/* Extension Type */
-#define Ne		0x00000020		/* Numeric Error  */
-#define Wp		0x00010000		/* Write Protect */
-#define Am		0x00040000		/* Alignment Mask */
-#define Nw		0x20000000		/* Not Writethrough */
-#define Cd		0x40000000		/* Cache Disable */
-#define Pg		0x80000000		/* Paging Enable */
+#define Pe 0x00000001 /* Protected Mode Enable */
+#define Mp 0x00000002 /* Monitor Coprocessor */
+#define Em 0x00000004 /* Emulate Coprocessor */
+#define Ts 0x00000008 /* Task Switched */
+#define Et 0x00000010 /* Extension Type */
+#define Ne 0x00000020 /* Numeric Error  */
+#define Wp 0x00010000 /* Write Protect */
+#define Am 0x00040000 /* Alignment Mask */
+#define Nw 0x20000000 /* Not Writethrough */
+#define Cd 0x40000000 /* Cache Disable */
+#define Pg 0x80000000 /* Paging Enable */
 
 /* Cr3 */
-#define Pwt		0x00000008		/* Page-Level Writethrough */
-#define Pcd		0x00000010		/* Page-Level Cache Disable */
+#define Pwt 0x00000008 /* Page-Level Writethrough */
+#define Pcd 0x00000010 /* Page-Level Cache Disable */
 
 /* Cr4 */
-#define Vme		0x00000001		/* Virtual-8086 Mode Extensions */
-#define Pvi		0x00000002		/* Protected Mode Virtual Interrupts */
-#define Tsd		0x00000004		/* Time-Stamp Disable */
-#define De		0x00000008		/* Debugging Extensions */
-#define Pse		0x00000010		/* Page-Size Extensions */
-#define Pae		0x00000020		/* Physical Address Extension */
-#define Mce		0x00000040		/* Machine Check Enable */
-#define Pge		0x00000080		/* Page-Global Enable */
-#define Pce		0x00000100		/* Performance Monitoring Counter Enable */
-#define Osfxsr		0x00000200		/* FXSAVE/FXRSTOR Support */
-#define Osxmmexcpt	0x00000400		/* Unmasked Exception Support */
+#define Vme 0x00000001	      /* Virtual-8086 Mode Extensions */
+#define Pvi 0x00000002	      /* Protected Mode Virtual Interrupts */
+#define Tsd 0x00000004	      /* Time-Stamp Disable */
+#define De 0x00000008	      /* Debugging Extensions */
+#define Pse 0x00000010	      /* Page-Size Extensions */
+#define Pae 0x00000020	      /* Physical Address Extension */
+#define Mce 0x00000040	      /* Machine Check Enable */
+#define Pge 0x00000080	      /* Page-Global Enable */
+#define Pce 0x00000100	      /* Performance Monitoring Counter Enable */
+#define Osfxsr 0x00000200     /* FXSAVE/FXRSTOR Support */
+#define Osxmmexcpt 0x00000400 /* Unmasked Exception Support */
 
 /* Rflags */
-#define Cf		0x00000001		/* Carry Flag */
-#define Pf		0x00000004		/* Parity Flag */
-#define Af		0x00000010		/* Auxiliary Flag */
-#define Zf		0x00000040		/* Zero Flag */
-#define Sf		0x00000080		/* Sign Flag */
-#define Tf		0x00000100		/* Trap Flag */
-#define If		0x00000200		/* Interrupt Flag */
-#define Df		0x00000400		/* Direction Flag */
-#define Of		0x00000800		/* Overflow Flag */
-#define Iopl0		0x00000000		/* I/O Privilege Level */
-#define Iopl1		0x00001000
-#define Iopl2		0x00002000
-#define Iopl3		0x00003000
-#define Nt		0x00004000		/* Nested Task */
-#define Rf		0x00010000		/* Resume Flag */
-#define Vm		0x00020000		/* Virtual-8086 Mode */
-#define Ac		0x00040000		/* Alignment Check */
-#define Vif		0x00080000		/* Virtual Interrupt Flag */
-#define Vip		0x00100000		/* Virtual Interrupt Pending */
-#define Id		0x00200000		/* ID Flag */
+#define Cf 0x00000001	 /* Carry Flag */
+#define Pf 0x00000004	 /* Parity Flag */
+#define Af 0x00000010	 /* Auxiliary Flag */
+#define Zf 0x00000040	 /* Zero Flag */
+#define Sf 0x00000080	 /* Sign Flag */
+#define Tf 0x00000100	 /* Trap Flag */
+#define If 0x00000200	 /* Interrupt Flag */
+#define Df 0x00000400	 /* Direction Flag */
+#define Of 0x00000800	 /* Overflow Flag */
+#define Iopl0 0x00000000 /* I/O Privilege Level */
+#define Iopl1 0x00001000
+#define Iopl2 0x00002000
+#define Iopl3 0x00003000
+#define Nt 0x00004000  /* Nested Task */
+#define Rf 0x00010000  /* Resume Flag */
+#define Vm 0x00020000  /* Virtual-8086 Mode */
+#define Ac 0x00040000  /* Alignment Check */
+#define Vif 0x00080000 /* Virtual Interrupt Flag */
+#define Vip 0x00100000 /* Virtual Interrupt Pending */
+#define Id 0x00200000  /* ID Flag */
 
 /* MSRs */
-#define PerfEvtbase	0xc0010000		/* Performance Event Select */
-#define PerfCtrbase	0xc0010004		/* Performance Counters */
+#define PerfEvtbase 0xc0010000 /* Performance Event Select */
+#define PerfCtrbase 0xc0010004 /* Performance Counters */
 
-#define Efer		0xc0000080		/* Extended Feature Enable */
-#define Star		0xc0000081		/* Legacy Target IP and [CS]S */
-#define Lstar		0xc0000082		/* Long Mode Target IP */
-#define Cstar		0xc0000083		/* Compatibility Target IP */
-#define Sfmask		0xc0000084		/* SYSCALL Flags Mask */
-#define FSbase		0xc0000100		/* 64-bit FS Base Address */
-#define GSbase		0xc0000101		/* 64-bit GS Base Address */
-#define KernelGSbase	0xc0000102		/* SWAPGS instruction */
+#define Efer 0xc0000080		/* Extended Feature Enable */
+#define Star 0xc0000081		/* Legacy Target IP and [CS]S */
+#define Lstar 0xc0000082	/* Long Mode Target IP */
+#define Cstar 0xc0000083	/* Compatibility Target IP */
+#define Sfmask 0xc0000084	/* SYSCALL Flags Mask */
+#define FSbase 0xc0000100	/* 64-bit FS Base Address */
+#define GSbase 0xc0000101	/* 64-bit GS Base Address */
+#define KernelGSbase 0xc0000102 /* SWAPGS instruction */
 
 /* Efer */
-#define Sce		0x00000001		/* System Call Extension */
-#define Lme		0x00000100		/* Long Mode Enable */
-#define Lma		0x00000400		/* Long Mode Active */
-#define Nxe		0x00000800		/* No-Execute Enable */
-#define Svme		0x00001000		/* SVM Extension Enable */
-#define Ffxsr		0x00004000		/* Fast FXSAVE/FXRSTOR */
+#define Sce 0x00000001	 /* System Call Extension */
+#define Lme 0x00000100	 /* Long Mode Enable */
+#define Lma 0x00000400	 /* Long Mode Active */
+#define Nxe 0x00000800	 /* No-Execute Enable */
+#define Svme 0x00001000	 /* SVM Extension Enable */
+#define Ffxsr 0x00004000 /* Fast FXSAVE/FXRSTOR */
 
 /* PML4E/PDPE/PDE/PTE */
-#define PteP		0x0000000000000001	/* Present */
-#define PteRW		0x0000000000000002	/* Read/Write */
-#define PteU		0x0000000000000004	/* User/Supervisor */
-#define PtePWT		0x0000000000000008	/* Page-Level Write Through */
-#define PtePCD		0x0000000000000010	/* Page Level Cache Disable */
-#define PteA		0x0000000000000020	/* Accessed */
-#define PteD		0x0000000000000040	/* Dirty */
-#define PtePS		0x0000000000000080	/* Page Size */
-#define Pte4KPAT	PtePS			/* PTE PAT */
-#define PteG		0x0000000000000100	/* Global */
-#define Pte2MPAT	0x0000000000001000	/* PDE PAT */
-#define Pte1GPAT	Pte2MPAT		/* PDPE PAT */
-#define PteNX		0x8000000000000000ULL	/* No Execute */
+#define PteP 0x0000000000000001	    /* Present */
+#define PteRW 0x0000000000000002    /* Read/Write */
+#define PteU 0x0000000000000004	    /* User/Supervisor */
+#define PtePWT 0x0000000000000008   /* Page-Level Write Through */
+#define PtePCD 0x0000000000000010   /* Page Level Cache Disable */
+#define PteA 0x0000000000000020	    /* Accessed */
+#define PteD 0x0000000000000040	    /* Dirty */
+#define PtePS 0x0000000000000080    /* Page Size */
+#define Pte4KPAT PtePS		    /* PTE PAT */
+#define PteG 0x0000000000000100	    /* Global */
+#define Pte2MPAT 0x0000000000001000 /* PDE PAT */
+#define Pte1GPAT Pte2MPAT	    /* PDPE PAT */
+#define PteNX 0x8000000000000000ULL /* No Execute */
 
 /* Exceptions */
-#define IdtDE		0			/* Divide-by-Zero Error */
-#define IdtDB		1			/* Debug */
-#define IdtNMI		2			/* Non-Maskable-Interrupt */
-#define IdtBP		3			/* Breakpoint */
-#define IdtOF		4			/* Overflow */
-#define IdtBR		5			/* Bound-Range */
-#define IdtUD		6			/* Invalid-Opcode */
-#define IdtNM		7			/* Device-Not-Available */
-#define IdtDF		8			/* Double-Fault */
-#define Idt09		9			/* unsupported */
-#define IdtTS		10			/* Invalid-TSS */
-#define IdtNP		11			/* Segment-Not-Present */
-#define IdtSS		12			/* Stack */
-#define IdtGP		13			/* General-Protection */
-#define IdtPF		14			/* Page-Fault */
-#define Idt0F		15			/* reserved */
-#define IdtMF		16			/* x87 FPE-Pending */
-#define IdtAC		17			/* Alignment-Check */
-#define IdtMC		18			/* Machine-Check */
-#define IdtXM		19			/* SIMD Floating-Point */
+#define IdtDE 0	 /* Divide-by-Zero Error */
+#define IdtDB 1	 /* Debug */
+#define IdtNMI 2 /* Non-Maskable-Interrupt */
+#define IdtBP 3	 /* Breakpoint */
+#define IdtOF 4	 /* Overflow */
+#define IdtBR 5	 /* Bound-Range */
+#define IdtUD 6	 /* Invalid-Opcode */
+#define IdtNM 7	 /* Device-Not-Available */
+#define IdtDF 8	 /* Double-Fault */
+#define Idt09 9	 /* unsupported */
+#define IdtTS 10 /* Invalid-TSS */
+#define IdtNP 11 /* Segment-Not-Present */
+#define IdtSS 12 /* Stack */
+#define IdtGP 13 /* General-Protection */
+#define IdtPF 14 /* Page-Fault */
+#define Idt0F 15 /* reserved */
+#define IdtMF 16 /* x87 FPE-Pending */
+#define IdtAC 17 /* Alignment-Check */
+#define IdtMC 18 /* Machine-Check */
+#define IdtXM 19 /* SIMD Floating-Point */
 
 /* Vestigial Segmented Virtual Memory */
-#define SdISTM		0x0000000700000000	/* Interrupt Stack Table Mask */
-#define SdA		0x0000010000000000	/* Accessed */
-#define SdR		0x0000020000000000	/* Readable (Code) */
-#define SdW		0x0000020000000000	/* Writeable (Data) */
-#define SdE		0x0000040000000000	/* Expand Down */
-#define SdaTSS		0x0000090000000000	/* Available TSS */
-#define SdbTSS		0x00000b0000000000	/* Busy TSS */
-#define SdCG		0x00000c0000000000	/* Call Gate */
-#define SdIG		0x00000e0000000000	/* Interrupt Gate */
-#define SdTG		0x00000f0000000000	/* Trap Gate */
-#define SdCODE		0x0000080000000000	/* Code/Data */
-#define SdS		0x0000100000000000	/* System/User */
-#define SdDPL0		0x0000000000000000	/* Descriptor Privilege Level */
-#define SdDPL1		0x0000200000000000
-#define SdDPL2		0x0000400000000000
-#define SdDPL3		0x0000600000000000
-#define SdP		0x0000800000000000	/* Present */
-#define Sd4G		0x000f00000000ffff	/* 4G Limit */
-#define SdL		0x0020000000000000	/* Long Attribute */
-#define SdD		0x0040000000000000	/* Default Operand Size */
-#define SdG		0x0080000000000000	/* Granularity */
+#define SdISTM 0x0000000700000000 /* Interrupt Stack Table Mask */
+#define SdA 0x0000010000000000	  /* Accessed */
+#define SdR 0x0000020000000000	  /* Readable (Code) */
+#define SdW 0x0000020000000000	  /* Writeable (Data) */
+#define SdE 0x0000040000000000	  /* Expand Down */
+#define SdaTSS 0x0000090000000000 /* Available TSS */
+#define SdbTSS 0x00000b0000000000 /* Busy TSS */
+#define SdCG 0x00000c0000000000	  /* Call Gate */
+#define SdIG 0x00000e0000000000	  /* Interrupt Gate */
+#define SdTG 0x00000f0000000000	  /* Trap Gate */
+#define SdCODE 0x0000080000000000 /* Code/Data */
+#define SdS 0x0000100000000000	  /* System/User */
+#define SdDPL0 0x0000000000000000 /* Descriptor Privilege Level */
+#define SdDPL1 0x0000200000000000
+#define SdDPL2 0x0000400000000000
+#define SdDPL3 0x0000600000000000
+#define SdP 0x0000800000000000	/* Present */
+#define Sd4G 0x000f00000000ffff /* 4G Limit */
+#define SdL 0x0020000000000000	/* Long Attribute */
+#define SdD 0x0040000000000000	/* Default Operand Size */
+#define SdG 0x0080000000000000	/* Granularity */
 
 /* Performance Counter Configuration */
-#define PeHo		0x0000020000000000	/* Host only */
-#define PeGo		0x0000010000000000	/* Guest only */
-#define PeEvMskH	0x0000000f00000000	/* Event mask H */
-#define PeCtMsk		0x00000000ff000000	/* Counter mask */
-#define PeInMsk		0x0000000000800000	/* Invert mask */
-#define PeCtEna		0x0000000000400000	/* Counter enable */
-#define PeInEna		0x0000000000100000	/* Interrupt enable */
-#define PePnCtl		0x0000000000080000	/* Pin control */
-#define PeEdg		0x0000000000040000	/* Edge detect */
-#define PeOS		0x0000000000020000	/* OS mode */
-#define PeUsr		0x0000000000010000	/* User mode */
-#define PeUnMsk		0x000000000000ff00	/* Unit Mask */
-#define PeEvMskL	0x00000000000000ff	/* Event Mask L */
+#define PeHo 0x0000020000000000	    /* Host only */
+#define PeGo 0x0000010000000000	    /* Guest only */
+#define PeEvMskH 0x0000000f00000000 /* Event mask H */
+#define PeCtMsk 0x00000000ff000000  /* Counter mask */
+#define PeInMsk 0x0000000000800000  /* Invert mask */
+#define PeCtEna 0x0000000000400000  /* Counter enable */
+#define PeInEna 0x0000000000100000  /* Interrupt enable */
+#define PePnCtl 0x0000000000080000  /* Pin control */
+#define PeEdg 0x0000000000040000    /* Edge detect */
+#define PeOS 0x0000000000020000	    /* OS mode */
+#define PeUsr 0x0000000000010000    /* User mode */
+#define PeUnMsk 0x000000000000ff00  /* Unit Mask */
+#define PeEvMskL 0x00000000000000ff /* Event Mask L */
 
-#define PeEvMsksh	32			/* Event mask shift */
+#define PeEvMsksh 32 /* Event mask shift */
 
 /* Segment Selector */
-#define SsRPL0		0x0000			/* Requestor Privilege Level */
-#define SsRPL1		0x0001
-#define SsRPL2		0x0002
-#define SsRPL3		0x0003
-#define SsTIGDT		0x0000			/* GDT Table Indicator  */
-#define SsTILDT		0x0004			/* LDT Table Indicator */
-#define SsSIM		0xfff8			/* Selector Index Mask */
+#define SsRPL0 0x0000 /* Requestor Privilege Level */
+#define SsRPL1 0x0001
+#define SsRPL2 0x0002
+#define SsRPL3 0x0003
+#define SsTIGDT 0x0000 /* GDT Table Indicator  */
+#define SsTILDT 0x0004 /* LDT Table Indicator */
+#define SsSIM 0xfff8   /* Selector Index Mask */
 
-#define SSEL(si, tirpl)	(((si)<<3)|(tirpl))	/* Segment Selector */
+#define SSEL(si, tirpl) (((si) << 3) | (tirpl)) /* Segment Selector */
 
-#define SiNULL		0			/* NULL selector index */
-#define SiCS		1			/* CS selector index */
-#define SiDS		2			/* DS selector index */
-#define SiU32CS		3			/* User CS selector index */
-#define SiUDS		4			/* User DS selector index */
-#define SiUCS		5			/* User CS selector index */
-#define SiFS		6			/* FS selector index */
-#define SiGS		7			/* GS selector index */
-#define SiTSS		8			/* TSS selector index */
+#define SiNULL 0  /* NULL selector index */
+#define SiCS 1	  /* CS selector index */
+#define SiDS 2	  /* DS selector index */
+#define SiU32CS 3 /* User CS selector index */
+#define SiUDS 4	  /* User DS selector index */
+#define SiUCS 5	  /* User CS selector index */
+#define SiFS 6	  /* FS selector index */
+#define SiGS 7	  /* GS selector index */
+#define SiTSS 8	  /* TSS selector index */

sys/src/9/amd64/apic.c

@@ -16,85 +16,85 @@
 #include "apic.h"
 #include "io.h"
 
-enum {						/* Local APIC registers */
-	Id		= 0x0020,		/* Identification */
-	Ver		= 0x0030,		/* Version */
-	Tp		= 0x0080,		/* Task Priority */
-	Ap		= 0x0090,		/* Arbitration Priority */
-	Pp		= 0x00a0,		/* Processor Priority */
-	Eoi		= 0x00b0,		/* EOI */
-	Ld		= 0x00d0,		/* Logical Destination */
-	Df		= 0x00e0,		/* Destination Format */
-	Siv		= 0x00f0,		/* Spurious Interrupt Vector */
-	Is		= 0x0100,		/* Interrupt Status (8) */
-	Tm		= 0x0180,		/* Trigger Mode (8) */
-	Ir		= 0x0200,		/* Interrupt Request (8) */
-	Es		= 0x0280,		/* Error Status */
-	Iclo		= 0x0300,		/* Interrupt Command */
-	Ichi		= 0x0310,		/* Interrupt Command [63:32] */
-	Lvt0		= 0x0320,		/* Local Vector Table 0 */
-	Lvt5		= 0x0330,		/* Local Vector Table 5 */
-	Lvt4		= 0x0340,		/* Local Vector Table 4 */
-	Lvt1		= 0x0350,		/* Local Vector Table 1 */
-	Lvt2		= 0x0360,		/* Local Vector Table 2 */
-	Lvt3		= 0x0370,		/* Local Vector Table 3 */
-	Tic		= 0x0380,		/* Timer Initial Count */
-	Tcc		= 0x0390,		/* Timer Current Count */
-	Tdc		= 0x03e0,		/* Timer Divide Configuration */
-
-	Tlvt		= Lvt0,			/* Timer */
-	Lint0		= Lvt1,			/* Local Interrupt 0 */
-	Lint1		= Lvt2,			/* Local Interrupt 1 */
-	Elvt		= Lvt3,			/* Error */
-	Pclvt		= Lvt4,			/* Performance Counter */
-	Tslvt		= Lvt5,			/* Thermal Sensor */
+enum {		      /* Local APIC registers */
+       Id = 0x0020,   /* Identification */
+       Ver = 0x0030,  /* Version */
+       Tp = 0x0080,   /* Task Priority */
+       Ap = 0x0090,   /* Arbitration Priority */
+       Pp = 0x00a0,   /* Processor Priority */
+       Eoi = 0x00b0,  /* EOI */
+       Ld = 0x00d0,   /* Logical Destination */
+       Df = 0x00e0,   /* Destination Format */
+       Siv = 0x00f0,  /* Spurious Interrupt Vector */
+       Is = 0x0100,   /* Interrupt Status (8) */
+       Tm = 0x0180,   /* Trigger Mode (8) */
+       Ir = 0x0200,   /* Interrupt Request (8) */
+       Es = 0x0280,   /* Error Status */
+       Iclo = 0x0300, /* Interrupt Command */
+       Ichi = 0x0310, /* Interrupt Command [63:32] */
+       Lvt0 = 0x0320, /* Local Vector Table 0 */
+       Lvt5 = 0x0330, /* Local Vector Table 5 */
+       Lvt4 = 0x0340, /* Local Vector Table 4 */
+       Lvt1 = 0x0350, /* Local Vector Table 1 */
+       Lvt2 = 0x0360, /* Local Vector Table 2 */
+       Lvt3 = 0x0370, /* Local Vector Table 3 */
+       Tic = 0x0380,  /* Timer Initial Count */
+       Tcc = 0x0390,  /* Timer Current Count */
+       Tdc = 0x03e0,  /* Timer Divide Configuration */
+
+       Tlvt = Lvt0,  /* Timer */
+       Lint0 = Lvt1, /* Local Interrupt 0 */
+       Lint1 = Lvt2, /* Local Interrupt 1 */
+       Elvt = Lvt3,  /* Error */
+       Pclvt = Lvt4, /* Performance Counter */
+       Tslvt = Lvt5, /* Thermal Sensor */
 };
 
-enum {						/* Siv */
-	Swen		= 0x00000100,		/* Software Enable */
-	Fdis		= 0x00000200,		/* Focus Disable */
+enum {			  /* Siv */
+       Swen = 0x00000100, /* Software Enable */
+       Fdis = 0x00000200, /* Focus Disable */
 };
 
-enum {						/* Iclo */
-	Lassert		= 0x00004000,		/* Assert level */
+enum {			     /* Iclo */
+       Lassert = 0x00004000, /* Assert level */
 
-	DSnone		= 0x00000000,		/* Use Destination Field */
-	DSself		= 0x00040000,		/* Self is only destination */
-	DSallinc	= 0x00080000,		/* All including self */
-	DSallexc	= 0x000c0000,		/* All Excluding self */
+       DSnone = 0x00000000,   /* Use Destination Field */
+       DSself = 0x00040000,   /* Self is only destination */
+       DSallinc = 0x00080000, /* All including self */
+       DSallexc = 0x000c0000, /* All Excluding self */
 };
 
-enum {						/* Tlvt */
-	Periodic	= 0x00020000,		/* Periodic Timer Mode */
+enum {			      /* Tlvt */
+       Periodic = 0x00020000, /* Periodic Timer Mode */
 };
 
-enum {						/* Tdc */
-	DivX2		= 0x00000000,		/* Divide by 2 */
-	DivX4		= 0x00000001,		/* Divide by 4 */
-	DivX8		= 0x00000002,		/* Divide by 8 */
-	DivX16		= 0x00000003,		/* Divide by 16 */
-	DivX32		= 0x00000008,		/* Divide by 32 */
-	DivX64		= 0x00000009,		/* Divide by 64 */
-	DivX128		= 0x0000000a,		/* Divide by 128 */
-	DivX1		= 0x0000000b,		/* Divide by 1 */
+enum {			     /* Tdc */
+       DivX2 = 0x00000000,   /* Divide by 2 */
+       DivX4 = 0x00000001,   /* Divide by 4 */
+       DivX8 = 0x00000002,   /* Divide by 8 */
+       DivX16 = 0x00000003,  /* Divide by 16 */
+       DivX32 = 0x00000008,  /* Divide by 32 */
+       DivX64 = 0x00000009,  /* Divide by 64 */
+       DivX128 = 0x0000000a, /* Divide by 128 */
+       DivX1 = 0x0000000b,   /* Divide by 1 */
 };
 
-uint8_t* apicbase;
+uint8_t *apicbase;
 static int apmachno = 1;
 
-Apic	xlapic[Napic];
-Mach	*xlapicmachptr[Napic];		/* maintained, but unused */
+Apic xlapic[Napic];
+Mach *xlapicmachptr[Napic]; /* maintained, but unused */
 
 static uint32_t
 apicrget(int r)
 {
-	return *((volatile uint32_t*)(apicbase+r));
+	return *((volatile uint32_t *)(apicbase + r));
 }
 
 static void
 apicrput(int r, uint32_t data)
 {
-	*((volatile uint32_t*)(apicbase+r)) = data;
+	*((volatile uint32_t *)(apicbase + r)) = data;
 }
 
 int
@@ -110,9 +110,9 @@ apicisr(int vecno)
 {
 	int isr;
 
-	isr = apicrget(Is + (vecno/32)*16);
+	isr = apicrget(Is + (vecno / 32) * 16);
 
-	return isr & (1<<(vecno%32));
+	return isr & (1 << (vecno % 32));
 }
 
 void
@@ -154,8 +154,7 @@ apicinit(int apicno, uintmem pa, int isbp)
 	if(isbp){
 		apic->Lapic.machno = 0;
 		machp()->apicno = apicno;
-	}
-	else
+	} else
 		apic->Lapic.machno = apmachno++;
 }
 
@@ -165,12 +164,12 @@ apicdump0(Apic *apic, int i)
 	if(!apic->useable || apic->Ioapic.addr != 0)
 		return;
 	DBG("apic%d: machno %d lint0 %#8.8ux lint1 %#8.8ux\n",
-		i, apic->Lapic.machno, apic->Lapic.lvt[0], apic->Lapic.lvt[1]);
+	    i, apic->Lapic.machno, apic->Lapic.lvt[0], apic->Lapic.lvt[1]);
 	DBG(" tslvt %#8.8ux pclvt %#8.8ux elvt %#8.8ux\n",
-		apicrget(Tslvt), apicrget(Pclvt), apicrget(Elvt));
+	    apicrget(Tslvt), apicrget(Pclvt), apicrget(Elvt));
 	DBG(" tlvt %#8.8ux lint0 %#8.8ux lint1 %#8.8ux siv %#8.8ux\n",
-		apicrget(Tlvt), apicrget(Lint0),
-		apicrget(Lint1), apicrget(Siv));
+	    apicrget(Tlvt), apicrget(Lint0),
+	    apicrget(Lint1), apicrget(Siv));
 }
 
 void
@@ -189,7 +188,7 @@ apicdump(void)
 }
 
 static void
-apictimer(Ureg* ureg, void* v)
+apictimer(Ureg *ureg, void *v)
 {
 	timerintr(ureg, 0);
 }
@@ -200,10 +199,10 @@ apicnmi(int id, int lint, int flags)
 {
 	static char fail[128];
 	int i;
-	for(i = 0; i < Napic; i++) {
-		if (!xlapic[i].useable)
+	for(i = 0; i < Napic; i++){
+		if(!xlapic[i].useable)
 			continue;
-		if (xlapic[i].Lapic.machno != id)
+		if(xlapic[i].Lapic.machno != id)
 			continue;
 		print("CODE: xlapic[%d].Lapic.lvt[%d] = 0x%x\n", i, lint, 0x10400);
 		print("CODE: xlapic[%d].Lapic.lvt[0] = 0x%x\n", i, 0x10700);
@@ -212,7 +211,7 @@ apicnmi(int id, int lint, int flags)
 		/* TODO: pay attention to the flags, but they'll never change.
 		 * TODO: the _MP_ always had Im set, which seems wrong. But do what it did. */
 		snprint(fail, sizeof(fail), "%s wants lint to be 1; it's %d\n", lint);
-		if (lint != 1)
+		if(lint != 1)
 			panic(fail);
 		/* Im, NMI, vector 0 */
 		xlapic[i].Lapic.lvt[lint] = 0x10400;
@@ -231,7 +230,7 @@ apiconline(void)
 
 	if(apicbase == nil)
 		return 0;
-	if((apicno = ((apicrget(Id)>>24) & 0xff)) >= Napic)
+	if((apicno = ((apicrget(Id) >> 24) & 0xff)) >= Napic)
 		return 0;
 	apic = &xlapic[apicno];
 	if(!apic->useable || apic->Ioapic.addr != nil)
@@ -243,10 +242,10 @@ apiconline(void)
 	 * processor.
 	 */
 	ver = apicrget(Ver);
-	nlvt = ((ver>>16) & 0xff) + 1;
+	nlvt = ((ver >> 16) & 0xff) + 1;
 	if(nlvt > nelem(apic->Lapic.lvt)){
 		print("apicinit%d: nlvt %d > max (%d)\n",
-			apicno, nlvt, nelem(apic->Lapic.lvt));
+		      apicno, nlvt, nelem(apic->Lapic.lvt));
 		nlvt = nelem(apic->Lapic.lvt);
 	}
 	apic->Lapic.nlvt = nlvt;
@@ -275,7 +274,7 @@ apiconline(void)
 	 * bits 3-0 0x0f unless the Extended Spurious Vector Enable bit
 	 * is set in the HyperTransport Transaction Control register.
 	 */
-	apicrput(Siv, Swen|IdtSPURIOUS);
+	apicrput(Siv, Swen | IdtSPURIOUS);
 
 	/*
 	 * Acknowledge any outstanding interrupts.
@@ -289,20 +288,20 @@ apiconline(void)
 	 */
 	apicrput(Tdc, DivX1);
 	apicrput(Tlvt, Im);
-	tsc = rdtsc() + machp()->cpuhz/10;
+	tsc = rdtsc() + machp()->cpuhz / 10;
 	apicrput(Tic, 0xffffffff);
 
 	while(rdtsc() < tsc)
 		;
 
-	apic->Lapic.hz = (0xffffffff-apicrget(Tcc))*10;
-	apic->Lapic.max = apic->Lapic.hz/HZ;
-	apic->Lapic.min = apic->Lapic.hz/(100*HZ);
-	apic->Lapic.div = ((machp()->cpuhz/apic->Lapic.max)+HZ/2)/HZ;
+	apic->Lapic.hz = (0xffffffff - apicrget(Tcc)) * 10;
+	apic->Lapic.max = apic->Lapic.hz / HZ;
+	apic->Lapic.min = apic->Lapic.hz / (100 * HZ);
+	apic->Lapic.div = ((machp()->cpuhz / apic->Lapic.max) + HZ / 2) / HZ;
 
 	if(machp()->machno == 0 || DBGFLG){
 		print("apic%d: hz %lld max %lld min %lld div %lld\n", apicno,
-			apic->Lapic.hz, apic->Lapic.max, apic->Lapic.min, apic->Lapic.div);
+		      apic->Lapic.hz, apic->Lapic.max, apic->Lapic.min, apic->Lapic.div);
 	}
 
 	/*
@@ -322,8 +321,8 @@ apiconline(void)
 	default:
 		break;
 	}
-	apicrput(Lint1, apic->Lapic.lvt[1]|Im|IdtLINT1);
-	apicrput(Lint0, apic->Lapic.lvt[0]|Im|IdtLINT0);
+	apicrput(Lint1, apic->Lapic.lvt[1] | Im | IdtLINT1);
+	apicrput(Lint0, apic->Lapic.lvt[0] | Im | IdtLINT0);
 
 	apicrput(Es, 0);
 	apicrget(Es);
@@ -344,12 +343,12 @@ apiconline(void)
 	 * then lower the task priority to allow interrupts to be
 	 * accepted by the APIC.
 	 */
-	microdelay((TK2MS(1)*1000/apmachno) * machp()->machno);
+	microdelay((TK2MS(1) * 1000 / apmachno) * machp()->machno);
 
 	if(apic->Lapic.machno == 0){
 		apicrput(Tic, apic->Lapic.max);
 		intrenable(IdtTIMER, apictimer, 0, MKBUS(BusLAPIC, 0, 0, 0), "APIC timer");
-		apicrput(Tlvt, Periodic|IrqTIMER);
+		apicrput(Tlvt, Periodic | IrqTIMER);
 	}
 
 	if(machp()->machno == 0)
@@ -366,12 +365,11 @@ apictimerenab(void)
 {
 	Apic *apic;
 
-	apic = &xlapic[(apicrget(Id)>>24) & 0xff];
+	apic = &xlapic[(apicrget(Id) >> 24) & 0xff];
 
 	apiceoi(IdtTIMER);
 	apicrput(Tic, apic->Lapic.max);
-	apicrput(Tlvt, Periodic|IrqTIMER);
-
+	apicrput(Tlvt, Periodic | IrqTIMER);
 }
 
 void
@@ -381,14 +379,14 @@ apictimerset(uint64_t next)
 	Apic *apic;
 	int64_t period;
 
-	apic = &xlapic[(apicrget(Id)>>24) & 0xff];
+	apic = &xlapic[(apicrget(Id) >> 24) & 0xff];
 
 	pl = splhi();
 	lock(&machp()->apictimerlock);
 
 	period = apic->Lapic.max;
 	if(next != 0){
-		period = next - fastticks(nil);	/* fastticks is just rdtsc() */
+		period = next - fastticks(nil); /* fastticks is just rdtsc() */
 		period /= apic->Lapic.div;
 
 		if(period < apic->Lapic.min)
@@ -411,16 +409,16 @@ apicsipi(int apicno, uintmem pa)
 	 * SIPI - Start-up IPI.
 	 * To do: checks on apic validity.
 	 */
-	crhi = apicno<<24;
+	crhi = apicno << 24;
 	apicrput(Ichi, crhi);
-	apicrput(Iclo, DSnone|TMlevel|Lassert|MTir);
+	apicrput(Iclo, DSnone | TMlevel | Lassert | MTir);
 	microdelay(200);
-	apicrput(Iclo, DSnone|TMlevel|MTir);
+	apicrput(Iclo, DSnone | TMlevel | MTir);
 	millidelay(10);
 
 	for(int i = 0; i < 2; i++){
 		apicrput(Ichi, crhi);
-		apicrput(Iclo, DSnone|TMedge|MTsipi|((uint32_t)pa/(4*KiB)));
+		apicrput(Iclo, DSnone | TMedge | MTsipi | ((uint32_t)pa / (4 * KiB)));
 		microdelay(200);
 	}
 }
@@ -428,8 +426,8 @@ apicsipi(int apicno, uintmem pa)
 void
 apicipi(int apicno)
 {
-	apicrput(Ichi, apicno<<24);
-	apicrput(Iclo, DSnone|TMedge|Lassert|MTf|IdtIPI);
+	apicrput(Ichi, apicno << 24);
+	apicrput(Iclo, DSnone | TMedge | Lassert | MTf | IdtIPI);
 	while(apicrget(Iclo) & Ds)
 		;
 }

sys/src/9/amd64/apic.h

@@ -14,41 +14,41 @@
  * accessed by the local CPU.  APIC ids are unique to the
  * APIC type, so an IOAPIC and APIC both with id 0 is ok.
  */
-typedef	struct	Ioapic	Ioapic;
-typedef	struct	Lapic	Lapic;
-typedef	struct	Apic	Apic;
+typedef struct Ioapic Ioapic;
+typedef struct Lapic Lapic;
+typedef struct Apic Apic;
 
 struct Ioapic {
-	Lock l;					/* IOAPIC: register access */
-	uint32_t*	addr;			/* IOAPIC: register base */
-	uintptr_t	paddr;			/* physical address */
-	int	nrdt;				/* IOAPIC: size of RDT */
-	int	gsib;				/* IOAPIC: global RDT index */
+	Lock l;		 /* IOAPIC: register access */
+	uint32_t *addr;	 /* IOAPIC: register base */
+	uintptr_t paddr; /* physical address */
+	int nrdt;	 /* IOAPIC: size of RDT */
+	int gsib;	 /* IOAPIC: global RDT index */
 };
 
 struct Lapic {
-	int	machno;				/* APIC */
+	int machno; /* APIC */
 
-	uint32_t	lvt[6];
-	int	nlvt;
-	int	ver;
+	uint32_t lvt[6];
+	int nlvt;
+	int ver;
 
-	int64_t	hz;				/* APIC Timer frequency */
-	int64_t	max;
-	int64_t	min;
-	int64_t	div;
+	int64_t hz; /* APIC Timer frequency */
+	int64_t max;
+	int64_t min;
+	int64_t div;
 };
 
 struct Apic {
-	int	useable;			/* en */
+	int useable; /* en */
 	Ioapic Ioapic;
 	Lapic Lapic;
 };
 
 enum {
-	Nbus		= 256,
-	Napic		= 254,			/* xAPIC architectural limit */
-	Nrdt		= 64,
+	Nbus = 256,
+	Napic = 254, /* xAPIC architectural limit */
+	Nrdt = 64,
 };
 
 /*
@@ -65,38 +65,38 @@ enum {
  * [16] Interrupt Mask
  */
 enum {
-	MTf		= 0x00000000,		/* Fixed */
-	MTlp		= 0x00000100,		/* Lowest Priority */
-	MTsmi		= 0x00000200,		/* SMI */
-	MTrr		= 0x00000300,		/* Remote Read */
-	MTnmi		= 0x00000400,		/* NMI */
-	MTir		= 0x00000500,		/* INIT/RESET */
-	MTsipi		= 0x00000600,		/* Startup IPI */
-	MTei		= 0x00000700,		/* ExtINT */
+	MTf = 0x00000000,    /* Fixed */
+	MTlp = 0x00000100,   /* Lowest Priority */
+	MTsmi = 0x00000200,  /* SMI */
+	MTrr = 0x00000300,   /* Remote Read */
+	MTnmi = 0x00000400,  /* NMI */
+	MTir = 0x00000500,   /* INIT/RESET */
+	MTsipi = 0x00000600, /* Startup IPI */
+	MTei = 0x00000700,   /* ExtINT */
 
-	Pm		= 0x00000000,		/* Physical Mode */
-	Lm		= 0x00000800,		/* Logical Mode */
+	Pm = 0x00000000, /* Physical Mode */
+	Lm = 0x00000800, /* Logical Mode */
 
-	Ds		= 0x00001000,		/* Delivery Status */
-	IPhigh		= 0x00000000,		/* IIPP High */
-	IPlow		= 0x00002000,		/* IIPP Low */
-	Rirr		= 0x00004000,		/* Remote IRR */
-	TMedge		= 0x00000000,		/* Trigger Mode Edge */
-	TMlevel		= 0x00008000,		/* Trigger Mode Level */
-	Im		= 0x00010000,		/* Interrupt Mask */
+	Ds = 0x00001000,      /* Delivery Status */
+	IPhigh = 0x00000000,  /* IIPP High */
+	IPlow = 0x00002000,   /* IIPP Low */
+	Rirr = 0x00004000,    /* Remote IRR */
+	TMedge = 0x00000000,  /* Trigger Mode Edge */
+	TMlevel = 0x00008000, /* Trigger Mode Level */
+	Im = 0x00010000,      /* Interrupt Mask */
 };
 
-extern	Apic	xlapic[Napic];
-extern	Apic	xioapic[Napic];
-extern	Mach	*xlapicmachptr[Napic];		/* maintained, but unused */
+extern Apic xlapic[Napic];
+extern Apic xioapic[Napic];
+extern Mach *xlapicmachptr[Napic]; /* maintained, but unused */
 
-#define l16get(p)	(((p)[1]<<8)|(p)[0])
-#define	l32get(p)	(((uint32_t)l16get(p+2)<<16)|l16get(p))
-#define	l64get(p)	(((uint64_t)l32get(p+4)<<32)|l32get(p))
+#define l16get(p) (((p)[1] << 8) | (p)[0])
+#define l32get(p) (((uint32_t)l16get(p + 2) << 16) | l16get(p))
+#define l64get(p) (((uint64_t)l32get(p + 4) << 32) | l32get(p))
 
 extern void apicdump(void);
 extern void apictimerenab(void);
 extern void ioapicdump(void);
 
-extern int pcimsienable(Pcidev*, uint64_t);
-extern int pcimsimask(Pcidev*, int);
+extern int pcimsienable(Pcidev *, uint64_t);
+extern int pcimsimask(Pcidev *, int);

sys/src/9/amd64/arch.c

@@ -95,7 +95,7 @@ linkproc(void)
 }
 
 void
-kprocchild(Proc* p, void (*func)(void*), void* arg)
+kprocchild(Proc *p, void (*func)(void *), void *arg)
 {
 	/*
 	 * gotolabel() needs a word on the stack in
@@ -103,7 +103,7 @@ kprocchild(Proc* p, void (*func)(void*), void* arg)
 	 * to linkproc().
 	 */
 	p->sched.pc = PTR2UINT(linkproc);
-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-BY2SE);
+	p->sched.sp = PTR2UINT(p->kstack + KSTACK - BY2SE);
 	p->sched.sp = STACKALIGN(p->sched.sp);
 
 	p->kpfun = func;
@@ -121,7 +121,7 @@ void
 idlehands(void)
 {
 	if(machp()->NIX.nixtype != NIXAC)
- 		halt();
+		halt();
 }
 
 void
@@ -148,13 +148,13 @@ ureg2gdb(Ureg *u, uintptr_t *g)
 	/* it's weird, docs say 5 32-bit fields
 	 * but I count 4 if we pack these. Fix me
 	 */
-	g[GDB_PS] = 0; // u->PS;
-	g[GDB_CS] = 0; // u->CS;
-	g[GDB_SS] = 0; // u->SS;
-	g[GDB_DS] = 0; // u->DS;
-	g[GDB_ES] = 0; // u->ES;
-	g[GDB_FS] = 0; // u->FS;
-	g[GDB_GS] = 0; // u->GS;
+	g[GDB_PS] = 0;	      // u->PS;
+	g[GDB_CS] = 0;	      // u->CS;
+	g[GDB_SS] = 0;	      // u->SS;
+	g[GDB_DS] = 0;	      // u->DS;
+	g[GDB_ES] = 0;	      // u->ES;
+	g[GDB_FS] = 0;	      // u->FS;
+	g[GDB_GS] = 0;	      // u->GS;
 }
 
 void

sys/src/9/amd64/archamd64.c

@@ -44,7 +44,7 @@ cpuidinit(void)
 		machp()->CPU.ncpuinfoe = (eax & ~0x80000000) + 1;
 
 	/* is monitor supported? */
-	if (machp()->CPU.cpuinfo[1][2] & 8) {
+	if(machp()->CPU.cpuinfo[1][2] & 8){
 		cpuid(5, 0, machp()->CPU.cpuinfo[2]);
 		mwait = k10mwait;
 	}
@@ -61,8 +61,7 @@ cpuidinfo(uint32_t eax, uint32_t ecx, uint32_t info[4])
 	if(!(eax & 0x80000000)){
 		if(eax >= machp()->CPU.ncpuinfos)
 			return 0;
-	}
-	else if(eax >= (0x80000000|machp()->CPU.ncpuinfoe))
+	} else if(eax >= (0x80000000 | machp()->CPU.ncpuinfoe))
 		return 0;
 
 	cpuid(eax, ecx, info);
@@ -75,15 +74,13 @@ cpuidname(uint32_t *info0)
 {
 	char *vendorid;
 
-	if(memcmp(&info0[1], "GenuntelineI", 12) == 0) {
+	if(memcmp(&info0[1], "GenuntelineI", 12) == 0){
 		vendorid = "GenuineIntel";
 		return vendorid;
-	}
-	else if(memcmp(&info0[1], "AuthcAMDenti", 12) == 0) {
+	} else if(memcmp(&info0[1], "AuthcAMDenti", 12) == 0){
 		vendorid = "AuthenticAMD";
 		return vendorid;
-	}
-	else {
+	} else {
 		/* weird hypervisor?, let's pass what it has */
 		vendorid = (char *)&info0[1];
 		print("Warning: CPU unknown, %s\n", vendorid);
@@ -96,9 +93,9 @@ CpuHypervisor
 cpuhypervisor()
 {
 	uint32_t info[4];
-	if (cpuid(0x40000000, 0, info)) {
-		char *hypname = (char*)&info[1];
-		if (!memcmp("KVMKVMKVM\0\0\0", hypname, 12)) {
+	if(cpuid(0x40000000, 0, info)){
+		char *hypname = (char *)&info[1];
+		if(!memcmp("KVMKVMKVM\0\0\0", hypname, 12)){
 			return CpuHypervisorKvm;
 		}
 	}
@@ -109,7 +106,7 @@ static int64_t
 cpuidhz_hypervisor()
 {
 	uint32_t info[4];
-	if (cpuid(0x40000010, 0, info)) {
+	if(cpuid(0x40000010, 0, info)){
 		return info[0] * 1000;
 	}
 	print("cpuidhz_hypervisor: couldn't read TSC freq for hypervisor\n");
@@ -137,27 +134,27 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 	uint8_t model = (info1[0] & 0xf0) >> 4;
 	uint8_t stepping = (info1[0] & 0xf);
 	print("CPUID family %x model %x proctype %x stepping %x model_ext %x family_ext %x hypervisor: %d\n",
-		family, model, proctype, stepping, model_ext, family_ext, hypervisor);
+	      family, model, proctype, stepping, model_ext, family_ext, hypervisor);
 
-	if (hypervisor != CpuHypervisorUnknown) {
+	if(hypervisor != CpuHypervisorUnknown){
 		hz = cpuidhz_hypervisor();
-		if (hz > 0) {
+		if(hz > 0){
 			return hz;
 		}
 	}
 
-	if(strcmp("GenuineIntel", vendorid) == 0) {
+	if(strcmp("GenuineIntel", vendorid) == 0){
 		uint32_t cpusig = info1[0] & 0x0fff3ff0;
 		print("CPU Signature: %x\n", cpusig);
 
-		switch (cpusig) {
+		switch(cpusig){
 		default:
 			return 0;
-		case 0x00000f30:		/* Xeon (MP), Pentium [4D] */
-		case 0x00000f40:		/* Xeon (MP), Pentium [4D] */
-		case 0x00000f60:		/* Xeon 7100, 5000 or above */
+		case 0x00000f30: /* Xeon (MP), Pentium [4D] */
+		case 0x00000f40: /* Xeon (MP), Pentium [4D] */
+		case 0x00000f60: /* Xeon 7100, 5000 or above */
 			msr = rdmsr(0x2c);
-			r = (msr>>16) & 0x07;
+			r = (msr >> 16) & 0x07;
 			switch(r){
 			default:
 				return 0;
@@ -184,18 +181,18 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 			 * The manual is conflicting about
 			 * the size of the msr field.
 			 */
-			hz = (((hz*(msr>>24))/100)+5)/10;
+			hz = (((hz * (msr >> 24)) / 100) + 5) / 10;
 			break;
-		case 0x00000690:		/* Pentium M, Celeron M */
-		case 0x000006d0:		/* Pentium M, Celeron M */
-			hz = ((rdmsr(0x2a)>>22) & 0x1f)*100 * 1000000ll;
-//print("msr 2a is 0x%x >> 22 0x%x\n", rdmsr(0x2a), rdmsr(0x2a)>>22);
+		case 0x00000690: /* Pentium M, Celeron M */
+		case 0x000006d0: /* Pentium M, Celeron M */
+			hz = ((rdmsr(0x2a) >> 22) & 0x1f) * 100 * 1000000ll;
+			//print("msr 2a is 0x%x >> 22 0x%x\n", rdmsr(0x2a), rdmsr(0x2a)>>22);
 			break;
-		case 0x000306a0:		/* i7,5,3 3xxx */
-		case 0x000306f0:		/* i7,5,3 5xxx and Xeon dev machine */
-		case 0x000206c0:		/* i7,5,3 4xxx */
-		case 0x00050650:		/* i9 7900X */ // Moved here by RGM 10/27/2020
-		case 0x000506e0:		/* i7,5,3 6xxx */
+		case 0x000306a0:		       /* i7,5,3 3xxx */
+		case 0x000306f0:		       /* i7,5,3 5xxx and Xeon dev machine */
+		case 0x000206c0:		       /* i7,5,3 4xxx */
+		case 0x00050650: /* i9 7900X */	       // Moved here by RGM 10/27/2020
+		case 0x000506e0:		       /* i7,5,3 6xxx */
 			// reading msr 0xcd gets a GPF on this CPU.
 			// From Ron on coreboot irc:
 			// rminnich: "if you need the base for the core's clock
@@ -205,27 +202,27 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 			f = 5;
 			// This will likely be true of many of the CPUs below. FSB died a *long* time ago.
 			// fallthrough
-		case 0x000006e0:		/* Core Duo */
-		case 0x000006f0:		/* Core 2 Duo/Quad/Extreme */
-		case 0x00000660:		/* kvm over i5 */
-		case 0x00000670:		/* Core 2 Extreme */
-		case 0x00000650:		/* i5 6xx, i3 5xx */
-		case 0x000006c0:		/* i5 4xx */
-		case 0x000006a0:		/* i7 paurea... */
-		case 0x000106a0:		/* i7,5,3 9xx */
-		case 0x000106c0:		/* Atom (45nm, 32nm) */
-		case 0x000106e0:		/* i7,5,3 8xx */
-		case 0x000206a0:		/* i7,5,3 2xxx */
-		case 0x000806e0:		/* i7,5,3 85xx */
-		case 0x000906e0:		/* i7,5,3 77xx 8xxx */
+		case 0x000006e0: /* Core Duo */
+		case 0x000006f0: /* Core 2 Duo/Quad/Extreme */
+		case 0x00000660: /* kvm over i5 */
+		case 0x00000670: /* Core 2 Extreme */
+		case 0x00000650: /* i5 6xx, i3 5xx */
+		case 0x000006c0: /* i5 4xx */
+		case 0x000006a0: /* i7 paurea... */
+		case 0x000106a0: /* i7,5,3 9xx */
+		case 0x000106c0: /* Atom (45nm, 32nm) */
+		case 0x000106e0: /* i7,5,3 8xx */
+		case 0x000206a0: /* i7,5,3 2xxx */
+		case 0x000806e0: /* i7,5,3 85xx */
+		case 0x000906e0: /* i7,5,3 77xx 8xxx */
 			/*
 			 * Get the FSB frequency.
 			 * If processor has Enhanced Intel Speedstep Technology
 			 * then non-integer bus frequency ratios are possible.
 			 */
-			if (info1[2] & 0x00000080) {
+			if(info1[2] & 0x00000080){
 				msr = rdmsr(0x198);
-				r = (msr>>40) & 0x1f;
+				r = (msr >> 40) & 0x1f;
 			} else {
 				msr = 0;
 				r = rdmsr(0x2a) & 0x1f;
@@ -233,7 +230,7 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 			DBG("rdmsr Intel: %d\n", rdmsr(0x2a));
 			DBG("Intel msr.lo %d\n", r);
 			DBG("Intel msr.hi %d\n", f);
-			if (f < 0) {
+			if(f < 0){
 				f = rdmsr(0xcd) & 0x07;
 			}
 
@@ -241,7 +238,7 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 			default:
 				return 0;
 			case 7:
-				hz =  83000000000ll;
+				hz = 83000000000ll;
 				break;
 			case 5:
 				hz = 100000000000ll;
@@ -265,59 +262,57 @@ cpuidhz(uint32_t *info0, uint32_t *info1, CpuHypervisor hypervisor)
 				hz = 400000000000ll;
 				break;
 			}
-//iprint("hz %d r %d\n", hz, r);
+			//iprint("hz %d r %d\n", hz, r);
 			/*
 			 * Hz is *1000 at this point.
 			 * Do the scaling then round it.
 			 */
 			if(msr & 0x0000400000000000ll)
-				hz = hz*(r+10) + hz/2;
+				hz = hz * (r + 10) + hz / 2;
 			else
-				hz = hz*(r+10);
-			hz = ((hz/100)+5)/10;
+				hz = hz * (r + 10);
+			hz = ((hz / 100) + 5) / 10;
 			break;
 		}
 		DBG("cpuidhz: 0x2a: %#llx hz %lld\n", rdmsr(0x2a), hz);
-	}
-	else if(strcmp("AuthenticAMD",vendorid) == 0){
+	} else if(strcmp("AuthenticAMD", vendorid) == 0){
 		uint32_t cpusig = info1[0] & 0x0fff0ff0;
 		print("CPU Signature: %x\n", cpusig);
 
-		switch (cpusig) {
+		switch(cpusig){
 		default:
 			return 0;
-		case 0x00050ff0:		/* K8 Athlon Venice 64 / Qemu64 */
-		case 0x00020fc0:		/* K8 Athlon Lima 64 */
-		case 0x00000f50:		/* K8 Opteron 2xxx */
-		case 0x00100f60:		/* K8 Athlon II X2 */
+		case 0x00050ff0: /* K8 Athlon Venice 64 / Qemu64 */
+		case 0x00020fc0: /* K8 Athlon Lima 64 */
+		case 0x00000f50: /* K8 Opteron 2xxx */
+		case 0x00100f60: /* K8 Athlon II X2 */
 			msr = rdmsr(0xc0010042);
-			r = (msr>>16) & 0x3f;
-			hz = 200000000ULL*(4 * 2 + r)/2;
+			r = (msr >> 16) & 0x3f;
+			hz = 200000000ULL * (4 * 2 + r) / 2;
 			break;
-		case 0x00100f40:		/* Phenom II X2 && Athlon II X4 559 Processor */
-		case 0x00100f20:		/* Phenom II X4 */
-		case 0x00100fa0:		/* Phenom II X6 */
-		case 0x00100f90:		/* K10 Opteron 61xx */
-		case 0x00600f00:		/* K10 Opteron 62xx */
-		case 0x00600f10:		/* K10 Opteron 6272, FX 6xxx/4xxx */
-		case 0x00600f20:		/* K10 Opteron 63xx, FX 3xxx/8xxx/9xxx */
-		case 0x00700f00:		/* Athlon II X4 5xxx */
-		case 0x00730f00:		/* AMD GX-412TC SOC */
-		case 0x00800f10:		/* Ryzen 5 and 7 */
-		case 0x00810f10:		/* Ryzen 3 */
+		case 0x00100f40: /* Phenom II X2 && Athlon II X4 559 Processor */
+		case 0x00100f20: /* Phenom II X4 */
+		case 0x00100fa0: /* Phenom II X6 */
+		case 0x00100f90: /* K10 Opteron 61xx */
+		case 0x00600f00: /* K10 Opteron 62xx */
+		case 0x00600f10: /* K10 Opteron 6272, FX 6xxx/4xxx */
+		case 0x00600f20: /* K10 Opteron 63xx, FX 3xxx/8xxx/9xxx */
+		case 0x00700f00: /* Athlon II X4 5xxx */
+		case 0x00730f00: /* AMD GX-412TC SOC */
+		case 0x00800f10: /* Ryzen 5 and 7 */
+		case 0x00810f10: /* Ryzen 3 */
 			msr = rdmsr(0xc0010064);
 			r = msr & 0x1f;
-			hz = ((r+0x10)*100000000ll)/(1<<(msr>>6 & 0x07));
+			hz = ((r + 0x10) * 100000000ll) / (1 << (msr >> 6 & 0x07));
 			break;
-		case 0x00000620:		/* QEMU64 / Athlon MP/XP */
+		case 0x00000620: /* QEMU64 / Athlon MP/XP */
 			msr = rdmsr(0xc0010064);
-			r = (msr>>6) & 0x07;
-			hz = (((msr & 0x3f)+0x10)*100000000ll)/(1<<r);
+			r = (msr >> 6) & 0x07;
+			hz = (((msr & 0x3f) + 0x10) * 100000000ll) / (1 << r);
 			break;
 		}
 		DBG("cpuidhz: %#llx hz %lld\n", msr, hz);
-	}
-	else {
+	} else {
 		return 0;
 	}
 
@@ -339,12 +334,12 @@ cpuiddump(void)
 	for(i = 0; i < machp()->CPU.ncpuinfos; i++){
 		cpuid(i, 0, info);
 		DBG("eax = %#8.8x: %8.8x %8.8x %8.8x %8.8x\n",
-			i, info[0], info[1], info[2], info[3]);
+		    i, info[0], info[1], info[2], info[3]);
 	}
 	for(i = 0; i < machp()->CPU.ncpuinfoe; i++){
-		cpuid(0x80000000|i, 0, info);
+		cpuid(0x80000000 | i, 0, info);
 		DBG("eax = %#8.8x: %8.8x %8.8x %8.8x %8.8x\n",
-			0x80000000|i, info[0], info[1], info[2], info[3]);
+		    0x80000000 | i, info[0], info[1], info[2], info[3]);
 	}
 }
 
@@ -354,12 +349,12 @@ archhz(void)
 	int64_t hz;
 	uint32_t info0[4], info1[4];
 
-	if(!cpuidinfo(0, 0, info0)) {
+	if(!cpuidinfo(0, 0, info0)){
 		iprint("archhz: cpuidinfo(0, 0) failed\n");
 		return 0;
 	}
 
-	if(!cpuidinfo(1, 0, info1)) {
+	if(!cpuidinfo(1, 0, info1)){
 		iprint("archhz: cpuidinfo(1, 0) failed\n");
 		return 0;
 	}
@@ -395,11 +390,11 @@ archmmu(void)
 	 * Always have 4*KiB, but need to check
 	 * configured correctly.
 	 */
-	assert(PGSZ == 4*KiB);
+	assert(PGSZ == 4 * KiB);
 
 	sys->pgszlg2[0] = 12;
-	sys->pgszmask[0] = (1<<12)-1;
-	sys->pgsz[0] = 1<<12;
+	sys->pgszmask[0] = (1 << 12) - 1;
+	sys->pgsz[0] = 1 << 12;
 	sys->npgsz = 1;
 	if(machp()->CPU.ncpuinfos == 0 && cpuidinit() == 0)
 		return 1;
@@ -411,8 +406,8 @@ archmmu(void)
 	if(!(machp()->CPU.cpuinfo[1][3] & 0x00000008))
 		return 1;
 	sys->pgszlg2[1] = 21;
-	sys->pgszmask[1] = (1<<21)-1;
-	sys->pgsz[1] = 1<<21;
+	sys->pgszmask[1] = (1 << 21) - 1;
+	sys->pgsz[1] = 1 << 21;
 	sys->npgsz = 2;
 
 	/*
@@ -420,8 +415,8 @@ archmmu(void)
 	 */
 	if(cpuidinfo(0x80000001, 0, info) && (info[3] & 0x04000000)){
 		sys->pgszlg2[2] = 30;
-		sys->pgszmask[2] = (1<<30)-1;
-		sys->pgsz[2] = 1<<30;
+		sys->pgszmask[2] = (1 << 30) - 1;
+		sys->pgsz[2] = 1 << 30;
 		sys->npgsz = 3;
 	}
 
@@ -429,7 +424,7 @@ archmmu(void)
 }
 
 static int
-fmtP(Fmt* f)
+fmtP(Fmt *f)
 {
 	uintmem pa;
 
@@ -442,7 +437,7 @@ fmtP(Fmt* f)
 }
 
 static int
-fmtL(Fmt* f)
+fmtL(Fmt *f)
 {
 	Mpl pl;
 
@@ -452,7 +447,7 @@ fmtL(Fmt* f)
 }
 
 static int
-fmtR(Fmt* f)
+fmtR(Fmt *f)
 {
 	uint64_t r;
 
@@ -469,9 +464,8 @@ fmtW(Fmt *f)
 
 	va = va_arg(f->args, uint64_t);
 	return fmtprint(f, "%#llx=0x[%llx][%llx][%llx][%llx][%llx]", va,
-		PTLX(va, 3), PTLX(va, 2), PTLX(va, 1), PTLX(va, 0),
-		va & ((1<<PGSHFT)-1));
-
+			PTLX(va, 3), PTLX(va, 2), PTLX(va, 1), PTLX(va, 0),
+			va & ((1 << PGSHFT) - 1));
 }
 
 void
@@ -506,7 +500,7 @@ microdelay(int microsecs)
 	uint64_t r, t;
 
 	r = rdtsc();
-	for(t = r + (sys->cyclefreq*microsecs)/1000000ull; r < t; r = rdtsc())
+	for(t = r + (sys->cyclefreq * microsecs) / 1000000ull; r < t; r = rdtsc())
 		;
 }
 
@@ -516,6 +510,6 @@ millidelay(int millisecs)
 	uint64_t r, t;
 
 	r = rdtsc();
-	for(t = r + (sys->cyclefreq*millisecs)/1000ull; r < t; r = rdtsc())
+	for(t = r + (sys->cyclefreq * millisecs) / 1000ull; r < t; r = rdtsc())
 		;
 }

sys/src/9/amd64/backtrace.c

@@ -8,21 +8,22 @@
 #include "io.h"
 #include "amd64.h"
 
-int backtrace_list(uintptr_t pc, uintptr_t fp, uintptr_t *pcs, size_t nr_slots)
+int
+backtrace_list(uintptr_t pc, uintptr_t fp, uintptr_t *pcs, size_t nr_slots)
 {
 	size_t nr_pcs = 0;
-	while (fp && nr_pcs < nr_slots) {
+	while(fp && nr_pcs < nr_slots){
 		/* could put some sanity checks in here... */
 		pcs[nr_pcs++] = pc;
 		//iprint("PC %p FP %p\n", pc, fp);
-		if (fp < KTZERO)
+		if(fp < KTZERO)
 			break;
 		/* PC becomes the retaddr - 1.  the -1 is to put our PC back inside the
 		 * function that called us.  this was necessary in case we called as the
 		 * last instruction in a function (would have to never return).  not
 		 * sure how necessary this still is. */
-		pc = *(uintptr_t*)(fp + sizeof(uintptr_t)) - 1;
-		fp = *(uintptr_t*)fp;
+		pc = *(uintptr_t *)(fp + sizeof(uintptr_t)) - 1;
+		fp = *(uintptr_t *)fp;
 	}
 	return nr_pcs;
 }
@@ -31,11 +32,11 @@ int backtrace_list(uintptr_t pc, uintptr_t fp, uintptr_t *pcs, size_t nr_slots)
 void backtrace_frame(uintptr_t eip, uintptr_t ebp)
 {
 	char *func_name;
-	#define MAX_BT_DEPTH 20
+#define MAX_BT_DEPTH 20
 	uintptr_t pcs[MAX_BT_DEPTH];
 	size_t nr_pcs = backtrace_list(eip, ebp, pcs, MAX_BT_DEPTH);
 
-	for (int i = 0; i < nr_pcs; i++) {
+	for (int i = 0; i < nr_pcs; i++){
 		func_name = get_fn_name(pcs[i]);
 		print("#%02d [<%p>] in %s\n", i + 1,  pcs[i], func_name);
 		kfree(func_name);

sys/src/9/amd64/backtrace.h

@@ -14,14 +14,14 @@
 
 // Debug information about a particular instruction pointer
 typedef struct eipdebuginfo {
-	const char *eip_file;		// Source code filename for EIP
-	int eip_line;				// Source code linenumber for EIP
+	const char *eip_file;	     // Source code filename for EIP
+	int eip_line;		     // Source code linenumber for EIP
 
 	const char *eip_fn_name;	// Name of function containing EIP
-								//  - Note: not null terminated!
-	int eip_fn_namelen;			// Length of function name
+					//  - Note: not null terminated!
+	int eip_fn_namelen;		// Length of function name
 	uintptr_t eip_fn_addr;		// Address of start of function
-	int eip_fn_narg;			// Number of function arguments
+	int eip_fn_narg;		// Number of function arguments
 } eipdebuginfo_t;
 
 int debuginfo_eip(uintptr_t eip, eipdebuginfo_t *info);
@@ -29,10 +29,11 @@ void *debug_get_fn_addr(char *fn_name);
 
 /* Returns a PC/EIP in the function that called us, preferably near the call
  * site.  Returns 0 when we can't jump back any farther. */
-static inline uintptr_t get_caller_pc(void)
+static inline uintptr_t
+get_caller_pc(void)
 {
-	unsigned long *ebp = (unsigned long*)read_bp();
-	if (!ebp)
+	unsigned long *ebp = (unsigned long *)read_bp();
+	if(!ebp)
 		return 0;
 	/* this is part of the way back into the call() instruction's bytes
 	 * eagle-eyed readers should be able to explain why this is good enough, and

sys/src/9/amd64/cbscreen.c

@@ -16,13 +16,13 @@
 #include "ureg.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
 #include "screen.h"
 
-#define RGB2K(r,g,b)	((156763*(r)+307758*(g)+59769*(b))>>19)
+#define RGB2K(r, g, b) ((156763 * (r) + 307758 * (g) + 59769 * (b)) >> 19)
 
 Point ZP = {0, 0};
 
@@ -33,17 +33,75 @@ Memimage *gscreen;
 
 VGAscr vgascreen[1];
 
-Cursor	arrow = {
-	{ -1, -1 },
-	{ 0xFF, 0xFF, 0x80, 0x01, 0x80, 0x02, 0x80, 0x0C,
-	  0x80, 0x10, 0x80, 0x10, 0x80, 0x08, 0x80, 0x04,
-	  0x80, 0x02, 0x80, 0x01, 0x80, 0x02, 0x8C, 0x04,
-	  0x92, 0x08, 0x91, 0x10, 0xA0, 0xA0, 0xC0, 0x40,
+Cursor arrow = {
+	{-1, -1},
+	{
+		0xFF,
+		0xFF,
+		0x80,
+		0x01,
+		0x80,
+		0x02,
+		0x80,
+		0x0C,
+		0x80,
+		0x10,
+		0x80,
+		0x10,
+		0x80,
+		0x08,
+		0x80,
+		0x04,
+		0x80,
+		0x02,
+		0x80,
+		0x01,
+		0x80,
+		0x02,
+		0x8C,
+		0x04,
+		0x92,
+		0x08,
+		0x91,
+		0x10,
+		0xA0,
+		0xA0,
+		0xC0,
+		0x40,
 	},
-	{ 0x00, 0x00, 0x7F, 0xFE, 0x7F, 0xFC, 0x7F, 0xF0,
-	  0x7F, 0xE0, 0x7F, 0xE0, 0x7F, 0xF0, 0x7F, 0xF8,
-	  0x7F, 0xFC, 0x7F, 0xFE, 0x7F, 0xFC, 0x73, 0xF8,
-	  0x61, 0xF0, 0x60, 0xE0, 0x40, 0x40, 0x00, 0x00,
+	{
+		0x00,
+		0x00,
+		0x7F,
+		0xFE,
+		0x7F,
+		0xFC,
+		0x7F,
+		0xF0,
+		0x7F,
+		0xE0,
+		0x7F,
+		0xE0,
+		0x7F,
+		0xF0,
+		0x7F,
+		0xF8,
+		0x7F,
+		0xFC,
+		0x7F,
+		0xFE,
+		0x7F,
+		0xFC,
+		0x73,
+		0xF8,
+		0x61,
+		0xF0,
+		0x60,
+		0xE0,
+		0x40,
+		0x40,
+		0x00,
+		0x00,
 	},
 };
 
@@ -69,21 +127,20 @@ screensize(int x, int y, int z, uint32_t chan)
 	oldsoft = softscreen;
 
 	if(scr->paddr == 0){
-		int width = (x*z)/BI2WD;
+		int width = (x * z) / BI2WD;
 		void *p;
 
 		error("Can't do this");
-		p = malloc(width*BY2WD*y);
+		p = malloc(width * BY2WD * y);
 		if(p == nil)
 			error("no memory for vga soft screen");
 		gscreendata.bdata = softscreen = p;
 		if(scr->dev && scr->dev->page){
 			scr->vaddr = KADDR(VGAMEM());
-			scr->apsize = 1<<16;
+			scr->apsize = 1 << 16;
 		}
 		scr->useflush = 1;
-	}
-	else{
+	} else {
 		gscreendata.bdata = scr->vaddr;
 		scr->useflush = scr->dev && scr->dev->flush;
 	}
@@ -91,12 +148,12 @@ screensize(int x, int y, int z, uint32_t chan)
 	scr->gscreen = nil;
 	if(gscreen)
 		freememimage(gscreen);
-	gscreen = allocmemimaged(Rect(0,0,x,y), chan, &gscreendata);
+	gscreen = allocmemimaged(Rect(0, 0, x, y), chan, &gscreendata);
 	if(gscreen == nil)
 		error("no memory for vga memimage");
 	vgaimageinit(chan);
 
-	scr->palettedepth = 6;	/* default */
+	scr->palettedepth = 6; /* default */
 	scr->gscreendata = &gscreendata;
 	scr->memdefont = getmemdefont();
 	scr->gscreen = gscreen;
@@ -123,7 +180,7 @@ screenaperture(int size, int align)
 
 	scr = &vgascreen[0];
 
-	if(scr->paddr)	/* set up during enable */
+	if(scr->paddr) /* set up during enable */
 		return 0;
 
 	error("can't do this");
@@ -139,7 +196,7 @@ screenaperture(int size, int align)
 	 * Need to allocate some physical address space.
 	 * The driver will tell the card to use it.
 	 */
-	size = ROUNDUP(sizeof(size), 4*KiB);
+	size = ROUNDUP(sizeof(size), 4 * KiB);
 	scr->paddr = (uint64_t)malloc(size);
 	if(scr->paddr == 0)
 		return -1;
@@ -151,8 +208,8 @@ screenaperture(int size, int align)
 	return 0;
 }
 
-unsigned char*
-attachscreen(Rectangle* r, uint32_t* chan, int* d, int* width, int *softscreen)
+unsigned char *
+attachscreen(Rectangle *r, uint32_t *chan, int *d, int *width, int *softscreen)
 {
 	VGAscr *scr;
 
@@ -206,25 +263,24 @@ flushmemscreen(Rectangle r)
 	if(len < 1)
 		return;
 
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
-	page = off/scr->apsize;
+	off = r.min.y * scr->gscreen->width * BY2WD + (r.min.x * scr->gscreen->depth) / 8;
+	page = off / scr->apsize;
 	off %= scr->apsize;
 	disp = scr->vaddr;
-	sdisp = disp+off;
-	edisp = disp+scr->apsize;
+	sdisp = disp + off;
+	edisp = disp + scr->apsize;
 
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
+	off = r.min.y * scr->gscreen->width * BY2WD + (r.min.x * scr->gscreen->depth) / 8;
 
 	sp = scr->gscreendata->bdata + off;
 
 	scr->dev->page(scr, page);
-	for(y = r.min.y; y < r.max.y; y++) {
-		if(sdisp + incs < edisp) {
+	for(y = r.min.y; y < r.max.y; y++){
+		if(sdisp + incs < edisp){
 			memmove(sdisp, sp, len);
 			sp += incs;
 			sdisp += incs;
-		}
-		else {
+		} else {
 			off = edisp - sdisp;
 			page++;
 			if(off <= len){
@@ -232,9 +288,8 @@ flushmemscreen(Rectangle r)
 					memmove(sdisp, sp, off);
 				scr->dev->page(scr, page);
 				if(len - off > 0)
-					memmove(disp, sp+off, len - off);
-			}
-			else {
+					memmove(disp, sp + off, len - off);
+			} else {
 				memmove(sdisp, sp, len);
 				scr->dev->page(scr, page);
 			}
@@ -245,7 +300,7 @@ flushmemscreen(Rectangle r)
 }
 
 void
-getcolor(uint32_t p, uint32_t* pr, uint32_t* pg, uint32_t* pb)
+getcolor(uint32_t p, uint32_t *pr, uint32_t *pg, uint32_t *pb)
 {
 	VGAscr *scr;
 	uint32_t x;
@@ -345,7 +400,7 @@ cursoroff(int i)
 }
 
 void
-setcursor(Cursor* curs)
+setcursor(Cursor *curs)
 {
 	VGAscr *scr;
 
@@ -357,7 +412,7 @@ setcursor(Cursor* curs)
 }
 
 int hwaccel = 0;
-int hwblank = 0;	/* turned on by drivers that are known good */
+int hwblank = 0; /* turned on by drivers that are known good */
 int panning = 0;
 
 int
@@ -371,11 +426,11 @@ hwdraw(Memdrawparam *par)
 		return 0;
 
 	scr = &vgascreen[0];
-	if((dst=par->dst) == nil || dst->data == nil)
+	if((dst = par->dst) == nil || dst->data == nil)
 		return 0;
-	if((src=par->src) == nil || src->data == nil)
+	if((src = par->src) == nil || src->data == nil)
 		return 0;
-	if((mask=par->mask) == nil || mask->data == nil)
+	if((mask = par->mask) == nil || mask->data == nil)
 		return 0;
 
 	if(scr->cur == &swcursor){
@@ -395,7 +450,7 @@ hwdraw(Memdrawparam *par)
 	if(dst->data->bdata != gscreendata.bdata)
 		return 0;
 
-	if(scr->fill==nil && scr->scroll==nil)
+	if(scr->fill == nil && scr->scroll == nil)
 		return 0;
 
 	/*
@@ -403,11 +458,8 @@ hwdraw(Memdrawparam *par)
 	 * pixel we can convert to the destination format and just
 	 * replicate with memset.
 	 */
-	m = Simplesrc|Simplemask|Fullmask;
-	if(scr->fill
-	&& (par->state&m)==m
-	&& ((par->srgba&0xFF) == 0xFF)
-	&& (par->op&S) == S)
+	m = Simplesrc | Simplemask | Fullmask;
+	if(scr->fill && (par->state & m) == m && ((par->srgba & 0xFF) == 0xFF) && (par->op & S) == S)
 		return scr->fill(scr, par->r, par->sdval);
 
 	/*
@@ -415,12 +467,8 @@ hwdraw(Memdrawparam *par)
 	 * source onto the destination.  If the channels are the same and
 	 * the source is not replicated, memmove suffices.
 	 */
-	m = Simplemask|Fullmask;
-	if(scr->scroll
-	&& src->data->bdata==dst->data->bdata
-	&& !(src->flags&Falpha)
-	&& (par->state&m)==m
-	&& (par->op&S) == S)
+	m = Simplemask | Fullmask;
+	if(scr->scroll && src->data->bdata == dst->data->bdata && !(src->flags & Falpha) && (par->state & m) == m && (par->op & S) == S)
 		return scr->scroll(scr, par->r, par->sr);
 
 	return 0;
@@ -465,42 +513,41 @@ vgalinearaddr(VGAscr *scr, uint32_t paddr, int size)
 	}
 
 	/* round to page boundary, just in case */
-	x = paddr&(4*KiB-1);
-	npaddr = paddr-x;
-	nsize = ROUNDUP(size+x, 4*KiB);
+	x = paddr & (4 * KiB - 1);
+	npaddr = paddr - x;
+	nsize = ROUNDUP(size + x, 4 * KiB);
 
 	/*
 	 * Don't bother trying to map more than 4000x4000x32 = 64MB.
 	 * We only have a 256MB window.
 	 */
-	if(nsize > 64*MB)
-		nsize = 64*MB;
+	if(nsize > 64 * MB)
+		nsize = 64 * MB;
 	scr->vaddr = vmap(npaddr, nsize);
 	if(scr->vaddr == 0)
 		error("cannot allocate vga frame buffer");
-	scr->vaddr = (char*)scr->vaddr+x;
+	scr->vaddr = (char *)scr->vaddr + x;
 	scr->paddr = paddr;
 	scr->apsize = nsize;
 }
 
-
 /*
  * Software cursor.
  */
-int	swvisible;	/* is the cursor visible? */
-int	swenabled;	/* is the cursor supposed to be on the screen? */
-Memimage*	swback;	/* screen under cursor */
-Memimage*	swimg;	/* cursor image */
-Memimage*	swmask;	/* cursor mask */
-Memimage*	swimg1;
-Memimage*	swmask1;
-
-Point	swoffset;
-Rectangle	swrect;	/* screen rectangle in swback */
-Point	swpt;	/* desired cursor location */
-Point	swvispt;	/* actual cursor location */
-int	swvers;	/* incremented each time cursor image changes */
-int	swvisvers;	/* the version on the screen */
+int swvisible;	  /* is the cursor visible? */
+int swenabled;	  /* is the cursor supposed to be on the screen? */
+Memimage *swback; /* screen under cursor */
+Memimage *swimg;  /* cursor image */
+Memimage *swmask; /* cursor mask */
+Memimage *swimg1;
+Memimage *swmask1;
+
+Point swoffset;
+Rectangle swrect; /* screen rectangle in swback */
+Point swpt;	  /* desired cursor location */
+Point swvispt;	  /* actual cursor location */
+int swvers;	  /* incremented each time cursor image changes */
+int swvisvers;	  /* the version on the screen */
 
 /*
  * called with drawlock locked for us, most of the time.
@@ -539,7 +586,7 @@ swcursordraw(void)
 	assert(!canqlock(&drawlock));
 	swvispt = swpt;
 	swvisvers = swvers;
-	swrect = rectaddpt(Rect(0,0,16,16), swvispt);
+	swrect = rectaddpt(Rect(0, 0, 16, 16), swvispt);
 	memimagedraw(swback, swback->r, gscreen, swpt, memopaque, ZP, S);
 	memimagedraw(gscreen, swrect, swimg1, ZP, swmask1, ZP, SoverD);
 	flushmemscreen(swrect);
@@ -587,12 +634,12 @@ swload(VGAscr *v, Cursor *curs)
 	 */
 	ip = byteaddr(swimg, ZP);
 	mp = byteaddr(swmask, ZP);
-	for(i=0; i<32; i++){
+	for(i = 0; i < 32; i++){
 		set = curs->set[i];
 		clr = curs->clr[i];
-		for(j=0x80; j; j>>=1){
-			*ip++ = set&j ? 0x00 : 0xFF;
-			*mp++ = (clr|set)&j ? 0xFF : 0x00;
+		for(j = 0x80; j; j >>= 1){
+			*ip++ = set & j ? 0x00 : 0xFF;
+			*mp++ = (clr | set) & j ? 0xFF : 0x00;
 		}
 	}
 	swoffset = curs->offset;
@@ -615,17 +662,17 @@ swcursorclock(void)
 
 	if(!swenabled)
 		return;
-	if(swvisible && eqpt(swpt, swvispt) && swvers==swvisvers)
+	if(swvisible && eqpt(swpt, swvispt) && swvers == swvisvers)
 		return;
 
 	x = splhi();
 	if(swenabled)
-	if(!swvisible || !eqpt(swpt, swvispt) || swvers!=swvisvers)
-	if(canqlock(&drawlock)){
-		swcursorhide();
-		swcursordraw();
-		qunlock(&drawlock);
-	}
+		if(!swvisible || !eqpt(swpt, swvispt) || swvers != swvisvers)
+			if(canqlock(&drawlock)){
+				swcursorhide();
+				swcursordraw();
+				qunlock(&drawlock);
+			}
 	splx(x);
 }
 
@@ -641,7 +688,7 @@ swcursorinit(void)
 		addclock0link(swcursorclock, 10);
 	}
 	scr = &vgascreen[0];
-	if(scr==nil || scr->gscreen==nil)
+	if(scr == nil || scr->gscreen == nil)
 		return;
 
 	if(scr->dev == nil || scr->dev->linear == nil){
@@ -660,12 +707,12 @@ swcursorinit(void)
 		freememimage(swimg1);
 	}
 
-	swback = allocmemimage(Rect(0,0,32,32), gscreen->chan);
-	swmask = allocmemimage(Rect(0,0,16,16), GREY8);
-	swmask1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	swimg = allocmemimage(Rect(0,0,16,16), GREY8);
-	swimg1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	if(swback==nil || swmask==nil || swmask1==nil || swimg==nil || swimg1 == nil){
+	swback = allocmemimage(Rect(0, 0, 32, 32), gscreen->chan);
+	swmask = allocmemimage(Rect(0, 0, 16, 16), GREY8);
+	swmask1 = allocmemimage(Rect(0, 0, 16, 16), GREY1);
+	swimg = allocmemimage(Rect(0, 0, 16, 16), GREY8);
+	swimg1 = allocmemimage(Rect(0, 0, 16, 16), GREY1);
+	if(swback == nil || swmask == nil || swmask1 == nil || swimg == nil || swimg1 == nil){
 		print("software cursor: allocmemimage fails");
 		return;
 	}
@@ -677,10 +724,10 @@ swcursorinit(void)
 }
 
 VGAcur swcursor =
-{
-	"soft",
-	swenable,
-	swdisable,
-	swload,
-	swmove,
+	{
+		"soft",
+		swenable,
+		swdisable,
+		swload,
+		swmove,
 };

sys/src/9/amd64/cbvga.c

@@ -15,13 +15,13 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
 #include "screen.h"
 
-static Memimage* back;
+static Memimage *back;
 static Memimage *conscol;
 
 static Point curpos;
@@ -35,18 +35,18 @@ void
 vgaimageinit(uint32_t chan)
 {
 	if(back == nil){
-		back = allocmemimage(Rect(0,0,1,1), chan);	/* RSC BUG */
+		back = allocmemimage(Rect(0, 0, 1, 1), chan); /* RSC BUG */
 		if(back == nil)
-			panic("back alloc");		/* RSC BUG */
+			panic("back alloc"); /* RSC BUG */
 		back->flags |= Frepl;
 		back->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 		memfillcolor(back, DBlack);
 	}
 
 	if(conscol == nil){
-		conscol = allocmemimage(Rect(0,0,1,1), chan);	/* RSC BUG */
+		conscol = allocmemimage(Rect(0, 0, 1, 1), chan); /* RSC BUG */
 		if(conscol == nil)
-			panic("conscol alloc");	/* RSC BUG */
+			panic("conscol alloc"); /* RSC BUG */
 		conscol->flags |= Frepl;
 		conscol->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 		memfillcolor(conscol, DWhite);
@@ -54,31 +54,31 @@ vgaimageinit(uint32_t chan)
 }
 
 static void
-vgascroll(VGAscr* scr)
+vgascroll(VGAscr *scr)
 {
 	int h, o;
 	Point p;
 	Rectangle r;
 
 	h = scr->memdefont->height;
-	o = 8*h;
-	r = Rpt(window.min, Pt(window.max.x, window.max.y-o));
-	p = Pt(window.min.x, window.min.y+o);
+	o = 8 * h;
+	r = Rpt(window.min, Pt(window.max.x, window.max.y - o));
+	p = Pt(window.min.x, window.min.y + o);
 	memimagedraw(scr->gscreen, r, scr->gscreen, p, nil, p, S);
-	r = Rpt(Pt(window.min.x, window.max.y-o), window.max);
+	r = Rpt(Pt(window.min.x, window.max.y - o), window.max);
 	memimagedraw(scr->gscreen, r, back, ZP, nil, ZP, S);
 
 	curpos.y -= o;
 }
 
 static void
-vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
+vgascreenputc(VGAscr *scr, char *buf, Rectangle *flushr)
 {
 	Point p;
 	int h, w, pos;
 	Rectangle r;
 
-//	drawdebug = 1;
+	//	drawdebug = 1;
 	if(xp < xbuf || xp >= &xbuf[sizeof(xbuf)])
 		xp = xbuf;
 
@@ -86,7 +86,7 @@ vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
 	switch(buf[0]){
 
 	case '\n':
-		if(curpos.y+h >= window.max.y){
+		if(curpos.y + h >= window.max.y){
 			vgascroll(scr);
 			*flushr = window;
 		}
@@ -102,22 +102,22 @@ vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
 	case '\t':
 		p = memsubfontwidth(scr->memdefont, " ");
 		w = p.x;
-		if(curpos.x >= window.max.x-4*w)
+		if(curpos.x >= window.max.x - 4 * w)
 			vgascreenputc(scr, "\n", flushr);
 
-		pos = (curpos.x-window.min.x)/w;
-		pos = 4-(pos%4);
+		pos = (curpos.x - window.min.x) / w;
+		pos = 4 - (pos % 4);
 		*xp++ = curpos.x;
-		r = Rect(curpos.x, curpos.y, curpos.x+pos*w, curpos.y + h);
+		r = Rect(curpos.x, curpos.y, curpos.x + pos * w, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
-		curpos.x += pos*w;
+		curpos.x += pos * w;
 		break;
 
 	case '\b':
 		if(xp <= xbuf)
 			break;
 		xp--;
-		r = Rect(*xp, curpos.y, curpos.x, curpos.y+h);
+		r = Rect(*xp, curpos.y, curpos.x, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, ZP, S);
 		combinerect(flushr, r);
 		curpos.x = *xp;
@@ -130,21 +130,21 @@ vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
 		p = memsubfontwidth(scr->memdefont, buf);
 		w = p.x;
 
-		if(curpos.x >= window.max.x-w)
+		if(curpos.x >= window.max.x - w)
 			vgascreenputc(scr, "\n", flushr);
 
 		*xp++ = curpos.x;
-		r = Rect(curpos.x, curpos.y, curpos.x+w, curpos.y+h);
+		r = Rect(curpos.x, curpos.y, curpos.x + w, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
 		memimagestring(scr->gscreen, curpos, conscol, ZP, scr->memdefont, buf);
 		combinerect(flushr, r);
 		curpos.x += w;
 	}
-//	drawdebug = 0;
+	//	drawdebug = 0;
 }
 
 static void
-vgascreenputs(char* s, int n)
+vgascreenputs(char *s, int n)
 {
 	int i, gotdraw;
 	Rune r;
@@ -161,8 +161,7 @@ vgascreenputs(char* s, int n)
 		 */
 		if(!canlock(&vgascreenlock))
 			return;
-	}
-	else
+	} else
 		lock(&vgascreenlock);
 
 	/*
@@ -194,7 +193,7 @@ vgascreenputs(char* s, int n)
 }
 
 void
-vgascreenwin(VGAscr* scr)
+vgascreenwin(VGAscr *scr)
 {
 	int h, w;
 
@@ -202,8 +201,8 @@ vgascreenwin(VGAscr* scr)
 	w = scr->memdefont->info[' '].width;
 
 	window = insetrect(scr->gscreen->r, 48);
-	window.max.x = window.min.x+((window.max.x-window.min.x)/w)*w;
-	window.max.y = window.min.y+((window.max.y-window.min.y)/h)*h;
+	window.max.x = window.min.x + ((window.max.x - window.min.x) / w) * w;
+	window.max.y = window.min.y + ((window.max.y - window.min.y) / h) * h;
 	curpos = window.min;
 
 	consputs = vgascreenputs;
@@ -231,7 +230,7 @@ addvgaseg(char *name, uint32_t pa, uint32_t size)
 	seg.name = name;
 	seg.pa = pa;
 	seg.size = size;
-	seg.pgszi = -1;		// Default page size
+	seg.pgszi = -1;	       // Default page size
 	addphysseg(&seg);
 }
 
@@ -253,5 +252,5 @@ cornerstring(char *s)
 	r = Rect(0, 0, w, h);
 	memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
 	memimagestring(scr->gscreen, r.min, conscol, ZP, scr->memdefont, s);
-//	flushmemscreen(r);
+	//	flushmemscreen(r);
 }

sys/src/9/amd64/cga.c

@@ -14,36 +14,36 @@
 #include "fns.h"
 
 enum {
-	Black		= 0x00,
-	Blue		= 0x01,
-	Green		= 0x02,
-	Cyan		= 0x03,
-	Red		= 0x04,
-	Magenta		= 0x05,
-	Brown		= 0x06,
-	Grey		= 0x07,
-
-	Bright 		= 0x08,
-	Blinking	= 0x80,
-
-	Attr		= (Black<<4)|Grey,	/* (background<<4)|foreground */
+	Black = 0x00,
+	Blue = 0x01,
+	Green = 0x02,
+	Cyan = 0x03,
+	Red = 0x04,
+	Magenta = 0x05,
+	Brown = 0x06,
+	Grey = 0x07,
+
+	Bright = 0x08,
+	Blinking = 0x80,
+
+	Attr = (Black << 4) | Grey, /* (background<<4)|foreground */
 };
 
 enum {
-	Index		= 0x3d4,
-	Data		= Index+1,
+	Index = 0x3d4,
+	Data = Index + 1,
 
-	Width		= 80*2,
-	Height		= 25,
+	Width = 80 * 2,
+	Height = 25,
 
-	Poststrlen	= 0,
-	Postcodelen	= 2,
-	Postlen		= Poststrlen+Postcodelen,
+	Poststrlen = 0,
+	Postcodelen = 2,
+	Postlen = Poststrlen + Postcodelen,
 
-	Cgasize		= 16384,
+	Cgasize = 16384,
 };
 
-#define CGA		(BIOSSEG(0xb800))
+#define CGA (BIOSSEG(0xb800))
 
 static Lock cgalock;
 static int cgapos;
@@ -66,7 +66,7 @@ cgaregw(int index, int data)
 static void
 cgablinkoff(void)
 {
-	cgaregw(0x0a, 1<<5);
+	cgaregw(0x0a, 1 << 5);
 }
 
 static void
@@ -74,11 +74,11 @@ cgacursor(void)
 {
 	uint8_t *cga;
 
-	cgaregw(0x0e, (cgapos/2>>8) & 0xff);
-	cgaregw(0x0f, cgapos/2 & 0xff);
+	cgaregw(0x0e, (cgapos / 2 >> 8) & 0xff);
+	cgaregw(0x0f, cgapos / 2 & 0xff);
 
 	cga = CGA;
-	cga[cgapos+1] = Attr;
+	cga[cgapos + 1] = Attr;
 }
 
 /*
@@ -94,28 +94,25 @@ cgaputc(int c)
 	cga = CGA;
 
 	if(c == '\n'){
-		cgapos = cgapos/Width;
-		cgapos = (cgapos+1)*Width;
-	}
-	else if(c == '\t'){
-		i = 8 - ((cgapos/2)&7);
+		cgapos = cgapos / Width;
+		cgapos = (cgapos + 1) * Width;
+	} else if(c == '\t'){
+		i = 8 - ((cgapos / 2) & 7);
 		while(i-- > 0)
 			cgaputc(' ');
-	}
-	else if(c == '\b'){
+	} else if(c == '\b'){
 		if(cgapos >= 2)
 			cgapos -= 2;
 		cgaputc(' ');
 		cgapos -= 2;
-	}
-	else{
+	} else {
 		cga[cgapos++] = c;
 		cga[cgapos++] = Attr;
 	}
-	if(cgapos >= (Width*Height)-Postlen*2){
-		memmove(cga, &cga[Width], Width*(Height-1));
-		p = &cga[Width*(Height-1)-Postlen*2];
-		for(i = 0; i < Width/2; i++){
+	if(cgapos >= (Width * Height) - Postlen * 2){
+		memmove(cga, &cga[Width], Width * (Height - 1));
+		p = &cga[Width * (Height - 1) - Postlen * 2];
+		for(i = 0; i < Width / 2; i++){
 			*p++ = ' ';
 			*p++ = Attr;
 		}
@@ -137,9 +134,9 @@ cgaprint(int off, char *fmt, ...)
 	va_end(va);
 
 	cga = CGA;
-	for(i = 0; (2*(i+off))+1 < Cgasize && i < n; i++){
-		cga[2*(i+off)+0] = buf[i];
-		cga[2*(i+off)+1] = Attr;
+	for(i = 0; (2 * (i + off)) + 1 < Cgasize && i < n; i++){
+		cga[2 * (i + off) + 0] = buf[i];
+		cga[2 * (i + off) + 1] = Attr;
 	}
 	return n;
 }
@@ -147,15 +144,15 @@ cgaprint(int off, char *fmt, ...)
 int
 cgaclearln(int off, int c)
 {
-	uint8_t  *cga;
+	uint8_t *cga;
 	int i;
 
 	cga = CGA;
-	for(i = off; (2*i)+1 < Cgasize && i%80 != 0; i++){
-		cga[2*i+0] = c;
-		cga[2*i+1] = Attr;
+	for(i = off; (2 * i) + 1 < Cgasize && i % 80 != 0; i++){
+		cga[2 * i + 0] = c;
+		cga[2 * i + 1] = Attr;
 	}
-	return i-off;
+	return i - off;
 }
 
 /*
@@ -171,7 +168,7 @@ cgaprinthex(uintptr_t x)
 	str[29] = 0;
 	s = &str[29];
 	while(x != 0){
-		*--s = dig[x&0xF];
+		*--s = dig[x & 0xF];
 		x >>= 4;
 	}
 	while(*s != 0)
@@ -180,7 +177,7 @@ cgaprinthex(uintptr_t x)
 }
 
 void
-cgaconsputs(char* s, int n)
+cgaconsputs(char *s, int n)
 {
 	ilock(&cgalock);
 	while(n-- > 0)
@@ -196,14 +193,14 @@ cgapost(int code)
 	static char hex[] = "0123456789ABCDEF";
 
 	cga = CGA;
-	cga[Width*Height-Postcodelen*2] = hex[(code>>4) & 0x0f];
-	cga[Width*Height-Postcodelen*2+1] = Attr;
-	cga[Width*Height-Postcodelen*2+2] = hex[code & 0x0f];
-	cga[Width*Height-Postcodelen*2+3] = Attr;
+	cga[Width * Height - Postcodelen * 2] = hex[(code >> 4) & 0x0f];
+	cga[Width * Height - Postcodelen * 2 + 1] = Attr;
+	cga[Width * Height - Postcodelen * 2 + 2] = hex[code & 0x0f];
+	cga[Width * Height - Postcodelen * 2 + 3] = Attr;
 }
 
 static int32_t
-cgaread(Chan* c, void *vbuf, int32_t len, int64_t off)
+cgaread(Chan *c, void *vbuf, int32_t len, int64_t off)
 {
 	uint8_t *cga;
 	extern int panicking;
@@ -211,7 +208,7 @@ cgaread(Chan* c, void *vbuf, int32_t len, int64_t off)
 		error("cgaread: kernel panic");
 	if(off < 0 || off > Cgasize)
 		error("cgaread: offset out of bounds");
-	if(off+len > Cgasize)
+	if(off + len > Cgasize)
 		len = Cgasize - off;
 	cga = CGA;
 	memmove(vbuf, cga + off, len);
@@ -219,7 +216,7 @@ cgaread(Chan* c, void *vbuf, int32_t len, int64_t off)
 }
 
 static int32_t
-cgawrite(Chan* c, void *vbuf, int32_t len, int64_t off)
+cgawrite(Chan *c, void *vbuf, int32_t len, int64_t off)
 {
 	uint8_t *cga;
 	extern int panicking;
@@ -227,7 +224,7 @@ cgawrite(Chan* c, void *vbuf, int32_t len, int64_t off)
 		error("cgawrite: kernel panic");
 	if(off < 0 || off > Cgasize)
 		error("cgawrite: offset out of bounds");
-	if(off+len > Cgasize)
+	if(off + len > Cgasize)
 		len = Cgasize - off;
 	cga = CGA;
 	memmove(cga + off, vbuf, len);
@@ -239,7 +236,7 @@ cgainit(void)
 {
 	ilock(&cgalock);
 
-	cgapos = cgaregr(0x0e)<<8;
+	cgapos = cgaregr(0x0e) << 8;
 	cgapos |= cgaregr(0x0f);
 	cgapos *= 2;
 	cgablinkoff();

sys/src/9/amd64/coreboot.c

@@ -37,7 +37,8 @@
 #include "coreboot.h"
 
 /* this implements the architecture-dependent call needed for port/devcoreboot.c */
-int get_coreboot_info(struct sysinfo_t *info)
+int
+get_coreboot_info(struct sysinfo_t *info)
 {
 	int ret;
 
@@ -49,7 +50,7 @@ int get_coreboot_info(struct sysinfo_t *info)
 
 	ret = cb_parse_header(KADDR(0x00000000), 0x1000, info);
 
-	if (ret != 1) {
+	if(ret != 1){
 		print("Scan %p\n", KADDR(0xf0000));
 		ret = cb_parse_header(KADDR(0x000f0000), 0x1000, info);
 	}

sys/src/9/amd64/ctype.c

@@ -2,24 +2,136 @@
 #include <libc.h>
 #include <ctype.h>
 
-uint8_t	_ctype[256] =
-{
-/*	 0	 1	 2	 3	 4	 5	 6	 7  */
+uint8_t _ctype[256] =
+	{
+		/*	 0	 1	 2	 3	 4	 5	 6	 7  */
 
-/*  0*/	_C,	_C,	_C,	_C,	_C,	_C,	_C,	_C,
-/* 10*/	_C,	_S|_C,	_S|_C,	_S|_C,	_S|_C,	_S|_C,	_C,	_C,
-/* 20*/	_C,	_C,	_C,	_C,	_C,	_C,	_C,	_C,
-/* 30*/	_C,	_C,	_C,	_C,	_C,	_C,	_C,	_C,
-/* 40*/	_S|_B,	_P,	_P,	_P,	_P,	_P,	_P,	_P,
-/* 50*/	_P,	_P,	_P,	_P,	_P,	_P,	_P,	_P,
-/* 60*/	_N|_X,	_N|_X,	_N|_X,	_N|_X,	_N|_X,	_N|_X,	_N|_X,	_N|_X,
-/* 70*/	_N|_X,	_N|_X,	_P,	_P,	_P,	_P,	_P,	_P,
-/*100*/	_P,	_U|_X,	_U|_X,	_U|_X,	_U|_X,	_U|_X,	_U|_X,	_U,
-/*110*/	_U,	_U,	_U,	_U,	_U,	_U,	_U,	_U,
-/*120*/	_U,	_U,	_U,	_U,	_U,	_U,	_U,	_U,
-/*130*/	_U,	_U,	_U,	_P,	_P,	_P,	_P,	_P,
-/*140*/	_P,	_L|_X,	_L|_X,	_L|_X,	_L|_X,	_L|_X,	_L|_X,	_L,
-/*150*/	_L,	_L,	_L,	_L,	_L,	_L,	_L,	_L,
-/*160*/	_L,	_L,	_L,	_L,	_L,	_L,	_L,	_L,
-/*170*/	_L,	_L,	_L,	_P,	_P,	_P,	_P,	_C,
+		/*  0*/ _C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		/* 10*/ _C,
+		_S | _C,
+		_S | _C,
+		_S | _C,
+		_S | _C,
+		_S | _C,
+		_C,
+		_C,
+		/* 20*/ _C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		/* 30*/ _C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		_C,
+		/* 40*/ _S | _B,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		/* 50*/ _P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		/* 60*/ _N | _X,
+		_N | _X,
+		_N | _X,
+		_N | _X,
+		_N | _X,
+		_N | _X,
+		_N | _X,
+		_N | _X,
+		/* 70*/ _N | _X,
+		_N | _X,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		/*100*/ _P,
+		_U | _X,
+		_U | _X,
+		_U | _X,
+		_U | _X,
+		_U | _X,
+		_U | _X,
+		_U,
+		/*110*/ _U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		/*120*/ _U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		_U,
+		/*130*/ _U,
+		_U,
+		_U,
+		_P,
+		_P,
+		_P,
+		_P,
+		_P,
+		/*140*/ _P,
+		_L | _X,
+		_L | _X,
+		_L | _X,
+		_L | _X,
+		_L | _X,
+		_L | _X,
+		_L,
+		/*150*/ _L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		/*160*/ _L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		_L,
+		/*170*/ _L,
+		_L,
+		_L,
+		_P,
+		_P,
+		_P,
+		_P,
+		_C,
 };

sys/src/9/amd64/dat.h

@@ -35,7 +35,7 @@ typedef uint64_t PTE;
 typedef struct Proc Proc;
 typedef struct Sys Sys;
 typedef struct Stackframe Stackframe;
-typedef uint64_t uintmem;				/* Physical address (hideous) */
+typedef uint64_t uintmem; /* Physical address (hideous) */
 typedef struct Ureg Ureg;
 typedef struct Vctl Vctl;
 
@@ -44,130 +44,122 @@ typedef struct Vctl Vctl;
  * in the outside world.
  */
 enum regnames {
-	GDB_AX,			/* 0 */
-	GDB_BX,			/* 1 */
-	GDB_CX,			/* 2 */
-	GDB_DX,			/* 3 */
-	GDB_SI,			/* 4 */
-	GDB_DI,			/* 5 */
-	GDB_BP,			/* 6 */
-	GDB_SP,			/* 7 */
-	GDB_R8,			/* 8 */
-	GDB_R9,			/* 9 */
-	GDB_R10,		/* 10 */
-	GDB_R11,		/* 11 */
-	GDB_R12,		/* 12 */
-	GDB_R13,		/* 13 */
-	GDB_R14,		/* 14 */
-	GDB_R15,		/* 15 */
-	GDB_PC,			/* 16 */
-	GDB_PS,			/* 17 */
-	GDB_CS,			/* 18 */
-	GDB_SS,			/* 19 */
-	GDB_DS,			/* 20 */
-	GDB_ES,			/* 21 */
-	GDB_FS,			/* 22 */
-	GDB_GS,			/* 23 */
+	GDB_AX,	 /* 0 */
+	GDB_BX,	 /* 1 */
+	GDB_CX,	 /* 2 */
+	GDB_DX,	 /* 3 */
+	GDB_SI,	 /* 4 */
+	GDB_DI,	 /* 5 */
+	GDB_BP,	 /* 6 */
+	GDB_SP,	 /* 7 */
+	GDB_R8,	 /* 8 */
+	GDB_R9,	 /* 9 */
+	GDB_R10, /* 10 */
+	GDB_R11, /* 11 */
+	GDB_R12, /* 12 */
+	GDB_R13, /* 13 */
+	GDB_R14, /* 14 */
+	GDB_R15, /* 15 */
+	GDB_PC,	 /* 16 */
+	GDB_PS,	 /* 17 */
+	GDB_CS,	 /* 18 */
+	GDB_SS,	 /* 19 */
+	GDB_DS,	 /* 20 */
+	GDB_ES,	 /* 21 */
+	GDB_FS,	 /* 22 */
+	GDB_GS,	 /* 23 */
 };
 
-#define DBG_MAX_REG_NUM		24
+#define DBG_MAX_REG_NUM 24
 /* 17 64 bit regs and 5 32 bit regs */
-#define GDB_NUMREGBYTES		((17 * 8) + (7 * 4))
+#define GDB_NUMREGBYTES ((17 * 8) + (7 * 4))
 
-#define MAXSYSARG	5	/* for mount(fd, afd, mpt, flag, arg) */
+#define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
 
 /*
  *  parameters for sysproc.c
  */
-#define AOUT_MAGIC	(S_MAGIC)
-#define ELF_MAGIC	(ELF_MAG)
+#define AOUT_MAGIC (S_MAGIC)
+#define ELF_MAGIC (ELF_MAG)
 
 /*
  *  machine dependent definitions used by ../port/portdat.h
  */
 
-
-struct Lock
-{
-	uint32_t	key;
-	int	isilock;
-	Mpl	pl;
-	uintptr_t	_pc;
-	Proc*	p;
-	Mach*	m;
-	uint64_t	lockcycles;
+struct Lock {
+	uint32_t key;
+	int isilock;
+	Mpl pl;
+	uintptr_t _pc;
+	Proc *p;
+	Mach *m;
+	uint64_t lockcycles;
 };
 
-struct Label
-{
-	uintptr_t	sp;
-	uintptr_t	pc;
-	uintptr_t	fp;
-	uintptr_t	_pad[13];
+struct Label {
+	uintptr_t sp;
+	uintptr_t pc;
+	uintptr_t fp;
+	uintptr_t _pad[13];
 };
 
 struct Fxsave {
-	uint16_t	fcw;			/* x87 control word */
-	uint16_t	fsw;			/* x87 status word */
-	uint8_t	ftw;			/* x87 tag word */
-	uint8_t	zero;			/* 0 */
-	uint16_t	fop;			/* last x87 opcode */
-	uint64_t	rip;			/* last x87 instruction pointer */
-	uint64_t	rdp;			/* last x87 data pointer */
-	uint32_t	mxcsr;			/* MMX control and status */
-	uint32_t	mxcsrmask;		/* supported MMX feature bits */
-	unsigned char	st[128];		/* shared 64-bit media and x87 regs */
-	unsigned char	xmm[256];		/* 128-bit media regs */
-	unsigned char	ign[96];		/* reserved, ignored */
-} __attribute__ ((aligned(16)));
+	uint16_t fcw;		/* x87 control word */
+	uint16_t fsw;		/* x87 status word */
+	uint8_t ftw;		/* x87 tag word */
+	uint8_t zero;		/* 0 */
+	uint16_t fop;		/* last x87 opcode */
+	uint64_t rip;		/* last x87 instruction pointer */
+	uint64_t rdp;		/* last x87 data pointer */
+	uint32_t mxcsr;		/* MMX control and status */
+	uint32_t mxcsrmask;	/* supported MMX feature bits */
+	unsigned char st[128];	/* shared 64-bit media and x87 regs */
+	unsigned char xmm[256]; /* 128-bit media regs */
+	unsigned char ign[96];	/* reserved, ignored */
+} __attribute__((aligned(16)));
 
 /*
  *  FPU stuff in Proc
  */
 struct PFPU {
-	Fxsave	fxsave;
+	Fxsave fxsave;
 };
 
 /*
  *  MMU stuff in Proc
  */
 #define NCOLOR 1
-struct PMMU
-{
-	Page	*root;
+struct PMMU {
+	Page *root;
 };
 
 /*
  *  things saved in the Proc structure during a notify
  */
-struct PNOTIFY
-{
-//	void	emptiness;
-	char	emptiness;
+struct PNOTIFY {
+	//	void	emptiness;
+	char emptiness;
 };
 
-struct Confmem
-{
-	uintptr_t	base;
-	usize	npage;
-	uintptr_t	kbase;
-	uintptr_t	klimit;
+struct Confmem {
+	uintptr_t base;
+	usize npage;
+	uintptr_t kbase;
+	uintptr_t klimit;
 };
 
-struct Conf
-{
-	uint32_t	nproc;		/* processes */
-	Confmem	mem[4];		/* physical memory */
-	uint64_t	npage;		/* total physical pages of memory */
-	usize	upages;		/* user page pool */
-	uint32_t	copymode;	/* 0 is copy on write, 1 is copy on reference */
-	uint32_t	ialloc;		/* max interrupt time allocation in bytes */
-	uint32_t	nimage;		/* number of page cache image headers */
+struct Conf {
+	uint32_t nproc;	   /* processes */
+	Confmem mem[4];	   /* physical memory */
+	uint64_t npage;	   /* total physical pages of memory */
+	usize upages;	   /* user page pool */
+	uint32_t copymode; /* 0 is copy on write, 1 is copy on reference */
+	uint32_t ialloc;   /* max interrupt time allocation in bytes */
+	uint32_t nimage;   /* number of page cache image headers */
 };
 
-enum
-{
-	NPGSZ = 4	/* # of supported  pages sizes in Mach */
+enum {
+	NPGSZ = 4 /* # of supported  pages sizes in Mach */
 };
 
 #include "../port/portdat.h"
@@ -175,61 +167,54 @@ enum
 /*
  *  CPU stuff in Mach.
  */
-struct MCPU
-{
-	uint32_t	cpuinfo[3][4];			/*  CPUID Functions 0, 1, and 5 (n.b.: 2-4 are invalid) */
-	int	ncpuinfos;			/* number of standard entries */
-	int	ncpuinfoe;			/* number of extended entries */
-	int	isintelcpu;			/*  */
+struct MCPU {
+	uint32_t cpuinfo[3][4]; /*  CPUID Functions 0, 1, and 5 (n.b.: 2-4 are invalid) */
+	int ncpuinfos;		/* number of standard entries */
+	int ncpuinfoe;		/* number of extended entries */
+	int isintelcpu;		/*  */
 };
 
 /*
  *  FPU stuff in Mach.
  */
-struct MFPU
-{
-	uint16_t	fcw;			/* x87 control word */
-	uint32_t	mxcsr;			/* MMX control and status */
-	uint32_t	mxcsrmask;		/* supported MMX feature bits */
+struct MFPU {
+	uint16_t fcw;	    /* x87 control word */
+	uint32_t mxcsr;	    /* MMX control and status */
+	uint32_t mxcsrmask; /* supported MMX feature bits */
 };
 
-struct NIX
-{
-	ICC*	icc;			/* inter-core call */
-	int	nixtype;
+struct NIX {
+	ICC *icc; /* inter-core call */
+	int nixtype;
 };
 
 /*
  *  MMU stuff in Mach.
  */
-struct MMMU
-{
+struct MMMU {
 	uintptr_t cr2;
-	Page*	pml4;			/* pml4 for this processor */
-	Page	pml4kludge;		/* NIX KLUDGE: we need a page */
+	Page *pml4;	 /* pml4 for this processor */
+	Page pml4kludge; /* NIX KLUDGE: we need a page */
 };
 
 /*
  * Inter core calls
  */
-enum
-{
-	ICCLNSZ =	128,	/* Cache line size for inter core calls */
-
+enum {
+	ICCLNSZ = 128, /* Cache line size for inter core calls */
 
-	ICCOK = 0,		/* Return codes: Ok; trap; syscall */
+	ICCOK = 0, /* Return codes: Ok; trap; syscall */
 	ICCTRAP,
 	ICCSYSCALL
 };
 
-struct ICC
-{
+struct ICC {
 	/* fn is kept in its own cache line */
-	alignas(ICCLNSZ) void	(*fn)(void);
-	int	flushtlb;	/* on the AC, before running fn */
-	int	rc;		/* return code from AC to TC */
-	char*	note;		/* to be posted in the TC after returning */
-	unsigned char	data[ICCLNSZ];	/* sent to the AC */
+	alignas(ICCLNSZ) void (*fn)(void);
+	int flushtlb;		     /* on the AC, before running fn */
+	int rc;			     /* return code from AC to TC */
+	char *note;		     /* to be posted in the TC after returning */
+	unsigned char data[ICCLNSZ]; /* sent to the AC */
 };
 
 /*
@@ -246,13 +231,13 @@ struct PmcCtl {
 	int reset;
 };
 
-struct PmcWait{
+struct PmcWait {
 	Ref r;
 	Rendez rend;
-	PmcWait*	next;
+	PmcWait *next;
 };
 
-struct PmcCtr{
+struct PmcCtr {
 	int stale;
 	PmcWait *wq;
 	uint64_t ctr;
@@ -279,60 +264,59 @@ enum {
  *	stack	- acsyscall
  *	externup - externup()
  */
-struct Mach
-{
+struct Mach {
 	/* WARNING! Known to assembly! */
-	uintptr_t	self;			/* %gs:0 still gives us a Mach* */
-	uint64_t	splpc;			/* pc of last caller to splhi */
+	uintptr_t self; /* %gs:0 still gives us a Mach* */
+	uint64_t splpc; /* pc of last caller to splhi */
 
-	Proc*	proc;			/* current process on this processor */
-	uintptr_t	stack;		/* mach stack, kstack is in proc->kstack */
-	uintptr_t	rathole;	/* to save a reg in syscallentry */
-	Proc*	externup;		/* Forsyth recommends we replace the global up with this. */
+	Proc *proc;	   /* current process on this processor */
+	uintptr_t stack;   /* mach stack, kstack is in proc->kstack */
+	uintptr_t rathole; /* to save a reg in syscallentry */
+	Proc *externup;	   /* Forsyth recommends we replace the global up with this. */
 	/* end warning, I think */
 
-	int	machno;			/* physical id of processor */
+	int machno; /* physical id of processor */
 
-	int	apicno;
-	int	online;
+	int apicno;
+	int online;
 
 	MMMU MMU;
 
-	unsigned char*	vsvm;
-	void*	gdt;
-	void*	tss;
-
-	uint64_t	ticks;			/* of the clock since boot time */
-	Label	sched;			/* scheduler wakeup */
-	Lock	alarmlock;		/* access to alarm list */
-	void*	alarm;			/* alarms bound to this clock */
-	int	inclockintr;
-
-	Proc*	readied;		/* old runproc, only relevant if kernel booted with nosmp (-n append) */
-	uint64_t   schedticks;		/* next forced context switch, same as above */
-	uint64_t	qstart;			/* time when up started running */
-	int	qexpired;		/* quantum expired */
-
-	int	tlbfault;
-	int	tlbpurge;
-	int	pfault;
-	int	cs;
-	int	syscall;
-	int	intr;
-	int	mmuflush;		/* make current proc flush it's mmu state */
-	int	ilockdepth;
-	Perf	perf;			/* performance counters */
-	int	inidle;			/* profiling */
-	int	lastintr;
-
-	Lock	apictimerlock;
-	uint64_t	cyclefreq;		/* Frequency of user readable cycle counter */
-	int64_t	cpuhz;
-	int	cpumhz;
-	uint64_t	rdtsc;
-
-	Lock	pmclock;
-	PmcCtr	pmc[PmcMaxCtrs];
+	unsigned char *vsvm;
+	void *gdt;
+	void *tss;
+
+	uint64_t ticks; /* of the clock since boot time */
+	Label sched;	/* scheduler wakeup */
+	Lock alarmlock; /* access to alarm list */
+	void *alarm;	/* alarms bound to this clock */
+	int inclockintr;
+
+	Proc *readied;	     /* old runproc, only relevant if kernel booted with nosmp (-n append) */
+	uint64_t schedticks; /* next forced context switch, same as above */
+	uint64_t qstart;     /* time when up started running */
+	int qexpired;	     /* quantum expired */
+
+	int tlbfault;
+	int tlbpurge;
+	int pfault;
+	int cs;
+	int syscall;
+	int intr;
+	int mmuflush; /* make current proc flush it's mmu state */
+	int ilockdepth;
+	Perf perf;  /* performance counters */
+	int inidle; /* profiling */
+	int lastintr;
+
+	Lock apictimerlock;
+	uint64_t cyclefreq; /* Frequency of user readable cycle counter */
+	int64_t cpuhz;
+	int cpumhz;
+	uint64_t rdtsc;
+
+	Lock pmclock;
+	PmcCtr pmc[PmcMaxCtrs];
 
 	MFPU FPU;
 	MCPU CPU;
@@ -345,8 +329,7 @@ struct Mach
 };
 static_assert(sizeof(Mach) <= PGSZ, "Mach is too big");
 
-struct Stackframe
-{
+struct Stackframe {
 	Stackframe *next;
 	uintptr_t pc;
 };
@@ -368,37 +351,37 @@ struct Stackframe
 struct Sys {
 	alignas(4096) unsigned char machstk[MACHSTKSZ];
 
-	PTE	ipml4[PTSZ/sizeof(PTE)];	// Only used very early in boot
-	PTE	epml4[PTSZ/sizeof(PTE)];	// Only used for ...
-	PTE	epml3[PTSZ/sizeof(PTE)];	// ...BSP initialization...
-	PTE	epml2[PTSZ/sizeof(PTE)][4];	// ...and AP early boot.
-	PTE	pml4[PTSZ/sizeof(PTE)];		// Real PML4
-	PTE	pml3[((128+64)*PTSZ)/sizeof(PTE)];
+	PTE ipml4[PTSZ / sizeof(PTE)];		 // Only used very early in boot
+	PTE epml4[PTSZ / sizeof(PTE)];		 // Only used for ...
+	PTE epml3[PTSZ / sizeof(PTE)];		 // ...BSP initialization...
+	PTE epml2[PTSZ / sizeof(PTE)][4];	 // ...and AP early boot.
+	PTE pml4[PTSZ / sizeof(PTE)];		 // Real PML4
+	PTE pml3[((128 + 64) * PTSZ) / sizeof(PTE)];
 
-	unsigned char	vsvmpage[4*KiB];
+	unsigned char vsvmpage[4 * KiB];
 
-	alignas(4096)	Mach	mach;
+	alignas(4096) Mach mach;
 
-	alignas(4096)	Mach	*machptr[MACHMAX];
+	alignas(4096) Mach *machptr[MACHMAX];
 
-	uint64_t	pmstart;	/* physical memory */
-	uint64_t	pmend;		/* total span */
+	uint64_t pmstart; /* physical memory */
+	uint64_t pmend;	  /* total span */
 
-	uint64_t	epoch;		/* crude time synchronisation */
+	uint64_t epoch; /* crude time synchronisation */
 
-	int		nc[NIXROLES];	/* number of online processors */
-	int		nmach;
-	int		load;
-	uint64_t	ticks;		/* of the clock since boot time */
+	int nc[NIXROLES]; /* number of online processors */
+	int nmach;
+	int load;
+	uint64_t ticks; /* of the clock since boot time */
 
-	uint64_t	cyclefreq;	/* Frequency of user readable cycle counter (mach 0) */
+	uint64_t cyclefreq; /* Frequency of user readable cycle counter (mach 0) */
 
-	uint	pgszlg2[NPGSZ];		/* per Mach or per Sys? */
-	uint	pgszmask[NPGSZ];	/* Per sys -aki */
-	uint	pgsz[NPGSZ];
-	int	npgsz;
+	uint pgszlg2[NPGSZ];  /* per Mach or per Sys? */
+	uint pgszmask[NPGSZ]; /* Per sys -aki */
+	uint pgsz[NPGSZ];
+	int npgsz;
 };
-static_assert(sizeof(Sys) <= (1*MiB-1*KiB), "Sys is too big");
+static_assert(sizeof(Sys) <= (1 * MiB - 1 * KiB), "Sys is too big");
 
 extern Sys *const sys;
 #define MACHP(x) (sys->machptr[(x)])
@@ -409,13 +392,13 @@ extern Sys *const sys;
  * kernel is loaded, multiboot modules, etc.  Unused regions do not
  * appear in the map.
  */
-#define	PHYSADDRSIZE	(1ULL<<46)
+#define PHYSADDRSIZE (1ULL << 46)
 
 struct PAMap {
-	uintmem	addr;
-	usize	size;
-	int	type;
-	PAMap	*next;
+	uintmem addr;
+	usize size;
+	int type;
+	PAMap *next;
 };
 
 enum {
@@ -438,36 +421,36 @@ extern PAMap *pamap;
  * KMap
  */
 typedef void KMap;
-extern KMap* kmap(Page*);
+extern KMap *kmap(Page *);
 
 #define kunmap(k)
-#define VA(k)		PTR2UINT(k)
+#define VA(k) PTR2UINT(k)
 
 struct {
 	Lock l;
-	int	nonline;			/* # of active CPUs */
-	int nbooting;			/* # of CPUs waiting for the bTC to go */
-	int	exiting;			/* shutdown */
-	int	ispanic;			/* shutdown in response to a panic */
-	int	thunderbirdsarego;	/* lets the added processors continue */
-}active;
+	int nonline;	       /* # of active CPUs */
+	int nbooting;	       /* # of CPUs waiting for the bTC to go */
+	int exiting;	       /* shutdown */
+	int ispanic;	       /* shutdown in response to a panic */
+	int thunderbirdsarego; /* lets the added processors continue */
+} active;
 
 /*
  *  a parsed plan9.ini line
  */
-#define NISAOPT		8
+#define NISAOPT 8
 
 struct ISAConf {
-	char	*type;
-	uintptr_t	port;
-	int	irq;
-	uint32_t	dma;
-	uintptr_t	mem;
-	usize	size;
-	uint32_t	freq;
-
-	int	nopt;
-	char	*opt[NISAOPT];
+	char *type;
+	uintptr_t port;
+	int irq;
+	uint32_t dma;
+	uintptr_t mem;
+	usize size;
+	uint32_t freq;
+
+	int nopt;
+	char *opt[NISAOPT];
 };
 
 /*
@@ -478,7 +461,6 @@ struct ISAConf {
 
 extern char *rolename[];
 
-
 /*
  * Horrid.
  */
@@ -486,13 +468,17 @@ extern char *rolename[];
 // Talk to Ron before you condemn it.
 
 #ifdef _DBGC_
-#define DBGFLG		(dbgflg[_DBGC_])
+#define DBGFLG (dbgflg[_DBGC_])
 #else
-#define DBGFLG		(0)
+#define DBGFLG (0)
 #endif /* _DBGC_ */
 
-#define DBG(...)	do{if(DBGFLG)dbgprint(__VA_ARGS__);}while(0)
+#define DBG(...)                               \
+	do {                                   \
+		if(DBGFLG)                     \
+			dbgprint(__VA_ARGS__); \
+	} while(0)
 
 extern char dbgflg[256];
 
-#define dbgprint	print		/* for now */
+#define dbgprint print /* for now */

sys/src/9/amd64/deviig.c

@@ -18,7 +18,7 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
@@ -30,8 +30,8 @@ enum {
 };
 
 static Dirtab iigdir[] = {
-	{".",		{ Qdir, 0, QTDIR },	0,	0550},
-	{"iigctl",	{ Qiigctl, 0 },		0,	0660},
+	{".", {Qdir, 0, QTDIR}, 0, 0550},
+	{"iigctl", {Qiigctl, 0}, 0, 0660},
 };
 
 enum {
@@ -41,9 +41,9 @@ enum {
 };
 
 static Cmdtab iigctlmsg[] = {
-	{CMsize,	"size",		1},
-	{CMblank,	"blank",	1},
-	{CMunblank,	"unblank",	1},
+	{CMsize, "size", 1},
+	{CMblank, "blank", 1},
+	{CMunblank, "unblank", 1},
 };
 typedef struct Iig Iig;
 
@@ -56,7 +56,7 @@ static void
 iigreset(void)
 {
 	iig.scr.pci = pcimatch(nil, 0x8086, 0x0116);
-	if (iig.scr.pci)
+	if(iig.scr.pci)
 		print("Found sandybridge at 0x%x\n", iig.scr.pci->tbdf);
 	else {
 		print("NO sandybridge found\n");
@@ -68,46 +68,46 @@ iigreset(void)
 	 */
 	void *x = vmap(iig.scr.pci->mem[1].bar, iig.scr.pci->mem[1].size);
 	print("x is THIS! %p\n", x);
-	if (x) {
+	if(x){
 		iig.scr.vaddr = x;
 		iig.scr.paddr = iig.scr.pci->mem[1].bar;
 		iig.scr.apsize = iig.scr.pci->mem[1].size;
 	}
 }
 
-static Chan*
-iigattach(char* spec)
+static Chan *
+iigattach(char *spec)
 {
 	if(*spec && strcmp(spec, "0"))
 		error(Eio);
 	return devattach('G', spec);
 }
 
-Walkqid*
-iigwalk(Chan* c, Chan *nc, char** name, int nname)
+Walkqid *
+iigwalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	return devwalk(c, nc, name, nname, iigdir, nelem(iigdir), devgen);
 }
 
 static int
-iigstat(Chan* c, unsigned char* dp, int n)
+iigstat(Chan *c, unsigned char *dp, int n)
 {
 	return devstat(c, dp, n, iigdir, nelem(iigdir), devgen);
 }
 
-static Chan*
-iigopen(Chan* c, int omode)
+static Chan *
+iigopen(Chan *c, int omode)
 {
 	return devopen(c, omode, iigdir, nelem(iigdir), devgen);
 }
 
 static void
-iigclose(Chan* c)
+iigclose(Chan *c)
 {
 }
 
 static int32_t
-iigread(Chan* c, void* a, int32_t n, int64_t off)
+iigread(Chan *c, void *a, int32_t n, int64_t off)
 {
 
 	switch((uint32_t)c->qid.path){
@@ -147,7 +147,7 @@ iigctl(Cmdbuf *cb)
 }
 
 static int32_t
-iigwrite(Chan* c, void* a, int32_t n, int64_t off)
+iigwrite(Chan *c, void *a, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	Cmdbuf *cb;

sys/src/9/amd64/devpmc.c

@@ -11,17 +11,17 @@
  *  Performance counters
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-#include	"amd64.h"
-#include	"pmc.h"
-
-enum{
-	Qdir		= 0,
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+#include "amd64.h"
+#include "pmc.h"
+
+enum {
+	Qdir = 0,
 	Qgctl,
 	Qcore,
 
@@ -29,12 +29,12 @@ enum{
 	Qdata,
 	Qctl,
 
-	PmcCtlRdStr = 4*1024,
+	PmcCtlRdStr = 4 * 1024,
 };
 
-#define PMCTYPE(x)	(((uintptr_t)x)&0xffful)
-#define PMCID(x)	(((uintptr_t)x)>>12)
-#define PMCQID(i, t)	((((uintptr_t)i)<<12)|(t))
+#define PMCTYPE(x) (((uintptr_t)x) & 0xffful)
+#define PMCID(x) (((uintptr_t)x) >> 12)
+#define PMCQID(i, t) ((((uintptr_t)i) << 12) | (t))
 
 Dirtab *pmctab;
 static int npmctab;
@@ -50,23 +50,22 @@ topdirinit(int ncores)
 
 	ntoptab = 2 + ncores;
 	toptab = malloc(ntoptab * sizeof(Dirtab));
-	if (toptab == nil)
+	if(toptab == nil)
 		return;
 	d = toptab;
 	strncpy(d->name, ".", KNAMELEN);
 	mkqid(&d->qid, Qdir, 0, QTDIR);
-	d->perm = DMDIR|0555;
+	d->perm = DMDIR | 0555;
 	d++;
 	strncpy(d->name, "ctrdesc", KNAMELEN);
 	mkqid(&d->qid, Qgctl, 0, 0);
 	d->perm = 0444;
-	for (i = 2; i < ncores + 2; i++) {
+	for(i = 2; i < ncores + 2; i++){
 		d = &toptab[i];
 		snprint(d->name, KNAMELEN, "core%4.4u", i - 2);
 		mkqid(&d->qid, PMCQID(i - 2, Qcore), 0, QTDIR);
-		d->perm = DMDIR|0555;
+		d->perm = DMDIR | 0555;
 	}
-
 }
 
 static void
@@ -77,9 +76,9 @@ ctrdirinit(void)
 
 	nr = pmcnregs();
 
-	npmctab = 1 + 2*nr;
+	npmctab = 1 + 2 * nr;
 	pmctab = malloc(npmctab * sizeof(Dirtab));
-	if (pmctab == nil){
+	if(pmctab == nil){
 		free(toptab);
 		toptab = nil;
 		return;
@@ -88,8 +87,8 @@ ctrdirinit(void)
 	d = pmctab;
 	strncpy(d->name, ".", KNAMELEN);
 	mkqid(&d->qid, Qctr, 0, QTDIR);
-	d->perm = DMDIR|0555;
-	for (i = 1; i < nr + 1; i++) {
+	d->perm = DMDIR | 0555;
+	for(i = 1; i < nr + 1; i++){
 		d = &pmctab[i];
 		snprint(d->name, KNAMELEN, "ctr%2.2u", i - 1);
 		mkqid(&d->qid, PMCQID(i - 1, Qdata), 0, 0);
@@ -100,7 +99,6 @@ ctrdirinit(void)
 		mkqid(&d->qid, PMCQID(i - 1, Qctl), 0, 0);
 		d->perm = 0600;
 	}
-
 }
 
 static void
@@ -136,12 +134,12 @@ pmcinit(void)
 static Chan *
 pmcattach(char *spec)
 {
-	if (pmctab == nil)
+	if(pmctab == nil)
 		error(Enomem);
 	return devattach(L'ε', spec);
 }
 int
-pmcgen(Chan *c, char *name, Dirtab* dir, int j, int s, Dir *dp)
+pmcgen(Chan *c, char *name, Dirtab *dir, int j, int s, Dir *dp)
 {
 	int t, i, n;
 	Dirtab *l, *d;
@@ -158,7 +156,7 @@ pmcgen(Chan *c, char *name, Dirtab* dir, int j, int s, Dir *dp)
 	case Qctr:
 		return devgen(c, name, pmctab, npmctab, s, dp);
 	case Qcore:
-		c->aux = (void *)PMCID(c->qid.path);		/* core no */
+		c->aux = (void *)PMCID(c->qid.path); /* core no */
 		return devgen(c, name, pmctab, npmctab, s, dp);
 	default:
 		if(s != 0)
@@ -169,14 +167,14 @@ pmcgen(Chan *c, char *name, Dirtab* dir, int j, int s, Dir *dp)
 			i = t;
 			l = toptab;
 			n = ntoptab;
-		}else{
+		} else {
 			i = PMCID(t);
-			if (t == Qctl)
-				i += (npmctab - 1)/2;
+			if(t == Qctl)
+				i += (npmctab - 1) / 2;
 			l = pmctab;
 			n = npmctab;
 		}
-		if(i >=n)
+		if(i >= n)
 			return -1;
 
 		d = &l[i];
@@ -186,7 +184,7 @@ pmcgen(Chan *c, char *name, Dirtab* dir, int j, int s, Dir *dp)
 	}
 }
 
-static Walkqid*
+static Walkqid *
 pmcwalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	return devwalk(c, nc, name, nname, nil, 0, pmcgen);
@@ -198,10 +196,10 @@ pmcstat(Chan *c, uint8_t *dp, int32_t n)
 	return devstat(c, dp, n, nil, 0, pmcgen);
 }
 
-static Chan*
+static Chan *
 pmcopen(Chan *c, int omode)
 {
-	if (!iseve())
+	if(!iseve())
 		error(Eperm);
 	return devopen(c, omode, nil, 0, pmcgen);
 }
@@ -211,8 +209,6 @@ pmcclose(Chan *c)
 {
 }
 
-
-
 static int32_t
 pmcread(Chan *c, void *a, int32_t n, int64_t offset)
 {
@@ -246,13 +242,13 @@ pmcread(Chan *c, void *a, int32_t n, int64_t offset)
 		snprint(s, PmcCtlRdStr, "%#llx", v);
 		break;
 	case Qctl:
-		if (pmcgetctl(coreno, &p, id) < 0)
+		if(pmcgetctl(coreno, &p, id) < 0)
 			error("bad ctr");
-		if (pmcctlstr(s, PmcCtlRdStr, &p) < 0)
+		if(pmcctlstr(s, PmcCtlRdStr, &p) < 0)
 			error("bad pmc");
 		break;
 	case Qgctl:
-		if (pmcdescstr(s, PmcCtlRdStr) < 0)
+		if(pmcdescstr(s, PmcCtlRdStr) < 0)
 			error("bad pmc");
 		break;
 	default:
@@ -264,7 +260,7 @@ pmcread(Chan *c, void *a, int32_t n, int64_t offset)
 	return n;
 }
 
-enum{
+enum {
 	Enable,
 	Disable,
 	User,
@@ -276,15 +272,15 @@ enum{
 };
 
 static Cmdtab pmcctlmsg[] =
-{
-	{Enable,	"enable",	0},
-	{Disable,	"disable",	0},
-	{User,		"user",		0},
-	{Os,		"os",		0},
-	{NoUser,	"nouser",	0},
-	{NoOs,		"noos",		0},
-	{Reset,		"reset",	0},
-	{Debug, 	"debug",	0},
+	{
+		{Enable, "enable", 0},
+		{Disable, "disable", 0},
+		{User, "user", 0},
+		{Os, "os", 0},
+		{NoUser, "nouser", 0},
+		{NoOs, "noos", 0},
+		{Reset, "reset", 0},
+		{Debug, "debug", 0},
 };
 
 typedef void (*APfunc)(void);
@@ -331,7 +327,6 @@ acpmcsetctr(void)
 	return;
 }
 
-
 static int32_t
 pmcwrite(Chan *c, void *a, int32_t n, int64_t mm)
 {
@@ -339,17 +334,17 @@ pmcwrite(Chan *c, void *a, int32_t n, int64_t mm)
 	Cmdbuf *cb;
 	Cmdtab *ct;
 	uint32_t type;
-	char str[64];	/* 0x0000000000000000\0 */
+	char str[64]; /* 0x0000000000000000\0 */
 	AcPmcArg p;
 	AcCtrArg ctr;
 	uint64_t coreno;
 	Mach *mp;
 
-	if (c->qid.type == QTDIR)
+	if(c->qid.type == QTDIR)
 		error(Eperm);
-	if (c->qid.path == Qgctl)
+	if(c->qid.path == Qgctl)
 		error(Eperm);
-	if (n >= sizeof(str))
+	if(n >= sizeof(str))
 		error(Ebadctl);
 
 	pmcnull(&p.PmcCtl);
@@ -363,21 +358,20 @@ pmcwrite(Chan *c, void *a, int32_t n, int64_t mm)
 
 	ctr.coreno = coreno;
 	ctr.regno = p.regno;
-	if (type == Qdata) {
+	if(type == Qdata){
 		/* I am a handler for a proc in the core, run an RPC*/
-		if (mp != nil && mp->machno == coreno) {
-			if (runac(mp, acpmcsetctr, 0, &ctr, sizeof(AcCtrArg)) < 0)
+		if(mp != nil && mp->machno == coreno){
+			if(runac(mp, acpmcsetctr, 0, &ctr, sizeof(AcCtrArg)) < 0)
 				n = -1;
 		} else {
-		if (pmcsetctr(coreno, strtoull(str, 0, 0), p.regno) < 0)
-			n = -1;
+			if(pmcsetctr(coreno, strtoull(str, 0, 0), p.regno) < 0)
+				n = -1;
 		}
 		return n;
 	}
 
-
 	/* TODO: should iterate through multiple lines */
-	if (strncmp(str, "set ", 4) == 0){
+	if(strncmp(str, "set ", 4) == 0){
 		memmove(p.PmcCtl.descstr, (char *)str + 4, n - 4);
 		p.PmcCtl.descstr[n - 4] = '\0';
 		p.PmcCtl.nodesc = 0;
@@ -415,23 +409,22 @@ pmcwrite(Chan *c, void *a, int32_t n, int64_t mm)
 			break;
 		default:
 			cmderror(cb, "invalid ctl");
-		break;
+			break;
 		}
 		free(cb);
 		poperror();
 	}
 	/* I am a handler for a proc in the core, run an RPC*/
-	if (mp != nil && mp->machno == coreno) {
-		if (runac(mp, acpmcsetctl, 0, &p, sizeof(AcPmcArg)) < 0)
+	if(mp != nil && mp->machno == coreno){
+		if(runac(mp, acpmcsetctl, 0, &p, sizeof(AcPmcArg)) < 0)
 			n = -1;
 	} else {
-		if (pmcsetctl(coreno, &p.PmcCtl, p.regno) < 0)
+		if(pmcsetctl(coreno, &p.PmcCtl, p.regno) < 0)
 			n = -1;
 	}
 	return n;
 }
 
-
 Dev pmcdevtab = {
 	.dc = L'ε',
 	.name = "pmc",

sys/src/9/amd64/devusb.c

@@ -47,144 +47,142 @@
  * get in the way. Thus, code is probably easier the way it is.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"io.h"
-#include	"../port/error.h"
-#include	"../port/usb.h"
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+#include "../port/error.h"
+#include "../port/usb.h"
 
 typedef struct Hcitype Hcitype;
 
-enum
-{
+enum {
 	/* Qid numbers */
-	Qdir = 0,		/* #u */
-	Qusbdir,			/* #u/usb */
-	Qctl,			/* #u/usb/ctl - control requests */
+	Qdir = 0, /* #u */
+	Qusbdir,  /* #u/usb */
+	Qctl,	  /* #u/usb/ctl - control requests */
 
-	Qep0dir,			/* #u/usb/ep0.0 - endpoint 0 dir */
-	Qep0io,			/* #u/usb/ep0.0/data - endpoint 0 I/O */
-	Qep0ctl,		/* #u/usb/ep0.0/ctl - endpoint 0 ctl. */
-	Qep0dummy,		/* give 4 qids to each endpoint */
+	Qep0dir,   /* #u/usb/ep0.0 - endpoint 0 dir */
+	Qep0io,	   /* #u/usb/ep0.0/data - endpoint 0 I/O */
+	Qep0ctl,   /* #u/usb/ep0.0/ctl - endpoint 0 ctl. */
+	Qep0dummy, /* give 4 qids to each endpoint */
 
-	Qepdir = 0,		/* (qid-qep0dir)&3 is one of these */
-	Qepio,			/* to identify which file for the endpoint */
+	Qepdir = 0, /* (qid-qep0dir)&3 is one of these */
+	Qepio,	    /* to identify which file for the endpoint */
 	Qepctl,
 
 	/* ... */
 
 	/* Usb ctls. */
-	CMdebug = 0,		/* debug on|off */
-	CMdump,			/* dump (data structures for debug) */
+	CMdebug = 0, /* debug on|off */
+	CMdump,	     /* dump (data structures for debug) */
 
 	/* Ep. ctls */
-	CMnew = 0,		/* new nb ctl|bulk|intr|iso r|w|rw (endpoint) */
-	CMnewdev,		/* newdev full|low|high portnb (allocate new devices) */
-	CMhub,			/* hub (set the device as a hub) */
-	CMspeed,		/* speed full|low|high|no */
-	CMmaxpkt,		/* maxpkt size */
-	CMntds,			/* ntds nb (max nb. of tds per µframe) */
-	CMclrhalt,		/* clrhalt (halt was cleared on endpoint) */
-	CMpollival,		/* pollival interval (interrupt/iso) */
-	CMhz,			/* hz n (samples/sec; iso) */
-	CMsamplesz,		/* samplesz n (sample size; iso) */
-	CMinfo,			/* info infostr (ke.ep info for humans) */
-	CMdetach,		/* detach (abort I/O forever on this ep). */
-	CMaddress,		/* address (address is assigned) */
-	CMdebugep,		/* debug n (set/clear debug for this ep) */
-	CMname,			/* name str (show up as #u/name as well) */
-	CMtmout,		/* timeout n (activate timeouts for ep) */
-	CMpreset,		/* reset the port */
+	CMnew = 0,  /* new nb ctl|bulk|intr|iso r|w|rw (endpoint) */
+	CMnewdev,   /* newdev full|low|high portnb (allocate new devices) */
+	CMhub,	    /* hub (set the device as a hub) */
+	CMspeed,    /* speed full|low|high|no */
+	CMmaxpkt,   /* maxpkt size */
+	CMntds,	    /* ntds nb (max nb. of tds per µframe) */
+	CMclrhalt,  /* clrhalt (halt was cleared on endpoint) */
+	CMpollival, /* pollival interval (interrupt/iso) */
+	CMhz,	    /* hz n (samples/sec; iso) */
+	CMsamplesz, /* samplesz n (sample size; iso) */
+	CMinfo,	    /* info infostr (ke.ep info for humans) */
+	CMdetach,   /* detach (abort I/O forever on this ep). */
+	CMaddress,  /* address (address is assigned) */
+	CMdebugep,  /* debug n (set/clear debug for this ep) */
+	CMname,	    /* name str (show up as #u/name as well) */
+	CMtmout,    /* timeout n (activate timeouts for ep) */
+	CMpreset,   /* reset the port */
 
 	/* Hub feature selectors */
-	Rportenable	= 1,
-	Rportreset	= 4,
+	Rportenable = 1,
+	Rportreset = 4,
 
 };
 
-struct Hcitype
-{
-	char*	type;
-	int	(*reset)(Hci*);
+struct Hcitype {
+	char *type;
+	int (*reset)(Hci *);
 };
 
-#define QID(q)	((int)(q).path)
+#define QID(q) ((int)(q).path)
 
 static char Edetach[] = "device is detached";
 static char Enotconf[] = "endpoint not configured";
 char Estalled[] = "endpoint stalled";
 
 static Cmdtab usbctls[] =
-{
-	{CMdebug,	"debug",	2},
-	{CMdump,	"dump",		1},
+	{
+		{CMdebug, "debug", 2},
+		{CMdump, "dump", 1},
 };
 
 static Cmdtab epctls[] =
-{
-	{CMnew,		"new",		4},
-	{CMnewdev,	"newdev",	3},
-	{CMhub,		"hub",		1},
-	{CMspeed,	"speed",	2},
-	{CMmaxpkt,	"maxpkt",	2},
-	{CMntds,	"ntds",		2},
-	{CMpollival,	"pollival",	2},
-	{CMsamplesz,	"samplesz",	2},
-	{CMhz,		"hz",		2},
-	{CMinfo,	"info",		0},
-	{CMdetach,	"detach",	1},
-	{CMaddress,	"address",	1},
-	{CMdebugep,	"debug",	2},
-	{CMclrhalt,	"clrhalt",	1},
-	{CMname,	"name",		2},
-	{CMtmout,	"timeout",	2},
-	{CMpreset,	"reset",	1},
+	{
+		{CMnew, "new", 4},
+		{CMnewdev, "newdev", 3},
+		{CMhub, "hub", 1},
+		{CMspeed, "speed", 2},
+		{CMmaxpkt, "maxpkt", 2},
+		{CMntds, "ntds", 2},
+		{CMpollival, "pollival", 2},
+		{CMsamplesz, "samplesz", 2},
+		{CMhz, "hz", 2},
+		{CMinfo, "info", 0},
+		{CMdetach, "detach", 1},
+		{CMaddress, "address", 1},
+		{CMdebugep, "debug", 2},
+		{CMclrhalt, "clrhalt", 1},
+		{CMname, "name", 2},
+		{CMtmout, "timeout", 2},
+		{CMpreset, "reset", 1},
 };
 
 static Dirtab usbdir[] =
-{
-	{"ctl",		{Qctl},		0,	0666},
+	{
+		{"ctl", {Qctl}, 0, 0666},
 };
 
 char *usbmodename[] =
-{
-	[OREAD] = "r",
-	[OWRITE] = "w",
-	[ORDWR] = "rw",
+	{
+		[OREAD] = "r",
+		[OWRITE] = "w",
+		[ORDWR] = "rw",
 };
 
 static char *ttname[] =
-{
-	[Tnone] = "none",
-	[Tctl] = "control",
-	[Tiso] = "iso",
-	[Tintr] = "interrupt",
-	[Tbulk] = "bulk",
+	{
+		[Tnone] = "none",
+		[Tctl] = "control",
+		[Tiso] = "iso",
+		[Tintr] = "interrupt",
+		[Tbulk] = "bulk",
 };
 
 static char *spname[] =
-{
-	[Fullspeed] = "full",
-	[Lowspeed] = "low",
-	[Highspeed] = "high",
-	[Nospeed] = "no",
+	{
+		[Fullspeed] = "full",
+		[Lowspeed] = "low",
+		[Highspeed] = "high",
+		[Nospeed] = "no",
 };
 
-static int	debug;
-static Hcitype	hcitypes[Nhcis];
-static Hci*	hcis[Nhcis];
-static QLock	epslck;		/* add, del, lookup endpoints */
-static Ep*	eps[Neps];	/* all endpoints known */
-static int	epmax;		/* 1 + last endpoint index used  */
-static int	usbidgen;	/* device address generator */
+static int debug;
+static Hcitype hcitypes[Nhcis];
+static Hci *hcis[Nhcis];
+static QLock epslck;  /* add, del, lookup endpoints */
+static Ep *eps[Neps]; /* all endpoints known */
+static int epmax;     /* 1 + last endpoint index used  */
+static int usbidgen;  /* device address generator */
 
 /*
  * Is there something like this in a library? should it be?
  */
-char*
+char *
 seprintdata(char *s, char *se, unsigned char *d, int n)
 {
 	int i, l;
@@ -193,7 +191,7 @@ seprintdata(char *s, char *se, unsigned char *d, int n)
 	l = n;
 	if(l > 10)
 		l = 10;
-	for(i=0; i<l; i++)
+	for(i = 0; i < l; i++)
 		s = seprint(s, se, " %2.2x", d[i]);
 	if(l < n)
 		s = seprint(s, se, "...");
@@ -221,12 +219,12 @@ name2ttype(char *name)
 			return i;
 	/* may be a std. USB ep. type */
 	i = strtol(name, nil, 0);
-	switch(i+1){
+	switch(i + 1){
 	case Tctl:
 	case Tiso:
 	case Tbulk:
 	case Tintr:
-		return i+1;
+		return i + 1;
 	default:
 		return Tnone;
 	}
@@ -246,7 +244,7 @@ name2mode(char *mode)
 static int
 qid2epidx(int q)
 {
-	q = (q-Qep0dir)/4;
+	q = (q - Qep0dir) / 4;
 	if(q < 0 || q >= epmax || eps[q] == nil)
 		return -1;
 	return q;
@@ -262,7 +260,7 @@ isqtype(int q, int type)
 }
 
 void
-addhcitype(char* t, int (*r)(Hci*))
+addhcitype(char *t, int (*r)(Hci *))
 {
 	static int ntype;
 
@@ -273,11 +271,11 @@ addhcitype(char* t, int (*r)(Hci*))
 	ntype++;
 }
 
-static char*
+static char *
 seprintep(char *s, char *se, Ep *ep, int all)
 {
 	Proc *up = externup();
-	static char* dsnames[] = { "config", "enabled", "detached", "reset" };
+	static char *dsnames[] = {"config", "enabled", "detached", "reset"};
 	Udev *d;
 	int i;
 	int di;
@@ -332,7 +330,7 @@ seprintep(char *s, char *se, Ep *ep, int all)
 	return s;
 }
 
-static Ep*
+static Ep *
 epalloc(Hci *hp)
 {
 	Ep *ep;
@@ -352,7 +350,7 @@ epalloc(Hci *hp)
 	}
 	ep->idx = i;
 	if(epmax <= i)
-		epmax = i+1;
+		epmax = i + 1;
 	eps[i] = ep;
 	ep->hp = hp;
 	ep->maxpkt = 8;
@@ -362,7 +360,7 @@ epalloc(Hci *hp)
 	return ep;
 }
 
-static Ep*
+static Ep *
 getep(int i)
 {
 	Ep *ep;
@@ -387,7 +385,7 @@ putep(Ep *ep)
 		deprint("usb: ep%d.%d %#p released\n", d->nb, ep->nb, ep);
 		qlock(&epslck);
 		eps[ep->idx] = nil;
-		if(ep->idx == epmax-1)
+		if(ep->idx == epmax - 1)
 			epmax--;
 		if(ep == ep->ep0 && ep->dev != nil && ep->dev->nb == usbidgen)
 			usbidgen--;
@@ -420,7 +418,7 @@ dumpeps(void)
 	print("usb dump eps: epmax %d Neps %d (ref=1+ for dump):\n", epmax, Neps);
 	for(i = 0; i < epmax; i++){
 		s = buf;
-		e = buf+sizeof(buf);
+		e = buf + sizeof(buf);
 		ep = getep(i);
 		if(ep != nil){
 			if(waserror()){
@@ -458,7 +456,7 @@ newusbid(Hci *hci)
 /*
  * Create endpoint 0 for a new device
  */
-static Ep*
+static Ep *
 newdev(Hci *hp, int ishub, int isroot)
 {
 	Ep *ep;
@@ -476,9 +474,9 @@ newdev(Hci *hp, int ishub, int isroot)
 		d->speed = Highspeed;
 	else
 		d->speed = Fullspeed;
-	d->state = Dconfig;		/* address not yet set */
+	d->state = Dconfig; /* address not yet set */
 	ep->dev = d;
-	ep->ep0 = ep;			/* no ref counted here */
+	ep->ep0 = ep; /* no ref counted here */
 	ep->ttype = Tctl;
 	ep->tmout = Xfertmout;
 	ep->mode = ORDWR;
@@ -490,7 +488,7 @@ newdev(Hci *hp, int ishub, int isroot)
  * Create a new endpoint for the device
  * accessed via the given endpoint 0.
  */
-static Ep*
+static Ep *
 newdevep(Ep *ep, int i, int tt, int mode)
 {
 	Ep *nep;
@@ -534,13 +532,13 @@ epdataperm(int mode)
 
 	switch(mode){
 	case OREAD:
-		return 0440|DMEXCL;
+		return 0440 | DMEXCL;
 		break;
 	case OWRITE:
-		return 0220|DMEXCL;
+		return 0220 | DMEXCL;
 		break;
 	default:
-		return 0660|DMEXCL;
+		return 0660 | DMEXCL;
 	}
 }
 
@@ -556,25 +554,28 @@ usbgen(Chan *c, char *l, Dirtab *d, int n, int s, Dir *dp)
 	int nb;
 	int mode;
 
-	if(0)ddprint("usbgen q %#x s %d...", QID(c->qid), s);
+	if(0)
+		ddprint("usbgen q %#x s %d...", QID(c->qid), s);
 	if(s == DEVDOTDOT){
 		if(QID(c->qid) <= Qusbdir){
 			mkqid(&q, Qdir, 0, QTDIR);
 			devdir(c, q, "#u", 0, eve, 0555, dp);
-		}else{
+		} else {
 			mkqid(&q, Qusbdir, 0, QTDIR);
 			devdir(c, q, "usb", 0, eve, 0555, dp);
 		}
-		if(0)ddprint("ok\n");
+		if(0)
+			ddprint("ok\n");
 		return 1;
 	}
 
 	switch(QID(c->qid)){
-	case Qdir:				/* list #u */
+	case Qdir: /* list #u */
 		if(s == 0){
 			mkqid(&q, Qusbdir, 0, QTDIR);
 			devdir(c, q, "usb", 0, eve, 0555, dp);
-			if(0)ddprint("ok\n");
+			if(0)
+				ddprint("ok\n");
 			return 1;
 		}
 		s--;
@@ -584,27 +585,30 @@ usbgen(Chan *c, char *l, Dirtab *d, int n, int s, Dir *dp)
 		if(ep == nil || ep->name == nil){
 			if(ep != nil)
 				putep(ep);
-			if(0)ddprint("skip\n");
+			if(0)
+				ddprint("skip\n");
 			return 0;
 		}
 		if(waserror()){
 			putep(ep);
 			nexterror();
 		}
-		mkqid(&q, Qep0io+s*4, 0, QTFILE);
+		mkqid(&q, Qep0io + s * 4, 0, QTFILE);
 		devdir(c, q, ep->name, 0, eve, epdataperm(ep->mode), dp);
 		putep(ep);
 		poperror();
-		if(0)ddprint("ok\n");
+		if(0)
+			ddprint("ok\n");
 		return 1;
 
-	case Qusbdir:				/* list #u/usb */
+	case Qusbdir: /* list #u/usb */
 	Usbdir:
 		if(s < nelem(usbdir)){
 			dir = &usbdir[s];
 			mkqid(&q, dir->qid.path, 0, QTFILE);
 			devdir(c, q, dir->name, dir->length, eve, dir->perm, dp);
-			if(0)ddprint("ok\n");
+			if(0)
+				ddprint("ok\n");
 			return 1;
 		}
 		s -= nelem(usbdir);
@@ -612,27 +616,29 @@ usbgen(Chan *c, char *l, Dirtab *d, int n, int s, Dir *dp)
 			goto Fail;
 		ep = getep(s);
 		if(ep == nil){
-			if(0)ddprint("skip\n");
+			if(0)
+				ddprint("skip\n");
 			return 0;
 		}
 		if(waserror()){
 			putep(ep);
 			nexterror();
 		}
-		se = up->genbuf+sizeof(up->genbuf);
+		se = up->genbuf + sizeof(up->genbuf);
 		seprint(up->genbuf, se, "ep%d.%d", ep->dev->nb, ep->nb);
-		mkqid(&q, Qep0dir+4*s, 0, QTDIR);
+		mkqid(&q, Qep0dir + 4 * s, 0, QTDIR);
 		putep(ep);
 		poperror();
 		devdir(c, q, up->genbuf, 0, eve, 0755, dp);
-		if(0)ddprint("ok\n");
+		if(0)
+			ddprint("ok\n");
 		return 1;
 
 	case Qctl:
 		s = 0;
 		goto Usbdir;
 
-	default:				/* list #u/usb/epN.M */
+	default: /* list #u/usb/epN.M */
 		nb = qid2epidx(QID(c->qid));
 		ep = getep(nb);
 		if(ep == nil)
@@ -643,39 +649,41 @@ usbgen(Chan *c, char *l, Dirtab *d, int n, int s, Dir *dp)
 		Epdir:
 			switch(s){
 			case 0:
-				mkqid(&q, Qep0io+nb*4, 0, QTFILE);
+				mkqid(&q, Qep0io + nb * 4, 0, QTFILE);
 				perm = epdataperm(mode);
 				devdir(c, q, "data", 0, eve, perm, dp);
 				break;
 			case 1:
-				mkqid(&q, Qep0ctl+nb*4, 0, QTFILE);
+				mkqid(&q, Qep0ctl + nb * 4, 0, QTFILE);
 				devdir(c, q, "ctl", 0, eve, 0664, dp);
 				break;
 			default:
 				goto Fail;
 			}
-		}else if(isqtype(QID(c->qid), Qepctl)){
+		} else if(isqtype(QID(c->qid), Qepctl)){
 			s = 1;
 			goto Epdir;
-		}else{
+		} else {
 			s = 0;
 			goto Epdir;
 		}
-		if(0)ddprint("ok\n");
+		if(0)
+			ddprint("ok\n");
 		return 1;
 	}
 Fail:
-	if(0)ddprint("fail\n");
+	if(0)
+		ddprint("fail\n");
 	return -1;
 }
 
-static Hci*
+static Hci *
 hciprobe(int cardno, int ctlrno)
 {
 	Hci *hp;
 	char *type;
 	char name[64];
-	static int epnb = 1;	/* guess the endpoint nb. for the controller */
+	static int epnb = 1; /* guess the endpoint nb. for the controller */
 
 	ddprint("hciprobe %d %d\n", cardno, ctlrno);
 	hp = smalloc(sizeof(Hci));
@@ -691,7 +699,7 @@ hciprobe(int cardno, int ctlrno)
 			if(hcitypes[cardno].type == nil)
 				break;
 			type = hp->ISAConf.type;
-			if(type==nil || *type==0)
+			if(type == nil || *type == 0)
 				type = "uhci";
 			if(cistrcmp(hcitypes[cardno].type, type) == 0)
 				break;
@@ -723,7 +731,7 @@ hciprobe(int cardno, int ctlrno)
 	 * the console.
 	 */
 	dprint("#u/usb/ep%d.0: %s: port 0x%lX irq %d\n",
-		epnb, hcitypes[cardno].type, hp->ISAConf.port, hp->ISAConf.irq);
+	       epnb, hcitypes[cardno].type, hp->ISAConf.port, hp->ISAConf.irq);
 	epnb++;
 	return hp;
 }
@@ -743,13 +751,13 @@ usbreset(void)
 	while(cardno < Nhcis && ctlrno < Nhcis && hcitypes[cardno].type != nil)
 		if(hcis[ctlrno] != nil)
 			ctlrno++;
-		else{
+		else {
 			hp = hciprobe(cardno, ctlrno);
 			if(hp == nil)
 				cardno++;
 			hcis[ctlrno++] = hp;
 		}
-	if(hcis[Nhcis-1] != nil)
+	if(hcis[Nhcis - 1] != nil)
 		print("usbreset: bug: Nhcis (%d) too small\n", Nhcis);
 }
 
@@ -767,8 +775,8 @@ usbinit(void)
 		if(hp != nil){
 			if(hp->Hciimpl.init != nil)
 				hp->Hciimpl.init(hp);
-			d = newdev(hp, 1, 1);		/* new root hub */
-			d->dev->state = Denabled;	/* although addr == 0 */
+			d = newdev(hp, 1, 1);	  /* new root hub */
+			d->dev->state = Denabled; /* although addr == 0 */
 			d->maxpkt = 64;
 			snprint(info, sizeof(info), "ports %d", hp->nports);
 			kstrdup(&d->info, info);
@@ -776,13 +784,13 @@ usbinit(void)
 	}
 }
 
-static Chan*
+static Chan *
 usbattach(char *spec)
 {
 	return devattach(L'u', spec);
 }
 
-static Walkqid*
+static Walkqid *
 usbwalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	return devwalk(c, nc, name, nname, nil, 0, usbgen);
@@ -805,7 +813,8 @@ usbstat(Chan *c, unsigned char *db, int n)
 static uint32_t
 usbload(int speed, int maxpkt)
 {
-	enum{ Hostns = 1000, Hubns = 333 };
+	enum { Hostns = 1000,
+	       Hubns = 333 };
 	uint32_t l;
 	uint32_t bs;
 
@@ -813,7 +822,7 @@ usbload(int speed, int maxpkt)
 	bs = 10UL * maxpkt;
 	switch(speed){
 	case Highspeed:
-		l = 55*8*2 + 2 * (3 + bs) + Hostns;
+		l = 55 * 8 * 2 + 2 * (3 + bs) + Hostns;
 		break;
 	case Fullspeed:
 		l = 9107 + 84 * (4 + bs) + Hostns;
@@ -825,10 +834,10 @@ usbload(int speed, int maxpkt)
 		print("usbload: bad speed %d\n", speed);
 		/* let it run */
 	}
-	return l / 1000UL;	/* in µs */
+	return l / 1000UL; /* in µs */
 }
 
-static Chan*
+static Chan *
 usbopen(Chan *c, int omode)
 {
 	Proc *up = externup();
@@ -875,13 +884,13 @@ usbopen(Chan *c, int omode)
 		ep->load = usbload(ep->dev->speed, ep->maxpkt);
 	ep->hp->Hciimpl.epopen(ep);
 
-	poperror();	/* ep->inuse */
-	poperror();	/* don't putep(): ref kept for fid using the ep. */
+	poperror(); /* ep->inuse */
+	poperror(); /* don't putep(): ref kept for fid using the ep. */
 
 	c->mode = mode;
 	c->flag |= COPEN;
 	c->offset = 0;
-	c->aux = nil;	/* paranoia */
+	c->aux = nil; /* paranoia */
 	return c;
 }
 
@@ -925,7 +934,7 @@ usbclose(Chan *c)
 		free(c->aux);
 		c->aux = nil;
 		epclose(ep);
-		putep(ep);	/* release ref kept since usbopen */
+		putep(ep); /* release ref kept since usbopen */
 		c->flag &= ~COPEN;
 	}
 	poperror();
@@ -964,7 +973,7 @@ ctlread(Chan *c, void *a, int32_t n, int64_t offset)
 			}
 			putep(ep);
 		}
-	else{
+	else {
 		ep = getep(qid2epidx(q));
 		if(ep == nil)
 			error(Eio);
@@ -979,7 +988,7 @@ ctlread(Chan *c, void *a, int32_t n, int64_t offset)
 			strecpy(s, se, c->aux);
 			free(c->aux);
 			c->aux = nil;
-		}else
+		} else
 			seprintep(s, se, ep, 0);
 		poperror();
 		putep(ep);
@@ -1025,12 +1034,12 @@ rhubwrite(Ep *ep, void *a, int32_t n)
 		error("root hub is a toy hub");
 	ep->rhrepl = -1;
 	s = a;
-	if(s[Rtype] != (Rh2d|Rclass|Rother) && s[Rtype] != (Rd2h|Rclass|Rother))
+	if(s[Rtype] != (Rh2d | Rclass | Rother) && s[Rtype] != (Rd2h | Rclass | Rother))
 		error("root hub is a toy hub");
 	hp = ep->hp;
 	cmd = s[Rreq];
-	feature = GET2(s+Rvalue);
-	port = GET2(s+Rindex);
+	feature = GET2(s + Rvalue);
+	port = GET2(s + Rindex);
 	if(port < 1 || port > hp->nports)
 		error("bad hub port number");
 	switch(feature){
@@ -1087,7 +1096,7 @@ usbread(Chan *c, void *a, int32_t n, int64_t offset)
 		}
 		/* else fall */
 	default:
-		ddeprint("\nusbread q %#x fid %d cnt %ld off %lld\n",q,c->fid,n,offset);
+		ddeprint("\nusbread q %#x fid %d cnt %ld off %lld\n", q, c->fid, n, offset);
 		n = ep->hp->Hciimpl.epread(ep, a, n);
 		break;
 	}
@@ -1103,9 +1112,9 @@ pow2(int n)
 }
 
 static void
-setmaxpkt(Ep *ep, char* s)
+setmaxpkt(Ep *ep, char *s)
 {
-	int32_t spp;	/* samples per packet */
+	int32_t spp; /* samples per packet */
 
 	if(ep->dev->speed == Highspeed)
 		spp = (ep->hz * ep->pollival * ep->ntds + 7999) / 8000;
@@ -1113,7 +1122,8 @@ setmaxpkt(Ep *ep, char* s)
 		spp = (ep->hz * ep->pollival + 999) / 1000;
 	ep->maxpkt = spp * ep->samplesz;
 	deprint("usb: %s: setmaxpkt: hz %ld poll %ld"
-		" ntds %d %s speed -> spp %ld maxpkt %ld\n", s,
+		" ntds %d %s speed -> spp %ld maxpkt %ld\n",
+		s,
 		ep->hz, ep->pollival, ep->ntds, spname[ep->dev->speed],
 		spp, ep->maxpkt);
 	if(ep->maxpkt > 1024){
@@ -1179,8 +1189,8 @@ epctl(Ep *ep, Chan *c, void *a, int32_t n)
 			error("speed must be full|low|high");
 		nep = newdev(ep->hp, 0, 0);
 		nep->dev->speed = l;
-		if(nep->dev->speed  != Lowspeed)
-			nep->maxpkt = 64;	/* assume full speed */
+		if(nep->dev->speed != Lowspeed)
+			nep->maxpkt = 64; /* assume full speed */
 		nep->dev->hub = d->nb;
 		nep->dev->port = atoi(cb->f[2]);
 		/* next read request will read
@@ -1188,7 +1198,7 @@ epctl(Ep *ep, Chan *c, void *a, int32_t n)
 		 */
 		l = sizeof(up->genbuf);
 		snprint(up->genbuf, l, "ep%d.%d", nep->dev->nb, nep->nb);
-		kstrdup((char**)&c->aux, up->genbuf);
+		kstrdup((char **)&c->aux, up->genbuf);
 		break;
 	case CMhub:
 		deprint("usb epctl %s\n", cb->f[0]);
@@ -1230,10 +1240,9 @@ epctl(Ep *ep, Chan *c, void *a, int32_t n)
 		   (ep->ttype == Tintr && ep->dev->speed == Highspeed)){
 			if(l < 1 || l > 16)
 				error("pollival power not in [1:16]");
-			l = pow2(l-1);
-		}else
-			if(l < 1 || l > 255)
-				error("pollival not in [1:255]");
+			l = pow2(l - 1);
+		} else if(l < 1 || l > 255)
+			error("pollival not in [1:255]");
 		qlock(&ep->ql);
 		ep->pollival = l;
 		if(ep->ttype == Tiso)
@@ -1274,15 +1283,15 @@ epctl(Ep *ep, Chan *c, void *a, int32_t n)
 		deprint("usb epctl %s\n", cb->f[0]);
 		l = strlen(Info);
 		s = a;
-		if(n < l+2 || strncmp(Info, s, l) != 0)
+		if(n < l + 2 || strncmp(Info, s, l) != 0)
 			error(Ebadctl);
 		if(n > 1024)
 			n = 1024;
 		b = smalloc(n);
-		memmove(b, s+l, n-l);
-		b[n-l] = 0;
-		if(b[n-l-1] == '\n')
-			b[n-l-1] = 0;
+		memmove(b, s + l, n - l);
+		b[n - l] = 0;
+		if(b[n - l - 1] == '\n')
+			b[n - l - 1] = 0;
 		qlock(&ep->ql);
 		free(ep->info);
 		ep->info = b;
@@ -1310,7 +1319,7 @@ epctl(Ep *ep, Chan *c, void *a, int32_t n)
 		else
 			ep->debug = strtoul(cb->f[1], nil, 0);
 		print("usb: ep%d.%d debug %d\n",
-			ep->dev->nb, ep->nb, ep->debug);
+		      ep->dev->nb, ep->nb, ep->debug);
 		break;
 	case CMname:
 		deprint("usb epctl %s %s\n", cb->f[0], cb->f[1]);
@@ -1451,7 +1460,7 @@ usbwrite(Chan *c, void *a, int32_t n, int64_t off)
 		}
 		/* else fall */
 	default:
-		ddeprint("\nusbwrite q %#x fid %d cnt %ld off %lld\n",q, c->fid, n, off);
+		ddeprint("\nusbwrite q %#x fid %d cnt %ld off %lld\n", q, c->fid, n, off);
 		ep->hp->Hciimpl.epwrite(ep, a, n);
 	}
 	putep(ep);

sys/src/9/amd64/devvga.c

@@ -18,7 +18,7 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
@@ -33,11 +33,11 @@ enum {
 };
 
 static Dirtab vgadir[] = {
-	{".",	{ Qdir, 0, QTDIR },		0,	0550},
-	{"vgabios",	{ Qvgabios, 0 },	0x100000, 0440},
-	{"vgactl",		{ Qvgactl, 0 },		0,	0660},
-	{"vgaovl",		{ Qvgaovl, 0 },		0,	0660},
-	{"vgaovlctl",	{ Qvgaovlctl, 0 },	0, 	0660},
+	{".", {Qdir, 0, QTDIR}, 0, 0550},
+	{"vgabios", {Qvgabios, 0}, 0x100000, 0440},
+	{"vgactl", {Qvgactl, 0}, 0, 0660},
+	{"vgaovl", {Qvgaovl, 0}, 0, 0660},
+	{"vgaovlctl", {Qvgaovlctl, 0}, 0, 0660},
 };
 
 enum {
@@ -58,20 +58,20 @@ enum {
 };
 
 static Cmdtab vgactlmsg[] = {
-	{CMactualsize,		"actualsize",	2},
-	{CMblank,		"blank",	1},
-	{CMblanktime,		"blanktime",	2},
-	{CMdrawinit,		"drawinit",	1},
-	{CMhwaccel,		"hwaccel",	2},
-	{CMhwblank,		"hwblank",	2},
-	{CMhwgc,		"hwgc",		2},
-	{CMlinear,		"linear",	0},
-	{CMpalettedepth,	"palettedepth",	2},
-	{CMpanning,		"panning",	2},
-	{CMsize,		"size",		3},
-	{CMtextmode,		"textmode",	1},
-	{CMtype,		"type",		2},
-	{CMunblank,		"unblank",	1},
+	{CMactualsize, "actualsize", 2},
+	{CMblank, "blank", 1},
+	{CMblanktime, "blanktime", 2},
+	{CMdrawinit, "drawinit", 1},
+	{CMhwaccel, "hwaccel", 2},
+	{CMhwblank, "hwblank", 2},
+	{CMhwgc, "hwgc", 2},
+	{CMlinear, "linear", 0},
+	{CMpalettedepth, "palettedepth", 2},
+	{CMpanning, "panning", 2},
+	{CMsize, "size", 3},
+	{CMtextmode, "textmode", 1},
+	{CMtype, "type", 2},
+	{CMunblank, "unblank", 1},
 };
 
 static long
@@ -82,22 +82,22 @@ rmemrw(int isr, void *a, long n, int64_t off)
 	if(isr){
 		if(off >= MB)
 			return 0;
-		if(off+n >= MB)
+		if(off + n >= MB)
 			n = MB - off;
 		memmove(a, KADDR((uintptr_t)off), n);
-	}else{
+	} else {
 		/* realmode buf page ok, allow vga framebuf's access */
 		if(off >= MB)
 			error("Offset > MB");
-		if (off+n > MB)
+		if(off + n > MB)
 			error("off+n > MB");
-		if (off < LORMBUF)
+		if(off < LORMBUF)
 			error("off < LORMBUF");
-		if (off+n > LORMBUF+PGSZ)
+		if(off + n > LORMBUF + PGSZ)
 			error("off+n > LORMBUF+BY2PG");
-		if (off < 0xA0000)
+		if(off < 0xA0000)
 			error("off < 0xa0000");
-		if (off+n > 0xB0000+0x10000)
+		if(off + n > 0xB0000 + 0x10000)
 			error("off+n > 0xb0000+0x10000");
 		memmove(KADDR((uintptr_t)off), a, n);
 	}
@@ -105,13 +105,13 @@ rmemrw(int isr, void *a, long n, int64_t off)
 }
 
 static int32_t
-rmemread(Chan*_, void *a, int32_t n, int64_t off)
+rmemread(Chan *_, void *a, int32_t n, int64_t off)
 {
 	return rmemrw(1, a, n, off);
 }
 
 static int32_t
-rmemwrite(Chan*_, void *a, int32_t n, int64_t off)
+rmemwrite(Chan *_, void *a, int32_t n, int64_t off)
 {
 	return rmemrw(0, a, n, off);
 }
@@ -120,42 +120,42 @@ static void
 vgareset(void)
 {
 	/* reserve the 'standard' vga registers */
-	if(ioalloc(0x2b0, 0x2df-0x2b0+1, 0, "vga") < 0)
+	if(ioalloc(0x2b0, 0x2df - 0x2b0 + 1, 0, "vga") < 0)
 		panic("vga ports already allocated");
-	if(ioalloc(0x3c0, 0x3da-0x3c0+1, 0, "vga") < 0)
+	if(ioalloc(0x3c0, 0x3da - 0x3c0 + 1, 0, "vga") < 0)
 		panic("vga ports already allocated");
 	addarchfile("realmodemem", 0660, rmemread, rmemwrite);
 }
 
-static Chan*
-vgaattach(char* spec)
+static Chan *
+vgaattach(char *spec)
 {
 	if(*spec && strcmp(spec, "0"))
 		error(Eio);
 	return devattach('v', spec);
 }
 
-Walkqid*
-vgawalk(Chan* c, Chan *nc, char** name, int nname)
+Walkqid *
+vgawalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	return devwalk(c, nc, name, nname, vgadir, nelem(vgadir), devgen);
 }
 
 static int
-vgastat(Chan* c, unsigned char* dp, int n)
+vgastat(Chan *c, unsigned char *dp, int n)
 {
 	return devstat(c, dp, n, vgadir, nelem(vgadir), devgen);
 }
 
-static Chan*
-vgaopen(Chan* c, int omode)
+static Chan *
+vgaopen(Chan *c, int omode)
 {
 	VGAscr *scr;
 	static char *openctl = "openctl\n";
 
 	scr = &vgascreen[0];
-	if ((uint32_t)c->qid.path == Qvgaovlctl) {
-		if (scr->dev && scr->dev->ovlctl)
+	if((uint32_t)c->qid.path == Qvgaovlctl){
+		if(scr->dev && scr->dev->ovlctl)
 			scr->dev->ovlctl(scr, c, openctl, strlen(openctl));
 		else
 			error(Enonexist);
@@ -164,7 +164,7 @@ vgaopen(Chan* c, int omode)
 }
 
 static void
-vgaclose(Chan* c)
+vgaclose(Chan *c)
 {
 	Proc *up = externup();
 	VGAscr *scr;
@@ -183,7 +183,7 @@ vgaclose(Chan* c)
 }
 
 static int32_t
-vgaread(Chan* c, void* a, int32_t n, int64_t off)
+vgaread(Chan *c, void *a, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	int len;
@@ -200,9 +200,9 @@ vgaread(Chan* c, void* a, int32_t n, int64_t off)
 	case Qvgabios:
 		if(offset >= 0x100000)
 			return 0;
-		if(offset+n >= 0x100000)
+		if(offset + n >= 0x100000)
 			n = 0x100000 - offset;
-		memmove(a, (unsigned char*)KADDR(0)+offset, n);
+		memmove(a, (unsigned char *)KADDR(0) + offset, n);
 		return n;
 
 	case Qvgactl:
@@ -222,25 +222,24 @@ vgaread(Chan* c, void* a, int32_t n, int64_t off)
 			s = scr->dev->name;
 		else
 			s = "cga";
-		len += snprint(p+len, READSTR-len, "type %s\n", s);
+		len += snprint(p + len, READSTR - len, "type %s\n", s);
 
-		if(scr->gscreen) {
-			len += snprint(p+len, READSTR-len, "size %dx%dx%d %s\n",
-				scr->gscreen->r.max.x, scr->gscreen->r.max.y,
-				scr->gscreen->depth, chantostr(chbuf, scr->gscreen->chan));
+		if(scr->gscreen){
+			len += snprint(p + len, READSTR - len, "size %dx%dx%d %s\n",
+				       scr->gscreen->r.max.x, scr->gscreen->r.max.y,
+				       scr->gscreen->depth, chantostr(chbuf, scr->gscreen->chan));
 
-			if(Dx(scr->gscreen->r) != Dx(physgscreenr)
-			|| Dy(scr->gscreen->r) != Dy(physgscreenr))
-				len += snprint(p+len, READSTR-len, "actualsize %dx%d\n",
-					physgscreenr.max.x, physgscreenr.max.y);
+			if(Dx(scr->gscreen->r) != Dx(physgscreenr) || Dy(scr->gscreen->r) != Dy(physgscreenr))
+				len += snprint(p + len, READSTR - len, "actualsize %dx%d\n",
+					       physgscreenr.max.x, physgscreenr.max.y);
 		}
 
-		len += snprint(p+len, READSTR-len, "blank time %lu idle %d state %s\n",
-			blanktime, drawidletime(), scr->isblank ? "off" : "on");
-		len += snprint(p+len, READSTR-len, "hwaccel %s\n", hwaccel ? "on" : "off");
-		len += snprint(p+len, READSTR-len, "hwblank %s\n", hwblank ? "on" : "off");
-		len += snprint(p+len, READSTR-len, "panning %s\n", panning ? "on" : "off");
-		len += snprint(p+len, READSTR-len, "addr p 0x%lx v 0x%p size 0x%x\n", scr->paddr, scr->vaddr, scr->apsize);
+		len += snprint(p + len, READSTR - len, "blank time %lu idle %d state %s\n",
+			       blanktime, drawidletime(), scr->isblank ? "off" : "on");
+		len += snprint(p + len, READSTR - len, "hwaccel %s\n", hwaccel ? "on" : "off");
+		len += snprint(p + len, READSTR - len, "hwblank %s\n", hwblank ? "on" : "off");
+		len += snprint(p + len, READSTR - len, "panning %s\n", panning ? "on" : "off");
+		len += snprint(p + len, READSTR - len, "addr p 0x%lx v 0x%p size 0x%x\n", scr->paddr, scr->vaddr, scr->apsize);
 		USED(len);
 
 		n = readstr(offset, a, n, p);
@@ -377,7 +376,7 @@ vgactl(Cmdbuf *cb)
 		if(x > scr->gscreen->r.max.x || y > scr->gscreen->r.max.y)
 			error("physical screen bigger than virtual");
 
-		physgscreenr = Rect(0,0,x,y);
+		physgscreenr = Rect(0, 0, x, y);
 		scr->gscreen->clipr = physgscreenr;
 		return;
 
@@ -397,7 +396,7 @@ vgactl(Cmdbuf *cb)
 		return;
 
 	case CMlinear:
-		if(cb->nf!=2 && cb->nf!=3)
+		if(cb->nf != 2 && cb->nf != 3)
 			error(Ebadarg);
 		size = strtoul(cb->f[1], 0, 0);
 		if(cb->nf == 2)
@@ -407,7 +406,7 @@ vgactl(Cmdbuf *cb)
 		if(screenaperture(size, align) < 0)
 			error("not enough free address space");
 		return;
-/*
+		/*
 	case CMmemset:
 		memset((void*)strtoul(cb->f[1], 0, 0), atoi(cb->f[2]), atoi(cb->f[3]));
 		return;
@@ -433,11 +432,10 @@ vgactl(Cmdbuf *cb)
 				error("panning not supported");
 			scr->gscreen->clipr = scr->gscreen->r;
 			panning = 1;
-		}
-		else if(strcmp(cb->f[1], "off") == 0){
+		} else if(strcmp(cb->f[1], "off") == 0){
 			scr->gscreen->clipr = physgscreenr;
 			panning = 0;
-		}else
+		} else
 			break;
 		return;
 
@@ -466,7 +464,7 @@ vgactl(Cmdbuf *cb)
 char Enooverlay[] = "No overlay support";
 
 static int32_t
-vgawrite(Chan* c, void* a, int32_t n, int64_t off)
+vgawrite(Chan *c, void *a, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	uint32_t offset = off;
@@ -493,7 +491,7 @@ vgawrite(Chan* c, void* a, int32_t n, int64_t off)
 
 	case Qvgaovl:
 		scr = &vgascreen[0];
-		if (scr->dev == nil || scr->dev->ovlwrite == nil) {
+		if(scr->dev == nil || scr->dev->ovlwrite == nil){
 			error(Enooverlay);
 			break;
 		}
@@ -501,7 +499,7 @@ vgawrite(Chan* c, void* a, int32_t n, int64_t off)
 
 	case Qvgaovlctl:
 		scr = &vgascreen[0];
-		if (scr->dev == nil || scr->dev->ovlctl == nil) {
+		if(scr->dev == nil || scr->dev->ovlctl == nil){
 			error(Enooverlay);
 			break;
 		}

sys/src/9/amd64/ether.c

@@ -18,7 +18,7 @@
 
 #include "etherif.h"
 
-Ether*
+Ether *
 archetherprobe(int ctlrno, char *type, int (*reset)(Ether *))
 {
 	int i, j;
@@ -36,7 +36,7 @@ archetherprobe(int ctlrno, char *type, int (*reset)(Ether *))
 	ether->Netif.mtu = ETHERMAXTU;
 	ether->Netif.maxmtu = ETHERMAXTU;
 
-	if (reset(ether) < 0)
+	if(reset(ether) < 0)
 		return nil;
 
 	/*
@@ -55,15 +55,15 @@ archetherprobe(int ctlrno, char *type, int (*reset)(Ether *))
 		intrenable(ether->ISAConf.irq, ether->interrupt, ether, ether->tbdf, name);
 
 	i = sprint(buf, "#l%d: %s: %dMbps port %#p irq %d tu %d",
-		ctlrno, type, ether->Netif.mbps, ether->ISAConf.port, ether->ISAConf.irq, ether->Netif.mtu);
+		   ctlrno, type, ether->Netif.mbps, ether->ISAConf.port, ether->ISAConf.irq, ether->Netif.mtu);
 	if(ether->ISAConf.mem)
-		i += sprint(buf+i, " addr %#p", ether->ISAConf.mem);
+		i += sprint(buf + i, " addr %#p", ether->ISAConf.mem);
 	if(ether->ISAConf.size)
-		i += sprint(buf+i, " size 0x%lX", ether->ISAConf.size);
-	i += sprint(buf+i, ": %2.2x%2.2x%2.2x%2.2x%2.2x%2.2x",
-		ether->ea[0], ether->ea[1], ether->ea[2],
-		ether->ea[3], ether->ea[4], ether->ea[5]);
-	sprint(buf+i, "\n");
+		i += sprint(buf + i, " size 0x%lX", ether->ISAConf.size);
+	i += sprint(buf + i, ": %2.2x%2.2x%2.2x%2.2x%2.2x%2.2x",
+		    ether->ea[0], ether->ea[1], ether->ea[2],
+		    ether->ea[3], ether->ea[4], ether->ea[5]);
+	sprint(buf + i, "\n");
 	print(buf);
 
 	j = ether->Netif.mbps;
@@ -71,7 +71,7 @@ archetherprobe(int ctlrno, char *type, int (*reset)(Ether *))
 		j *= 10;
 	for(i = 0; j >= 100; i++)
 		j /= 10;
-	i = (128<<i)*1024;
+	i = (128 << i) * 1024;
 	netifinit(&ether->Netif, name, Ntypes, i);
 	if(ether->oq == 0)
 		ether->oq = qopen(i, Qmsg, 0, 0);
@@ -88,6 +88,6 @@ void
 archethershutdown(Ether *ether)
 {
 	if(ether->ISAConf.irq >= 0){
-	//	intrdisable(ether->irq, ether->interrupt, ether, ether->tbdf, name);
+		//	intrdisable(ether->irq, ether->interrupt, ether, ether->tbdf, name);
 	}
 }

sys/src/9/amd64/ether8139.c

@@ -23,218 +23,218 @@
 
 #include "etherif.h"
 
-enum {					/* registers */
-	Idr0		= 0x0000,	/* MAC address */
-	Mar0		= 0x0008,	/* Multicast address */
-	Tsd0		= 0x0010,	/* Transmit Status Descriptor0 */
-	Tsad0		= 0x0020,	/* Transmit Start Address Descriptor0 */
-	Rbstart		= 0x0030,	/* Receive Buffer Start Address */
-	Erbcr		= 0x0034,	/* Early Receive Byte Count */
-	Ersr		= 0x0036,	/* Early Receive Status */
-	Cr		= 0x0037,	/* Command Register */
-	Capr		= 0x0038,	/* Current Address of Packet Read */
-	Cbr		= 0x003A,	/* Current Buffer Address */
-	Imr		= 0x003C,	/* Interrupt Mask */
-	Isr		= 0x003E,	/* Interrupt Status */
-	Tcr		= 0x0040,	/* Transmit Configuration */
-	Rcr		= 0x0044,	/* Receive Configuration */
-	Tctr		= 0x0048,	/* Timer Count */
-	Mpc		= 0x004C,	/* Missed Packet Counter */
-	Cr9346		= 0x0050,	/* 9346 Command Register */
-	Config0		= 0x0051,	/* Configuration Register 0 */
-	Config1		= 0x0052,	/* Configuration Register 1 */
-	TimerInt	= 0x0054,	/* Timer Interrupt */
-	Msr		= 0x0058,	/* Media Status */
-	Config3		= 0x0059,	/* Configuration Register 3 */
-	Config4		= 0x005A,	/* Configuration Register 4 */
-	Mulint		= 0x005C,	/* Multiple Interrupt Select */
-	RerID		= 0x005E,	/* PCI Revision ID */
-	Tsad		= 0x0060,	/* Transmit Status of all Descriptors */
-
-	Bmcr		= 0x0062,	/* Basic Mode Control */
-	Bmsr		= 0x0064,	/* Basic Mode Status */
-	Anar		= 0x0066,	/* Auto-Negotiation Advertisment */
-	Anlpar		= 0x0068,	/* Auto-Negotiation Link Partner */
-	Aner		= 0x006A,	/* Auto-Negotiation Expansion */
-	Dis		= 0x006C,	/* Disconnect Counter */
-	Fcsc		= 0x006E,	/* False Carrier Sense Counter */
-	Nwaytr		= 0x0070,	/* N-way Test */
-	Rec		= 0x0072,	/* RX_ER Counter */
-	Cscr		= 0x0074,	/* CS Configuration */
-	Phy1parm	= 0x0078,	/* PHY Parameter 1 */
-	Twparm		= 0x007C,	/* Twister Parameter */
-	Phy2parm	= 0x0080,	/* PHY Parameter 2 */
+enum {			  /* registers */
+       Idr0 = 0x0000,	  /* MAC address */
+       Mar0 = 0x0008,	  /* Multicast address */
+       Tsd0 = 0x0010,	  /* Transmit Status Descriptor0 */
+       Tsad0 = 0x0020,	  /* Transmit Start Address Descriptor0 */
+       Rbstart = 0x0030,  /* Receive Buffer Start Address */
+       Erbcr = 0x0034,	  /* Early Receive Byte Count */
+       Ersr = 0x0036,	  /* Early Receive Status */
+       Cr = 0x0037,	  /* Command Register */
+       Capr = 0x0038,	  /* Current Address of Packet Read */
+       Cbr = 0x003A,	  /* Current Buffer Address */
+       Imr = 0x003C,	  /* Interrupt Mask */
+       Isr = 0x003E,	  /* Interrupt Status */
+       Tcr = 0x0040,	  /* Transmit Configuration */
+       Rcr = 0x0044,	  /* Receive Configuration */
+       Tctr = 0x0048,	  /* Timer Count */
+       Mpc = 0x004C,	  /* Missed Packet Counter */
+       Cr9346 = 0x0050,	  /* 9346 Command Register */
+       Config0 = 0x0051,  /* Configuration Register 0 */
+       Config1 = 0x0052,  /* Configuration Register 1 */
+       TimerInt = 0x0054, /* Timer Interrupt */
+       Msr = 0x0058,	  /* Media Status */
+       Config3 = 0x0059,  /* Configuration Register 3 */
+       Config4 = 0x005A,  /* Configuration Register 4 */
+       Mulint = 0x005C,	  /* Multiple Interrupt Select */
+       RerID = 0x005E,	  /* PCI Revision ID */
+       Tsad = 0x0060,	  /* Transmit Status of all Descriptors */
+
+       Bmcr = 0x0062,	  /* Basic Mode Control */
+       Bmsr = 0x0064,	  /* Basic Mode Status */
+       Anar = 0x0066,	  /* Auto-Negotiation Advertisment */
+       Anlpar = 0x0068,	  /* Auto-Negotiation Link Partner */
+       Aner = 0x006A,	  /* Auto-Negotiation Expansion */
+       Dis = 0x006C,	  /* Disconnect Counter */
+       Fcsc = 0x006E,	  /* False Carrier Sense Counter */
+       Nwaytr = 0x0070,	  /* N-way Test */
+       Rec = 0x0072,	  /* RX_ER Counter */
+       Cscr = 0x0074,	  /* CS Configuration */
+       Phy1parm = 0x0078, /* PHY Parameter 1 */
+       Twparm = 0x007C,	  /* Twister Parameter */
+       Phy2parm = 0x0080, /* PHY Parameter 2 */
 };
 
-enum {					/* Cr */
-	Bufe		= 0x01,		/* Rx Buffer Empty */
-	Te		= 0x04,		/* Transmitter Enable */
-	Re		= 0x08,		/* Receiver Enable */
-	Rst		= 0x10,		/* Software Reset */
+enum {		    /* Cr */
+       Bufe = 0x01, /* Rx Buffer Empty */
+       Te = 0x04,   /* Transmitter Enable */
+       Re = 0x08,   /* Receiver Enable */
+       Rst = 0x10,  /* Software Reset */
 };
 
-enum {					/* Imr/Isr */
-	Rok		= 0x0001,	/* Receive OK */
-	Rer		= 0x0002,	/* Receive Error */
-	Tok		= 0x0004,	/* Transmit OK */
-	Ter		= 0x0008,	/* Transmit Error */
-	Rxovw		= 0x0010,	/* Receive Buffer Overflow */
-	PunLc		= 0x0020,	/* Packet Underrun or Link Change */
-	Fovw		= 0x0040,	/* Receive FIFO Overflow */
-	Clc		= 0x2000,	/* Cable Length Change */
-	Timerbit	= 0x4000,	/* Timer */
-	Serr		= 0x8000,	/* System Error */
+enum {			  /* Imr/Isr */
+       Rok = 0x0001,	  /* Receive OK */
+       Rer = 0x0002,	  /* Receive Error */
+       Tok = 0x0004,	  /* Transmit OK */
+       Ter = 0x0008,	  /* Transmit Error */
+       Rxovw = 0x0010,	  /* Receive Buffer Overflow */
+       PunLc = 0x0020,	  /* Packet Underrun or Link Change */
+       Fovw = 0x0040,	  /* Receive FIFO Overflow */
+       Clc = 0x2000,	  /* Cable Length Change */
+       Timerbit = 0x4000, /* Timer */
+       Serr = 0x8000,	  /* System Error */
 };
 
-enum {					/* Tcr */
-	Clrabt		= 0x00000001,	/* Clear Abort */
-	TxrrSHIFT	= 4,		/* Transmit Retry Count */
-	TxrrMASK	= 0x000000F0,
-	MtxdmaSHIFT	= 8,		/* Max. DMA Burst Size */
-	MtxdmaMASK	= 0x00000700,
-	Mtxdma2048	= 0x00000700,
-	Acrc		= 0x00010000,	/* Append CRC (not) */
-	LbkSHIFT	= 17,		/* Loopback Test */
-	LbkMASK		= 0x00060000,
-	Rtl8139ArevG	= 0x00800000,	/* RTL8139A Rev. G ID */
-	IfgSHIFT	= 24,		/* Interframe Gap */
-	IfgMASK		= 0x03000000,
-	HwveridSHIFT	= 26,		/* Hardware Version ID */
-	HwveridMASK	= 0x7C000000,
+enum {			    /* Tcr */
+       Clrabt = 0x00000001, /* Clear Abort */
+       TxrrSHIFT = 4,	    /* Transmit Retry Count */
+       TxrrMASK = 0x000000F0,
+       MtxdmaSHIFT = 8, /* Max. DMA Burst Size */
+       MtxdmaMASK = 0x00000700,
+       Mtxdma2048 = 0x00000700,
+       Acrc = 0x00010000, /* Append CRC (not) */
+       LbkSHIFT = 17,	  /* Loopback Test */
+       LbkMASK = 0x00060000,
+       Rtl8139ArevG = 0x00800000, /* RTL8139A Rev. G ID */
+       IfgSHIFT = 24,		  /* Interframe Gap */
+       IfgMASK = 0x03000000,
+       HwveridSHIFT = 26, /* Hardware Version ID */
+       HwveridMASK = 0x7C000000,
 };
 
-enum {					/* Rcr */
-	Aap		= 0x00000001,	/* Accept All Packets */
-	Apm		= 0x00000002,	/* Accept Physical Match */
-	Am		= 0x00000004,	/* Accept Multicast */
-	Ab		= 0x00000008,	/* Accept Broadcast */
-	Ar		= 0x00000010,	/* Accept Runt */
-	Aer		= 0x00000020,	/* Accept Error */
-	Sel9356		= 0x00000040,	/* 9356 EEPROM used */
-	Wrap		= 0x00000080,	/* Rx Buffer Wrap Control */
-	MrxdmaSHIFT	= 8,		/* Max. DMA Burst Size */
-	MrxdmaMASK	= 0x00000700,
-	Mrxdmaunlimited	= 0x00000700,
-	RblenSHIFT	= 11,		/* Receive Buffer Length */
-	RblenMASK	= 0x00001800,
-	Rblen8K		= 0x00000000,	/* 8KB+16 */
-	Rblen16K	= 0x00000800,	/* 16KB+16 */
-	Rblen32K	= 0x00001000,	/* 32KB+16 */
-	Rblen64K	= 0x00001800,	/* 64KB+16 */
-	RxfthSHIFT	= 13,		/* Receive Buffer Length */
-	RxfthMASK	= 0x0000E000,
-	Rxfth256	= 0x00008000,
-	Rxfthnone	= 0x0000E000,
-	Rer8		= 0x00010000,	/* Accept Error Packets > 8 bytes */
-	MulERINT	= 0x00020000,	/* Multiple Early Interrupt Select */
-	ErxthSHIFT	= 24,		/* Early Rx Threshold */
-	ErxthMASK	= 0x0F000000,
-	Erxthnone	= 0x00000000,
+enum {			     /* Rcr */
+       Aap = 0x00000001,     /* Accept All Packets */
+       Apm = 0x00000002,     /* Accept Physical Match */
+       Am = 0x00000004,	     /* Accept Multicast */
+       Ab = 0x00000008,	     /* Accept Broadcast */
+       Ar = 0x00000010,	     /* Accept Runt */
+       Aer = 0x00000020,     /* Accept Error */
+       Sel9356 = 0x00000040, /* 9356 EEPROM used */
+       Wrap = 0x00000080,    /* Rx Buffer Wrap Control */
+       MrxdmaSHIFT = 8,	     /* Max. DMA Burst Size */
+       MrxdmaMASK = 0x00000700,
+       Mrxdmaunlimited = 0x00000700,
+       RblenSHIFT = 11, /* Receive Buffer Length */
+       RblenMASK = 0x00001800,
+       Rblen8K = 0x00000000,  /* 8KB+16 */
+       Rblen16K = 0x00000800, /* 16KB+16 */
+       Rblen32K = 0x00001000, /* 32KB+16 */
+       Rblen64K = 0x00001800, /* 64KB+16 */
+       RxfthSHIFT = 13,	      /* Receive Buffer Length */
+       RxfthMASK = 0x0000E000,
+       Rxfth256 = 0x00008000,
+       Rxfthnone = 0x0000E000,
+       Rer8 = 0x00010000,     /* Accept Error Packets > 8 bytes */
+       MulERINT = 0x00020000, /* Multiple Early Interrupt Select */
+       ErxthSHIFT = 24,	      /* Early Rx Threshold */
+       ErxthMASK = 0x0F000000,
+       Erxthnone = 0x00000000,
 };
 
-enum {					/* Received Packet Status */
-	Rcok		= 0x0001,	/* Receive Completed OK */
-	Fae		= 0x0002,	/* Frame Alignment Error */
-	Crc		= 0x0004,	/* CRC Error */
-	Long		= 0x0008,	/* Long Packet */
-	Runt		= 0x0010,	/* Runt Packet Received */
-	Ise		= 0x0020,	/* Invalid Symbol Error */
-	Bar		= 0x2000,	/* Broadcast Address Received */
-	Pam		= 0x4000,	/* Physical Address Matched */
-	Mar		= 0x8000,	/* Multicast Address Received */
+enum {		      /* Received Packet Status */
+       Rcok = 0x0001, /* Receive Completed OK */
+       Fae = 0x0002,  /* Frame Alignment Error */
+       Crc = 0x0004,  /* CRC Error */
+       Long = 0x0008, /* Long Packet */
+       Runt = 0x0010, /* Runt Packet Received */
+       Ise = 0x0020,  /* Invalid Symbol Error */
+       Bar = 0x2000,  /* Broadcast Address Received */
+       Pam = 0x4000,  /* Physical Address Matched */
+       Mar = 0x8000,  /* Multicast Address Received */
 };
 
-enum {					/* Media Status Register */
-	Rxpf		= 0x01,		/* Pause Flag */
-	Txpf		= 0x02,		/* Pause Flag */
-	Linkb		= 0x04,		/* Inverse of Link Status */
-	Speed10		= 0x08,		/* 10Mbps */
-	Auxstatus	= 0x10,		/* Aux. Power Present Status */
-	Rxfce		= 0x40,		/* Receive Flow Control Enable */
-	Txfce		= 0x80,		/* Transmit Flow Control Enable */
+enum {			 /* Media Status Register */
+       Rxpf = 0x01,	 /* Pause Flag */
+       Txpf = 0x02,	 /* Pause Flag */
+       Linkb = 0x04,	 /* Inverse of Link Status */
+       Speed10 = 0x08,	 /* 10Mbps */
+       Auxstatus = 0x10, /* Aux. Power Present Status */
+       Rxfce = 0x40,	 /* Receive Flow Control Enable */
+       Txfce = 0x80,	 /* Transmit Flow Control Enable */
 };
 
 typedef struct Td Td;
-struct Td {			/* Soft Transmit Descriptor */
-	int	tsd;
-	int	tsad;
-	unsigned char*	data;
-	Block*	bp;
+struct Td { /* Soft Transmit Descriptor */
+	int tsd;
+	int tsad;
+	unsigned char *data;
+	Block *bp;
 };
 
-enum {					/* Tsd0 */
-	SizeSHIFT	= 0,		/* Descriptor Size */
-	SizeMASK	= 0x00001FFF,
-	Own		= 0x00002000,
-	Tun		= 0x00004000,	/* Transmit FIFO Underrun */
-	Tcok		= 0x00008000,	/* Transmit COmpleted OK */
-	EtxthSHIFT	= 16,		/* Early Tx Threshold */
-	EtxthMASK	= 0x001F0000,
-	NccSHIFT	= 24,		/* Number of Collisions Count */
-	NccMASK		= 0x0F000000,
-	Cdh		= 0x10000000,	/* CD Heartbeat */
-	Owc		= 0x20000000,	/* Out of Window Collision */
-	Tabt		= 0x40000000,	/* Transmit Abort */
-	Crs		= 0x80000000,	/* Carrier Sense Lost */
+enum {		      /* Tsd0 */
+       SizeSHIFT = 0, /* Descriptor Size */
+       SizeMASK = 0x00001FFF,
+       Own = 0x00002000,
+       Tun = 0x00004000,  /* Transmit FIFO Underrun */
+       Tcok = 0x00008000, /* Transmit COmpleted OK */
+       EtxthSHIFT = 16,	  /* Early Tx Threshold */
+       EtxthMASK = 0x001F0000,
+       NccSHIFT = 24, /* Number of Collisions Count */
+       NccMASK = 0x0F000000,
+       Cdh = 0x10000000,  /* CD Heartbeat */
+       Owc = 0x20000000,  /* Out of Window Collision */
+       Tabt = 0x40000000, /* Transmit Abort */
+       Crs = 0x80000000,  /* Carrier Sense Lost */
 };
 
 enum {
-	Rblen		= Rblen64K,	/* Receive Buffer Length */
-	Ntd		= 4,		/* Number of Transmit Descriptors */
-	Tdbsz		= ROUNDUP(sizeof(Etherpkt), 4),
+	Rblen = Rblen64K, /* Receive Buffer Length */
+	Ntd = 4,	  /* Number of Transmit Descriptors */
+	Tdbsz = ROUNDUP(sizeof(Etherpkt), 4),
 };
 
 typedef struct Ctlr Ctlr;
 typedef struct Ctlr {
-	int	port;
-	Pcidev*	pcidev;
-	Ctlr*	next;
-	int	active;
-	int	id;
-
-	QLock	alock;			/* attach */
-	Lock	ilock;			/* init */
-	void*	alloc;			/* base of per-Ctlr allocated data */
-
-	int	pcie;			/* flag: pci-express device? */
-
-	uint64_t	mchash;			/* multicast hash */
-
-	int	rcr;			/* receive configuration register */
-	unsigned char*	rbstart;		/* receive buffer */
-	int	rblen;			/* receive buffer length */
-	int	ierrs;			/* receive errors */
-
-	Lock	tlock;			/* transmit */
-	Td	td[Ntd];
-	int	ntd;			/* descriptors active */
-	int	tdh;			/* host index into td */
-	int	tdi;			/* interface index into td */
-	int	etxth;			/* early transmit threshold */
-	int	taligned;		/* packet required no alignment */
-	int	tunaligned;		/* packet required alignment */
-
-	int	dis;			/* disconnect counter */
-	int	fcsc;			/* false carrier sense counter */
-	int	rec;			/* RX_ER counter */
-	uint	mcast;
+	int port;
+	Pcidev *pcidev;
+	Ctlr *next;
+	int active;
+	int id;
+
+	QLock alock; /* attach */
+	Lock ilock;  /* init */
+	void *alloc; /* base of per-Ctlr allocated data */
+
+	int pcie; /* flag: pci-express device? */
+
+	uint64_t mchash; /* multicast hash */
+
+	int rcr;		/* receive configuration register */
+	unsigned char *rbstart; /* receive buffer */
+	int rblen;		/* receive buffer length */
+	int ierrs;		/* receive errors */
+
+	Lock tlock; /* transmit */
+	Td td[Ntd];
+	int ntd;	/* descriptors active */
+	int tdh;	/* host index into td */
+	int tdi;	/* interface index into td */
+	int etxth;	/* early transmit threshold */
+	int taligned;	/* packet required no alignment */
+	int tunaligned; /* packet required alignment */
+
+	int dis;  /* disconnect counter */
+	int fcsc; /* false carrier sense counter */
+	int rec;  /* RX_ER counter */
+	uint mcast;
 } Ctlr;
 
-static Ctlr* ctlrhead;
-static Ctlr* ctlrtail;
+static Ctlr *ctlrhead;
+static Ctlr *ctlrtail;
 
-#define csr8r(c, r)	(inb((c)->port+(r)))
-#define csr16r(c, r)	(ins((c)->port+(r)))
-#define csr32r(c, r)	(inl((c)->port+(r)))
-#define csr8w(c, r, b)	(outb((c)->port+(r), (int)(b)))
-#define csr16w(c, r, w)	(outs((c)->port+(r), (uint16_t)(w)))
-#define csr32w(c, r, l)	(outl((c)->port+(r), (uint32_t)(l)))
+#define csr8r(c, r) (inb((c)->port + (r)))
+#define csr16r(c, r) (ins((c)->port + (r)))
+#define csr32r(c, r) (inl((c)->port + (r)))
+#define csr8w(c, r, b) (outb((c)->port + (r), (int)(b)))
+#define csr16w(c, r, w) (outs((c)->port + (r), (uint16_t)(w)))
+#define csr32w(c, r, l) (outl((c)->port + (r), (uint32_t)(l)))
 
 static void
-rtl8139promiscuous(void* arg, int on)
+rtl8139promiscuous(void *arg, int on)
 {
 	Ether *edev;
-	Ctlr * ctlr;
+	Ctlr *ctlr;
 
 	edev = arg;
 	ctlr = edev->ctlr;
@@ -251,7 +251,7 @@ rtl8139promiscuous(void* arg, int on)
 enum {
 	/* everyone else uses 0x04c11db7, but they both produce the same crc */
 	Etherpolybe = 0x04c11db6,
-	Bytemask = (1<<8) - 1,
+	Bytemask = (1 << 8) - 1,
 };
 
 static uint32_t
@@ -261,13 +261,13 @@ ethercrcbe(unsigned char *addr, int32_t len)
 	uint64_t c, crc, carry;
 
 	crc = ~0UL;
-	for (i = 0; i < len; i++) {
+	for(i = 0; i < len; i++){
 		c = addr[i];
-		for (j = 0; j < 8; j++) {
-			carry = ((crc & (1UL << 31))? 1: 0) ^ (c & 1);
+		for(j = 0; j < 8; j++){
+			carry = ((crc & (1UL << 31)) ? 1 : 0) ^ (c & 1);
 			crc <<= 1;
 			c >>= 1;
-			if (carry)
+			if(carry)
 				crc = (crc ^ Etherpolybe) | carry;
 		}
 	}
@@ -277,18 +277,18 @@ ethercrcbe(unsigned char *addr, int32_t len)
 static uint32_t
 swabl(uint32_t l)
 {
-	return (l>>24) | ((l>>8) & (Bytemask<<8)) |
-		((l<<8) & (Bytemask<<16)) | (l<<24);
+	return (l >> 24) | ((l >> 8) & (Bytemask << 8)) |
+	       ((l << 8) & (Bytemask << 16)) | (l << 24);
 }
 
 static void
-rtl8139multicast(void* ether, unsigned char *eaddr, int add)
+rtl8139multicast(void *ether, unsigned char *eaddr, int add)
 {
 	Ether *edev;
 	Ctlr *ctlr;
 
-	if (!add)
-		return;	/* ok to keep receiving on old mcast addrs */
+	if(!add)
+		return; /* ok to keep receiving on old mcast addrs */
 
 	edev = ether;
 	ctlr = edev->ctlr;
@@ -300,19 +300,19 @@ rtl8139multicast(void* ether, unsigned char *eaddr, int add)
 	csr32w(ctlr, Rcr, ctlr->rcr);
 
 	/* pci-e variants reverse the order of the hash byte registers */
-	if (0 && ctlr->pcie) {
-		csr32w(ctlr, Mar0,   swabl(ctlr->mchash>>32));
-		csr32w(ctlr, Mar0+4, swabl(ctlr->mchash));
+	if(0 && ctlr->pcie){
+		csr32w(ctlr, Mar0, swabl(ctlr->mchash >> 32));
+		csr32w(ctlr, Mar0 + 4, swabl(ctlr->mchash));
 	} else {
-		csr32w(ctlr, Mar0,   ctlr->mchash);
-		csr32w(ctlr, Mar0+4, ctlr->mchash>>32);
+		csr32w(ctlr, Mar0, ctlr->mchash);
+		csr32w(ctlr, Mar0 + 4, ctlr->mchash >> 32);
 	}
 
 	iunlock(&ctlr->ilock);
 }
 
 static int32_t
-rtl8139ifstat(Ether* edev, void* a, int32_t n, uint32_t offset)
+rtl8139ifstat(Ether *edev, void *a, int32_t n, uint32_t offset)
 {
 	int l;
 	char *p;
@@ -323,32 +323,32 @@ rtl8139ifstat(Ether* edev, void* a, int32_t n, uint32_t offset)
 	if(p == nil)
 		error(Enomem);
 	l = snprint(p, READSTR, "rcr %#8.8x\n", ctlr->rcr);
-	l += snprint(p+l, READSTR-l, "multicast %u\n", ctlr->mcast);
-	l += snprint(p+l, READSTR-l, "ierrs %d\n", ctlr->ierrs);
-	l += snprint(p+l, READSTR-l, "etxth %d\n", ctlr->etxth);
-	l += snprint(p+l, READSTR-l, "taligned %d\n", ctlr->taligned);
-	l += snprint(p+l, READSTR-l, "tunaligned %d\n", ctlr->tunaligned);
+	l += snprint(p + l, READSTR - l, "multicast %u\n", ctlr->mcast);
+	l += snprint(p + l, READSTR - l, "ierrs %d\n", ctlr->ierrs);
+	l += snprint(p + l, READSTR - l, "etxth %d\n", ctlr->etxth);
+	l += snprint(p + l, READSTR - l, "taligned %d\n", ctlr->taligned);
+	l += snprint(p + l, READSTR - l, "tunaligned %d\n", ctlr->tunaligned);
 	ctlr->dis += csr16r(ctlr, Dis);
-	l += snprint(p+l, READSTR-l, "dis %d\n", ctlr->dis);
+	l += snprint(p + l, READSTR - l, "dis %d\n", ctlr->dis);
 	ctlr->fcsc += csr16r(ctlr, Fcsc);
-	l += snprint(p+l, READSTR-l, "fcscnt %d\n", ctlr->fcsc);
+	l += snprint(p + l, READSTR - l, "fcscnt %d\n", ctlr->fcsc);
 	ctlr->rec += csr16r(ctlr, Rec);
-	l += snprint(p+l, READSTR-l, "rec %d\n", ctlr->rec);
-
-	l += snprint(p+l, READSTR-l, "Tcr %#8.8lx\n", csr32r(ctlr, Tcr));
-	l += snprint(p+l, READSTR-l, "Config0 %#2.2x\n", csr8r(ctlr, Config0));
-	l += snprint(p+l, READSTR-l, "Config1 %#2.2x\n", csr8r(ctlr, Config1));
-	l += snprint(p+l, READSTR-l, "Msr %#2.2x\n", csr8r(ctlr, Msr));
-	l += snprint(p+l, READSTR-l, "Config3 %#2.2x\n", csr8r(ctlr, Config3));
-	l += snprint(p+l, READSTR-l, "Config4 %#2.2x\n", csr8r(ctlr, Config4));
-
-	l += snprint(p+l, READSTR-l, "Bmcr %#4.4x\n", csr16r(ctlr, Bmcr));
-	l += snprint(p+l, READSTR-l, "Bmsr %#4.4x\n", csr16r(ctlr, Bmsr));
-	l += snprint(p+l, READSTR-l, "Anar %#4.4x\n", csr16r(ctlr, Anar));
-	l += snprint(p+l, READSTR-l, "Anlpar %#4.4x\n", csr16r(ctlr, Anlpar));
-	l += snprint(p+l, READSTR-l, "Aner %#4.4x\n", csr16r(ctlr, Aner));
-	l += snprint(p+l, READSTR-l, "Nwaytr %#4.4x\n", csr16r(ctlr, Nwaytr));
-	snprint(p+l, READSTR-l, "Cscr %#4.4x\n", csr16r(ctlr, Cscr));
+	l += snprint(p + l, READSTR - l, "rec %d\n", ctlr->rec);
+
+	l += snprint(p + l, READSTR - l, "Tcr %#8.8lx\n", csr32r(ctlr, Tcr));
+	l += snprint(p + l, READSTR - l, "Config0 %#2.2x\n", csr8r(ctlr, Config0));
+	l += snprint(p + l, READSTR - l, "Config1 %#2.2x\n", csr8r(ctlr, Config1));
+	l += snprint(p + l, READSTR - l, "Msr %#2.2x\n", csr8r(ctlr, Msr));
+	l += snprint(p + l, READSTR - l, "Config3 %#2.2x\n", csr8r(ctlr, Config3));
+	l += snprint(p + l, READSTR - l, "Config4 %#2.2x\n", csr8r(ctlr, Config4));
+
+	l += snprint(p + l, READSTR - l, "Bmcr %#4.4x\n", csr16r(ctlr, Bmcr));
+	l += snprint(p + l, READSTR - l, "Bmsr %#4.4x\n", csr16r(ctlr, Bmsr));
+	l += snprint(p + l, READSTR - l, "Anar %#4.4x\n", csr16r(ctlr, Anar));
+	l += snprint(p + l, READSTR - l, "Anlpar %#4.4x\n", csr16r(ctlr, Anlpar));
+	l += snprint(p + l, READSTR - l, "Aner %#4.4x\n", csr16r(ctlr, Aner));
+	l += snprint(p + l, READSTR - l, "Nwaytr %#4.4x\n", csr16r(ctlr, Nwaytr));
+	snprint(p + l, READSTR - l, "Cscr %#4.4x\n", csr16r(ctlr, Cscr));
 	n = readstr(offset, a, n, p);
 	free(p);
 
@@ -356,7 +356,7 @@ rtl8139ifstat(Ether* edev, void* a, int32_t n, uint32_t offset)
 }
 
 static int
-rtl8139reset(Ctlr* ctlr)
+rtl8139reset(Ctlr *ctlr)
 {
 	int timeo;
 
@@ -379,7 +379,7 @@ rtl8139reset(Ctlr* ctlr)
 }
 
 static void
-rtl8139halt(Ctlr* ctlr)
+rtl8139halt(Ctlr *ctlr)
 {
 	int i;
 
@@ -409,7 +409,7 @@ rtl8139shutdown(Ether *edev)
 }
 
 static void
-rtl8139init(Ether* edev)
+rtl8139init(Ether *edev)
 {
 	int i;
 	uint32_t r;
@@ -424,74 +424,74 @@ rtl8139init(Ether* edev)
 	/*
 	 * MAC Address.
 	 */
-	r = (edev->ea[3]<<24)|(edev->ea[2]<<16)|(edev->ea[1]<<8)|edev->ea[0];
+	r = (edev->ea[3] << 24) | (edev->ea[2] << 16) | (edev->ea[1] << 8) | edev->ea[0];
 	csr32w(ctlr, Idr0, r);
-	r = (edev->ea[5]<<8)|edev->ea[4];
-	csr32w(ctlr, Idr0+4, r);
+	r = (edev->ea[5] << 8) | edev->ea[4];
+	csr32w(ctlr, Idr0 + 4, r);
 
 	/*
 	 * Receiver
 	 */
-	alloc = (unsigned char*)ROUNDUP((uint64_t)ctlr->alloc, 32);
+	alloc = (unsigned char *)ROUNDUP((uint64_t)ctlr->alloc, 32);
 	ctlr->rbstart = alloc;
-	alloc += ctlr->rblen+16;
-	memset(ctlr->rbstart, 0, ctlr->rblen+16);
+	alloc += ctlr->rblen + 16;
+	memset(ctlr->rbstart, 0, ctlr->rblen + 16);
 	csr32w(ctlr, Rbstart, PADDR(ctlr->rbstart));
-	ctlr->rcr = Rxfth256|Rblen|Mrxdmaunlimited|Ab|Am|Apm;
+	ctlr->rcr = Rxfth256 | Rblen | Mrxdmaunlimited | Ab | Am | Apm;
 
 	/*
 	 * Transmitter.
 	 */
 	for(i = 0; i < Ntd; i++){
-		ctlr->td[i].tsd = Tsd0+i*4;
-		ctlr->td[i].tsad = Tsad0+i*4;
+		ctlr->td[i].tsd = Tsd0 + i * 4;
+		ctlr->td[i].tsad = Tsad0 + i * 4;
 		ctlr->td[i].data = alloc;
 		alloc += Tdbsz;
 		ctlr->td[i].bp = nil;
 	}
 	ctlr->ntd = ctlr->tdh = ctlr->tdi = 0;
-	ctlr->etxth = 128/32;
+	ctlr->etxth = 128 / 32;
 
 	/*
 	 * Enable receiver/transmitter.
 	 * Need to enable before writing the Rcr or it won't take.
 	 */
-	csr8w(ctlr, Cr, Te|Re);
+	csr8w(ctlr, Cr, Te | Re);
 	csr32w(ctlr, Tcr, Mtxdma2048);
 	csr32w(ctlr, Rcr, ctlr->rcr);
-	csr32w(ctlr, Mar0,   0);
-	csr32w(ctlr, Mar0+4, 0);
+	csr32w(ctlr, Mar0, 0);
+	csr32w(ctlr, Mar0 + 4, 0);
 	ctlr->mchash = 0;
 
 	/*
 	 * Interrupts.
 	 */
 	csr32w(ctlr, TimerInt, 0);
-	csr16w(ctlr, Imr, Serr|Timerbit|Fovw|PunLc|Rxovw|Ter|Tok|Rer|Rok);
+	csr16w(ctlr, Imr, Serr | Timerbit | Fovw | PunLc | Rxovw | Ter | Tok | Rer | Rok);
 	csr32w(ctlr, Mpc, 0);
 
 	iunlock(&ctlr->ilock);
 }
 
 static void
-rtl8139attach(Ether* edev)
+rtl8139attach(Ether *edev)
 {
 	Ctlr *ctlr;
 
-	if(edev == nil) {
+	if(edev == nil){
 		print("rtl8139attach: nil edev\n");
 		return;
 	}
 	ctlr = edev->ctlr;
-	if(ctlr == nil) {
+	if(ctlr == nil){
 		print("rtl8139attach: nil ctlr for Ether %#p\n", edev);
 		return;
 	}
 	qlock(&ctlr->alock);
 	if(ctlr->alloc == nil){
-		ctlr->rblen = 1<<((Rblen>>RblenSHIFT)+13);
-		ctlr->alloc = malloc(ctlr->rblen+16 + Ntd*Tdbsz + 32);
-		if(ctlr->alloc == nil) {
+		ctlr->rblen = 1 << ((Rblen >> RblenSHIFT) + 13);
+		ctlr->alloc = malloc(ctlr->rblen + 16 + Ntd * Tdbsz + 32);
+		if(ctlr->alloc == nil){
 			qunlock(&ctlr->alock);
 			error(Enomem);
 		}
@@ -501,7 +501,7 @@ rtl8139attach(Ether* edev)
 }
 
 static void
-rtl8139txstart(Ether* edev)
+rtl8139txstart(Ether *edev)
 {
 	Td *td;
 	int size;
@@ -521,13 +521,12 @@ rtl8139txstart(Ether* edev)
 			freeb(bp);
 			csr32w(ctlr, td->tsad, PADDR(td->data));
 			ctlr->tunaligned++;
-		}
-		else{
+		} else {
 			td->bp = bp;
 			csr32w(ctlr, td->tsad, PADDR(bp->rp));
 			ctlr->taligned++;
 		}
-		csr32w(ctlr, td->tsd, (ctlr->etxth<<EtxthSHIFT)|size);
+		csr32w(ctlr, td->tsd, (ctlr->etxth << EtxthSHIFT) | size);
 
 		ctlr->ntd++;
 		ctlr->tdh = NEXT(ctlr->tdh, Ntd);
@@ -535,7 +534,7 @@ rtl8139txstart(Ether* edev)
 }
 
 static void
-rtl8139transmit(Ether* edev)
+rtl8139transmit(Ether *edev)
 {
 	Ctlr *ctlr;
 
@@ -546,7 +545,7 @@ rtl8139transmit(Ether* edev)
 }
 
 static void
-rtl8139receive(Ether* edev)
+rtl8139receive(Ether *edev)
 {
 	Block *bp;
 	Ctlr *ctlr;
@@ -561,26 +560,26 @@ rtl8139receive(Ether* edev)
 	 * Cbr is where the NIC is currently writing.
 	 */
 	if(ctlr->rblen == 0)
-		return;		/* not attached yet (shouldn't happen) */
-	capr = (csr16r(ctlr, Capr)+16) % ctlr->rblen;
+		return; /* not attached yet (shouldn't happen) */
+	capr = (csr16r(ctlr, Capr) + 16) % ctlr->rblen;
 	while(!(csr8r(ctlr, Cr) & Bufe)){
-		p = ctlr->rbstart+capr;
+		p = ctlr->rbstart + capr;
 
 		/*
 		 * Apparently the packet length may be 0xFFF0 if
 		 * the NIC is still copying the packet into memory.
 		 */
-		length = (*(p+3)<<8)|*(p+2);
+		length = (*(p + 3) << 8) | *(p + 2);
 		if(length == 0xFFF0)
 			break;
-		status = (*(p+1)<<8)|*p;
+		status = (*(p + 1) << 8) | *p;
 
 		if(!(status & Rcok)){
-			if(status & (Ise|Fae))
+			if(status & (Ise | Fae))
 				edev->Netif.frames++;
 			if(status & Crc)
 				edev->Netif.crcs++;
-			if(status & (Runt|Long))
+			if(status & (Runt | Long))
 				edev->Netif.buffs++;
 
 			/*
@@ -604,15 +603,15 @@ rtl8139receive(Ether* edev)
 		 * the squeeze.
 		 * The packet length includes a 4 byte CRC on the end.
 		 */
-		capr = (capr+4) % ctlr->rblen;
-		p = ctlr->rbstart+capr;
-		capr = (capr+length) % ctlr->rblen;
+		capr = (capr + 4) % ctlr->rblen;
+		p = ctlr->rbstart + capr;
+		capr = (capr + length) % ctlr->rblen;
 		if(status & Mar)
 			ctlr->mcast++;
 
 		if((bp = iallocb(length)) != nil){
-			if(p+length >= ctlr->rbstart+ctlr->rblen){
-				l = ctlr->rbstart+ctlr->rblen - p;
+			if(p + length >= ctlr->rbstart + ctlr->rblen){
+				l = ctlr->rbstart + ctlr->rblen - p;
 				memmove(bp->wp, p, l);
 				bp->wp += l;
 				length -= l;
@@ -627,12 +626,12 @@ rtl8139receive(Ether* edev)
 		}
 
 		capr = ROUNDUP(capr, 4);
-		csr16w(ctlr, Capr, capr-16);
+		csr16w(ctlr, Capr, capr - 16);
 	}
 }
 
 static void
-rtl8139interrupt(Ureg *ureg, void* arg)
+rtl8139interrupt(Ureg *ureg, void *arg)
 {
 	Td *td;
 	Ctlr *ctlr;
@@ -641,37 +640,38 @@ rtl8139interrupt(Ureg *ureg, void* arg)
 
 	edev = arg;
 	ctlr = edev->ctlr;
-	if(ctlr == nil) {	/* not attached yet? (shouldn't happen) */
+	if(ctlr == nil) { /* not attached yet? (shouldn't happen) */
 		print("rtl8139interrupt: interrupt for unattached Ether %#p\n",
-			edev);
+		      edev);
 		return;
 	}
 
 	while((isr = csr16r(ctlr, Isr)) != 0){
 		csr16w(ctlr, Isr, isr);
-		if(ctlr->alloc == nil) {
+		if(ctlr->alloc == nil){
 			print("rtl8139interrupt: interrupt for unattached Ctlr "
-				"%#p port %#p\n", ctlr, (void *)(int64_t)ctlr->port);
-			return;	/* not attached yet (shouldn't happen) */
+			      "%#p port %#p\n",
+			      ctlr, (void *)(int64_t)ctlr->port);
+			return; /* not attached yet (shouldn't happen) */
 		}
-		if(isr & (Fovw|PunLc|Rxovw|Rer|Rok)){
+		if(isr & (Fovw | PunLc | Rxovw | Rer | Rok)){
 			rtl8139receive(edev);
 			if(!(isr & Rok))
 				ctlr->ierrs++;
-			isr &= ~(Fovw|Rxovw|Rer|Rok);
+			isr &= ~(Fovw | Rxovw | Rer | Rok);
 		}
 
-		if(isr & (Ter|Tok)){
+		if(isr & (Ter | Tok)){
 			ilock(&ctlr->tlock);
 			while(ctlr->ntd){
 				td = &ctlr->td[ctlr->tdi];
 				tsd = csr32r(ctlr, td->tsd);
-				if(!(tsd & (Tabt|Tun|Tcok)))
+				if(!(tsd & (Tabt | Tun | Tcok)))
 					break;
 
 				if(!(tsd & Tcok)){
 					if(tsd & Tun){
-						if(ctlr->etxth < ETHERMAXTU/32)
+						if(ctlr->etxth < ETHERMAXTU / 32)
 							ctlr->etxth++;
 					}
 					edev->Netif.oerrs++;
@@ -687,7 +687,7 @@ rtl8139interrupt(Ureg *ureg, void* arg)
 			}
 			rtl8139txstart(edev);
 			iunlock(&ctlr->tlock);
-			isr &= ~(Ter|Tok);
+			isr &= ~(Ter | Tok);
 		}
 
 		if(isr & PunLc){
@@ -698,14 +698,13 @@ rtl8139interrupt(Ureg *ureg, void* arg)
 			if(!(msr & Linkb)){
 				if(!(msr & Speed10) && edev->Netif.mbps != 100){
 					edev->Netif.mbps = 100;
-					qsetlimit(edev->oq, 256*1024);
-				}
-				else if((msr & Speed10) && edev->Netif.mbps != 10){
+					qsetlimit(edev->oq, 256 * 1024);
+				} else if((msr & Speed10) && edev->Netif.mbps != 10){
 					edev->Netif.mbps = 10;
-					qsetlimit(edev->oq, 65*1024);
+					qsetlimit(edev->oq, 65 * 1024);
 				}
 			}
-			isr &= ~(Clc|PunLc);
+			isr &= ~(Clc | PunLc);
 		}
 
 		/*
@@ -715,9 +714,9 @@ rtl8139interrupt(Ureg *ureg, void* arg)
 		 * by Serr, that's pretty serious; is there anyhing to do
 		 * other than try to reinitialise the chip?
 		 */
-		if((isr & (Serr|Timerbit)) != 0){
+		if((isr & (Serr | Timerbit)) != 0){
 			iprint("rtl8139interrupt: imr %#4.4x isr %#4.4x\n",
-				csr16r(ctlr, Imr), isr);
+			       csr16r(ctlr, Imr), isr);
 			if(isr & Timerbit)
 				csr32w(ctlr, TimerInt, 0);
 			if(isr & Serr)
@@ -726,8 +725,8 @@ rtl8139interrupt(Ureg *ureg, void* arg)
 	}
 }
 
-static Ctlr*
-rtl8139match(Ether* edev, int id)
+static Ctlr *
+rtl8139match(Ether *edev, int id)
 {
 	Pcidev *p;
 	Ctlr *ctlr;
@@ -741,7 +740,7 @@ rtl8139match(Ether* edev, int id)
 		if(ctlr->active)
 			continue;
 		p = ctlr->pcidev;
-		if(((p->did<<16)|p->vid) != id)
+		if(((p->did << 16) | p->vid) != id)
 			continue;
 		port = p->mem[0].bar & ~0x01;
 		if(edev->ISAConf.port != 0 && edev->ISAConf.port != port)
@@ -756,7 +755,7 @@ rtl8139match(Ether* edev, int id)
 			pcisetpms(p, 0);
 
 			for(i = 0; i < 6; i++)
-				pcicfgw32(p, PciBAR0+i*4, p->mem[i].bar);
+				pcicfgw32(p, PciBAR0 + i * 4, p->mem[i].bar);
 			pcicfgw8(p, PciINTL, p->intl);
 			pcicfgw8(p, PciLTR, p->ltr);
 			pcicfgw8(p, PciCLS, p->cls);
@@ -764,7 +763,7 @@ rtl8139match(Ether* edev, int id)
 		}
 
 		ctlr->port = port;
-		if(rtl8139reset(ctlr)) {
+		if(rtl8139reset(ctlr)){
 			iofree(port);
 			continue;
 		}
@@ -777,18 +776,30 @@ rtl8139match(Ether* edev, int id)
 }
 
 static struct {
-	char*	name;
-	int	id;
+	char *name;
+	int id;
 } rtl8139pci[] = {
-	{ "rtl8139",	(0x8139<<16)|0x10EC, },	/* generic */
-	{ "smc1211",	(0x1211<<16)|0x1113, },	/* SMC EZ-Card */
-	{ "dfe-538tx",	(0x1300<<16)|0x1186, }, /* D-Link DFE-538TX */
-	{ "dfe-560txd",	(0x1340<<16)|0x1186, }, /* D-Link DFE-560TXD */
-	{ nil },
+	{
+		"rtl8139",
+		(0x8139 << 16) | 0x10EC,
+	}, /* generic */
+	{
+		"smc1211",
+		(0x1211 << 16) | 0x1113,
+	}, /* SMC EZ-Card */
+	{
+		"dfe-538tx",
+		(0x1300 << 16) | 0x1186,
+	}, /* D-Link DFE-538TX */
+	{
+		"dfe-560txd",
+		(0x1340 << 16) | 0x1186,
+	}, /* D-Link DFE-560TXD */
+	{nil},
 };
 
 static int
-rtl8139pnp(Ether* edev)
+rtl8139pnp(Ether *edev)
 {
 	int i, id;
 	Pcidev *p;
@@ -808,7 +819,7 @@ rtl8139pnp(Ether* edev)
 			if(ctlr == nil)
 				error(Enomem);
 			ctlr->pcidev = p;
-			ctlr->id = (p->did<<16)|p->vid;
+			ctlr->id = (p->did << 16) | p->vid;
 
 			if(ctlrhead != nil)
 				ctlrtail->next = ctlr;
@@ -834,10 +845,11 @@ rtl8139pnp(Ether* edev)
 	ctlr = nil;
 	if(id != 0)
 		ctlr = rtl8139match(edev, id);
-	else for(i = 0; rtl8139pci[i].name; i++){
-		if((ctlr = rtl8139match(edev, rtl8139pci[i].id)) != nil)
-			break;
-	}
+	else
+		for(i = 0; rtl8139pci[i].name; i++){
+			if((ctlr = rtl8139match(edev, rtl8139pci[i].id)) != nil)
+				break;
+		}
 	if(ctlr == nil)
 		return -1;
 
@@ -854,12 +866,12 @@ rtl8139pnp(Ether* edev)
 	if(memcmp(ea, edev->ea, Eaddrlen) == 0){
 		i = csr32r(ctlr, Idr0);
 		edev->ea[0] = i;
-		edev->ea[1] = i>>8;
-		edev->ea[2] = i>>16;
-		edev->ea[3] = i>>24;
-		i = csr32r(ctlr, Idr0+4);
+		edev->ea[1] = i >> 8;
+		edev->ea[2] = i >> 16;
+		edev->ea[3] = i >> 24;
+		i = csr32r(ctlr, Idr0 + 4);
 		edev->ea[4] = i;
-		edev->ea[5] = i>>8;
+		edev->ea[5] = i >> 8;
 	}
 
 	edev->Netif.arg = edev;
@@ -875,7 +887,7 @@ rtl8139pnp(Ether* edev)
 	/*
 	 * This should be much more dynamic but will do for now.
 	 */
-	if((csr8r(ctlr, Msr) & (Speed10|Linkb)) == 0)
+	if((csr8r(ctlr, Msr) & (Speed10 | Linkb)) == 0)
 		edev->Netif.mbps = 100;
 
 	return 0;

sys/src/9/amd64/etherif.h

@@ -8,37 +8,37 @@
  */
 
 enum {
-	MaxEther	= 48,
-	Ntypes		= 8,
+	MaxEther = 48,
+	Ntypes = 8,
 };
 
 typedef struct Ether Ether;
 struct Ether {
-	ISAConf ISAConf;			/* hardware info */
+	ISAConf ISAConf; /* hardware info */
 
-	int	ctlrno;
-	int	tbdf;			/* type+busno+devno+funcno */
-	uint8_t	ea[Eaddrlen];
+	int ctlrno;
+	int tbdf; /* type+busno+devno+funcno */
+	uint8_t ea[Eaddrlen];
 
-	void	(*attach)(Ether*);	/* filled in by reset routine */
-	void	(*detach)(Ether*);
-	void	(*transmit)(Ether*);
-	void	(*interrupt)(Ureg*, void*);
-	int32_t	(*ifstat)(Ether*, void*, int32_t, uint32_t);
-	int32_t 	(*ctl)(Ether*, void*, int32_t); /* custom ctl messages */
-	void	(*power)(Ether*, int);	/* power on/off */
-	void	(*shutdown)(Ether*);	/* shutdown hardware before reboot */
-	void	*ctlr;
+	void (*attach)(Ether *); /* filled in by reset routine */
+	void (*detach)(Ether *);
+	void (*transmit)(Ether *);
+	void (*interrupt)(Ureg *, void *);
+	int32_t (*ifstat)(Ether *, void *, int32_t, uint32_t);
+	int32_t (*ctl)(Ether *, void *, int32_t); /* custom ctl messages */
+	void (*power)(Ether *, int);		  /* power on/off */
+	void (*shutdown)(Ether *);		  /* shutdown hardware before reboot */
+	void *ctlr;
 
-	Queue*	oq;
+	Queue *oq;
 
 	Netif Netif;
 };
 
-extern Block* etheriq(Ether*, Block*, int);
-extern void addethercard(char*, int(*)(Ether*));
-extern uint32_t ethercrc(unsigned char*, int);
-extern int parseether(unsigned char*, char*);
+extern Block *etheriq(Ether *, Block *, int);
+extern void addethercard(char *, int (*)(Ether *));
+extern uint32_t ethercrc(unsigned char *, int);
+extern int parseether(unsigned char *, char *);
 
-#define NEXT(x, l)	(((x)+1)%(l))
-#define PREV(x, l)	(((x) == 0) ? (l)-1: (x)-1)
+#define NEXT(x, l) (((x) + 1) % (l))
+#define PREV(x, l) (((x) == 0) ? (l)-1 : (x)-1)

sys/src/9/amd64/fns.h

@@ -8,175 +8,175 @@
  */
 
 #include "../port/portfns.h"
-void	intrac(Proc*);
-void	acinit(void);
-int	acpiinit(void);
-void	acpistart(void);
-int	mpacpi(int);
-void	actrapenable(int, char* (*)(Ureg*, void*), void*, char*);
-int     aoutldseg(void *v, uintptr_t *entryp, Ldseg **rp, char *mach, uint32_t minpgsz);
-void	apicipi(int);
-void	apicpri(int);
-void	acsysret(void);
-void	actouser(void);
-void		runacore(void);
-void	aamloop(int);
-Dirtab*	addarchfile(char*, int,
-			   int32_t(*)(Chan*,void*,int32_t,int64_t),
-			   int32_t(*)(Chan*,void*,int32_t,int64_t));
-void	acmmuswitch(void);
-void	acmodeset(int);
-void	archfmtinstall(void);
-void	archidle(void);
-int	archmmu(void);
-void	noerrorsleft(void);
-void	archinit(void);
-void	archreset(void);
-int64_t	archhz(void);
-int	cgaprint(int off, char *fmt, ...);
-int	cgaclearln(int off, int c);
-void	cgaconsputs(char*, int);
-void	cgainit(void);
-void	cgapost(int);
-void	checkpa(char*, uintmem);
-#define	clearmmucache()				/* x86 doesn't have one */
-void	(*coherence)(void);
-int	corecolor(int);
-uint32_t	cpuid(uint32_t, uint32_t, uint32_t[4]);
+void intrac(Proc *);
+void acinit(void);
+int acpiinit(void);
+void acpistart(void);
+int mpacpi(int);
+void actrapenable(int, char *(*)(Ureg *, void *), void *, char *);
+int aoutldseg(void *v, uintptr_t *entryp, Ldseg **rp, char *mach, uint32_t minpgsz);
+void apicipi(int);
+void apicpri(int);
+void acsysret(void);
+void actouser(void);
+void runacore(void);
+void aamloop(int);
+Dirtab *addarchfile(char *, int,
+		    int32_t (*)(Chan *, void *, int32_t, int64_t),
+		    int32_t (*)(Chan *, void *, int32_t, int64_t));
+void acmmuswitch(void);
+void acmodeset(int);
+void archfmtinstall(void);
+void archidle(void);
+int archmmu(void);
+void noerrorsleft(void);
+void archinit(void);
+void archreset(void);
+int64_t archhz(void);
+int cgaprint(int off, char *fmt, ...);
+int cgaclearln(int off, int c);
+void cgaconsputs(char *, int);
+void cgainit(void);
+void cgapost(int);
+void checkpa(char *, uintmem);
+#define clearmmucache() /* x86 doesn't have one */
+void (*coherence)(void);
+int corecolor(int);
+uint32_t cpuid(uint32_t, uint32_t, uint32_t[4]);
 int cpuidinfo(uint32_t, uint32_t, uint32_t[4]);
 char *cpuidname(uint32_t *);
-int	dbgprint(char*, ...);
-int	decref(Ref*);
-void	delay(int);
-void	dumpmmu(Proc*);
-void	dumpmmuwalk(const PTE *pml4, uint64_t pa);
-void	dumpptepg(int lvl, uintptr_t pa);
-#define	evenaddr(x)				/* x86 doesn't care */
-int	fpudevprocio(Proc*, void*, int32_t, uintptr_t, int);
-void	fpuinit(void);
-void	fpunoted(void);
-void	fpunotify(Ureg*);
-void	fpuprocrestore(Proc*);
-void	fpuprocsave(Proc*);
-void	fpusysprocsetup(Proc*);
-void	fpusysrfork(Ureg*);
-void	fpusysrforkchild(Proc*, Proc*);
-Mach*	getac(Proc*, int);
-char*	getconf(char*);
-void    gdb2ureg(uintptr_t *g, Ureg *u);
-void	halt(void);
-void	hardhalt(void);
-void	mouseenable(void);
-void	i8042systemreset(void);
-int	mousecmd(int);
-void	mouseenable(void);
-void	i8250console(char*);
-void	i8250uartconsole(Uart*, char *);
-void*	i8250alloc(int, int, int);
-int64_t	i8254hz(uint32_t *info0, uint32_t *info1);
-void	idlehands(void);
-void	acidthandlers(void);
-void	idthandlers(void);
-int	inb(int);
-int	incref(Ref*);
-void	insb(int, void*, int);
-uint16_t	ins(int);
-void	inss(int, void*, int);
-uint32_t	inl(int);
-void	insl(int, void*, int);
-int	intrdisable(void*);
-void*	intrenable(int, void (*)(Ureg*, void*), void*, int, char*);
-void	invlpg(uintptr_t);
-void	iofree(int);
-void	ioinit(void);
-int	iounused(int, int);
-int	ioalloc(int, int, int, char*);
-int	ioreserve(int, int, int, char*);
-int	iprint(char*, ...);
-int	isaconfig(char*, int, ISAConf*);
-void	kexit(Ureg*);
-void	keybenable(void);
-void	keybinit(void);
-#define	kmapinval()
-void	lfence(void);
-void	links(void);
-void	machinit(void);
-void	mach0init(void);
-void	mapraminit(uint64_t, uint64_t);
-void	mapupainit(uint64_t, uint32_t);
-void	meminit(void);
-void	mfence(void);
-void	mmuflushtlb(void);
-void	mmukflushtlb(void);
-void	mmuinit(void);
-void	mmukphysmap(PTE *pml4, uintmem, PTE, usize);
-int	mmukmapsync(uint64_t);
-uintmem	mmuphysaddr(const PTE *pml4, uintptr_t);
-int	mmuwalk(const PTE *pml4, uintptr_t, int, const PTE**);
-int	multiboot(uint32_t, uint32_t, int);
-void	ndnr(void);
-unsigned char	nvramread(int);
-void	nvramwrite(int, unsigned char);
-void	optionsinit(char*);
-void	outb(int, int);
-void	outsb(int, void*, int);
-void	outs(int, uint16_t);
-void	outss(int, void*, int);
-void	outl(int, uint32_t);
-void	outsl(int, void*, int);
-int	pcicap(Pcidev*, int);
-int	pcicfgr8(Pcidev*, int);
-int	pcicfgr16(Pcidev*, int);
-int	pcicfgr32(Pcidev*, int);
-void	pcicfgw8(Pcidev*, int, int);
-void	pcicfgw16(Pcidev*, int, int);
-void	pcicfgw32(Pcidev*, int, int);
-void	pciclrbme(Pcidev*);
-void	pciclrmwi(Pcidev*);
-int	pcigetpms(Pcidev*);
-void	pcihinv(Pcidev*);
-Pcidev*	pcimatch(Pcidev*, int, int);
-Pcidev*	pcimatchtbdf(int);
-void	pcireset(void);
-void	pcisetbme(Pcidev*);
-void	pcisetmwi(Pcidev*);
-int	pcisetpms(Pcidev*, int);
-void pcishowdev(Pcidev*);
-int	pickcore(int, int);
-void	pamapdump(void);
-void	pamapinit(void);
-void	pamapinsert(uintmem, usize, int);
-void	pamapmerge(void);
-void	printcpufreq(void);
-void	putac(Mach*);
+int dbgprint(char *, ...);
+int decref(Ref *);
+void delay(int);
+void dumpmmu(Proc *);
+void dumpmmuwalk(const PTE *pml4, uint64_t pa);
+void dumpptepg(int lvl, uintptr_t pa);
+#define evenaddr(x) /* x86 doesn't care */
+int fpudevprocio(Proc *, void *, int32_t, uintptr_t, int);
+void fpuinit(void);
+void fpunoted(void);
+void fpunotify(Ureg *);
+void fpuprocrestore(Proc *);
+void fpuprocsave(Proc *);
+void fpusysprocsetup(Proc *);
+void fpusysrfork(Ureg *);
+void fpusysrforkchild(Proc *, Proc *);
+Mach *getac(Proc *, int);
+char *getconf(char *);
+void gdb2ureg(uintptr_t *g, Ureg *u);
+void halt(void);
+void hardhalt(void);
+void mouseenable(void);
+void i8042systemreset(void);
+int mousecmd(int);
+void mouseenable(void);
+void i8250console(char *);
+void i8250uartconsole(Uart *, char *);
+void *i8250alloc(int, int, int);
+int64_t i8254hz(uint32_t *info0, uint32_t *info1);
+void idlehands(void);
+void acidthandlers(void);
+void idthandlers(void);
+int inb(int);
+int incref(Ref *);
+void insb(int, void *, int);
+uint16_t ins(int);
+void inss(int, void *, int);
+uint32_t inl(int);
+void insl(int, void *, int);
+int intrdisable(void *);
+void *intrenable(int, void (*)(Ureg *, void *), void *, int, char *);
+void invlpg(uintptr_t);
+void iofree(int);
+void ioinit(void);
+int iounused(int, int);
+int ioalloc(int, int, int, char *);
+int ioreserve(int, int, int, char *);
+int iprint(char *, ...);
+int isaconfig(char *, int, ISAConf *);
+void kexit(Ureg *);
+void keybenable(void);
+void keybinit(void);
+#define kmapinval()
+void lfence(void);
+void links(void);
+void machinit(void);
+void mach0init(void);
+void mapraminit(uint64_t, uint64_t);
+void mapupainit(uint64_t, uint32_t);
+void meminit(void);
+void mfence(void);
+void mmuflushtlb(void);
+void mmukflushtlb(void);
+void mmuinit(void);
+void mmukphysmap(PTE *pml4, uintmem, PTE, usize);
+int mmukmapsync(uint64_t);
+uintmem mmuphysaddr(const PTE *pml4, uintptr_t);
+int mmuwalk(const PTE *pml4, uintptr_t, int, const PTE **);
+int multiboot(uint32_t, uint32_t, int);
+void ndnr(void);
+unsigned char nvramread(int);
+void nvramwrite(int, unsigned char);
+void optionsinit(char *);
+void outb(int, int);
+void outsb(int, void *, int);
+void outs(int, uint16_t);
+void outss(int, void *, int);
+void outl(int, uint32_t);
+void outsl(int, void *, int);
+int pcicap(Pcidev *, int);
+int pcicfgr8(Pcidev *, int);
+int pcicfgr16(Pcidev *, int);
+int pcicfgr32(Pcidev *, int);
+void pcicfgw8(Pcidev *, int, int);
+void pcicfgw16(Pcidev *, int, int);
+void pcicfgw32(Pcidev *, int, int);
+void pciclrbme(Pcidev *);
+void pciclrmwi(Pcidev *);
+int pcigetpms(Pcidev *);
+void pcihinv(Pcidev *);
+Pcidev *pcimatch(Pcidev *, int, int);
+Pcidev *pcimatchtbdf(int);
+void pcireset(void);
+void pcisetbme(Pcidev *);
+void pcisetmwi(Pcidev *);
+int pcisetpms(Pcidev *, int);
+void pcishowdev(Pcidev *);
+int pickcore(int, int);
+void pamapdump(void);
+void pamapinit(void);
+void pamapinsert(uintmem, usize, int);
+void pamapmerge(void);
+void printcpufreq(void);
+void putac(Mach *);
 void *rsdsearch(void *start, uintptr_t size);
-void	runapcore(int);
-int	screenprint(char*, ...);			/* debugging */
-void	sfence(void);
-void	spldone(void);
-uint64_t	splhi(void);
-uint64_t	spllo(void);
-void	splx(uint64_t);
-void	splxpc(uint64_t);
-void	kstackok(void); /* panic if kstack guards garbaged, works with and without externup */
-Stackframe	*stackframe(void); /* l64v.S */
-void	stacksnippet(void);
-void	stopac(void);
-void	syncclock(void);
-void	syscall(unsigned int scallnr, Ureg *ureg);
-void*	sysexecregs(uintptr_t, uint32_t, void*);
-uintptr_t	sysexecstack(uintptr_t, int);
-void	sysprocsetup(Proc*);
-void	tssrsp0(Mach *, uint64_t);
-void	trapenable(int, void (*)(Ureg*, void*), void*, char*);
-void	trapinit(void);
-void	trap(Ureg*);
-void	umeminit(void);
-void    ureg2gdb(Ureg *u, uintptr_t *g);
-int	userureg(Ureg*);
-void*	vmap(uintptr_t, usize);
-void	vsvminit(int, int, Mach *);
-void	vunmap(void*, usize);
+void runapcore(int);
+int screenprint(char *, ...); /* debugging */
+void sfence(void);
+void spldone(void);
+uint64_t splhi(void);
+uint64_t spllo(void);
+void splx(uint64_t);
+void splxpc(uint64_t);
+void kstackok(void);	      /* panic if kstack guards garbaged, works with and without externup */
+Stackframe *stackframe(void); /* l64v.S */
+void stacksnippet(void);
+void stopac(void);
+void syncclock(void);
+void syscall(unsigned int scallnr, Ureg *ureg);
+void *sysexecregs(uintptr_t, uint32_t, void *);
+uintptr_t sysexecstack(uintptr_t, int);
+void sysprocsetup(Proc *);
+void tssrsp0(Mach *, uint64_t);
+void trapenable(int, void (*)(Ureg *, void *), void *, char *);
+void trapinit(void);
+void trap(Ureg *);
+void umeminit(void);
+void ureg2gdb(Ureg *u, uintptr_t *g);
+int userureg(Ureg *);
+void *vmap(uintptr_t, usize);
+void vsvminit(int, int, Mach *);
+void vunmap(void *, usize);
 
 extern uint64_t cr0get(void);
 extern void cr0put(uint64_t);
@@ -186,7 +186,7 @@ extern uintmem pml4get(void);
 extern void cr3put(uint64_t);
 extern uint64_t cr4get(void);
 extern void cr4put(uint64_t);
-extern void gdtget(void*);
+extern void gdtget(void *);
 extern void gdtput(int, uint64_t, uint16_t);
 extern void idtput(int, uint64_t);
 extern uint64_t rdmsr(uint32_t);
@@ -204,36 +204,36 @@ extern Mpl splhi(void);
 extern Mpl spllo(void);
 extern void splx(Mpl);
 
-int	cas32(void*, uint32_t, uint32_t);
-int	cas64(void*, uint64_t, uint64_t);
-int	tas32(void*);
-uint64_t	fas64(uint64_t*, uint64_t);
+int cas32(void *, uint32_t, uint32_t);
+int cas64(void *, uint64_t, uint64_t);
+int tas32(void *);
+uint64_t fas64(uint64_t *, uint64_t);
 
-#define CASU(p, e, n)	cas64((p), (uint64_t)(e), (uint64_t)(n))
-#define CASV(p, e, n)	cas64((p), (uint64_t)(e), (uint64_t)(n))
-#define CASP(p, e, n)	cas64((p), (uint64_t)(e), (uint64_t)(n))
-#define CASW(p, e, n)	cas32((p), (e), (n))
-#define TAS(addr)	tas32((addr))
-#define	FASP(p, v)	((void*)fas64((uint64_t*)(p), (uint64_t)(v)))
+#define CASU(p, e, n) cas64((p), (uint64_t)(e), (uint64_t)(n))
+#define CASV(p, e, n) cas64((p), (uint64_t)(e), (uint64_t)(n))
+#define CASP(p, e, n) cas64((p), (uint64_t)(e), (uint64_t)(n))
+#define CASW(p, e, n) cas32((p), (e), (n))
+#define TAS(addr) tas32((addr))
+#define FASP(p, v) ((void *)fas64((uint64_t *)(p), (uint64_t)(v)))
 
-void	touser(uintptr_t);
-void	syscallentry(void);
-void	acsyscallentry(void);
-void	syscallreturn(void);
-void	sysrforkret(void);
+void touser(uintptr_t);
+void syscallentry(void);
+void acsyscallentry(void);
+void syscallreturn(void);
+void sysrforkret(void);
 
-#define	waserror()	setlabel(&up->errlab[up->nerrlab++])
-#define	poperror()	up->nerrlab--
+#define waserror() setlabel(&up->errlab[up->nerrlab++])
+#define poperror() up->nerrlab--
 
-#define	dcflush(a, b)
+#define dcflush(a, b)
 
-#define PTR2UINT(p)	((uintptr_t)(p))
-#define UINT2PTR(i)	((void*)(i))
+#define PTR2UINT(p) ((uintptr_t)(p))
+#define UINT2PTR(i) ((void *)(i))
 
-void*	KADDR(uintptr_t);
-uintmem	PADDR(void*);
+void *KADDR(uintptr_t);
+uintmem PADDR(void *);
 
-#define BIOSSEG(a)	KADDR(((uint)(a))<<4)
+#define BIOSSEG(a) KADDR(((uint)(a)) << 4)
 
 /*
  * apic.c
@@ -254,7 +254,7 @@ extern void ioapiconline(void);
  * archamd64.c
  */
 extern void millidelay(int);
-extern void k10mwait(void*);
+extern void k10mwait(void *);
 
 /*
  * i8259.c
@@ -268,7 +268,7 @@ extern int i8259isr(int);
  * mp.c
  */
 extern int mpsinit(int);
-void*sigscan(uint8_t* address, int length, char* signature);
+void *sigscan(uint8_t *address, int length, char *signature);
 
 /*
  * sipi.c
@@ -286,7 +286,8 @@ void hi(char *s);
 void hihex(uint64_t x);
 
 Mach *machp(void);
-static inline Proc *externup(void)
+static inline Proc *
+externup(void)
 {
 	Mpl pl = splhi();
 	Proc *proc = machp()->externup;
@@ -294,7 +295,8 @@ static inline Proc *externup(void)
 	return proc;
 }
 
-static inline int machno()
+static inline int
+machno()
 {
 	Mpl pl = splhi();
 	int no = machp()->machno;
@@ -304,18 +306,22 @@ static inline int machno()
 
 /* temporary. */
 void die(char *);
-void dumpgpr(Ureg* ureg);
+void dumpgpr(Ureg *ureg);
 
 /* debug support. */
 int backtrace_list(uintptr_t pc, uintptr_t fp, uintptr_t *pcs, size_t nr_slots);
 
 /* horror */
-static inline void __clobber_callee_regs(void)
+static inline void
+__clobber_callee_regs(void)
 {
-	__asm__ volatile ("" : : : "rbx", "r12", "r13", "r14", "r15");
+	__asm__ volatile(""
+			 :
+			 :
+			 : "rbx", "r12", "r13", "r14", "r15");
 }
 
-int slim_setlabel(Label*) __attribute__((returns_twice));
+int slim_setlabel(Label *) __attribute__((returns_twice));
 
 #ifndef __clang__
 #pragma GCC diagnostic push
@@ -325,7 +331,7 @@ int slim_setlabel(Label*) __attribute__((returns_twice));
 #define setlabel(label) ({int err;                                                 \
                     __clobber_callee_regs();                               \
                     err = slim_setlabel(label);                                     \
-                    err;})
+                    err; })
 
 #ifndef __clang__
 #pragma GCC diagnostic pop

sys/src/9/amd64/fpu.c

@@ -21,57 +21,56 @@
 #include "amd64.h"
 #include "ureg.h"
 
-enum {						/* FCW, FSW and MXCSR */
-	I		= 0x00000001,		/* Invalid-Operation */
-	D		= 0x00000002,		/* Denormalized-Operand */
-	Z		= 0x00000004,		/* Zero-Divide */
-	O		= 0x00000008,		/* Overflow */
-	U		= 0x00000010,		/* Underflow */
-	P		= 0x00000020,		/* Precision */
+enum {		       /* FCW, FSW and MXCSR */
+       I = 0x00000001, /* Invalid-Operation */
+       D = 0x00000002, /* Denormalized-Operand */
+       Z = 0x00000004, /* Zero-Divide */
+       O = 0x00000008, /* Overflow */
+       U = 0x00000010, /* Underflow */
+       P = 0x00000020, /* Precision */
 };
 
-enum {						/* FCW */
-	PCs		= 0x00000000,		/* Precision Control -Single */
-	PCd		= 0x00000200,		/* -Double */
-	PCde		= 0x00000300,		/* -Double Extended */
-	RCn		= 0x00000000,		/* Rounding Control -Nearest */
-	RCd		= 0x00000400,		/* -Down */
-	RCu		= 0x00000800,		/* -Up */
-	RCz		= 0x00000C00,		/* -Toward Zero */
+enum {			  /* FCW */
+       PCs = 0x00000000,  /* Precision Control -Single */
+       PCd = 0x00000200,  /* -Double */
+       PCde = 0x00000300, /* -Double Extended */
+       RCn = 0x00000000,  /* Rounding Control -Nearest */
+       RCd = 0x00000400,  /* -Down */
+       RCu = 0x00000800,  /* -Up */
+       RCz = 0x00000C00,  /* -Toward Zero */
 };
 
-enum {						/* FSW */
-	Sff		= 0x00000040,		/* Stack Fault Flag */
-	Es		= 0x00000080,		/* Error Summary Status */
-	C0		= 0x00000100,		/* ZF - Condition Code Bits */
-	C1		= 0x00000200,		/* O/U# */
-	C2		= 0x00000400,		/* PF */
-	C3		= 0x00004000,		/* ZF */
-	B		= 0x00008000,		/* Busy */
+enum {			 /* FSW */
+       Sff = 0x00000040, /* Stack Fault Flag */
+       Es = 0x00000080,	 /* Error Summary Status */
+       C0 = 0x00000100,	 /* ZF - Condition Code Bits */
+       C1 = 0x00000200,	 /* O/U# */
+       C2 = 0x00000400,	 /* PF */
+       C3 = 0x00004000,	 /* ZF */
+       B = 0x00008000,	 /* Busy */
 };
 
-enum {						/* MXCSR */
-	Daz		= 0x00000040,		/* Denormals are Zeros */
-	Im		= 0x00000080,		/* I Mask */
-	Dm		= 0x00000100,		/* D Mask */
-	Zm		= 0x00000200,		/* Z Mask */
-	Om		= 0x00000400,		/* O Mask */
-	Um		= 0x00000800,		/* U Mask */
-	Pm		= 0x00001000,		/* P Mask */
-	Rn		= 0x00000000,		/* Round to Nearest */
-	Rd		= 0x00002000,		/* Round Down */
-	Ru		= 0x00004000,		/* Round Up */
-	Rz		= 0x00006000,		/* Round toward Zero */
-	Fz		= 0x00008000,		/* Flush to Zero for Um */
+enum {			 /* MXCSR */
+       Daz = 0x00000040, /* Denormals are Zeros */
+       Im = 0x00000080,	 /* I Mask */
+       Dm = 0x00000100,	 /* D Mask */
+       Zm = 0x00000200,	 /* Z Mask */
+       Om = 0x00000400,	 /* O Mask */
+       Um = 0x00000800,	 /* U Mask */
+       Pm = 0x00001000,	 /* P Mask */
+       Rn = 0x00000000,	 /* Round to Nearest */
+       Rd = 0x00002000,	 /* Round Down */
+       Ru = 0x00004000,	 /* Round Up */
+       Rz = 0x00006000,	 /* Round toward Zero */
+       Fz = 0x00008000,	 /* Flush to Zero for Um */
 };
 
 static Fxsave defaultFxsave;
 
-extern void _fxrstor(Fxsave*);
-extern void _fxsave(Fxsave*);
+extern void _fxrstor(Fxsave *);
+extern void _fxsave(Fxsave *);
 extern void _fninit(void);
 
-
 static void
 fpusave(Fxsave *fxsave)
 {
@@ -85,7 +84,7 @@ fpurestore(Fxsave *fxsave)
 }
 
 int
-fpudevprocio(Proc* proc, void* a, int32_t n, uintptr_t offset, int write)
+fpudevprocio(Proc *proc, void *a, int32_t n, uintptr_t offset, int write)
 {
 	/*
 	 * Called from procdevtab.read and procdevtab.write
@@ -94,21 +93,21 @@ fpudevprocio(Proc* proc, void* a, int32_t n, uintptr_t offset, int write)
 	 * from the port code; it would be nice to have dynamic
 	 * creation of entries in the device file trees...
 	 */
-	if (offset >= sizeof(Fxsave))
+	if(offset >= sizeof(Fxsave))
 		return 0;
 
-	uint8_t *p = (uint8_t*)&proc->FPU.fxsave;
+	uint8_t *p = (uint8_t *)&proc->FPU.fxsave;
 
-	switch (write) {
+	switch(write){
 	default:
-		if(offset+n > sizeof(Fxsave))
+		if(offset + n > sizeof(Fxsave))
 			n = sizeof(Fxsave) - offset;
-		memmove(p+offset, a, n);
+		memmove(p + offset, a, n);
 		break;
 	case 0:
-		if(offset+n > sizeof(Fxsave))
+		if(offset + n > sizeof(Fxsave))
 			n = sizeof(Fxsave) - offset;
-		memmove(a, p+offset, n);
+		memmove(a, p + offset, n);
 		break;
 	}
 
@@ -116,7 +115,7 @@ fpudevprocio(Proc* proc, void* a, int32_t n, uintptr_t offset, int write)
 }
 
 void
-fpunotify(Ureg* u)
+fpunotify(Ureg *u)
 {
 	/*
 	 * Called when a note is about to be delivered to a
@@ -135,7 +134,7 @@ fpunoted(void)
 }
 
 void
-fpusysrfork(Ureg* u)
+fpusysrfork(Ureg *u)
 {
 	/*
 	 * Called early in the non-interruptible path of
@@ -149,7 +148,7 @@ fpusysrfork(Ureg* u)
 }
 
 void
-fpusysrforkchild(Proc* child, Proc* parent)
+fpusysrforkchild(Proc *child, Proc *parent)
 {
 	/*
 	 * Called later in sysrfork() via the machine-dependent
@@ -160,7 +159,7 @@ fpusysrforkchild(Proc* child, Proc* parent)
 }
 
 void
-fpuprocsave(Proc* p)
+fpuprocsave(Proc *p)
 {
 	/*
 	 * Called from sched() and sleep() via the machine-dependent
@@ -169,9 +168,9 @@ fpuprocsave(Proc* p)
 	 */
 
 	// The process is dead so don't save anything
-	if (p->state == Moribund) {
-        _fninit();
-	    return;
+	if(p->state == Moribund){
+		_fninit();
+		return;
 	}
 
 	// Save the FPU state without handling pending unmasked exceptions.
@@ -180,14 +179,14 @@ fpuprocsave(Proc* p)
 }
 
 void
-fpuprocrestore(Proc* p)
+fpuprocrestore(Proc *p)
 {
 	// The process has been rescheduled and is about to run.
 	fpurestore(&p->FPU.fxsave);
 }
 
 void
-fpusysprocsetup(Proc* p)
+fpusysprocsetup(Proc *p)
 {
 	fpurestore(&defaultFxsave);
 }
@@ -198,8 +197,8 @@ acfpusysprocsetup(Proc *p)
 	fpusysprocsetup(p);
 }
 
-static char*
-xfpuxm(Ureg* ureg, void* v)
+static char *
+xfpuxm(Ureg *ureg, void *v)
 {
 	Proc *up = externup();
 	uint32_t mxcsr;
@@ -215,17 +214,17 @@ xfpuxm(Ureg* ureg, void* v)
 
 	// Notify the user process.
 	mxcsr = up->FPU.fxsave.mxcsr;
-	if ((mxcsr & (Im|I)) == I)
+	if((mxcsr & (Im | I)) == I)
 		cm = "Invalid Operation";
-	else if ((mxcsr & (Dm|D)) == D)
+	else if((mxcsr & (Dm | D)) == D)
 		cm = "Denormal Operand";
-	else if ((mxcsr & (Zm|Z)) == Z)
+	else if((mxcsr & (Zm | Z)) == Z)
 		cm = "Divide-By-Zero";
-	else if ((mxcsr & (Om|O)) == O)
+	else if((mxcsr & (Om | O)) == O)
 		cm = "Numeric Overflow";
-	else if ((mxcsr & (Um|U)) == U)
+	else if((mxcsr & (Um | U)) == U)
 		cm = "Numeric Underflow";
-	else if ((mxcsr & (Pm|P)) == P)
+	else if((mxcsr & (Pm | P)) == P)
 		cm = "Precision";
 	else
 		cm = "Unknown";
@@ -240,11 +239,11 @@ fpuxm(Ureg *ureg, void *p)
 	Proc *up = externup();
 
 	char *n = xfpuxm(ureg, p);
-	if (n != nil)
+	if(n != nil)
 		postnote(up, 1, n, NDebug);
 }
 
-static char*
+static char *
 acfpuxm(Ureg *ureg, void *p)
 {
 	return xfpuxm(ureg, p);
@@ -256,22 +255,22 @@ fpuinit(void)
 	// It's assumed there is an integrated FPU, so Em is cleared;
 	uint64_t cr0 = cr0get();
 	cr0 &= ~Em;
-	cr0 |= Ne|Mp;
+	cr0 |= Ne | Mp;
 	cr0put(cr0);
 
 	uint64_t cr4 = cr4get();
-	cr4 |= Osxmmexcpt|Osfxsr;
+	cr4 |= Osxmmexcpt | Osfxsr;
 	cr4put(cr4);
 
-    _fninit();
+	_fninit();
 	memset(&defaultFxsave, 0, sizeof(defaultFxsave));
 
 	fpusave(&defaultFxsave);
 
 	defaultFxsave.mxcsrmask = 0x0000FFBF;
-	defaultFxsave.mxcsr &= Rn|Pm|Um|Dm;
+	defaultFxsave.mxcsr &= Rn | Pm | Um | Dm;
 
-	if (machp()->machno != 0)
+	if(machp()->machno != 0)
 		return;
 
 	// Set up the exception handlers.

sys/src/9/amd64/i8254.c

@@ -16,49 +16,49 @@
 /*
  * 8254 Programmable Interval Timer and compatibles.
  */
-enum {					/* I/O ports */
-	Timer1		= 0x40,
-	Timer2		= 0x48,		/* Counter0 is watchdog (EISA) */
-
-	Counter0	= 0,		/* Counter 0 Access Port */
-	Counter1	= 1,		/* Counter 1 Access Port */
-	Counter2	= 2,		/* Counter 2 Access Port */
-	Control		= 3,		/* Timer Control Word */
+enum { /* I/O ports */
+       Timer1 = 0x40,
+       Timer2 = 0x48, /* Counter0 is watchdog (EISA) */
+
+       Counter0 = 0, /* Counter 0 Access Port */
+       Counter1 = 1, /* Counter 1 Access Port */
+       Counter2 = 2, /* Counter 2 Access Port */
+       Control = 3,  /* Timer Control Word */
 };
 
-enum {					/* Control */
-	Bcd		= 0x01,		/* Binary/BCD countdown select */
-
-	Mode0		= 0x00,		/* [3:1] interrupt on terminal count */
-	Mode1		= 0x02,		/* hardware re-triggerable one-shot */
-	Mode2		= 0x04,		/* rate generator */
-	Mode3		= 0x06,		/* square-wave generator */
-	Mode4		= 0x08,		/* sofware triggered strobe */
-	Mode5		= 0x0A,		/* hardware triggered strobe */
-
-	Clc		= 0x00,		/* [5:4] Counter Latch Command */
-	RWlsb		= 0x10,		/* R/W LSB */
-	RWmsb		= 0x20,		/* R/W MSB */
-	RW16		= 0x30,		/* R/W LSB then MSB */
-	Cs0		= 0x00,		/* [7:6] Counter 0 Select */
-	Cs1		= 0x40,		/* Counter 1 Select */
-	Cs2		= 0x80,		/* Counter 2 Select */
-
-	Rbc		= 0xC0,		/* Read-Back Command */
-	RbCnt0		= 0x02,		/* Select Counter 0 */
-	RbCnt1		= 0x04,		/* Select Counter 1 */
-	RbCnt2		= 0x08,		/* Select Counter 2 */
-	RbS		= 0x20,		/* Read-Back Status */
-	RbC		= 0x10,		/* Read-Back Count */
-	RbCS		= 0x00,		/* Read-Back Count and Status */
-
-	RbNULL		= 0x40,		/* NULL-Count Flag */
-	RbOUT		= 0x80,		/* OUT-pin */
+enum {		   /* Control */
+       Bcd = 0x01, /* Binary/BCD countdown select */
+
+       Mode0 = 0x00, /* [3:1] interrupt on terminal count */
+       Mode1 = 0x02, /* hardware re-triggerable one-shot */
+       Mode2 = 0x04, /* rate generator */
+       Mode3 = 0x06, /* square-wave generator */
+       Mode4 = 0x08, /* sofware triggered strobe */
+       Mode5 = 0x0A, /* hardware triggered strobe */
+
+       Clc = 0x00,   /* [5:4] Counter Latch Command */
+       RWlsb = 0x10, /* R/W LSB */
+       RWmsb = 0x20, /* R/W MSB */
+       RW16 = 0x30,  /* R/W LSB then MSB */
+       Cs0 = 0x00,   /* [7:6] Counter 0 Select */
+       Cs1 = 0x40,   /* Counter 1 Select */
+       Cs2 = 0x80,   /* Counter 2 Select */
+
+       Rbc = 0xC0,    /* Read-Back Command */
+       RbCnt0 = 0x02, /* Select Counter 0 */
+       RbCnt1 = 0x04, /* Select Counter 1 */
+       RbCnt2 = 0x08, /* Select Counter 2 */
+       RbS = 0x20,    /* Read-Back Status */
+       RbC = 0x10,    /* Read-Back Count */
+       RbCS = 0x00,   /* Read-Back Count and Status */
+
+       RbNULL = 0x40, /* NULL-Count Flag */
+       RbOUT = 0x80,  /* OUT-pin */
 };
 
 enum {
-	Osc		= 1193182,	/* 14.318180MHz/12 */
-	Hz		= 82,		/* 2*41*14551 = 1193182 */
+	Osc = 1193182, /* 14.318180MHz/12 */
+	Hz = 82,       /* 2*41*14551 = 1193182 */
 };
 
 static void
@@ -71,18 +71,18 @@ i8254set(int port, int hz)
 	 * it's normally connected to IRQ0 on an interrupt controller.
 	 * Use a periodic square wave (Mode3).
 	 */
-	counter = Osc/hz;
-	outb(port+Control, Cs0|RW16|Mode3);
-	outb(port+Counter0, counter);
-	outb(port+Counter0, counter>>8);
+	counter = Osc / hz;
+	outb(port + Control, Cs0 | RW16 | Mode3);
+	outb(port + Counter0, counter);
+	outb(port + Counter0, counter >> 8);
 
 	/*
 	 * Wait until the counting register has been loaded
 	 * into the counting element.
 	 */
 	for(timeo = 0; timeo < 100000; timeo++){
-		outb(port+Control, Rbc|RbS|RbCnt0);
-		if(!(inb(port+Counter0) & RbNULL))
+		outb(port + Control, Rbc | RbS | RbCnt0);
+		if(!(inb(port + Counter0) & RbNULL))
 			break;
 	}
 }
@@ -111,8 +111,7 @@ i8254hz(uint32_t *info0, uint32_t *info1)
 			aamcycles = 16;
 			break;
 		}
-	}
-	else if(memcmp(&info0[1], "AuthcAMDenti", 12) == 0){
+	} else if(memcmp(&info0[1], "AuthcAMDenti", 12) == 0){
 		switch(ax){
 		default:
 			return 0;
@@ -121,8 +120,7 @@ i8254hz(uint32_t *info0, uint32_t *info1)
 			aamcycles = 11;
 			break;
 		}
-	}
-	else
+	} else
 		return 0;
 
 	i8254set(Timer1, Hz);
@@ -130,10 +128,11 @@ i8254hz(uint32_t *info0, uint32_t *info1)
 	/*
 	 * Find biggest loop that doesn't wrap.
 	 */
-	SET(a); SET(b);
-	incr = 16000000/(aamcycles*Hz*2);
+	SET(a);
+	SET(b);
+	incr = 16000000 / (aamcycles * Hz * 2);
 	x = 2000;
-	for(loops = incr; loops < 64*1024; loops += incr) {
+	for(loops = incr; loops < 64 * 1024; loops += incr){
 		/*
 		 * Measure time for the loop
 		 *
@@ -147,31 +146,31 @@ i8254hz(uint32_t *info0, uint32_t *info1)
 		 * prefetch buffer.
 		 * The AAM instruction is not available in 64-bit mode.
 		 */
-		outb(Timer1+Control, Cs0|Clc);
+		outb(Timer1 + Control, Cs0 | Clc);
 
 		a = rdtsc();
-		x = inb(Timer1+Counter0);
-		x |= inb(Timer1+Counter0)<<8;
+		x = inb(Timer1 + Counter0);
+		x |= inb(Timer1 + Counter0) << 8;
 		aamloop(loops);
-		outb(Timer1+Control, Cs0|Clc);
+		outb(Timer1 + Control, Cs0 | Clc);
 		b = rdtsc();
 
-		y = inb(Timer1+Counter0);
-		y |= inb(Timer1+Counter0)<<8;
+		y = inb(Timer1 + Counter0);
+		y |= inb(Timer1 + Counter0) << 8;
 		x -= y;
 
 		if(x < 0)
-			x += Osc/Hz;
+			x += Osc / Hz;
 
-		if(x > Osc/(3*Hz))
+		if(x > Osc / (3 * Hz))
 			break;
 	}
 
 	/*
  	 * Figure out clock frequency.
 	 */
-	b = (b-a)<<1;
+	b = (b - a) << 1;
 	b *= Osc;
 
-	return b/x;
+	return b / x;
 }

sys/src/9/amd64/i8259.c

@@ -18,55 +18,55 @@
 /*
  * 8259 Interrupt Controller and compatibles.
  */
-enum {					/* I/O ports */
-	Cntrl1		= 0x20,
-	Cntrl2		= 0xa0,
+enum { /* I/O ports */
+       Cntrl1 = 0x20,
+       Cntrl2 = 0xa0,
 
-	Icw1		= 0,		/* Initialisation Command Word 1 */
-	Icw2		= 1,
-	Icw3		= 1,
-	Icw4		= 1,
+       Icw1 = 0, /* Initialisation Command Word 1 */
+       Icw2 = 1,
+       Icw3 = 1,
+       Icw4 = 1,
 
-	Ocw1		= 1,		/* Operational Control Word 1 */
-	Ocw2		= 0,
-	Ocw3		= 0,
+       Ocw1 = 1, /* Operational Control Word 1 */
+       Ocw2 = 0,
+       Ocw3 = 0,
 
-	Imr		= Ocw1,		/* Interrupt Mask Register */
-	Isr		= Ocw3,		/* In-Service Register */
-	Irr		= Ocw3,		/* Interrupt Request Register */
+       Imr = Ocw1, /* Interrupt Mask Register */
+       Isr = Ocw3, /* In-Service Register */
+       Irr = Ocw3, /* Interrupt Request Register */
 
-	Elcr1		= 0x4d0,	/* Edge/Level Control Register */
-	Elcr2		= 0x4d1,
+       Elcr1 = 0x4d0, /* Edge/Level Control Register */
+       Elcr2 = 0x4d1,
 };
 
-enum {					/* Icw1 */
-	Ic4		= 0x01,		/* there will be an Icw4 */
-	Icw1sel		= 0x10,		/* Icw/Ocw select */
+enum {		       /* Icw1 */
+       Ic4 = 0x01,     /* there will be an Icw4 */
+       Icw1sel = 0x10, /* Icw/Ocw select */
 };
 
-enum {					/* Icw3 */
-	Cascaded	= 0x04,		/* Cntrl1 - Cascaded Mode Enable */
-	SlaveIRQ2	= 0x02,		/* Cntrl2 - Slave Identification Code */
+enum {			 /* Icw3 */
+       Cascaded = 0x04,	 /* Cntrl1 - Cascaded Mode Enable */
+       SlaveIRQ2 = 0x02, /* Cntrl2 - Slave Identification Code */
 };
 
-enum {					/* Icw4 */
-	Microprocessor	= 0x01,		/* 80x86-based system */
+enum {			      /* Icw4 */
+       Microprocessor = 0x01, /* 80x86-based system */
 };
 
-enum {					/* Ocw2 */
-	Ocw2sel		= 0x00,		/* Ocw2 select */
-	Eoi		= 0x20,		/* Non-spcific EOI command */
+enum {		       /* Ocw2 */
+       Ocw2sel = 0x00, /* Ocw2 select */
+       Eoi = 0x20,     /* Non-spcific EOI command */
 };
 
-enum {					/* Ocw3 */
-	Irrread		= 0x02,		/* Read IRQ register */
-	Isrread		= 0x03,		/* Read IS register */
-	Ocw3sel		= 0x08,		/* Ocw3 select */
+enum {		       /* Ocw3 */
+       Irrread = 0x02, /* Read IRQ register */
+       Isrread = 0x03, /* Read IS register */
+       Ocw3sel = 0x08, /* Ocw3 select */
 };
 
 static Lock i8259lock;
-static int i8259mask = ~0;		/* mask of disabled interrupts */
-static int i8259elcr;			/* mask of level interrupts */
+static int i8259mask = ~0; /* mask of disabled interrupts */
+static int i8259elcr;	   /* mask of level interrupts */
 
 int
 i8259init(int vectorbase)
@@ -85,26 +85,26 @@ i8259init(int vectorbase)
 	 * cascade mode. Cntrl1 is connected as the master and Cntrl2
 	 * as the slave; IRQ2 is used to cascade the two controllers.
 	 */
-	outb(Cntrl1+Icw1, Icw1sel|Ic4);
-	outb(Cntrl1+Icw2, vectorbase);
-	outb(Cntrl1+Icw3, Cascaded);
-	outb(Cntrl1+Icw4, Microprocessor);
+	outb(Cntrl1 + Icw1, Icw1sel | Ic4);
+	outb(Cntrl1 + Icw2, vectorbase);
+	outb(Cntrl1 + Icw3, Cascaded);
+	outb(Cntrl1 + Icw4, Microprocessor);
 
-	outb(Cntrl2+Icw1, Icw1sel|Ic4);
-	outb(Cntrl2+Icw2, vectorbase+8);
-	outb(Cntrl2+Icw3, SlaveIRQ2);
-	outb(Cntrl2+Icw4, Microprocessor);
+	outb(Cntrl2 + Icw1, Icw1sel | Ic4);
+	outb(Cntrl2 + Icw2, vectorbase + 8);
+	outb(Cntrl2 + Icw3, SlaveIRQ2);
+	outb(Cntrl2 + Icw4, Microprocessor);
 
 	/*
 	 * Set the interrupt masks, allowing interrupts
 	 * to pass from Cntrl2 to Cntrl1 on IRQ2.
 	 */
-	i8259mask &= ~(1<<2);
-	outb(Cntrl2+Imr, (i8259mask>>8) & 0xff);
-	outb(Cntrl1+Imr, i8259mask & 0xff);
+	i8259mask &= ~(1 << 2);
+	outb(Cntrl2 + Imr, (i8259mask >> 8) & 0xff);
+	outb(Cntrl1 + Imr, i8259mask & 0xff);
 
-	outb(Cntrl1+Ocw2, Ocw2sel|Eoi);
-	outb(Cntrl2+Ocw2, Ocw2sel|Eoi);
+	outb(Cntrl1 + Ocw2, Ocw2sel | Eoi);
+	outb(Cntrl2 + Ocw2, Ocw2sel | Eoi);
 
 	/*
 	 * Set Ocw3 to return the ISR when read for i8259isr()
@@ -112,10 +112,10 @@ i8259init(int vectorbase)
 	 * Read IRR first to possibly deassert an outstanding
 	 * interrupt.
 	 */
-	inb(Cntrl1+Irr);
-	outb(Cntrl1+Ocw3, Ocw3sel|Isrread);
-	inb(Cntrl2+Irr);
-	outb(Cntrl2+Ocw3, Ocw3sel|Isrread);
+	inb(Cntrl1 + Irr);
+	outb(Cntrl1 + Ocw3, Ocw3sel | Isrread);
+	inb(Cntrl2 + Irr);
+	outb(Cntrl2 + Ocw3, Ocw3sel | Isrread);
 
 	/*
 	 * Check for Edge/Level Control register.
@@ -124,7 +124,7 @@ i8259init(int vectorbase)
 	 * IRQs 13, 8, 2, 1 and 0 must be edge (0). If
 	 * that's OK try a R/W test.
 	 */
-	elcr = (inb(Elcr2)<<8)|inb(Elcr1);
+	elcr = (inb(Elcr2) << 8) | inb(Elcr1);
 	if(!(elcr & 0x2107)){
 		outb(Elcr1, 0);
 		if(inb(Elcr1) == 0){
@@ -144,9 +144,9 @@ i8259isr(int vno)
 {
 	int irq, isr;
 
-	if(vno < IdtPIC || vno > IdtPIC+15)
+	if(vno < IdtPIC || vno > IdtPIC + 15)
 		return 0;
-	irq = vno-IdtPIC;
+	irq = vno - IdtPIC;
 
 	/*
 	 * Collect the interrupt status,
@@ -156,21 +156,21 @@ i8259isr(int vno)
 	 * used).
 	 */
 	ilock(&i8259lock);
-	isr = inb(Cntrl1+Isr);
-	outb(Cntrl1+Ocw2, Ocw2sel|Eoi);
+	isr = inb(Cntrl1 + Isr);
+	outb(Cntrl1 + Ocw2, Ocw2sel | Eoi);
 	if(irq >= 8){
-		isr |= inb(Cntrl2+Isr)<<8;
-		outb(Cntrl2+Ocw2, Ocw2sel|Eoi);
+		isr |= inb(Cntrl2 + Isr) << 8;
+		outb(Cntrl2 + Ocw2, Ocw2sel | Eoi);
 	}
 	iunlock(&i8259lock);
 
-	return isr & (1<<irq);
+	return isr & (1 << irq);
 }
 
 #ifdef notdef
 
 int
-i8259irqenable(Vctl* v)
+i8259irqenable(Vctl *v)
 {
 	int irq, irqbit;
 
@@ -184,7 +184,7 @@ i8259irqenable(Vctl* v)
 		print("i8259enable: irq %d out of range\n", irq);
 		return -1;
 	}
-	irqbit = 1<<irq;
+	irqbit = 1 << irq;
 
 	ilock(&i8259lock);
 	if(!(i8259mask & irqbit) && !(i8259elcr & irqbit)){
@@ -194,9 +194,9 @@ i8259irqenable(Vctl* v)
 	}
 	i8259mask &= ~irqbit;
 	if(irq < 8)
-		outb(Cntrl1+Imr, i8259mask & 0xff);
+		outb(Cntrl1 + Imr, i8259mask & 0xff);
 	else
-		outb(Cntrl2+Imr, (i8259mask>>8) & 0xff);
+		outb(Cntrl2 + Imr, (i8259mask >> 8) & 0xff);
 
 	if(i8259elcr & irqbit)
 		v->eoi = i8259isr;
@@ -205,7 +205,7 @@ i8259irqenable(Vctl* v)
 	iunlock(&i8259lock);
 
 	v->type = "8259";
-	return IdtPIC+irq;
+	return IdtPIC + irq;
 }
 
 int
@@ -221,15 +221,15 @@ i8259irqdisable(int irq)
 		print("i8259disable: irq %d out of range\n", irq);
 		return -1;
 	}
-	irqbit = 1<<irq;
+	irqbit = 1 << irq;
 
 	ilock(&i8259lock);
 	if(!(i8259mask & irqbit)){
 		i8259mask |= irqbit;
 		if(irq < 8)
-			outb(Cntrl1+Imr, i8259mask & 0xff);
+			outb(Cntrl1 + Imr, i8259mask & 0xff);
 		else
-			outb(Cntrl2+Imr, (i8259mask>>8) & 0xff);
+			outb(Cntrl2 + Imr, (i8259mask >> 8) & 0xff);
 	}
 	iunlock(&i8259lock);
 

sys/src/9/amd64/init9.c

@@ -7,17 +7,19 @@
  * in the LICENSE file.
  */
 
-extern void startboot(char*, char**);
+extern void startboot(char *, char **);
 
 void
-main(char* argv0)
+main(char *argv0)
 {
-	char *ar[2] = {"boot", };
+	char *ar[2] = {
+		"boot",
+	};
 	int write(int, void *, int);
 	//do it this way to make sure it doesn't end up in .data
 	char a[2];
 	a[1] = '0';
 	write(1, a, 1);
-	startboot(argv0, ar); // &argv0);
-//	while(1) write(1, "hi\n", 3);
+	startboot(argv0, ar);	     // &argv0);
+				     //	while(1) write(1, "hi\n", 3);
 }

sys/src/9/amd64/io.h

@@ -8,277 +8,276 @@
  */
 
 enum {
-	VectorNMI	= 2,		/* non-maskable interrupt */
-	VectorBPT	= 3,		/* breakpoint */
-	VectorUD	= 6,		/* invalid opcode exception */
-	VectorCNA	= 7,		/* coprocessor not available */
-	Vector2F	= 8,		/* double fault */
-	VectorCSO	= 9,		/* coprocessor segment overrun */
-	VectorPF	= 14,		/* page fault */
-	Vector15	= 15,		/* reserved */
-	VectorCERR	= 16,		/* coprocessor error */
-
-	VectorPIC	= 32,		/* external i8259 interrupts */
-	IrqCLOCK	= 0,
-	IrqKBD		= 1,
-	IrqUART1	= 3,
-	IrqUART0	= 4,
-	IrqPCMCIA	= 5,
-	IrqFLOPPY	= 6,
-	IrqLPT		= 7,
-	IrqIRQ7		= 7,
-	IrqAUX		= 12,		/* PS/2 port */
-	IrqIRQ13	= 13,		/* coprocessor on 386 */
-	IrqATA0		= 14,
-	IrqATA1		= 15,
-	MaxIrqPIC	= 15,
-
-	VectorLAPIC	= VectorPIC+16,	/* local APIC interrupts */
-	IrqLINT0	= VectorLAPIC+0,
-	IrqLINT1	= VectorLAPIC+1,
-	IrqTIMER	= VectorLAPIC+2,
-	IrqERROR	= VectorLAPIC+3,
-	IrqPCINT	= VectorLAPIC+4,
-	IrqSPURIOUS	= VectorLAPIC+15,
-	MaxIrqLAPIC	= VectorLAPIC+15,
-
-	VectorSYSCALL	= 64,
-
-	VectorAPIC	= 65,		/* external APIC interrupts */
-	MaxVectorAPIC	= 255,
+	VectorNMI = 2,	 /* non-maskable interrupt */
+	VectorBPT = 3,	 /* breakpoint */
+	VectorUD = 6,	 /* invalid opcode exception */
+	VectorCNA = 7,	 /* coprocessor not available */
+	Vector2F = 8,	 /* double fault */
+	VectorCSO = 9,	 /* coprocessor segment overrun */
+	VectorPF = 14,	 /* page fault */
+	Vector15 = 15,	 /* reserved */
+	VectorCERR = 16, /* coprocessor error */
+
+	VectorPIC = 32, /* external i8259 interrupts */
+	IrqCLOCK = 0,
+	IrqKBD = 1,
+	IrqUART1 = 3,
+	IrqUART0 = 4,
+	IrqPCMCIA = 5,
+	IrqFLOPPY = 6,
+	IrqLPT = 7,
+	IrqIRQ7 = 7,
+	IrqAUX = 12,   /* PS/2 port */
+	IrqIRQ13 = 13, /* coprocessor on 386 */
+	IrqATA0 = 14,
+	IrqATA1 = 15,
+	MaxIrqPIC = 15,
+
+	VectorLAPIC = VectorPIC + 16, /* local APIC interrupts */
+	IrqLINT0 = VectorLAPIC + 0,
+	IrqLINT1 = VectorLAPIC + 1,
+	IrqTIMER = VectorLAPIC + 2,
+	IrqERROR = VectorLAPIC + 3,
+	IrqPCINT = VectorLAPIC + 4,
+	IrqSPURIOUS = VectorLAPIC + 15,
+	MaxIrqLAPIC = VectorLAPIC + 15,
+
+	VectorSYSCALL = 64,
+
+	VectorAPIC = 65, /* external APIC interrupts */
+	MaxVectorAPIC = 255,
 };
 
 enum {
-	IdtPIC		= 32,		/* external i8259 interrupts */
+	IdtPIC = 32, /* external i8259 interrupts */
 
-	IdtLINT0	= 48,		/* local APIC interrupts */
-	IdtLINT1	= 49,
-	IdtTIMER	= 50,
-	IdtERROR	= 51,
-	IdtPCINT	= 52,
+	IdtLINT0 = 48, /* local APIC interrupts */
+	IdtLINT1 = 49,
+	IdtTIMER = 50,
+	IdtERROR = 51,
+	IdtPCINT = 52,
 
-	IdtIPI		= 62,
-	IdtSPURIOUS	= 63,
+	IdtIPI = 62,
+	IdtSPURIOUS = 63,
 
-	IdtSYSCALL	= 64,
+	IdtSYSCALL = 64,
 
-	IdtIOAPIC	= 65,		/* external APIC interrupts */
+	IdtIOAPIC = 65, /* external APIC interrupts */
 
-	IdtMAX		= 255,
+	IdtMAX = 255,
 };
 
 typedef struct Vkey {
-	int	tbdf;			/* pci: ioapic or msi sources */
-	int	irq;			/* 8259-emulating sources */
+	int tbdf; /* pci: ioapic or msi sources */
+	int irq;  /* 8259-emulating sources */
 } Vkey;
 
 typedef struct Vctl {
-	Vctl*	next;			/* handlers on this vector */
+	Vctl *next; /* handlers on this vector */
 
-	int	isintr;			/* interrupt or fault/trap */
+	int isintr; /* interrupt or fault/trap */
 
-	Vkey Vkey;			/* source-specific key; tbdf for pci */
-	void	(*f)(Ureg*, void*);	/* handler to call */
-	void*	a;			/* argument to call it with */
-	char	name[KNAMELEN];		/* of driver */
-	char	*type;
+	Vkey Vkey;		   /* source-specific key; tbdf for pci */
+	void (*f)(Ureg *, void *); /* handler to call */
+	void *a;		   /* argument to call it with */
+	char name[KNAMELEN];	   /* of driver */
+	char *type;
 
-	int	(*isr)(int);		/* get isr bit for this irq */
-	int	(*eoi)(int);		/* eoi */
-	int	(*mask)(Vkey*, int);	/* interrupt enable returns masked vector */
-	int	vno;
+	int (*isr)(int);	  /* get isr bit for this irq */
+	int (*eoi)(int);	  /* eoi */
+	int (*mask)(Vkey *, int); /* interrupt enable returns masked vector */
+	int vno;
 } Vctl;
 
 typedef struct ACVctl {
-	char*	(*f)(Ureg*,void*);
-	void*	a;
-	int	vno;
-	char	name[KNAMELEN];		/* of driver */
+	char *(*f)(Ureg *, void *);
+	void *a;
+	int vno;
+	char name[KNAMELEN]; /* of driver */
 } ACVctl;
 
 enum {
-	BusCBUS		= 0,	/* Corollary CBUS */
-	BusCBUSII,		/* Corollary CBUS II */
-	BusEISA,		/* Extended ISA */
-	BusFUTURE,		/* IEEE Futurebus */
-	BusINTERN,		/* Internal bus */
-	BusISA,			/* Industry Standard Architecture */
-	BusMBI,			/* Multibus I */
-	BusMBII,		/* Multibus II */
-	BusMCA,			/* Micro Channel Architecture */
-	BusMPI,			/* MPI */
-	BusMPSA,		/* MPSA */
-	BusNUBUS,		/* Apple Macintosh NuBus */
-	BusPCI,			/* Peripheral Component Interconnect */
-	BusPCMCIA,		/* PC Memory Card International Association */
-	BusTC,			/* DEC TurboChannel */
-	BusVL,			/* VESA Local bus */
-	BusVME,			/* VMEbus */
-	BusXPRESS,		/* Express System Bus */
-	BusLAPIC,		/* Local APIC, fake type */
-	BusIPI,			/* IPIs, fake type like the LAPIC */
+	BusCBUS = 0, /* Corollary CBUS */
+	BusCBUSII,   /* Corollary CBUS II */
+	BusEISA,     /* Extended ISA */
+	BusFUTURE,   /* IEEE Futurebus */
+	BusINTERN,   /* Internal bus */
+	BusISA,	     /* Industry Standard Architecture */
+	BusMBI,	     /* Multibus I */
+	BusMBII,     /* Multibus II */
+	BusMCA,	     /* Micro Channel Architecture */
+	BusMPI,	     /* MPI */
+	BusMPSA,     /* MPSA */
+	BusNUBUS,    /* Apple Macintosh NuBus */
+	BusPCI,	     /* Peripheral Component Interconnect */
+	BusPCMCIA,   /* PC Memory Card International Association */
+	BusTC,	     /* DEC TurboChannel */
+	BusVL,	     /* VESA Local bus */
+	BusVME,	     /* VMEbus */
+	BusXPRESS,   /* Express System Bus */
+	BusLAPIC,    /* Local APIC, fake type */
+	BusIPI,	     /* IPIs, fake type like the LAPIC */
 };
 
-#define MKBUS(t,b,d,f)	(((t)<<24)|(((b)&0xFF)<<16)|(((d)&0x1F)<<11)|(((f)&0x07)<<8))
-#define BUSFNO(tbdf)	(((tbdf)>>8)&0x07)
-#define BUSDNO(tbdf)	(((tbdf)>>11)&0x1F)
-#define BUSBNO(tbdf)	(((tbdf)>>16)&0xFF)
-#define BUSTYPE(tbdf)	((tbdf)>>24)
-#define BUSBDF(tbdf)	((tbdf)&0x00FFFF00)
-#define BUSUNKNOWN	MKBUS(BusISA, 0xff, 0xff, 0xff)
+#define MKBUS(t, b, d, f) (((t) << 24) | (((b)&0xFF) << 16) | (((d)&0x1F) << 11) | (((f)&0x07) << 8))
+#define BUSFNO(tbdf) (((tbdf) >> 8) & 0x07)
+#define BUSDNO(tbdf) (((tbdf) >> 11) & 0x1F)
+#define BUSBNO(tbdf) (((tbdf) >> 16) & 0xFF)
+#define BUSTYPE(tbdf) ((tbdf) >> 24)
+#define BUSBDF(tbdf) ((tbdf)&0x00FFFF00)
+#define BUSUNKNOWN MKBUS(BusISA, 0xff, 0xff, 0xff)
 
 enum {
-	MaxEISA		= 16,
-	CfgEISA		= 0xC80,
+	MaxEISA = 16,
+	CfgEISA = 0xC80,
 };
 
 /*
  * PCI support code.
  */
-enum {					/* type 0 and type 1 pre-defined header */
-	PciVID		= 0x00,		/* vendor ID */
-	PciDID		= 0x02,		/* device ID */
-	PciPCR		= 0x04,		/* command */
-	PciPSR		= 0x06,		/* status */
-	PciRID		= 0x08,		/* revision ID */
-	PciCCRp		= 0x09,		/* programming interface class code */
-	PciCCRu		= 0x0A,		/* sub-class code */
-	PciCCRb		= 0x0B,		/* base class code */
-	PciCLS		= 0x0C,		/* cache line size */
-	PciLTR		= 0x0D,		/* latency timer */
-	PciHDT		= 0x0E,		/* header type */
-	PciBST		= 0x0F,		/* BIST */
-
-	PciBAR0		= 0x10,		/* base address */
-	PciBAR1		= 0x14,
-
-	PciCP		= 0x34,		/* capabilities pointer */
-
-	PciINTL		= 0x3C,		/* interrupt line */
-	PciINTP		= 0x3D,		/* interrupt pin */
+enum {		       /* type 0 and type 1 pre-defined header */
+       PciVID = 0x00,  /* vendor ID */
+       PciDID = 0x02,  /* device ID */
+       PciPCR = 0x04,  /* command */
+       PciPSR = 0x06,  /* status */
+       PciRID = 0x08,  /* revision ID */
+       PciCCRp = 0x09, /* programming interface class code */
+       PciCCRu = 0x0A, /* sub-class code */
+       PciCCRb = 0x0B, /* base class code */
+       PciCLS = 0x0C,  /* cache line size */
+       PciLTR = 0x0D,  /* latency timer */
+       PciHDT = 0x0E,  /* header type */
+       PciBST = 0x0F,  /* BIST */
+
+       PciBAR0 = 0x10, /* base address */
+       PciBAR1 = 0x14,
+
+       PciCP = 0x34, /* capabilities pointer */
+
+       PciINTL = 0x3C, /* interrupt line */
+       PciINTP = 0x3D, /* interrupt pin */
 };
 
 /* ccrb (base class code) values; controller types */
 enum {
-	Pcibcpci1	= 0,		/* pci 1.0; no class codes defined */
-	Pcibcstore	= 1,		/* mass storage */
-	Pcibcnet	= 2,		/* network */
-	Pcibcdisp	= 3,		/* display */
-	Pcibcmmedia	= 4,		/* multimedia */
-	Pcibcmem	= 5,		/* memory */
-	Pcibcbridge	= 6,		/* bridge */
-	Pcibccomm	= 7,		/* simple comms (e.g., serial) */
-	Pcibcbasesys	= 8,	/* base system */
-	Pcibcinput	= 9,		/* input */
-	Pcibcdock	= 0xa,		/* docking stations */
-	Pcibcproc	= 0xb,		/* processors */
-	Pcibcserial	= 0xc,		/* serial bus (e.g., USB) */
-	Pcibcwireless	= 0xd,	/* wireless */
-	Pcibcintell	= 0xe,		/* intelligent i/o */
-	Pcibcsatcom	= 0xf,		/* satellite comms */
-	Pcibccrypto	= 0x10,		/* encryption/decryption */
-	Pcibcdacq	= 0x11,		/* data acquisition & signal proc. */
+	Pcibcpci1 = 0,	     /* pci 1.0; no class codes defined */
+	Pcibcstore = 1,	     /* mass storage */
+	Pcibcnet = 2,	     /* network */
+	Pcibcdisp = 3,	     /* display */
+	Pcibcmmedia = 4,     /* multimedia */
+	Pcibcmem = 5,	     /* memory */
+	Pcibcbridge = 6,     /* bridge */
+	Pcibccomm = 7,	     /* simple comms (e.g., serial) */
+	Pcibcbasesys = 8,    /* base system */
+	Pcibcinput = 9,	     /* input */
+	Pcibcdock = 0xa,     /* docking stations */
+	Pcibcproc = 0xb,     /* processors */
+	Pcibcserial = 0xc,   /* serial bus (e.g., USB) */
+	Pcibcwireless = 0xd, /* wireless */
+	Pcibcintell = 0xe,   /* intelligent i/o */
+	Pcibcsatcom = 0xf,   /* satellite comms */
+	Pcibccrypto = 0x10,  /* encryption/decryption */
+	Pcibcdacq = 0x11,    /* data acquisition & signal proc. */
 };
 
 /* ccru (sub-class code) values; common cases only */
 enum {
 	/* mass storage */
-	Pciscscsi	= 0,		/* SCSI */
-	Pciscide	= 1,		/* IDE (ATA) */
-	Pciscsata	= 6,		/* SATA */
+	Pciscscsi = 0, /* SCSI */
+	Pciscide = 1,  /* IDE (ATA) */
+	Pciscsata = 6, /* SATA */
 
 	/* network */
-	Pciscether	= 0,		/* Ethernet */
+	Pciscether = 0, /* Ethernet */
 
 	/* display */
-	Pciscvga	= 0,		/* VGA */
-	Pciscxga	= 1,		/* XGA */
-	Pcisc3d		= 2,		/* 3D */
+	Pciscvga = 0, /* VGA */
+	Pciscxga = 1, /* XGA */
+	Pcisc3d = 2,  /* 3D */
 
 	/* bridges */
-	Pcischostpci	= 0,	/* host/pci */
-	Pciscpcicpci	= 1,	/* pci/pci */
+	Pcischostpci = 0, /* host/pci */
+	Pciscpcicpci = 1, /* pci/pci */
 
 	/* simple comms */
-	Pciscserial	= 0,		/* 16450, etc. */
-	Pciscmultiser	= 1,	/* multiport serial */
+	Pciscserial = 0,   /* 16450, etc. */
+	Pciscmultiser = 1, /* multiport serial */
 
 	/* serial bus */
-	Pciscusb	= 3,		/* USB */
+	Pciscusb = 3, /* USB */
 };
 
-enum {					/* type 0 pre-defined header */
-	PciCIS		= 0x28,		/* cardbus CIS pointer */
-	PciSVID		= 0x2C,		/* subsystem vendor ID */
-	PciSID		= 0x2E,		/* cardbus CIS pointer */
-	PciEBAR0	= 0x30,		/* expansion ROM base address */
-	PciMGNT		= 0x3E,		/* burst period length */
-	PciMLT		= 0x3F,		/* maximum latency between bursts */
+enum {			/* type 0 pre-defined header */
+       PciCIS = 0x28,	/* cardbus CIS pointer */
+       PciSVID = 0x2C,	/* subsystem vendor ID */
+       PciSID = 0x2E,	/* cardbus CIS pointer */
+       PciEBAR0 = 0x30, /* expansion ROM base address */
+       PciMGNT = 0x3E,	/* burst period length */
+       PciMLT = 0x3F,	/* maximum latency between bursts */
 };
 
-enum {					/* type 1 pre-defined header */
-	PciPBN		= 0x18,		/* primary bus number */
-	PciSBN		= 0x19,		/* secondary bus number */
-	PciUBN		= 0x1A,		/* subordinate bus number */
-	PciSLTR		= 0x1B,		/* secondary latency timer */
-	PciIBR		= 0x1C,		/* I/O base */
-	PciILR		= 0x1D,		/* I/O limit */
-	PciSPSR		= 0x1E,		/* secondary status */
-	PciMBR		= 0x20,		/* memory base */
-	PciMLR		= 0x22,		/* memory limit */
-	PciPMBR		= 0x24,		/* prefetchable memory base */
-	PciPMLR		= 0x26,		/* prefetchable memory limit */
-	PciPUBR		= 0x28,		/* prefetchable base upper 32 bits */
-	PciPULR		= 0x2C,		/* prefetchable limit upper 32 bits */
-	PciIUBR		= 0x30,		/* I/O base upper 16 bits */
-	PciIULR		= 0x32,		/* I/O limit upper 16 bits */
-	PciEBAR1	= 0x28,		/* expansion ROM base address */
-	PciBCR		= 0x3E,		/* bridge control register */
+enum {			/* type 1 pre-defined header */
+       PciPBN = 0x18,	/* primary bus number */
+       PciSBN = 0x19,	/* secondary bus number */
+       PciUBN = 0x1A,	/* subordinate bus number */
+       PciSLTR = 0x1B,	/* secondary latency timer */
+       PciIBR = 0x1C,	/* I/O base */
+       PciILR = 0x1D,	/* I/O limit */
+       PciSPSR = 0x1E,	/* secondary status */
+       PciMBR = 0x20,	/* memory base */
+       PciMLR = 0x22,	/* memory limit */
+       PciPMBR = 0x24,	/* prefetchable memory base */
+       PciPMLR = 0x26,	/* prefetchable memory limit */
+       PciPUBR = 0x28,	/* prefetchable base upper 32 bits */
+       PciPULR = 0x2C,	/* prefetchable limit upper 32 bits */
+       PciIUBR = 0x30,	/* I/O base upper 16 bits */
+       PciIULR = 0x32,	/* I/O limit upper 16 bits */
+       PciEBAR1 = 0x28, /* expansion ROM base address */
+       PciBCR = 0x3E,	/* bridge control register */
 };
 
-enum {					/* type 2 pre-defined header */
-	PciCBExCA	= 0x10,
-	PciCBSPSR	= 0x16,
-	PciCBPBN	= 0x18,		/* primary bus number */
-	PciCBSBN	= 0x19,		/* secondary bus number */
-	PciCBUBN	= 0x1A,		/* subordinate bus number */
-	PciCBSLTR	= 0x1B,		/* secondary latency timer */
-	PciCBMBR0	= 0x1C,
-	PciCBMLR0	= 0x20,
-	PciCBMBR1	= 0x24,
-	PciCBMLR1	= 0x28,
-	PciCBIBR0	= 0x2C,		/* I/O base */
-	PciCBILR0	= 0x30,		/* I/O limit */
-	PciCBIBR1	= 0x34,		/* I/O base */
-	PciCBILR1	= 0x38,		/* I/O limit */
-	PciCBSVID	= 0x40,		/* subsystem vendor ID */
-	PciCBSID	= 0x42,		/* subsystem ID */
-	PciCBLMBAR	= 0x44,		/* legacy mode base address */
+enum { /* type 2 pre-defined header */
+       PciCBExCA = 0x10,
+       PciCBSPSR = 0x16,
+       PciCBPBN = 0x18,	 /* primary bus number */
+       PciCBSBN = 0x19,	 /* secondary bus number */
+       PciCBUBN = 0x1A,	 /* subordinate bus number */
+       PciCBSLTR = 0x1B, /* secondary latency timer */
+       PciCBMBR0 = 0x1C,
+       PciCBMLR0 = 0x20,
+       PciCBMBR1 = 0x24,
+       PciCBMLR1 = 0x28,
+       PciCBIBR0 = 0x2C,  /* I/O base */
+       PciCBILR0 = 0x30,  /* I/O limit */
+       PciCBIBR1 = 0x34,  /* I/O base */
+       PciCBILR1 = 0x38,  /* I/O limit */
+       PciCBSVID = 0x40,  /* subsystem vendor ID */
+       PciCBSID = 0x42,	  /* subsystem ID */
+       PciCBLMBAR = 0x44, /* legacy mode base address */
 };
 
 /* capabilities */
 enum {
-	PciCapPMG	= 0x01,		/* power management */
-	PciCapAGP	= 0x02,
-	PciCapVPD	= 0x03,		/* vital product data */
-	PciCapSID	= 0x04,		/* slot id */
-	PciCapMSI	= 0x05,
-	PciCapCHS	= 0x06,		/* compact pci hot swap */
-	PciCapPCIX	= 0x07,
-	PciCapHTC	= 0x08,		/* hypertransport irq conf */
-	PciCapVND	= 0x09,		/* vendor specific information */
-	PciCapPCIe	= 0x10,
-	PciCapMSIX	= 0x11,
-	PciCapSATA	= 0x12,
-	PciCapHSW	= 0x0c,		/* hot swap */
+	PciCapPMG = 0x01, /* power management */
+	PciCapAGP = 0x02,
+	PciCapVPD = 0x03, /* vital product data */
+	PciCapSID = 0x04, /* slot id */
+	PciCapMSI = 0x05,
+	PciCapCHS = 0x06, /* compact pci hot swap */
+	PciCapPCIX = 0x07,
+	PciCapHTC = 0x08, /* hypertransport irq conf */
+	PciCapVND = 0x09, /* vendor specific information */
+	PciCapPCIe = 0x10,
+	PciCapMSIX = 0x11,
+	PciCapSATA = 0x12,
+	PciCapHSW = 0x0c, /* hot swap */
 };
 
 typedef struct Pcisiz Pcisiz;
-struct Pcisiz
-{
-	Pcidev*	dev;
-	int	siz;
-	int	bar;
+struct Pcisiz {
+	Pcidev *dev;
+	int siz;
+	int bar;
 };
 
 /* Definitions for generic PCI capability structure based on the
@@ -299,27 +298,27 @@ struct Pcisiz
  */
 
 enum {
-	PciCapVndr 	= 0x00,
-	PciCapNext 	= 0x01,
-	PciCapLen 	= 0x02,
-	PciCapType	= 0x03,
-	PciCapBar	= 0x04,
-	PciCapOff	= 0x08,
-	PciCapLength	= 0x0C
+	PciCapVndr = 0x00,
+	PciCapNext = 0x01,
+	PciCapLen = 0x02,
+	PciCapType = 0x03,
+	PciCapBar = 0x04,
+	PciCapOff = 0x08,
+	PciCapLength = 0x0C
 };
 
 struct Pcidev;
 
 typedef struct Pcicap Pcicap;
 struct Pcicap {
-	struct Pcidev *dev;			/* link to the device structure */
-	Pcicap *link;				/* next capability or NULL */
-	uint8_t vndr;				/* vendor code */
-	uint8_t caplen;				/* length in the config area */
-	uint8_t type;				/* capability config type */
-	uint8_t bar;				/* BAR index in the device structure 0 - 5 */
-	uint32_t offset;			/* offset within BAR */
-	uint32_t length;			/* length in the memory or IO space */
+	struct Pcidev *dev; /* link to the device structure */
+	Pcicap *link;	    /* next capability or NULL */
+	uint8_t vndr;	    /* vendor code */
+	uint8_t caplen;	    /* length in the config area */
+	uint8_t type;	    /* capability config type */
+	uint8_t bar;	    /* BAR index in the device structure 0 - 5 */
+	uint32_t offset;    /* offset within BAR */
+	uint32_t length;    /* length in the memory or IO space */
 };
 
 /* Linked list of capabilities is added to the PCI device descriptor
@@ -329,41 +328,40 @@ struct Pcicap {
  */
 
 typedef struct Pcidev Pcidev;
-struct Pcidev
-{
-	int	tbdf;					/* type+bus+device+function */
-	char    *path;
-	uint16_t	vid;			/* vendor ID */
-	uint16_t	did;			/* device ID */
-
-	uint16_t	pcr;
-
-	unsigned char	rid;
-	unsigned char	ccrp;
-	unsigned char	ccru;
-	unsigned char	ccrb;
-	unsigned char	cls;
-	unsigned char	ltr;
+struct Pcidev {
+	int tbdf; /* type+bus+device+function */
+	char *path;
+	uint16_t vid; /* vendor ID */
+	uint16_t did; /* device ID */
+
+	uint16_t pcr;
+
+	unsigned char rid;
+	unsigned char ccrp;
+	unsigned char ccru;
+	unsigned char ccrb;
+	unsigned char cls;
+	unsigned char ltr;
 
 	struct {
-		uint32_t	bar;		/* base address */
-		int	size;
+		uint32_t bar; /* base address */
+		int size;
 	} mem[6];
 
 	struct {
-		uint32_t	bar;
-		int	size;
+		uint32_t bar;
+		int size;
 	} rom;
-	unsigned char	intl;		/* interrupt line */
-	unsigned char	intp;		/* interrupt pin */
+	unsigned char intl; /* interrupt line */
+	unsigned char intp; /* interrupt pin */
 
-	Pcidev*	list;
-	Pcidev*	link;				/* next device on this bno */
+	Pcidev *list;
+	Pcidev *link; /* next device on this bno */
 
-	Pcidev*	bridge;				/* down a bus */
+	Pcidev *bridge; /* down a bus */
 	struct {
-		uint32_t	bar;
-		int	size;
+		uint32_t bar;
+		int size;
 	} ioa, mema;
 	Pcicap *caplist;
 	uint32_t capcnt;

sys/src/9/amd64/ioapic.c

@@ -25,79 +25,77 @@ typedef struct Rdt Rdt;
  * parsing and hardware were completely separate. We'll try to
  * clean it up later.
  */
-extern Atable *apics; 		/* APIC info */
+extern Atable *apics; /* APIC info */
 int mpisabusno = -1;
 
 /* Rbus chains, one for each device bus: each rbus matches a device to an rdt */
 struct Rbus {
-	Rbus	*next;
-	int	devno;
-	int	fno;
-	Rdt	*rdt;
+	Rbus *next;
+	int devno;
+	int fno;
+	Rdt *rdt;
 };
 
-
 /* Each rdt describes an ioapic input pin (intin, from the bus/device) */
 struct Rdt {
-	Apic		*apic;
-	int		intin;
-	uint32_t	lo;
-	uint32_t	hi;
+	Apic *apic;
+	int intin;
+	uint32_t lo;
+	uint32_t hi;
 
-	int		ref;			/* could map to multiple busses */
-	int		enabled;		/* times enabled */
+	int ref;     /* could map to multiple busses */
+	int enabled; /* times enabled */
 };
 
-enum {						/* IOAPIC registers */
-	Ioregsel	= 0x00,			/* indirect register address */
-	Iowin		= 0x04,			/* indirect register data */
-	Ioipa		= 0x08,			/* IRQ Pin Assertion */
-	Ioeoi		= 0x10,			/* EOI */
-
-	Ioapicid	= 0x00,			/* Identification */
-	Ioapicver	= 0x01,			/* Version */
-	Ioapicarb	= 0x02,			/* Arbitration */
-	Ioabcfg		= 0x03,			/* Boot Coniguration */
-	Ioredtbl	= 0x10,			/* Redirection Table */
+enum {			/* IOAPIC registers */
+       Ioregsel = 0x00, /* indirect register address */
+       Iowin = 0x04,	/* indirect register data */
+       Ioipa = 0x08,	/* IRQ Pin Assertion */
+       Ioeoi = 0x10,	/* EOI */
+
+       Ioapicid = 0x00,	 /* Identification */
+       Ioapicver = 0x01, /* Version */
+       Ioapicarb = 0x02, /* Arbitration */
+       Ioabcfg = 0x03,	 /* Boot Coniguration */
+       Ioredtbl = 0x10,	 /* Redirection Table */
 };
 
 static Rdt rdtarray[Nrdt];
 static int nrdtarray;
 static int gsib;
-static Rbus* rdtbus[Nbus];
-static Rdt* rdtvecno[IdtMAX+1];
+static Rbus *rdtbus[Nbus];
+static Rdt *rdtvecno[IdtMAX + 1];
 
 static Lock idtnolock;
 static int idtno = IdtIOAPIC;
 
-Apic	xioapic[Napic];
+Apic xioapic[Napic];
 
 static int map_polarity[4] = {
-	-1, IPhigh, -1, IPlow
-};
+	-1, IPhigh, -1, IPlow};
 
 static int map_edge_level[4] = {
-	-1, TMedge, -1, TMlevel
-};
+	-1, TMedge, -1, TMlevel};
 
 /* TODO: use the slice library for this. */
 typedef struct {
-	Vctl		v;
-	uint32_t	lo;
-	int		valid;
+	Vctl v;
+	uint32_t lo;
+	int valid;
 } Vinfo;
-static Vinfo todo[1<<13];
+static Vinfo todo[1 << 13];
 static int todoidx = 0;
 /* this is a guess. */
 static char todostring[1024];
 
-char *readtodo(void)
+char *
+readtodo(void)
 {
 	int bus, dev, fn, i;
 	char *p = todostring;
 	char *e = p + sizeof(todostring);
-	for(i = 0; i < todoidx; i++) {
-		if (!todo[i].valid)
+	for(i = 0; i < todoidx; i++){
+		if(!todo[i].valid)
 			continue;
 		bus = BUSBNO(todo[i].v.Vkey.tbdf);
 		dev = BUSDNO(todo[i].v.Vkey.tbdf);
@@ -107,40 +105,42 @@ char *readtodo(void)
 	return todostring;
 }
 
-static uint32_t ioapicread(Apic*apic, int reg)
+static uint32_t
+ioapicread(Apic *apic, int reg)
 {
-	volatile uint32_t *sel = apic->Ioapic.addr+Ioregsel;
-	volatile uint32_t *data = apic->Ioapic.addr+Iowin;
+	volatile uint32_t *sel = apic->Ioapic.addr + Ioregsel;
+	volatile uint32_t *data = apic->Ioapic.addr + Iowin;
 	*sel = reg;
 	return *data;
 }
-static void ioapicwrite(Apic*apic, int reg, uint32_t val)
+static void
+ioapicwrite(Apic *apic, int reg, uint32_t val)
 {
-	volatile uint32_t *sel = apic->Ioapic.addr+Ioregsel;
-	volatile uint32_t *data = apic->Ioapic.addr+Iowin;
+	volatile uint32_t *sel = apic->Ioapic.addr + Ioregsel;
+	volatile uint32_t *data = apic->Ioapic.addr + Iowin;
 	*sel = reg;
 	*data = val;
 }
 
 static void
-rtblget(Apic* apic, int sel, uint32_t* hi, uint32_t* lo)
+rtblget(Apic *apic, int sel, uint32_t *hi, uint32_t *lo)
 {
-	sel = Ioredtbl + 2*sel;
+	sel = Ioredtbl + 2 * sel;
 
-	*hi = ioapicread(apic, sel+1);
+	*hi = ioapicread(apic, sel + 1);
 	*lo = ioapicread(apic, sel);
 }
 
 static void
-rtblput(Apic* apic, int sel, uint32_t hi, uint32_t lo)
+rtblput(Apic *apic, int sel, uint32_t hi, uint32_t lo)
 {
-	sel = Ioredtbl + 2*sel;
+	sel = Ioredtbl + 2 * sel;
 
-	ioapicwrite(apic, sel+1, hi);
+	ioapicwrite(apic, sel + 1, hi);
 	ioapicwrite(apic, sel, lo);
 }
 
-static Rdt*
+static Rdt *
 rdtlookup(Apic *apic, int intin)
 {
 	int i;
@@ -161,11 +161,11 @@ compatible(uint32_t new, uint32_t old)
 	uint32_t oldtop = old & ~0xff;
 	uint32_t newvno = new & 0xff;
 	print("compatible: new 0x%x, old 0x%x\n", new, old);
-	if (new == old)
+	if(new == old)
 		return 1;
 
 	print("not the same\n");
-	if ((newvno == 0) && (newtop == oldtop))
+	if((newvno == 0) && (newtop == oldtop))
 		return 1;
 	print("REALLY not the same\n");
 	return 0;
@@ -182,35 +182,35 @@ ioapicintrinit(int busno, int apicno, int intin, int devno, int fno, uint32_t lo
 		print("ioapicintrinit: botch: Busno %d >= Nbus %d\n", busno, Nbus);
 		return;
 	}
-	if (apicno >= Napic) {
+	if(apicno >= Napic){
 		print("ioapicintrinit: botch: acpicno %d >= Napic %d\n", apicno, Napic);
 		return;
 	}
-	if (nrdtarray >= Nrdt){
+	if(nrdtarray >= Nrdt){
 		print("ioapicintrinit: botch: nrdtarray %d >= Nrdt %d\n", nrdtarray, Nrdt);
 		return;
 	}
 
 	apic = &xioapic[apicno];
-	if(!apic->useable) {
+	if(!apic->useable){
 		print("ioapicintrinit: botch: apic %d not marked usable\n", apicno);
 		return;
 	}
-	if (intin >= apic->Ioapic.nrdt){
+	if(intin >= apic->Ioapic.nrdt){
 		print("ioapicintrinit: botch: initin %d >= apic->Ioapic.nrdt %d\n", intin, apic->Ioapic.nrdt);
 		return;
 	}
 
 	rdt = rdtlookup(apic, intin);
-	if (rdt == nil) {
+	if(rdt == nil){
 		rdt = &rdtarray[nrdtarray++];
 		rdt->apic = apic;
 		rdt->intin = intin;
 		rdt->lo = lo;
 	} else {
-		if (!compatible(lo, rdt->lo)) {
+		if(!compatible(lo, rdt->lo)){
 			print("ioapicintrinit: multiple irq botch bus %d %d/%d/%d lo %d vs %d\n",
-				busno, apicno, intin, devno, lo, rdt->lo);
+			      busno, apicno, intin, devno, lo, rdt->lo);
 			return;
 		}
 		print("ioapicintrinit: dup rdt %d %d %d %d %.8x\n", busno, apicno, intin, devno, lo);
@@ -232,11 +232,11 @@ acpi_irq2ioapic(int irq)
 	Apic *apic;
 	/* with acpi, the ioapics map a global interrupt space.  each covers a
 	 * window of the space from [ibase, ibase + nrdt). */
-	for (apic = xioapic; apic < &xioapic[Napic]; apic++, ioapic_idx++) {
+	for(apic = xioapic; apic < &xioapic[Napic]; apic++, ioapic_idx++){
 		/* addr check is just for sanity */
-		if (!apic->useable || !apic->Ioapic.addr)
+		if(!apic->useable || !apic->Ioapic.addr)
 			continue;
-		if ((apic->Ioapic.gsib <= irq) && (irq < apic->Ioapic.gsib + apic->Ioapic.nrdt))
+		if((apic->Ioapic.gsib <= irq) && (irq < apic->Ioapic.gsib + apic->Ioapic.nrdt))
 			return ioapic_idx;
 	}
 	return -1;
@@ -271,36 +271,36 @@ acpi_make_rdt(Vctl *v, int irq, int bustype, int busno, int devno, int fno)
 	Apicst *st, *lst;
 	uint32_t lo = 0;
 	int pol, edge_level, ioapic_nr, gsi_irq;
-//print("acpi_make_rdt(0x%x %d %d 0x%x)\n", tbdf, irq, busno, devno);
-//die("acpi.make.rdt)\n");
+	//print("acpi_make_rdt(0x%x %d %d 0x%x)\n", tbdf, irq, busno, devno);
+	//die("acpi.make.rdt)\n");
 
 	at = apics;
 	st = nil;
-	for (int i = 0; i < at->nchildren; i++) {
+	for(int i = 0; i < at->nchildren; i++){
 		lst = at->children[i]->tbl;
-		if (lst->type == ASintovr) {
-			if (lst->intovr.irq == irq) {
+		if(lst->type == ASintovr){
+			if(lst->intovr.irq == irq){
 				st = lst;
 				break;
 			}
 		}
 	}
-	
-	if (st) {
+
+	if(st){
 		pol = map_polarity[st->intovr.flags & AFpmask];
-		if (pol < 0) {
+		if(pol < 0){
 			print("ACPI override had bad polarity\n");
 			return -1;
 		}
 		edge_level = map_edge_level[(st->intovr.flags & AFlevel) >> 2];
-		if (edge_level < 0) {
+		if(edge_level < 0){
 			print("ACPI override had bad edge/level\n");
 			return -1;
 		}
 		lo = pol | edge_level;
 		gsi_irq = st->intovr.intr;
 	} else {
-		if (bustype == BusISA) {
+		if(bustype == BusISA){
 			lo = IPhigh | TMedge;
 			gsi_irq = irq;
 		} else {
@@ -315,12 +315,12 @@ acpi_make_rdt(Vctl *v, int irq, int bustype, int busno, int devno, int fno)
 		}
 	}
 	ioapic_nr = acpi_irq2ioapic(gsi_irq);
-	if (ioapic_nr < 0) {
+	if(ioapic_nr < 0){
 		print("Could not find an IOAPIC for global irq %d!\n", gsi_irq);
 		return -1;
 	}
 	ioapicintrinit(busno, ioapic_nr, gsi_irq - xioapic[ioapic_nr].Ioapic.gsib,
-	               devno, fno, lo);
+		       devno, fno, lo);
 	return 0;
 }
 
@@ -333,7 +333,7 @@ ioapicinit(int id, int ibase, uintptr_t pa)
 	 * Mark the IOAPIC useable if it has a good ID
 	 * and the registers can be mapped.
 	 */
-	if(id >= Napic) {
+	if(id >= Napic){
 		print("NOT setting ioapic %d useable; id must be < %d\n", id, Napic);
 		return;
 	}
@@ -350,15 +350,15 @@ ioapicinit(int id, int ibase, uintptr_t pa)
 	 * responsibility of the O/S to set the APIC ID.
 	 */
 	lock(&apic->Ioapic.l);
-	apic->Ioapic.nrdt = ((ioapicread(apic, Ioapicver)>>16) & 0xff) + 1;
-	if (ibase == -1) {
+	apic->Ioapic.nrdt = ((ioapicread(apic, Ioapicver) >> 16) & 0xff) + 1;
+	if(ibase == -1){
 		apic->Ioapic.gsib = gsib;
 		gsib += apic->Ioapic.nrdt;
 	} else {
 		apic->Ioapic.gsib = ibase;
 	}
 
-	ioapicwrite(apic, Ioapicid, id<<24);
+	ioapicwrite(apic, Ioapicid, id << 24);
 	unlock(&apic->Ioapic.l);
 }
 
@@ -378,7 +378,7 @@ ioapicdump(void)
 		if(!apic->useable || apic->Ioapic.addr == 0)
 			continue;
 		print("ioapic %d addr %#p nrdt %d gsib %d\n",
-			i, apic->Ioapic.addr, apic->Ioapic.nrdt, apic->Ioapic.gsib);
+		      i, apic->Ioapic.addr, apic->Ioapic.nrdt, apic->Ioapic.gsib);
 		for(n = 0; n < apic->Ioapic.nrdt; n++){
 			lock(&apic->Ioapic.l);
 			rtblget(apic, n, &hi, &lo);
@@ -393,8 +393,8 @@ ioapicdump(void)
 		for(; rbus != nil; rbus = rbus->next){
 			rdt = rbus->rdt;
 			print(" apic %ld devno %#x (%d %d) fno %d intin %d lo %#x ref %d\n",
-				rdt->apic-xioapic, rbus->devno, rbus->devno>>2,
-				rbus->devno & 0x03, rbus->fno, rdt->intin, rdt->lo, rdt->ref);
+			      rdt->apic - xioapic, rbus->devno, rbus->devno >> 2,
+			      rbus->devno & 0x03, rbus->fno, rdt->intin, rdt->lo, rdt->ref);
 		}
 	}
 }
@@ -432,7 +432,7 @@ irqenable(void)
 			rtblget(apic, i, &hi, &lo);
 			/* if something is set in the vector, enable the
 			 * rdtentry */
-			if ((lo&0xff) != 0)
+			if((lo & 0xff) != 0)
 				rtblput(apic, i, hi, lo & ~Im);
 			unlock(&apic->Ioapic.l);
 		}
@@ -443,7 +443,7 @@ irqenable(void)
 static int dfpolicy = 0;
 
 static void
-ioapicintrdd(uint32_t* hi, uint32_t* lo)
+ioapicintrdd(uint32_t *hi, uint32_t *lo)
 {
 	int i;
 	static int df;
@@ -466,10 +466,10 @@ ioapicintrdd(uint32_t* hi, uint32_t* lo)
 	 * Interrupt routing policy can be set here.
 	 */
 	switch(dfpolicy){
-	default:				/* noise core 0 */
-		*hi = sys->machptr[0]->apicno<<24;
+	default: /* noise core 0 */
+		*hi = sys->machptr[0]->apicno << 24;
 		break;
-	case 1:					/* round-robin */
+	case 1: /* round-robin */
 		/*
 		 * Assign each interrupt to a different CPU on a round-robin
 		 * Some idea of the packages/cores/thread topology would be
@@ -480,7 +480,7 @@ ioapicintrdd(uint32_t* hi, uint32_t* lo)
 		lock(&dflock);
 		for(;;){
 			i = df++;
-			if(df >= sys->nmach+1)
+			if(df >= sys->nmach + 1)
 				df = 0;
 			if(sys->machptr[i] == nil || !sys->machptr[i]->online)
 				continue;
@@ -490,10 +490,10 @@ ioapicintrdd(uint32_t* hi, uint32_t* lo)
 		}
 		unlock(&dflock);
 
-		*hi = i<<24;
+		*hi = i << 24;
 		break;
 	}
-	*lo |= Pm|MTf;
+	*lo |= Pm | MTf;
 }
 
 static int
@@ -503,7 +503,7 @@ nextvec(void)
 
 	lock(&idtnolock);
 	vecno = idtno;
-	idtno = (idtno+8) % IdtMAX;
+	idtno = (idtno + 8) % IdtMAX;
 	if(idtno < IdtIOAPIC)
 		idtno += IdtIOAPIC;
 	unlock(&idtnolock);
@@ -523,7 +523,7 @@ msimask(Vkey *v, int mask)
 }
 
 static int
-intrenablemsi(Vctl* v, Pcidev *p)
+intrenablemsi(Vctl *v, Pcidev *p)
 {
 	uint vno, lo, hi;
 	uint64_t msivec;
@@ -536,7 +536,7 @@ intrenablemsi(Vctl* v, Pcidev *p)
 	if(lo & Lm)
 		lo |= MTlp;
 
-	msivec = (uint64_t)hi<<32 | lo;
+	msivec = (uint64_t)hi << 32 | lo;
 	if(pcimsienable(p, msivec) == -1)
 		return -1;
 	v->isr = apicisr;
@@ -550,7 +550,7 @@ intrenablemsi(Vctl* v, Pcidev *p)
 }
 
 int
-disablemsi(Vctl* v, Pcidev *p)
+disablemsi(Vctl *v, Pcidev *p)
 {
 	if(p == nil)
 		return -1;
@@ -593,8 +593,8 @@ static int
 ioapic_exists(void)
 {
 	/* not foolproof, if we called this before parsing */
-	for (int i = 0; i < Napic; i++)
-		if (xioapic[i].useable)
+	for(int i = 0; i < Napic; i++)
+		if(xioapic[i].useable)
 			return 1;
 	return 0;
 }
@@ -603,8 +603,8 @@ static Rdt *
 rbus_get_rdt(int busno, int devno, int fno)
 {
 	Rbus *rbus;
-	for (rbus = rdtbus[busno]; rbus != nil; rbus = rbus->next) {
-		if (rbus->devno == devno && rbus->fno == fno) {
+	for(rbus = rdtbus[busno]; rbus != nil; rbus = rbus->next){
+		if(rbus->devno == devno && rbus->fno == fno){
 			return rbus->rdt;
 		}
 	}
@@ -636,9 +636,9 @@ bus_irq_setup(Vctl *v)
 	int busno = -1, devno = -1, fno = 0, vno;
 	Pcidev *p;
 
-       	if (!ioapic_exists()) {
+	if(!ioapic_exists()){
 		panic("%s: no ioapics?", __func__);
-		switch (bustype) {
+		switch(bustype){
 			//case BusLAPIC:
 			//case BusIPI:
 			//break;
@@ -650,17 +650,17 @@ bus_irq_setup(Vctl *v)
 			//irq_h->route_irq = 0;
 			//irq_h->type = "pic";
 			/* PIC devices have vector = irq + 32 */
-			return -1; //irq_h->dev_irq + IdtPIC;
+			return -1;	  //irq_h->dev_irq + IdtPIC;
 		}
 	}
-	switch (bustype) {
+	switch(bustype){
 	case BusLAPIC:
 		/* nxm used to set the initial 'isr' method (i think equiv to our
 		 * check_spurious) to apiceoi for non-spurious lapic vectors.  in
 		 * effect, i think they were sending the EOI early, and their eoi
 		 * method was 0.  we're not doing that (unless we have to). */
 		//v->check_spurious = lapic_check_spurious;
-		v->eoi = nil; //apiceoi;
+		v->eoi = nil;	     //apiceoi;
 		v->isr = apiceoi;
 		//v->mask = lapic_mask_irq;
 		//v->unmask = lapic_unmask_irq;
@@ -678,7 +678,7 @@ bus_irq_setup(Vctl *v)
 		v->type = "IPI";
 		return v->Vkey.irq;
 	case BusISA:
-		if (mpisabusno == -1)
+		if(mpisabusno == -1)
 			panic("No ISA bus allocated");
 		busno = mpisabusno;
 		/* need to track the irq in devno in PCI interrupt assignment entry
@@ -687,18 +687,18 @@ bus_irq_setup(Vctl *v)
 		break;
 	case BusPCI:
 		p = pcimatchtbdf(v->Vkey.tbdf);
-		if (!p) {
+		if(!p){
 			print("No PCI dev for tbdf %p!", v->Vkey.tbdf);
 			return -1;
 		}
-		if ((vno = intrenablemsi(v, p))!= -1)
+		if((vno = intrenablemsi(v, p)) != -1)
 			return vno;
 		busno = BUSBNO(v->Vkey.tbdf);
 		devno = pcicfgr8(p, PciINTP);
 
 		/* this might not be a big deal - some PCI devices have no INTP.  if
 		 * so, change our devno - 1 below. */
-		if (devno == 0)
+		if(devno == 0)
 			panic("no INTP for tbdf %p", v->Vkey.tbdf);
 		/* remember, devno is the device shifted with irq pin in bits 0-1.
 		 * we subtract 1, since the PCI intp maps 1 -> INTA, 2 -> INTB, etc,
@@ -712,14 +712,14 @@ bus_irq_setup(Vctl *v)
 	/* busno and devno are set, regardless of the bustype, enough to find rdt.
 	 * these may differ from the values in tbdf. */
 	rdt = rbus_get_rdt(busno, devno, fno);
-	if (!rdt) {
+	if(!rdt){
 		/* second chance.  if we didn't find the item the first time, then (if
 		 * it exists at all), it wasn't in the MP tables (or we had no tables).
 		 * So maybe we can figure it out via ACPI. */
 		acpi_make_rdt(v, v->Vkey.irq, bustype, busno, devno, fno);
 		rdt = rbus_get_rdt(busno, devno, fno);
 	}
-	if (!rdt) {
+	if(!rdt){
 		print("Unable to build IOAPIC route for irq %d\n", v->Vkey.irq);
 		return -1;
 	}
@@ -739,7 +739,7 @@ bus_irq_setup(Vctl *v)
 	/* if a destination has already been picked, we store it in the lo.  this
 	 * stays around regardless of enabled/disabled, since we don't reap vectors
 	 * yet.  nor do we really mess with enabled... */
-	if ((rdt->lo & 0xff) == 0) {
+	if((rdt->lo & 0xff) == 0){
 		vno = nextvec();
 		rdt->lo |= vno;
 		rdtvecno[vno] = rdt;
@@ -747,7 +747,7 @@ bus_irq_setup(Vctl *v)
 		print("bus_irq_setup: %p: multiple irq bus %d dev %d\n", v->Vkey.tbdf, busno, devno);
 	}
 	rdt->enabled++;
-	rdt->hi = 0;			/* route to 0 by default */
+	rdt->hi = 0; /* route to 0 by default */
 	rdt->lo |= Pm | MTf;
 	rtblput(rdt->apic, rdt->intin, rdt->hi, rdt->lo);
 	vno = rdt->lo & 0xff;
@@ -772,19 +772,19 @@ acpiirq(uint32_t tbdf, int gsi)
 	Vctl *v;
 	Vinfo *vinfotodo = nil;
 
-	int acpiintrenable(Vctl *v);
-	
+	int acpiintrenable(Vctl * v);
+
 	/* for now we know it's PCI, just ignore what they told us. */
 	tbdf = MKBUS(BusPCI, busno, BUSDNO(tbdf), BUSFNO(tbdf));
-	if((pcidev = pcimatchtbdf(tbdf)) == nil) {
+	if((pcidev = pcimatchtbdf(tbdf)) == nil){
 		error("No such device (any more?)");
 	}
 	if((pin = pcicfgr8(pcidev, PciINTP)) == 0)
 		error("no INTP for that device, which is impossible");
 
-//	pcicfgw8(pcidev, PciINTL, gsi);
-	for (int i = 0; i < todoidx; i++) {
-		if (todo[i].v.Vkey.tbdf == tbdf) {
+	//	pcicfgw8(pcidev, PciINTL, gsi);
+	for(int i = 0; i < todoidx; i++){
+		if(todo[i].v.Vkey.tbdf == tbdf){
 			vinfotodo = &todo[i];
 			break;
 		}
@@ -792,34 +792,34 @@ acpiirq(uint32_t tbdf, int gsi)
 
 	print("acpiirq: writing b:%d d:%d f:%d gsi:%d\n", BUSBNO(tbdf), BUSDNO(tbdf), BUSFNO(tbdf), gsi);
 
-	if (vinfotodo == nil)
+	if(vinfotodo == nil)
 		error("Unknown tbdf");
-	if (!vinfotodo->valid)
+	if(!vinfotodo->valid)
 		error("Invalid tbdf");
 
 	v = malloc(sizeof(*v));
-	if (waserror()) {
+	if(waserror()){
 		print("well, that went badly\n");
 		free(v);
 		nexterror();
 	}
 	*v = vinfotodo->v;
 	v->Vkey.irq = gsi;
-	devno = BUSDNO(v->Vkey.tbdf)<<2|(pin-1);
-	if (DBGFLG)
+	devno = BUSDNO(v->Vkey.tbdf) << 2 | (pin - 1);
+	if(DBGFLG)
 		print("acpiirq: tbdf %#8.8x busno %d devno %d\n",
-	    		v->Vkey.tbdf, busno, devno);
+		      v->Vkey.tbdf, busno, devno);
 
 	ioapic_nr = acpi_irq2ioapic(gsi);
-	if (DBGFLG)
+	if(DBGFLG)
 		print("ioapic_nr for gsi %d is %d\n", gsi, ioapic_nr);
-	if (ioapic_nr < 0) {
+	if(ioapic_nr < 0){
 		error("Could not find an IOAPIC for global irq!\n");
 	}
 	//ioapicdump();
 	ioapicintrinit(busno, ioapic_nr, gsi - xioapic[ioapic_nr].Ioapic.gsib,
-	               devno, BUSFNO(tbdf), vinfotodo->lo);
-	if (DBGFLG)
+		       devno, BUSFNO(tbdf), vinfotodo->lo);
+	if(DBGFLG)
 		print("ioapicinrinit seems to have worked\n");
 	poperror();
 

sys/src/9/amd64/iob.h

@@ -7,18 +7,17 @@
  * in the LICENSE file.
  */
 
-
 /* io bufs */
-void	iobufinit(void);
-Block*	va2block(void*);
-void*	io2alloc(uint);
-Block*	bigalloc(void);
-Block*	sbigalloc(void);
-int	isbigblock(Block*);
+void iobufinit(void);
+Block *va2block(void *);
+void *io2alloc(uint);
+Block *bigalloc(void);
+Block *sbigalloc(void);
+int isbigblock(Block *);
 
 /* bal.c */
-physaddr	bal(usize);
-void		bfree(physaddr, usize);
-void		balinit(physaddr, usize);
-void		balfreephys(physaddr, usize);
-void	baldump(void);
+physaddr bal(usize);
+void bfree(physaddr, usize);
+void balinit(physaddr, usize);
+void balfreephys(physaddr, usize);
+void baldump(void);

sys/src/9/amd64/main.c

@@ -22,9 +22,9 @@
 #undef DBG
 #define DBG iprint
 
-Conf conf;			/* XXX - must go - gag */
+Conf conf; /* XXX - must go - gag */
 
-static uintptr_t sp;		/* XXX - must go - user stack of init proc */
+static uintptr_t sp; /* XXX - must go - user stack of init proc */
 
 /* Next time you see a system with cores/sockets running at different clock rates, on x86,
  * let me know. AFAIK, it no longer happens. So the BSP hz is good for the AP hz.
@@ -45,8 +45,8 @@ static char *oargv[128];
 static char oargb[4096];
 static int oargblen;
 
-static int maxcores = 1024;	/* max # of cores given as an argument */
-static int numtcs = 32;		/* initial # of TCs */
+static int maxcores = 1024; /* max # of cores given as an argument */
+static int numtcs = 32;	    /* initial # of TCs */
 
 char dbgflg[256];
 static int vflag;
@@ -176,7 +176,7 @@ options(int argc, char *argv[])
 				argv[0] = p - 1;
 				dbgflg[o] = n;
 			}
-		}else{
+		} else {
 			strncpy(envcopy, next, sizeof envcopy);
 			gettokens(envcopy, env, 2, "=");
 			if(strcmp(env[0], "maxcores") == 0){
@@ -357,7 +357,7 @@ nixsquids(void)
 				sys->nmach++;
 				mach->NIX.nixtype = NIXTC;
 				sys->nc[NIXTC]++;
-			}else
+			} else
 				sys->nc[NIXAC]++;
 			ainc(&active.nbooting);
 		}
@@ -587,7 +587,7 @@ main(Mach *mach, uint32_t mbmagic, uint32_t mbaddress)
 	/* Forcing to single core if desired */
 	if(!nosmp){
 		sipi();
-	}else{
+	} else {
 		print("SMP Disabled by command line\n");
 	}
 	timersinit();
@@ -825,7 +825,7 @@ shutdown(int ispanic)
 		else
 			for(;;)
 				halt();
-	}else
+	} else
 		delay(1000);
 }
 

sys/src/9/amd64/map.c

@@ -13,37 +13,37 @@
 #include "dat.h"
 #include "fns.h"
 
-#define _KADDR(pa)	UINT2PTR(KZERO+((uintptr)(pa)))
-#define _PADDR(va)	PTR2UINT(((uintptr)(va))-KZERO)
+#define _KADDR(pa) UINT2PTR(KZERO + ((uintptr)(pa)))
+#define _PADDR(va) PTR2UINT(((uintptr)(va)) - KZERO)
 
-void*
+void *
 KADDR(uintptr_t pa)
 {
-	if (pa < KZERO)
+	if(pa < KZERO)
 		return _KADDR(pa);
 
 	return UINT2PTR(pa);
 }
 
 uintmem
-PADDR(void* va)
+PADDR(void *va)
 {
 	uintmem pa;
 
 	pa = PTR2UINT(va);
 	if(pa >= KZERO)
-		return pa-KZERO;
+		return pa - KZERO;
 
 	panic("PADDR: va %#p pa #%p @ %#p\n", va, _PADDR(va), getcallerpc());
 	return 0;
 }
 
-KMap*
-kmap(Page* page)
+KMap *
+kmap(Page *page)
 {
 	DBG("kmap(%#llx) @ %#p: %#p %#p\n",
-		page->pa, getcallerpc(),
-		page->pa, KADDR(page->pa));
+	    page->pa, getcallerpc(),
+	    page->pa, KADDR(page->pa));
 
 	return KADDR(page->pa);
 }

sys/src/9/amd64/mem.h

@@ -16,119 +16,118 @@
  * https://sourceware.org/bugzilla/show_bug.cgi?id=190
  */
 #ifndef __ASSEMBLER__
-#define KiB		1024ull			/* Kibi 0x0000000000000400 */
-#define MiB		1048576ull		/* Mebi 0x0000000000100000 */
-#define GiB		1073741824ull		/* Gibi 000000000040000000 */
-#define TiB		1099511627776ull	/* Tebi 0x0000010000000000 */
-#define PiB		1125899906842624ull	/* Pebi 0x0004000000000000 */
-#define EiB		1152921504606846976ull	/* Exbi 0x1000000000000000 */
+#define KiB 1024ull		   /* Kibi 0x0000000000000400 */
+#define MiB 1048576ull		   /* Mebi 0x0000000000100000 */
+#define GiB 1073741824ull	   /* Gibi 000000000040000000 */
+#define TiB 1099511627776ull	   /* Tebi 0x0000010000000000 */
+#define PiB 1125899906842624ull	   /* Pebi 0x0004000000000000 */
+#define EiB 1152921504606846976ull /* Exbi 0x1000000000000000 */
 #else
-#define KiB             1024
-#define MiB             1048576
-#define GiB             1073741824
-#define TiB             1099511627776
-#define PiB             1125899906842624
-#define EiB             1152921504606846976
+#define KiB 1024
+#define MiB 1048576
+#define GiB 1073741824
+#define TiB 1099511627776
+#define PiB 1125899906842624
+#define EiB 1152921504606846976
 #endif
 
-#define HOWMANY(x, y)	(((x)+((y)-1))/(y))
-#define ROUNDUP(x, y)	(HOWMANY((x), (y))*(y))
-#define ROUNDDN(x, y)	(((x)/(y))*(y))
-#define MIN(a, b)	((a) < (b)? (a): (b))
-#define MAX(a, b)	((a) > (b)? (a): (b))
+#define HOWMANY(x, y) (((x) + ((y)-1)) / (y))
+#define ROUNDUP(x, y) (HOWMANY((x), (y)) * (y))
+#define ROUNDDN(x, y) (((x) / (y)) * (y))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
 
-#define ALIGNED(p, a)	(!(((uintptr)(p)) & ((a)-1)))
+#define ALIGNED(p, a) (!(((uintptr)(p)) & ((a)-1)))
 
 /*
  * Sizes
  */
-#define BI2BY		8			/* bits per byte */
-#define	BI2WD		32			/* bits per word */
-#define	BY2WD		4			/* bytes per word */
-#define BY2V		8			/* bytes per double word */
-#define BY2SE		8			/* bytes per stack element */
-#define BLOCKALIGN	8
+#define BI2BY 8	 /* bits per byte */
+#define BI2WD 32 /* bits per word */
+#define BY2WD 4	 /* bytes per word */
+#define BY2V 8	 /* bytes per double word */
+#define BY2SE 8	 /* bytes per stack element */
+#define BLOCKALIGN 8
 
 /*
  * 4K pages
  * these defines could go.
  */
-#define PGSZ		(4*KiB)			/* page size */
-#define PGSHFT		12			/* log(PGSZ) */
-#define PTSZ		(4*KiB)			/* page table page size */
-#define PTSHFT		9			/*  */
+#define PGSZ (4 * KiB) /* page size */
+#define PGSHFT 12      /* log(PGSZ) */
+#define PTSZ (4 * KiB) /* page table page size */
+#define PTSHFT 9       /*  */
 
-#define MACHSZ		(4*KiB)			/* Mach+stack size */
-#define MACHMAX		32			/* max. number of cpus */
-#define MACHSTKSZ	(8*(4*KiB))		/* Mach stack size */
+#define MACHSZ (4 * KiB)	  /* Mach+stack size */
+#define MACHMAX 32		  /* max. number of cpus */
+#define MACHSTKSZ (8 * (4 * KiB)) /* Mach stack size */
 
-#define KSTACK		(16*1024)		/* Size of Proc kernel stack */
-#define STACKALIGN(sp)	((sp) & ~(BY2SE-1))	/* bug: assure with alloc */
+#define KSTACK (16 * 1024)		     /* Size of Proc kernel stack */
+#define STACKALIGN(sp) ((sp) & ~(BY2SE - 1)) /* bug: assure with alloc */
 
-#define STACKGUARD	0xdeadbeefcafebabeULL /* magic number we keep at stack bottom and check on traps */
+#define STACKGUARD 0xdeadbeefcafebabeULL /* magic number we keep at stack bottom and check on traps */
 
 /*
  * 2M pages
  * these defines must go.
  */
-#define	BIGPGSHFT	21
+#define BIGPGSHFT 21
 #ifndef __ASSEMBLER__
-#define	BIGPGSZ		(1ull<<BIGPGSHFT)
+#define BIGPGSZ (1ull << BIGPGSHFT)
 #else
-#define BIGPGSZ         (1<<BIGPGSHFT)
+#define BIGPGSZ (1 << BIGPGSHFT)
 #endif
-#define	BIGPGROUND(x)	ROUNDUP((x), BIGPGSZ)
-#define	PGROUND(x)	ROUNDUP((x), PGSZ)
-#define	PGSPERBIG	(BIGPGSZ/PGSZ)
+#define BIGPGROUND(x) ROUNDUP((x), BIGPGSZ)
+#define PGROUND(x) ROUNDUP((x), PGSZ)
+#define PGSPERBIG (BIGPGSZ / PGSZ)
 
 /*
  * Time
  */
-#define HZ		(100)			/* clock frequency */
-#define MS2HZ		(1000/HZ)		/* millisec per clock tick */
-#define TK2SEC(t)	((t)/HZ)		/* ticks to seconds */
+#define HZ (100)	     /* clock frequency */
+#define MS2HZ (1000 / HZ)    /* millisec per clock tick */
+#define TK2SEC(t) ((t) / HZ) /* ticks to seconds */
 
 /*
  *  Address spaces. User:
  */
-#define UTZERO		(0+2*MiB)		/* first address in user text */
-#define UTROUND(t)	ROUNDUP((t), BIGPGSZ)
+#define UTZERO (0 + 2 * MiB) /* first address in user text */
+#define UTROUND(t) ROUNDUP((t), BIGPGSZ)
 #ifndef __ASSEMBLER__
-#define USTKTOP		(0x00007ffffffff000ull & ~(BIGPGSZ-1))
+#define USTKTOP (0x00007ffffffff000ull & ~(BIGPGSZ - 1))
 #else
-#define USTKTOP         (0x00007ffffffff000 & ~(BIGPGSZ-1))
+#define USTKTOP (0x00007ffffffff000 & ~(BIGPGSZ - 1))
 #endif
-#define USTKSIZE	(16*1024*1024)		/* size of user stack */
-#define TSTKTOP		(USTKTOP-USTKSIZE)	/* end of new stack in sysexec */
-#define	NIXCALL		(TSTKTOP-USTKSIZE)	/* nix syscall queues (2MiB) */
+#define USTKSIZE (16 * 1024 * 1024)  /* size of user stack */
+#define TSTKTOP (USTKTOP - USTKSIZE) /* end of new stack in sysexec */
+#define NIXCALL (TSTKTOP - USTKSIZE) /* nix syscall queues (2MiB) */
 #ifndef __ASSEMBLER__
-#define BIGBSSTOP	((NIXCALL-BIGPGSZ) & ~(1ULL*GiB-1))
-#define BIGBSSSIZE	(32ull*GiB)			/* size of big heap segment */
+#define BIGBSSTOP ((NIXCALL - BIGPGSZ) & ~(1ULL * GiB - 1))
+#define BIGBSSSIZE (32ull * GiB) /* size of big heap segment */
 #else
-#define BIGBSSTOP       ((NIXCALL-BIGPGSZ) & ~(1*GiB-1))
-#define BIGBSSSIZE      (32*GiB)                     /* size of big heap segment */
+#define BIGBSSTOP ((NIXCALL - BIGPGSZ) & ~(1 * GiB - 1))
+#define BIGBSSSIZE (32 * GiB) /* size of big heap segment */
 #endif
-#define HEAPTOP		(BIGBSSTOP-BIGBSSSIZE)	/* end of shared heap segments */
-
+#define HEAPTOP (BIGBSSTOP - BIGBSSSIZE) /* end of shared heap segments */
 
 /*
  *  Address spaces. Kernel, sorted by address.
  */
 
 #ifndef __ASSEMBLER__
-#define KZERO		0xffff800000000000ull
-#define KSYS		(KZERO+1ull*MiB+1ull*PGSZ)
-#define KTZERO		(KZERO+2ull*MiB)
+#define KZERO 0xffff800000000000ull
+#define KSYS (KZERO + 1ull * MiB + 1ull * PGSZ)
+#define KTZERO (KZERO + 2ull * MiB)
 #else
-#define KZERO		0xffff800000000000
-#define KSYS		(KZERO+1*MiB+1*PGSZ)
-#define KTZERO		(KZERO+2*MiB)
+#define KZERO 0xffff800000000000
+#define KSYS (KZERO + 1 * MiB + 1 * PGSZ)
+#define KTZERO (KZERO + 2 * MiB)
 #endif
 
 // YUCK.
 /* stuff we did not want to bring in but ... */
- /* buffer for user space -- known to vga */
-#define RMBUF ((void*)(KZERO + 0x9000))
+/* buffer for user space -- known to vga */
+#define RMBUF ((void *)(KZERO + 0x9000))
 #define LORMBUF (0x9000)
 
 /*
@@ -139,5 +138,5 @@
  * and level 0 the PT pages. The PTLX macro gives an index into the
  * page-table page at level 'l' for the virtual address 'v'.
  */
-#define PTLX(v, l)	(((v)>>(((l)*PTSHFT)+PGSHFT)) & ((1<<PTSHFT)-1))
-#define PGLSZ(l)	(1<<(((l)*PTSHFT)+PGSHFT))
+#define PTLX(v, l) (((v) >> (((l)*PTSHFT) + PGSHFT)) & ((1 << PTSHFT) - 1))
+#define PGLSZ(l) (1 << (((l)*PTSHFT) + PGSHFT))

sys/src/9/amd64/memory.c

@@ -22,8 +22,8 @@ meminit(void)
 
 	for(PAMap *m = pamap; m != nil; m = m->next){
 		DBG("meminit: addr %#P end %#P type %d size %P\n",
-			m->addr, m->addr+m->size,
-			m->type, m->size);
+		    m->addr, m->addr + m->size,
+		    m->type, m->size);
 		PTE pgattrs = PteP;
 		switch(m->type){
 		default:
@@ -48,17 +48,17 @@ meminit(void)
 		/*
 		 * Fill in conf data.
 		 */
-		if (m->type != PamMEMORY)
+		if(m->type != PamMEMORY)
 			continue;
 		if(cx >= nelem(conf.mem))
 			continue;
 		uintmem lo = ROUNDUP(m->addr, PGSZ);
 		conf.mem[cx].base = lo;
 		uintmem hi = ROUNDDN(m->addr + m->size, PGSZ);
-		conf.mem[cx].npage = (hi - lo)/PGSZ;
+		conf.mem[cx].npage = (hi - lo) / PGSZ;
 		conf.npage += conf.mem[cx].npage;
 		DBG("cm %d: addr %#llx npage %lu\n",
-			cx, conf.mem[cx].base, conf.mem[cx].npage);
+		    cx, conf.mem[cx].base, conf.mem[cx].npage);
 		cx++;
 	}
 	mmukflushtlb();
@@ -68,7 +68,7 @@ meminit(void)
 	 * This is why I hate Plan 9.
 	 */
 	conf.upages = conf.npage;
-	conf.ialloc = 64*MiB;	// Arbitrary.
+	conf.ialloc = 64 * MiB;	       // Arbitrary.
 	DBG("npage %llu upage %lu\n", conf.npage, conf.upages);
 }
 
@@ -77,13 +77,13 @@ setphysmembounds(void)
 {
 	uintmem pmstart, pmend;
 
-	pmstart = ROUNDUP(PADDR(end), 2*MiB);
+	pmstart = ROUNDUP(PADDR(end), 2 * MiB);
 	pmend = pmstart;
 	for(PAMap *m = pamap; m != nil; m = m->next){
-		if(m->type == PamMODULE && m->addr+m->size > pmstart)
-			pmstart = ROUNDUP(m->addr+m->size, 2*MiB);
-		if(m->type == PamMEMORY && m->addr+m->size > pmend)
-			pmend = ROUNDDN(m->addr+m->size, 2*MiB);
+		if(m->type == PamMODULE && m->addr + m->size > pmstart)
+			pmstart = ROUNDUP(m->addr + m->size, 2 * MiB);
+		if(m->type == PamMEMORY && m->addr + m->size > pmend)
+			pmend = ROUNDDN(m->addr + m->size, 2 * MiB);
 	}
 	sys->pmstart = pmstart;
 	sys->pmend = pmend;
@@ -98,7 +98,7 @@ umeminit(void)
 	for(PAMap *m = pamap; m != nil; m = m->next){
 		if(m->type != PamMEMORY)
 			continue;
-		if(m->addr < 2*MiB)
+		if(m->addr < 2 * MiB)
 			continue;
 		// if(m->size < 2*MiB)
 		// 	continue;

sys/src/9/amd64/mmu.c

@@ -21,17 +21,17 @@
  *	mmuptcopy (PteSHARED trick?);
  */
 
-#define	PML4X(va)	(PTLX(va, 3))
-#define	PML3X(va)	(PTLX(va, 2))
-#define	PML2X(va)	(PTLX(va, 1))
-#define	PML1X(va)	(PTLX(va, 0))
+#define PML4X(va) (PTLX(va, 3))
+#define PML3X(va) (PTLX(va, 2))
+#define PML2X(va) (PTLX(va, 1))
+#define PML1X(va) (PTLX(va, 0))
 
-#define	PGSZHUGE	(PGLSZ(2))
-#define	PGSZLARGE	(PGLSZ(1))
+#define PGSZHUGE (PGLSZ(2))
+#define PGSZLARGE (PGLSZ(1))
 
-#define PPNHUGE(x)	((x)&~(PteNX|(PGSZHUGE-1)))
-#define PPNLARGE(x)	((x)&~(PteNX|(PGSZLARGE-1)))
-#define PPN(x)		((x)&~(PteNX|(PGSZ-1)))
+#define PPNHUGE(x) ((x) & ~(PteNX | (PGSZHUGE - 1)))
+#define PPNLARGE(x) ((x) & ~(PteNX | (PGSZLARGE - 1)))
+#define PPN(x) ((x) & ~(PteNX | (PGSZ - 1)))
 
 void
 mmukflushtlb(void)
@@ -62,11 +62,11 @@ mmuflush(void)
 }
 
 static void
-mmuptpunmap(Proc* proc)
+mmuptpunmap(Proc *proc)
 {
 	Page *page, *next;
 
-	memset(UINT2PTR(proc->MMU.root->va), 0, PTSZ/2);
+	memset(UINT2PTR(proc->MMU.root->va), 0, PTSZ / 2);
 	for(next = nil, page = proc->MMU.root->next; page != nil; page = next){
 		next = page->next;
 		page->daddr = 0;
@@ -94,19 +94,19 @@ dumpptepg(int lvl, uintptr_t pa)
 
 	tab = 4 - lvl;
 	pte = KADDR(pa);
-	for(i = 0; i < PTSZ/sizeof(PTE); i++)
+	for(i = 0; i < PTSZ / sizeof(PTE); i++)
 		if(pte[i] & PteP){
 			tabs(tab);
 			print("l%d %#p[%#05x]: %#llx\n", lvl, pa, i, pte[i]);
 
 			/* skip kernel mappings */
-			if((pte[i]&PteU) == 0){
-				tabs(tab+1);
+			if((pte[i] & PteU) == 0){
+				tabs(tab + 1);
 				print("...kern...\n");
 				continue;
 			}
 			if(lvl > 2)
-				dumpptepg(lvl-1, PPN(pte[i]));
+				dumpptepg(lvl - 1, PPN(pte[i]));
 		}
 }
 
@@ -123,11 +123,12 @@ dumpmmu(Proc *p)
 			if(pg->daddr != i)
 				continue;
 			print("\tpg %#p = va %#llx pa %#llx"
-				" daddr %#lx next %#p prev %#p\n",
-				pg, pg->va, pg->pa, pg->daddr, pg->next, pg->prev);
+			      " daddr %#lx next %#p prev %#p\n",
+			      pg, pg->va, pg->pa, pg->daddr, pg->next, pg->prev);
 		}
 	}
-	if(0)dumpptepg(4, machp()->MMU.pml4->pa);
+	if(0)
+		dumpptepg(4, machp()->MMU.pml4->pa);
 }
 
 void
@@ -159,10 +160,10 @@ allocapage(void)
 		const int npage = 3;
 		char *pp = mallocalign(npage * PTSZ, PTSZ, 0, 0);
 		assert(pp != nil);
-		p = pp + (npage / 2)*PTSZ;
-	}else{
+		p = pp + (npage / 2) * PTSZ;
+	} else {
 
-		static alignas(4096) unsigned char alloc[16*MiB];
+		static alignas(4096) unsigned char alloc[16 * MiB];
 		static usize offset = 0;
 
 		if(offset >= sizeof(alloc))
@@ -176,10 +177,10 @@ allocapage(void)
 
 static Page mmuptpfreelist;
 
-static Page*
+static Page *
 mmuptpalloc(void)
 {
-	void* va;
+	void *va;
 	Page *page;
 
 	/*
@@ -219,7 +220,7 @@ mmuptpalloc(void)
 }
 
 void
-mmuswitch(Proc* proc)
+mmuswitch(Proc *proc)
 {
 	Mpl pl;
 
@@ -235,13 +236,13 @@ mmuswitch(Proc* proc)
 		proc->newtlb = 0;
 	}
 
-	tssrsp0(machp(), STACKALIGN(PTR2UINT(proc->kstack+KSTACK)));
+	tssrsp0(machp(), STACKALIGN(PTR2UINT(proc->kstack + KSTACK)));
 	cr3put(proc->MMU.root->pa);
 	splx(pl);
 }
 
 void
-mmurelease(Proc* proc)
+mmurelease(Proc *proc)
 {
 	Page *page, *next;
 	int freed = 0;
@@ -272,7 +273,7 @@ mmurelease(Proc* proc)
 	if(freed && pga.rend.l.p)
 		wakeup(&pga.rend);
 
-	tssrsp0(machp(), STACKALIGN(machp()->stack+MACHSTKSZ));
+	tssrsp0(machp(), STACKALIGN(machp()->stack + MACHSTKSZ));
 	cr3put(machp()->MMU.pml4->pa);
 }
 
@@ -288,29 +289,29 @@ checkpte(const PTE *pml4, uintmem ppn, void *a)
 	pte = 0;
 	s = buf;
 	*s = 0;
-	if((l = mmuwalk(pml4, addr, 3, &pte)) < 0 || (*pte&PteP) == 0)
+	if((l = mmuwalk(pml4, addr, 3, &pte)) < 0 || (*pte & PteP) == 0)
 		goto Panic;
-	s = seprint(buf, buf+sizeof buf,
-		"check3: l%d pte %#p = %llx\n",
-		l, pte, pte?*pte:~0);
-	if((l = mmuwalk(pml4, addr, 2, &pte)) < 0 || (*pte&PteP) == 0)
+	s = seprint(buf, buf + sizeof buf,
+		    "check3: l%d pte %#p = %llx\n",
+		    l, pte, pte ? *pte : ~0);
+	if((l = mmuwalk(pml4, addr, 2, &pte)) < 0 || (*pte & PteP) == 0)
 		goto Panic;
-	s = seprint(s, buf+sizeof buf,
-		"check2: l%d  pte %#p = %llx\n",
-		l, pte, pte?*pte:~0);
-	if(*pte&PtePS)
+	s = seprint(s, buf + sizeof buf,
+		    "check2: l%d  pte %#p = %llx\n",
+		    l, pte, pte ? *pte : ~0);
+	if(*pte & PtePS)
 		return;
-	if((l = mmuwalk(pml4, addr, 1, &pte)) < 0 || (*pte&PteP) == 0)
+	if((l = mmuwalk(pml4, addr, 1, &pte)) < 0 || (*pte & PteP) == 0)
 		goto Panic;
-	seprint(s, buf+sizeof buf,
+	seprint(s, buf + sizeof buf,
 		"check1: l%d  pte %#p = %llx\n",
-		l, pte, pte?*pte:~0);
+		l, pte, pte ? *pte : ~0);
 	return;
 
 Panic:
-	seprint(s, buf+sizeof buf,
+	seprint(s, buf + sizeof buf,
 		"checkpte: l%d addr %#p ppn %#llx kaddr %#p pte %#p = %llx",
-		l, a, ppn, KADDR(ppn), pte, pte?*pte:~0);
+		l, a, ppn, KADDR(ppn), pte, pte ? *pte : ~0);
 	panic("%s", buf);
 }
 
@@ -320,17 +321,17 @@ pteflags(uint attr)
 	uintmem flags;
 
 	flags = 0;
-	if(attr & ~(PTEVALID|PTEWRITE|PTERONLY|PTEUSER|PTEUNCACHED|PTENOEXEC))
+	if(attr & ~(PTEVALID | PTEWRITE | PTERONLY | PTEUSER | PTEUNCACHED | PTENOEXEC))
 		panic("pteflags: wrong attr bits: %#x\n", attr);
-	if(attr&PTEVALID)
+	if(attr & PTEVALID)
 		flags |= PteP;
-	if(attr&PTEWRITE)
+	if(attr & PTEWRITE)
 		flags |= PteRW;
-	if(attr&PTEUSER)
+	if(attr & PTEUSER)
 		flags |= PteU;
-	if(attr&PTEUNCACHED)
+	if(attr & PTEUNCACHED)
 		flags |= PtePCD;
-	if(attr&PTENOEXEC)
+	if(attr & PTENOEXEC)
 		flags |= PteNX;
 	return flags;
 }
@@ -349,7 +350,7 @@ allocptpage(Proc *p, int level)
 	page->next = p->MMU.root->next;
 	p->MMU.root->next = page;
 
-	return PPN(page->pa)|PteU|PteRW|PteP;
+	return PPN(page->pa) | PteU | PteRW | PteP;
 }
 
 /*
@@ -381,12 +382,12 @@ mmuput(uintptr_t va, Page *pg, uint attr)
 	if(pg->pgszi < 0)
 		panic("mmuput: page size index out of bounds (%d)\n", pg->pgszi);
 	pgsz = sys->pgsz[pg->pgszi];
-	if(pg->pa & (pgsz-1))
+	if(pg->pa & (pgsz - 1))
 		panic("mmumappage: pa offset non zero: %#llx\n", pg->pa);
 	if(0x0000800000000000 <= va && va < KZERO)
 		panic("mmumappage: va %#P is non-canonical", va);
 
-	entry = pg->pa|pteflags(attr)|PteU;
+	entry = pg->pa | pteflags(attr) | PteU;
 	pml4 = UINT2PTR(up->MMU.root->va);
 	p4e = &pml4[PML4X(va)];
 	if(p4e == nil)
@@ -397,8 +398,8 @@ mmuput(uintptr_t va, Page *pg, uint attr)
 	p3e = &ptp[PML3X(va)];
 	if(p3e == nil)
 		panic("mmuput: PML3 is nil");
-	if(pgsz == 1*GiB){
-		*p3e = entry|PtePS;
+	if(pgsz == 1 * GiB){
+		*p3e = entry | PtePS;
 		splx(pl);
 		DBG("cpu%d: up %#p new 1GiB pte %#p = %#llx\n",
 		    machp()->machno, up, p3e, *p3e);
@@ -410,8 +411,8 @@ mmuput(uintptr_t va, Page *pg, uint attr)
 	p2e = &ptp[PML2X(va)];
 	if(p2e == nil)
 		panic("mmuput: PML2 is nil");
-	if(pgsz == 2*MiB){
-		*p2e = entry|PtePS;
+	if(pgsz == 2 * MiB){
+		*p2e = entry | PtePS;
 		splx(pl);
 		DBG("cpu%d: up %#p new 2MiB pte %#p = %#llx\n",
 		    machp()->machno, up, p2e, *p2e);
@@ -424,7 +425,7 @@ mmuput(uintptr_t va, Page *pg, uint attr)
 	if(p1e == nil)
 		panic("mmuput: PML1 is nil");
 	*p1e = entry;
-	invlpg(va);			/* only if old entry valid? */
+	invlpg(va); /* only if old entry valid? */
 	splx(pl);
 
 	DBG("cpu%d: up %#p new pte %#p = %#llx\n",
@@ -447,7 +448,7 @@ static PTE *
 mmukpmap4(PTE *pml4, uintptr va)
 {
 	PTE p4e = pml4[PML4X(va)];
-	if((p4e&PteP) == 0)
+	if((p4e & PteP) == 0)
 		panic("mmukphysmap: PML4E for va %#P is missing", va);
 	return KADDR(PPN(p4e));
 }
@@ -459,30 +460,29 @@ mmukpmap3(PTE *pml3, uintmem pa, uintptr va, PTE attr, usize size)
 
 	// Suitable for a huge page?
 	if(ALIGNED(pa, PGSZHUGE) &&
-	    ALIGNED(va, PGSZHUGE) &&
-	    size >= PGSZHUGE &&
-	    (p3e == 0 || (p3e&PtePS) == PtePS))
-	{
-		if((p3e&PteP) != 0 && PPNHUGE(p3e) != pa)
+	   ALIGNED(va, PGSZHUGE) &&
+	   size >= PGSZHUGE &&
+	   (p3e == 0 || (p3e & PtePS) == PtePS)){
+		if((p3e & PteP) != 0 && PPNHUGE(p3e) != pa)
 			panic("mmukphysmap: remapping kernel direct address at va %#P (old PML3E %#P, new %#P)",
-			    va, p3e, pa|attr|PtePS|PteP);
-		pml3[PML3X(va)] = pa|attr|PtePS|PteP;
+			      va, p3e, pa | attr | PtePS | PteP);
+		pml3[PML3X(va)] = pa | attr | PtePS | PteP;
 		return nil;
-	}else if((p3e&(PtePS|PteP)) == (PtePS|PteP)){
+	} else if((p3e & (PtePS | PteP)) == (PtePS | PteP)){
 		PTE *pml2 = allocapage();
 		if(pml2 == nil)
 			panic("mmukphysmap: cannot allocate PML2 to splinter");
-		PTE entry = p3e&~(PteD|PteA);
-		for(int i=0; i<PTSZ/sizeof(PTE); i++)
-			pml2[i] = entry+i*PGSZLARGE;
-		p3e = PADDR(pml2)|PteRW|PteP;
+		PTE entry = p3e & ~(PteD | PteA);
+		for(int i = 0; i < PTSZ / sizeof(PTE); i++)
+			pml2[i] = entry + i * PGSZLARGE;
+		p3e = PADDR(pml2) | PteRW | PteP;
 		pml3[PML3X(va)] = p3e;
 	}
-	if((p3e&PteP) == 0){
+	if((p3e & PteP) == 0){
 		PTE *pml2 = allocapage();
 		if(pml2 == nil)
 			panic("mmukphysmap: cannot allocate PML2");
-		p3e = PADDR(pml2)|PteRW|PteP;
+		p3e = PADDR(pml2) | PteRW | PteP;
 		pml3[PML3X(va)] = p3e;
 	}
 
@@ -496,30 +496,29 @@ mmukpmap2(PTE *pml2, uintmem pa, uintptr va, PTE attr, usize size)
 
 	// Suitable for a large page?
 	if(ALIGNED(pa, PGSZLARGE) &&
-	    ALIGNED(va, PGSZLARGE) &&
-	    size >= PGSZLARGE &&
-	    ((p2e&PteP) == 0 || (p2e&(PtePS|PteP)) == (PtePS|PteP)))
-	{
-		if((p2e&PteP) != 0 && PPNLARGE(p2e) != pa)
+	   ALIGNED(va, PGSZLARGE) &&
+	   size >= PGSZLARGE &&
+	   ((p2e & PteP) == 0 || (p2e & (PtePS | PteP)) == (PtePS | PteP))){
+		if((p2e & PteP) != 0 && PPNLARGE(p2e) != pa)
 			panic("mmukphysmap: remapping kernel direct address at va %#P (old PML2E %#P, new %#P)",
-			    va, p2e, pa|attr|PtePS|PteP);
-		pml2[PML2X(va)] = pa|attr|PtePS|PteP;
+			      va, p2e, pa | attr | PtePS | PteP);
+		pml2[PML2X(va)] = pa | attr | PtePS | PteP;
 		return nil;
-	} else if((p2e&(PtePS|PteP)) == (PtePS|PteP)){
+	} else if((p2e & (PtePS | PteP)) == (PtePS | PteP)){
 		PTE *pml1 = allocapage();
 		if(pml1 == nil)
 			panic("mmukphysmap: cannot allocate PML1 to splinter");
-		PTE entry = p2e&~(PtePS|PteD|PteA);
-		for(int i=0; i<PTSZ/sizeof(PTE); i++)
-			pml1[i] = entry+i*PGSZ;
-		p2e = PADDR(pml1)|PteRW|PteP;
+		PTE entry = p2e & ~(PtePS | PteD | PteA);
+		for(int i = 0; i < PTSZ / sizeof(PTE); i++)
+			pml1[i] = entry + i * PGSZ;
+		p2e = PADDR(pml1) | PteRW | PteP;
 		pml2[PML2X(va)] = p2e;
 	}
-	if((p2e&PteP) == 0){
+	if((p2e & PteP) == 0){
 		PTE *pml1 = allocapage();
 		if(pml1 == nil)
 			panic("mmukphysmap: cannot allocate PML1");
-		p2e = PPN(PADDR(pml1))|PteRW|PteP;
+		p2e = PPN(PADDR(pml1)) | PteRW | PteP;
 		pml2[PML2X(va)] = p2e;
 	}
 
@@ -530,10 +529,10 @@ static void
 mmukpmap1(PTE *pml1, uintmem pa, uintptr va, PTE attr)
 {
 	PTE p1e = pml1[PML1X(va)];
-	if((p1e&PteP) != 0 && PPN(p1e) != pa)
+	if((p1e & PteP) != 0 && PPN(p1e) != pa)
 		panic("mmukphysmap: remapping kernel direct address at va %#P (pml1 %#P old %#P new %#P)",
-		    va, pml1, p1e, pa|attr|PteP);
-	pml1[PML1X(va)] = pa|attr|PteP;
+		      va, pml1, p1e, pa | attr | PteP);
+	pml1[PML1X(va)] = pa | attr | PteP;
 }
 
 /*
@@ -546,7 +545,7 @@ mmukphysmap(PTE *pml4, uintmem pa, PTE attr, usize size)
 	usize pgsz = 0;
 	Mpl pl;
 
-	if (pa >= PHYSADDRSIZE)
+	if(pa >= PHYSADDRSIZE)
 		panic("mapping nonexistent physical address");
 
 	pl = splhi();
@@ -580,7 +579,7 @@ mmukphysmap(PTE *pml4, uintmem pa, PTE attr, usize size)
  * in particular we would like to disable caching.
  * vmap() is required to access them.
  */
-void*
+void *
 vmap(uintptr_t pa, usize size)
 {
 	uintptr_t va;
@@ -601,9 +600,9 @@ vmap(uintptr_t pa, usize size)
 	 * mappings; perhaps something like kmap, but kmap probably
 	 * can't be used early enough for some of the uses.
 	 */
-	if(pa+size < 1ull*MiB)
+	if(pa + size < 1ull * MiB)
 		return KADDR(pa);
-	if(pa < 1ull*MiB)
+	if(pa < 1ull * MiB)
 		return nil;
 
 	/*
@@ -613,7 +612,7 @@ vmap(uintptr_t pa, usize size)
 	 */
 	o = pa % PGSZ;
 	pa -= o;
-	sz = ROUNDUP(size+o, PGSZ);
+	sz = ROUNDUP(size + o, PGSZ);
 
 	if(pa == 0){
 		print("vmap(0, %lu) pc=%#p\n", size, getcallerpc());
@@ -621,16 +620,16 @@ vmap(uintptr_t pa, usize size)
 	}
 	ilock(&vmaplock);
 	va = (uintptr)KADDR(pa);
-	mmukphysmap(sys->pml4, pa, PteNX|PtePCD|PteRW, sz);
+	mmukphysmap(sys->pml4, pa, PteNX | PtePCD | PteRW, sz);
 	iunlock(&vmaplock);
 
-	DBG("vmap(%#p, %lu) => %#p\n", pa+o, size, va+o);
+	DBG("vmap(%#p, %lu) => %#p\n", pa + o, size, va + o);
 
 	return UINT2PTR(va + o);
 }
 
 void
-vunmap(void* v, usize size)
+vunmap(void *v, usize size)
 {
 	uintptr_t va;
 
@@ -643,7 +642,7 @@ vunmap(void* v, usize size)
 	 * See the comments above in vmap.
 	 */
 	va = PTR2UINT(v);
-	if(va >= KZERO && va+size < KZERO+1ull*MiB)
+	if(va >= KZERO && va + size < KZERO + 1ull * MiB)
 		return;
 
 	/*
@@ -664,28 +663,28 @@ mmuwalk(const PTE *pml4, uintptr_t va, int level, const PTE **ret)
 		DBG("mmuwalk%d: va %#p level %d\n", machp()->machno, va, level);
 	const PTE *pte = &pml4[PML4X(va)];
 	assert(pte != nil);
-	if (level == 3 || !(*pte & PteP)){
+	if(level == 3 || !(*pte & PteP)){
 		*ret = pte;
 		splx(pl);
 		return 3;
 	}
 	const PTE *ptp = KADDR(PPN(*pte));
 	pte = &ptp[PML3X(va)];
-	if (level == 2 || (!(*pte & PteP) || (*pte & PtePS))){
+	if(level == 2 || (!(*pte & PteP) || (*pte & PtePS))){
 		*ret = pte;
 		splx(pl);
 		return 2;
 	}
 	ptp = KADDR(PPN(*pte));
 	pte = &ptp[PML2X(va)];
-	if (level == 1 || (!(*pte & PteP) || (*pte & PtePS))){
+	if(level == 1 || (!(*pte & PteP) || (*pte & PtePS))){
 		*ret = pte;
 		splx(pl);
 		return 1;
 	}
 	ptp = KADDR(PPN(*pte));
 	pte = &ptp[PML1X(va)];
-	if (level == 0 || (*pte & PteP)){
+	if(level == 0 || (*pte & PteP)){
 		*ret = pte;
 		splx(pl);
 		return 0;
@@ -717,8 +716,8 @@ mmuphysaddr(const PTE *pml4, uintptr va)
 	if(l < 0)
 		return ~0;
 
-	mask = PGLSZ(l)-1;
-	pa = (*pte & ~(PteNX|mask)) + (va & mask);
+	mask = PGLSZ(l) - 1;
+	pa = (*pte & ~(PteNX | mask)) + (va & mask);
 
 	DBG("physaddr: l %d pte %#P va %#p pa %#llx\n", l, *pte, va, pa);
 
@@ -744,7 +743,7 @@ mmuinit(void)
 		p = UINT2PTR(machp()->stack);
 		p += MACHSTKSZ;
 
-		memmove(p + PTSZ/2, &sys->pml4[PTSZ/(2*sizeof(PTE))], PTSZ/4 + PTSZ/8);
+		memmove(p + PTSZ / 2, &sys->pml4[PTSZ / (2 * sizeof(PTE))], PTSZ / 4 + PTSZ / 8);
 		machp()->MMU.pml4 = &machp()->MMU.pml4kludge;
 		machp()->MMU.pml4->va = PTR2UINT(p);
 		machp()->MMU.pml4->pa = PADDR(p);
@@ -775,6 +774,6 @@ void
 mmuprocinit(Proc *p)
 {
 	Page *pg = mmuptpalloc();
-	memmove(UINT2PTR(pg->va+PTSZ/2), UINT2PTR(machp()->MMU.pml4->va+PTSZ/2), PTSZ/4+PTSZ/8);
+	memmove(UINT2PTR(pg->va + PTSZ / 2), UINT2PTR(machp()->MMU.pml4->va + PTSZ / 2), PTSZ / 4 + PTSZ / 8);
 	p->MMU.root = pg;
 }

sys/src/9/amd64/mouse.c

@@ -15,7 +15,7 @@
 #include "../port/error.h"
 #include "io.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
@@ -24,11 +24,10 @@
 /*
  *  mouse types
  */
-enum
-{
-	Mouseother=	0,
-	Mouseserial=	1,
-	MousePS2=	2,
+enum {
+	Mouseother = 0,
+	Mouseserial = 1,
+	MousePS2 = 2,
 };
 
 extern int mouseshifted;
@@ -41,8 +40,7 @@ static int resolution;
 static int accelerated;
 static int mousehwaccel;
 
-enum
-{
+enum {
 	CMaccelerated,
 	CMhwaccel,
 	CMintellimouse,
@@ -55,16 +53,16 @@ enum
 };
 
 static Cmdtab mousectlmsg[] =
-{
-	{CMaccelerated,		"accelerated",		0},
-	{CMhwaccel,		"hwaccel",		2},
-	{CMintellimouse,	"intellimouse",		1},
-	{CMlinear,		"linear",		1},
-	{CMps2,			"ps2",			1},
-	{CMps2intellimouse,	"ps2intellimouse",	1},
-	{CMres,			"res",			0},
-	{CMreset,		"reset",		1},
-	{CMserial,		"serial",		0},
+	{
+		{CMaccelerated, "accelerated", 0},
+		{CMhwaccel, "hwaccel", 2},
+		{CMintellimouse, "intellimouse", 1},
+		{CMlinear, "linear", 1},
+		{CMps2, "ps2", 1},
+		{CMps2intellimouse, "ps2intellimouse", 1},
+		{CMres, "res", 0},
+		{CMreset, "reset", 1},
+		{CMserial, "serial", 0},
 };
 
 /*
@@ -103,7 +101,7 @@ ps2mouse(void)
 	if(mousetype == MousePS2)
 		return;
 
-	if (0) /* For now, this is done in main.c */
+	if(0) /* For now, this is done in main.c */
 		mouseenable();
 	/* make mouse streaming, enabled */
 	mousecmd(0xEA);
@@ -172,11 +170,11 @@ setintellimouse(void)
 	packetsize = 4;
 	switch(mousetype){
 	case MousePS2:
-		mousecmd(0xF3);	/* set sample */
+		mousecmd(0xF3); /* set sample */
 		mousecmd(0xC8);
-		mousecmd(0xF3);	/* set sample */
+		mousecmd(0xF3); /* set sample */
 		mousecmd(0x64);
-		mousecmd(0xF3);	/* set sample */
+		mousecmd(0xF3); /* set sample */
 		mousecmd(0x50);
 		break;
 	}
@@ -189,10 +187,10 @@ resetmouse(void)
 	switch(mousetype){
 	case MousePS2:
 		mousecmd(0xF6);
-		mousecmd(0xEA);	/* streaming */
-		mousecmd(0xE8);	/* set resolution */
+		mousecmd(0xEA); /* streaming */
+		mousecmd(0xE8); /* set resolution */
 		mousecmd(3);
-		mousecmd(0xF4);	/* enabled */
+		mousecmd(0xF4); /* enabled */
 		break;
 	}
 }
@@ -244,9 +242,9 @@ mousectl(Cmdbuf *cb)
 			setintellimouse();
 		break;
 	case CMhwaccel:
-		if(strcmp(cb->f[1], "on")==0)
+		if(strcmp(cb->f[1], "on") == 0)
 			mousehwaccel = 1;
-		else if(strcmp(cb->f[1], "off")==0)
+		else if(strcmp(cb->f[1], "off") == 0)
 			mousehwaccel = 0;
 		else
 			cmderror(cb, "bad mouse control message");

sys/src/9/amd64/mpacpi.c

@@ -17,7 +17,8 @@
 extern int mpisabusno;
 
 // Initialise all local and IO APICs
-int mpacpi(int ncleft)
+int
+mpacpi(int ncleft)
 {
 	char *already;
 	int np, bp;
@@ -30,59 +31,59 @@ int mpacpi(int ncleft)
 	 * supposed to parse the ACPI shit with the AML to figure out the buses and
 	 * find a clear one, but fuck that.  Note this busno is just for our own
 	 * RDT/Rbus bookkeeping. */
-	if (mpisabusno == -1)
+	if(mpisabusno == -1)
 		mpisabusno = Nbus - 1;
 
-	if (apics == nil)
+	if(apics == nil)
 		return ncleft;
 	mt = apics->tbl;
-	if (mt == nil)
+	if(mt == nil)
 		return ncleft;
 
 	print("APIC lapic paddr %#.8llx, flags %#.8x\n",
-		   mt->lapicpa, mt->pcat);
+	      mt->lapicpa, mt->pcat);
 	np = 0;
 	//print("apics->st %p\n", apics->st);
-	for (int i = 0; i < apics->nchildren; i++) {
+	for(int i = 0; i < apics->nchildren; i++){
 		st = apics->children[i]->tbl;
 		already = "";
-		switch (st->type) {
-			case ASlapic:
-				print("ASlapic %d\n", st->lapic.id);
-				/* this table is supposed to have all of them if it exists */
-				if (st->lapic.id > Napic)
-					break;
-				apic = xlapic + st->lapic.id;
-				bp = (np++ == 0);
-				if (apic->useable) {
-					already = "(mp)";
-				} else if (ncleft != 0) {
-					ncleft--;
-					apicinit(st->lapic.id, mt->lapicpa, bp);
-				} else {
-					already = "(off)";
-				}
-
-				print("apic proc %d/%d apicid %d %s\n", np - 1, apic->Lapic.machno,
-					   st->lapic.id, already);
+		switch(st->type){
+		case ASlapic:
+			print("ASlapic %d\n", st->lapic.id);
+			/* this table is supposed to have all of them if it exists */
+			if(st->lapic.id > Napic)
 				break;
-			case ASioapic:
-				print("ASioapic %d\n", st->ioapic.id);
-				if (st->ioapic.id > Napic){
-					print("ASioapic: %d is > %d, ignoring\n", st->ioapic.id, Napic);
-					break;
-				}
-				apic = xioapic + st->ioapic.id;
-				if (apic->useable) {
-					already = "(mp)";
-				} else {
-					ioapicinit(st->ioapic.id, st->ioapic.ibase, st->ioapic.addr);
-				}
+			apic = xlapic + st->lapic.id;
+			bp = (np++ == 0);
+			if(apic->useable){
+				already = "(mp)";
+			} else if(ncleft != 0){
+				ncleft--;
+				apicinit(st->lapic.id, mt->lapicpa, bp);
+			} else {
+				already = "(off)";
+			}
 
-				apic->Ioapic.gsib = st->ioapic.ibase;
-				print("ioapic %d ", st->ioapic.id);
-				print("addr %p ibase %d %s\n", st->ioapic.addr, st->ioapic.ibase, already);
+			print("apic proc %d/%d apicid %d %s\n", np - 1, apic->Lapic.machno,
+			      st->lapic.id, already);
+			break;
+		case ASioapic:
+			print("ASioapic %d\n", st->ioapic.id);
+			if(st->ioapic.id > Napic){
+				print("ASioapic: %d is > %d, ignoring\n", st->ioapic.id, Napic);
 				break;
+			}
+			apic = xioapic + st->ioapic.id;
+			if(apic->useable){
+				already = "(mp)";
+			} else {
+				ioapicinit(st->ioapic.id, st->ioapic.ibase, st->ioapic.addr);
+			}
+
+			apic->Ioapic.gsib = st->ioapic.ibase;
+			print("ioapic %d ", st->ioapic.id);
+			print("addr %p ibase %d %s\n", st->ioapic.addr, st->ioapic.ibase, already);
+			break;
 		}
 	}
 	return ncleft;

sys/src/9/amd64/msi.c

@@ -16,35 +16,35 @@
 #include "apic.h"
 
 enum {
-	Dpcicap		= 1<<0,
-	Dmsicap		= 1<<1,
-	Dvec		= 1<<2,
-	Debug		= 0,
+	Dpcicap = 1 << 0,
+	Dmsicap = 1 << 1,
+	Dvec = 1 << 2,
+	Debug = 0,
 };
 
 enum {
 	/* address */
-	Msiabase		= 0xfee00000u,
-	Msiadest		= 1<<12,		/* same as 63:56 of apic vector */
-	Msiaedest	= 1<<4,		/* same as 55:48 of apic vector */
-	Msialowpri	= 1<<3,		/* redirection hint */
-	Msialogical	= 1<<2,
+	Msiabase = 0xfee00000u,
+	Msiadest = 1 << 12,  /* same as 63:56 of apic vector */
+	Msiaedest = 1 << 4,  /* same as 55:48 of apic vector */
+	Msialowpri = 1 << 3, /* redirection hint */
+	Msialogical = 1 << 2,
 
 	/* data */
-	Msidlevel	= 1<<15,
-	Msidassert	= 1<<14,
-	Msidlogical	= 1<<11,
-	Msidmode	= 1<<8,		/* 3 bits; delivery mode */
-	Msidvector	= 0xff<<0,
+	Msidlevel = 1 << 15,
+	Msidassert = 1 << 14,
+	Msidlogical = 1 << 11,
+	Msidmode = 1 << 8, /* 3 bits; delivery mode */
+	Msidvector = 0xff << 0,
 };
 
-enum{
+enum {
 	/* msi capabilities */
-	Vmask		= 1<<8,
-	Cap64		= 1<<7,
-	Mmesgmsk	= 7<<4,
-	Mmcap		= 7<<1,
-	Msienable	= 1<<0,
+	Vmask = 1 << 8,
+	Cap64 = 1 << 7,
+	Mmesgmsk = 7 << 4,
+	Mmcap = 7 << 1,
+	Msienable = 1 << 0,
 };
 
 static int
@@ -61,8 +61,8 @@ msicap(Pcidev *p)
 static int
 blacklist(Pcidev *p)
 {
-	switch(p->vid<<16 | p->did){
-	case 0x11ab<<16 | 0x6485:
+	switch(p->vid << 16 | p->did){
+	case 0x11ab << 16 | 0x6485:
 		return -1;
 	}
 	return 0;
@@ -82,18 +82,16 @@ pcimsienable(Pcidev *p, uint64_t vec)
 	if(blacklist(p) != 0)
 		return -1;
 	datao = 8;
-	d = vec>>48;
+	d = vec >> 48;
 	lopri = (vec & 0x700) == MTlp;
 	logical = (vec & Lm) != 0;
-	pcicfgw32(p, c + 4, Msiabase | Msiaedest * d
-		| Msialowpri * lopri | Msialogical * logical);
+	pcicfgw32(p, c + 4, Msiabase | Msiaedest * d | Msialowpri * lopri | Msialogical * logical);
 	if(f & Cap64){
 		datao += 4;
 		pcicfgw32(p, c + 8, 0);
 	}
 	dmode = (vec >> 8) & 7;
-	pcicfgw16(p, c + datao, Msidassert | Msidlogical * logical
-		| Msidmode * dmode | ((uint)vec & 0xff));
+	pcicfgw16(p, c + datao, Msidassert | Msidlogical * logical | Msidmode * dmode | ((uint)vec & 0xff));
 	if(f & Vmask)
 		pcicfgw32(p, c + datao + 4, 0);
 
@@ -116,8 +114,8 @@ pcimsimask(Pcidev *p, int mask)
 	f = pcicfgr16(p, c + 2) & ~Msienable;
 	if(mask){
 		pcicfgw16(p, c + 2, f & ~Msienable);
-//		pciclrbme(p);		cheeze
-	}else{
+		//		pciclrbme(p);		cheeze
+	} else {
 		pcisetbme(p);
 		pcicfgw16(p, c + 2, f | Msienable);
 	}

sys/src/9/amd64/multiboot.c

@@ -15,64 +15,69 @@
 
 typedef struct Mbi Mbi;
 struct Mbi {
-	uint32_t	flags;
-	uint32_t	memlower;
-	uint32_t	memupper;
-	uint32_t	bootdevice;
-	uint32_t	cmdline;
-	uint32_t	modscount;
-	uint32_t	modsaddr;
-	uint32_t	syms[4];
-	uint32_t	mmaplength;
-	uint32_t	mmapaddr;
-	uint32_t	driveslength;
-	uint32_t	drivesaddr;
-	uint32_t	configtable;
-	uint32_t	bootloadername;
-	uint32_t	apmtable;
-	uint32_t	vbe[6];
+	uint32_t flags;
+	uint32_t memlower;
+	uint32_t memupper;
+	uint32_t bootdevice;
+	uint32_t cmdline;
+	uint32_t modscount;
+	uint32_t modsaddr;
+	uint32_t syms[4];
+	uint32_t mmaplength;
+	uint32_t mmapaddr;
+	uint32_t driveslength;
+	uint32_t drivesaddr;
+	uint32_t configtable;
+	uint32_t bootloadername;
+	uint32_t apmtable;
+	uint32_t vbe[6];
 };
 
-enum {						/* flags */
-	Fmem		= 0x00000001,		/* mem* valid */
-	Fbootdevice	= 0x00000002,		/* bootdevice valid */
-	Fcmdline	= 0x00000004,		/* cmdline valid */
-	Fmods		= 0x00000008,		/* mod* valid */
-	Fsyms		= 0x00000010,		/* syms[] has a.out info */
-	Felf		= 0x00000020,		/* syms[] has ELF info */
-	Fmmap		= 0x00000040,		/* mmap* valid */
-	Fdrives		= 0x00000080,		/* drives* valid */
-	Fconfigtable	= 0x00000100,		/* configtable* valid */
-	Fbootloadername	= 0x00000200,		/* bootloadername* valid */
-	Fapmtable	= 0x00000400,		/* apmtable* valid */
-	Fvbe		= 0x00000800,		/* vbe[] valid */
+enum {				     /* flags */
+       Fmem = 0x00000001,	     /* mem* valid */
+       Fbootdevice = 0x00000002,     /* bootdevice valid */
+       Fcmdline = 0x00000004,	     /* cmdline valid */
+       Fmods = 0x00000008,	     /* mod* valid */
+       Fsyms = 0x00000010,	     /* syms[] has a.out info */
+       Felf = 0x00000020,	     /* syms[] has ELF info */
+       Fmmap = 0x00000040,	     /* mmap* valid */
+       Fdrives = 0x00000080,	     /* drives* valid */
+       Fconfigtable = 0x00000100,    /* configtable* valid */
+       Fbootloadername = 0x00000200, /* bootloadername* valid */
+       Fapmtable = 0x00000400,	     /* apmtable* valid */
+       Fvbe = 0x00000800,	     /* vbe[] valid */
 };
 
 typedef struct Mod Mod;
 struct Mod {
-	uint32_t	modstart;
-	uint32_t	modend;
-	uint32_t	string;
-	uint32_t	reserved;
+	uint32_t modstart;
+	uint32_t modend;
+	uint32_t string;
+	uint32_t reserved;
 };
 
 typedef struct MMap MMap;
 struct MMap {
-	uint32_t	size;
-	uint32_t	base[2];
-	uint32_t	length[2];
-	uint32_t	type;
+	uint32_t size;
+	uint32_t base[2];
+	uint32_t length[2];
+	uint32_t type;
 };
 
 static int
 mbpamtype(int acpitype)
 {
 	switch(acpitype){
-	case 1: return PamMEMORY;
-	case 2: return PamRESERVED;
-	case 3: return PamACPI;
-	case 4: return PamPRESERVE;
-	case 5: return PamUNUSABLE;
+	case 1:
+		return PamMEMORY;
+	case 2:
+		return PamRESERVED;
+	case 3:
+		return PamACPI;
+	case 4:
+		return PamPRESERVE;
+	case 5:
+		return PamUNUSABLE;
 	default:
 		print("multiboot: unknown memory type %d", acpitype);
 		break;
@@ -84,11 +89,16 @@ static const char *
 mbtypename(int type)
 {
 	switch(type){
-	case 1: return "Memory";
-	case 2: return "Reserved";
-	case 3: return "ACPI Reclaim Memory";
-	case 4: return "ACPI NVS Memory";
-	default: break;
+	case 1:
+		return "Memory";
+	case 2:
+		return "Reserved";
+	case 3:
+		return "ACPI Reclaim Memory";
+	case 4:
+		return "ACPI NVS Memory";
+	default:
+		break;
 	}
 	return "(unknown)";
 }
@@ -122,40 +132,40 @@ multiboot(uint32_t magic, uint32_t pmbi, int vflag)
 		mmap = KADDR(mbi->mmapaddr);
 		n = 0;
 		while(n < mbi->mmaplength){
-			addr = (((uint64_t)mmap->base[1])<<32)|mmap->base[0];
-			len = (((uint64_t)mmap->length[1])<<32)|mmap->length[0];
+			addr = (((uint64_t)mmap->base[1]) << 32) | mmap->base[0];
+			len = (((uint64_t)mmap->length[1]) << 32) | mmap->length[0];
 			if(vflag){
 				print("%s (%u)", mbtypename(mmap->type), mmap->type);
-			}else{
+			} else {
 				pamapinsert(addr, len, mbpamtype(mmap->type));
 			}
-			switch(mmap->type) {
-				// There is no consistency in which type of e820 segment RSDP is stored in.
-				case 3:
-				case 4:
-					if (vflag)
-						print("Would check for RSD from %p to %p:", KADDR(addr), KADDR(addr)+len);
-					break;
+			switch(mmap->type){
+			// There is no consistency in which type of e820 segment RSDP is stored in.
+			case 3:
+			case 4:
+				if(vflag)
+					print("Would check for RSD from %p to %p:", KADDR(addr), KADDR(addr) + len);
+				break;
 			}
 			if(vflag)
 				print("\t%#16.16llx %#16.16llx (%llu)\n",
-					addr, addr+len, len);
+				      addr, addr + len, len);
 
-			n += mmap->size+sizeof(mmap->size);
-			mmap = KADDR(mbi->mmapaddr+n);
+			n += mmap->size + sizeof(mmap->size);
+			mmap = KADDR(mbi->mmapaddr + n);
 		}
 	}
 	if(mbi->flags & Fmods){
 		for(i = 0; i < mbi->modscount; i++){
-			mod = KADDR(mbi->modsaddr + i*16);
+			mod = KADDR(mbi->modsaddr + i * 16);
 			p = "";
 			if(mod->string != 0)
 				p = KADDR(mod->string);
 			if(vflag)
 				print("mod %#x %#x <%s>\n",
-					mod->modstart, mod->modend, p);
-			else{
-				usize len = mod->modend-mod->modstart;
+				      mod->modstart, mod->modend, p);
+			else {
+				usize len = mod->modend - mod->modstart;
 				pamapinsert(mod->modstart, len, PamMODULE);
 			}
 		}

sys/src/9/amd64/pamap.c

@@ -31,17 +31,17 @@ const char *
 pamtypename(int type)
 {
 	const char *names[] = {
-	[PamNONE] 	= "NONE",
-	[PamMEMORY]	= "MEMORY",
-	[PamRESERVED]	= "RESERVED",
-	[PamACPI]	= "ACPI",
-	[PamPRESERVE]	= "PRESERVE",
-	[PamUNUSABLE]	= "UNUSABLE",
-	[PamDEV]	= "DEV",
-	[PamMODULE]	= "MODULE",
-	[PamKTEXT]	= "KTEXT",
-	[PamKRDONLY]	= "KRDONLY",
-	[PamKRDWR]	= "KRDWR",
+		[PamNONE] = "NONE",
+		[PamMEMORY] = "MEMORY",
+		[PamRESERVED] = "RESERVED",
+		[PamACPI] = "ACPI",
+		[PamPRESERVE] = "PRESERVE",
+		[PamUNUSABLE] = "UNUSABLE",
+		[PamDEV] = "DEV",
+		[PamMODULE] = "MODULE",
+		[PamKTEXT] = "KTEXT",
+		[PamKRDONLY] = "KRDONLY",
+		[PamKRDWR] = "KRDWR",
 	};
 	assert(type < nelem(names));
 	return names[type];
@@ -54,8 +54,8 @@ pamapdump(void)
 	for(PAMap *p = pamap; p != nil; p = p->next){
 		assert(p->type <= PamKRDWR);
 		print("    [%#P, %#P) %-8s (%llu)\n",
-			p->addr, p->addr + p->size,
-			pamtypename(p->type), p->size);
+		      p->addr, p->addr + p->size,
+		      pamtypename(p->type), p->size);
 	}
 	print("}\n");
 }
@@ -79,11 +79,11 @@ pamapclearrange(uintmem addr, usize size, int type)
 {
 	PAMap **ppp = &pamap, *np = pamap;
 	while(np != nil && size > 0){
-		if(addr+size <= np->addr)
-			break;		// The range isn't in the list.
+		if(addr + size <= np->addr)
+			break;	      // The range isn't in the list.
 
 		// Are we there yet?
-		if(np->addr < addr && np->addr+np->size <= addr){
+		if(np->addr < addr && np->addr + np->size <= addr){
 			ppp = &np->next;
 			np = np->next;
 			continue;
@@ -114,7 +114,7 @@ pamapclearrange(uintmem addr, usize size, int type)
 			np->next = tp;
 			ppp = &np->next;
 			np = tp;
-		}else if(addr < np->addr){
+		} else if(addr < np->addr){
 			assert(np->addr < addr + size);
 			usize delta = np->addr - addr;
 			addr += delta;
@@ -122,7 +122,7 @@ pamapclearrange(uintmem addr, usize size, int type)
 		}
 		if(addr == np->addr){
 			usize delta = size;
-			if (delta > np->size)
+			if(delta > np->size)
 				delta = np->size;
 			np->size -= delta;
 			np->addr += delta;
@@ -175,12 +175,12 @@ pamapinsert(uintmem addr, usize size, int type)
 	}
 
 	// See if we can combine with previous region.
-	if(pp != nil && pp->type == type && pp->addr+pp->size == addr){
+	if(pp != nil && pp->type == type && pp->addr + pp->size == addr){
 		pp->size += size;
 
 		// And successor region?  If we do it here,
 		// we free the successor node.
-		if(np != nil && np->type == type && addr+size == np->addr){
+		if(np != nil && np->type == type && addr + size == np->addr){
 			pp->size += np->size;
 			pp->next = np->next;
 			free(np);
@@ -190,7 +190,7 @@ pamapinsert(uintmem addr, usize size, int type)
 	}
 
 	// Can we combine with the successor region?
-	if(np != nil && np->type == type && addr+size == np->addr){
+	if(np != nil && np->type == type && addr + size == np->addr){
 		np->addr = addr;
 		np->size += size;
 		return;
@@ -206,19 +206,19 @@ void
 pamapmerge(void)
 {
 	// Extended BIOS Data Area
-	pamapinsert(0x80000, 0xA0000-0x80000, PamKRDWR);
+	pamapinsert(0x80000, 0xA0000 - 0x80000, PamKRDWR);
 
 	// VGA/CGA MMIO region
-	pamapinsert(0xA0000, 0xC0000-0xA0000, PamDEV);
+	pamapinsert(0xA0000, 0xC0000 - 0xA0000, PamDEV);
 
 	// BIOS ROM stuff
-	pamapinsert(0xC0000, 0xF0000-0xC0000, PamKRDONLY);
-	pamapinsert(0xF0000, 0x100000-0xF0000, PamKRDONLY);
+	pamapinsert(0xC0000, 0xF0000 - 0xC0000, PamKRDONLY);
+	pamapinsert(0xF0000, 0x100000 - 0xF0000, PamKRDONLY);
 
 	// Add the kernel segments.
-	pamapinsert(PADDR((void*)KSYS), KTZERO-KSYS, PamKRDWR);
-	pamapinsert(PADDR((void*)KTZERO), etext-(char*)KTZERO, PamKTEXT);
-	pamapinsert(PADDR(etext), erodata-etext, PamKRDONLY);
-	pamapinsert(PADDR(erodata), edata-erodata, PamKRDWR);
-	pamapinsert(PADDR(edata), end-edata, PamKRDWR);
+	pamapinsert(PADDR((void *)KSYS), KTZERO - KSYS, PamKRDWR);
+	pamapinsert(PADDR((void *)KTZERO), etext - (char *)KTZERO, PamKTEXT);
+	pamapinsert(PADDR(etext), erodata - etext, PamKRDONLY);
+	pamapinsert(PADDR(erodata), edata - erodata, PamKRDWR);
+	pamapinsert(PADDR(edata), end - edata, PamKRDWR);
 }

sys/src/9/amd64/physalloc.c

@@ -20,30 +20,29 @@
 #include "fns.h"
 #include "acpi.h"
 
-#define ISPOWEROF2(x)	(((x) != 0) && !((x) & ((x)-1)))
-#define UNO		((uintmem)1)
+#define ISPOWEROF2(x) (((x) != 0) && !((x) & ((x)-1)))
+#define UNO ((uintmem)1)
 
 enum {
-	BKmin		= 21,			/* Minimum lg2 */
-	BKmax		= 30,			/* Maximum lg2 */
+	BKmin = 21, /* Minimum lg2 */
+	BKmax = 30, /* Maximum lg2 */
 
-	Ndoms = 16,				/* Max # of domains */
+	Ndoms = 16, /* Max # of domains */
 
 	Used = 0,
 	Avail = 1,
 };
 
-
-#define INDEX(b, v)	((uint)(((v))/(b)->bminsz))
-#define BLOCK(b, i)	((i)-INDEX((b),(b)->memory))
+#define INDEX(b, v) ((uint)(((v)) / (b)->bminsz))
+#define BLOCK(b, i) ((i)-INDEX((b), (b)->memory))
 
 typedef struct Buddy Buddy;
 struct Buddy {
-	int16_t	tag;		/* Used or Avail */
-	int16_t	kval;
-	uint	next;
-	uint	prev;
-	void	*p;
+	int16_t tag; /* Used or Avail */
+	int16_t kval;
+	uint next;
+	uint prev;
+	void *p;
 };
 
 /*
@@ -53,26 +52,26 @@ struct Buddy {
  */
 typedef struct Bal Bal;
 struct Bal {
-	uintmem	base;
-	uint64_t	size;
-	usize	nfree;
-	usize	nblocks;
-	int	kmin;		/* Minimum lg2 */
-	int	kmax;		/* Maximum lg2 */
-	uintmem	bminsz;		/* minimum block sz */
+	uintmem base;
+	uint64_t size;
+	usize nfree;
+	usize nblocks;
+	int kmin;	/* Minimum lg2 */
+	int kmax;	/* Maximum lg2 */
+	uintmem bminsz; /* minimum block sz */
 	uintmem memory;
-	uint	kspan;
+	uint kspan;
 
-	Buddy* blocks;
-	Buddy* avail;
+	Buddy *blocks;
+	Buddy *avail;
 };
 
 static Bal bal[Ndoms];
 static int ndoms;
 static Lock budlock;
 
-char*
-seprintphysstats(char *s,  char *e)
+char *
+seprintphysstats(char *s, char *e)
 {
 	Bal *b;
 	int i;
@@ -82,7 +81,7 @@ seprintphysstats(char *s,  char *e)
 		b = &bal[i];
 		if(b->size > 0)
 			s = seprint(s, e, "%lu/%lu %lluK color %d blocks avail\n",
-				b->nfree, b->nblocks, b->bminsz/KiB, i);
+				    b->nfree, b->nblocks, b->bminsz / KiB, i);
 	}
 	unlock(&budlock);
 	return s;
@@ -105,21 +104,21 @@ xphysfree(Bal *b, uintmem data, uint64_t size)
 
 	if(data == 0 /*|| !ALIGNED(data, b->bminsz)*/)
 		return;
-	i = INDEX(b,data);
+	i = INDEX(b, data);
 
 	lock(&budlock);
 S1:
 	/*
 	 * Find buddy.
 	 */
-	l = &blocks[BLOCK(b,i)];
+	l = &blocks[BLOCK(b, i)];
 	l->p = nil;
 	DBG("\tbsl: BLOCK(b,i) %d index %llu kval %d\n",
-		BLOCK(b,i), BLOCK(b,i)/((1<<l->kval)/b->bminsz), l->kval);
-	if((BLOCK(b,i)/((1<<l->kval)/b->bminsz)) & 1)	/* simpler test? */
-		p = l - (1<<l->kval)/b->bminsz;
+	    BLOCK(b, i), BLOCK(b, i) / ((1 << l->kval) / b->bminsz), l->kval);
+	if((BLOCK(b, i) / ((1 << l->kval) / b->bminsz)) & 1) /* simpler test? */
+		p = l - (1 << l->kval) / b->bminsz;
 	else
-		p = l + (1<<l->kval)/(b->bminsz);
+		p = l + (1 << l->kval) / (b->bminsz);
 	DBG("\tbsl: l @ %ld buddy @ %ld\n", l - blocks, p - blocks);
 
 	/*
@@ -137,14 +136,14 @@ S1:
 		l->next = avail[l->kval].next;
 		l->prev = 0;
 		if(l->next != 0)
-			blocks[BLOCK(b,l->next)].prev = i;
+			blocks[BLOCK(b, l->next)].prev = i;
 		avail[l->kval].next = i;
 
-		b->nfree += size/b->bminsz;
+		b->nfree += size / b->bminsz;
 
 		unlock(&budlock);
 		DBG("bsl: free @ i %d BLOCK(b,i) %d kval %d next %d %s\n",
-			i, BLOCK(b,i), l->kval, l->next, l->tag?"avail":"used");
+		    i, BLOCK(b, i), l->kval, l->next, l->tag ? "avail" : "used");
 		return;
 	}
 
@@ -153,13 +152,12 @@ S1:
 	 * This removes block P from the avail list.
 	 */
 	if(p->prev != 0){
-		blocks[BLOCK(b,p->prev)].next = p->next;
+		blocks[BLOCK(b, p->prev)].next = p->next;
 		p->prev = 0;
-	}
-	else
+	} else
 		avail[p->kval].next = 0;
 	if(p->next != 0){
-		blocks[BLOCK(b,p->next)].prev = p->prev;
+		blocks[BLOCK(b, p->next)].prev = p->prev;
 		p->next = 0;
 	}
 	p->tag = Used;
@@ -171,10 +169,10 @@ S1:
 	DBG("\tbsl: l @ %ld p @ %ld\n", l - blocks, p - blocks);
 	if(p < l)
 		l = p;
-	i = l - blocks + INDEX(b,b->memory);
+	i = l - blocks + INDEX(b, b->memory);
 	l->kval++;
 	DBG("bsl: merge @ i %d BLOCK(b,i) %d kval %d next %d tag %s\n",
-		i, BLOCK(b,i), l->kval, l->next, l->tag?"avail":"used");
+	    i, BLOCK(b, i), l->kval, l->next, l->tag ? "avail" : "used");
 	goto S1;
 }
 
@@ -194,7 +192,7 @@ physfree(uintmem data, uint64_t size)
 	panic("physfree: no bal");
 }
 
-static void*
+static void *
 xphystag(Bal *b, uintmem data)
 {
 	uint i;
@@ -206,11 +204,11 @@ xphystag(Bal *b, uintmem data)
 
 	if(data == 0 /*|| !ALIGNED(data, b->bminsz)*/)
 		return nil;
-	i = INDEX(b,data);
-	return blocks[BLOCK(b,i)].p;
+	i = INDEX(b, data);
+	return blocks[BLOCK(b, i)].p;
 }
 
-void*
+void *
 phystag(uintmem data)
 {
 	Bal *b;
@@ -225,22 +223,262 @@ phystag(uintmem data)
 }
 
 static uint8_t lg2table[256] = {
-	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
-	4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
-	5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-	5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+	0,
+	0,
+	1,
+	1,
+	2,
+	2,
+	2,
+	2,
+	3,
+	3,
+	3,
+	3,
+	3,
+	3,
+	3,
+	3,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	4,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	5,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	6,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
+	7,
 };
 
 static int
@@ -248,23 +486,23 @@ lg2floor(uint64_t w)
 {
 	uint64_t hi, lo;
 
-	if((lo = (w>>48)) != 0){
-		if((hi = (lo>>8)) != 0)
-			return 56+lg2table[hi];
-		return 48+lg2table[lo];
+	if((lo = (w >> 48)) != 0){
+		if((hi = (lo >> 8)) != 0)
+			return 56 + lg2table[hi];
+		return 48 + lg2table[lo];
 	}
-	if((lo = (w>>32)) != 0){
-		if((hi = (lo>>8)) != 0)
-			return 40+lg2table[hi];
-		return 32+lg2table[lo];
+	if((lo = (w >> 32)) != 0){
+		if((hi = (lo >> 8)) != 0)
+			return 40 + lg2table[hi];
+		return 32 + lg2table[lo];
 	}
-	if((lo = (w>>16)) != 0){
-		if((hi = (lo>>8)) != 0)
-			return 24+lg2table[hi];
-		return 16+lg2table[lo];
+	if((lo = (w >> 16)) != 0){
+		if((hi = (lo >> 8)) != 0)
+			return 24 + lg2table[hi];
+		return 16 + lg2table[lo];
 	}
-	if((hi = (w>>8)) != 0)
-		return 8+lg2table[hi];
+	if((hi = (w >> 8)) != 0)
+		return 8 + lg2table[hi];
 	return lg2table[w];
 }
 
@@ -310,9 +548,9 @@ xphysalloc(Bal *b, uint64_t size, void *tag)
 	 * Remove from list.
 	 */
 	i = avail[j].next;
-	l = &blocks[BLOCK(b,i)];
+	l = &blocks[BLOCK(b, i)];
 	DBG("bsr: block @ i %d BLOCK(b,i) %d kval %d next %d %s\n",
-		i, BLOCK(b,i), l->kval, l->next, l->tag?"avail":"used");
+	    i, BLOCK(b, i), l->kval, l->next, l->tag ? "avail" : "used");
 	avail[j].next = l->next;
 	blocks[avail[j].next].prev = 0;
 	l->prev = l->next = 0;
@@ -327,24 +565,24 @@ xphysalloc(Bal *b, uint64_t size, void *tag)
 		 * Split.
 		 */
 		j--;
-		p = &blocks[BLOCK(b,i) + (UNO<<j)/(b->bminsz)];
+		p = &blocks[BLOCK(b, i) + (UNO << j) / (b->bminsz)];
 		p->tag = Avail;
 		p->kval = j;
 		p->next = avail[j].next;
 		p->prev = 0;
 		if(p->next != 0)
-			blocks[BLOCK(b,p->next)].prev = i + (UNO<<j)/(b->bminsz);
-		avail[j].next = i + (UNO<<j)/(b->bminsz);
+			blocks[BLOCK(b, p->next)].prev = i + (UNO << j) / (b->bminsz);
+		avail[j].next = i + (UNO << j) / (b->bminsz);
 		DBG("bsr: split @ i %d BLOCK(b,i) %ld j %d next %d (%d) %s\n",
-			i, p - blocks, j, p->next, BLOCK(b,p->next),
-			p->tag?"avail":"used");
+		    i, p - blocks, j, p->next, BLOCK(b, p->next),
+		    p->tag ? "avail" : "used");
 	}
-	b->nfree -= size/b->bminsz;
+	b->nfree -= size / b->bminsz;
 	unlock(&budlock);
 
-	m = b->memory + b->bminsz*BLOCK(b,i);
+	m = b->memory + b->bminsz * BLOCK(b, i);
 	assert(m >= b->base && m < b->base + b->size);
-	blocks[BLOCK(b,i)].p = tag;
+	blocks[BLOCK(b, i)].p = tag;
 
 	return m;
 }
@@ -409,7 +647,7 @@ physallocdump(void)
 	for(n = 0; n < Ndoms; n++)
 		if(bal[n].size > 0)
 			print("physalloc color=%d base=%#llx size=%#llx\n",
-				n, bal[n].base, bal[n].size);
+			      n, bal[n].base, bal[n].size);
 }
 
 static int
@@ -418,14 +656,13 @@ plop(Bal *b, uintmem a, int k, int type)
 	uint i;
 	Buddy *l;
 
-
 	DBG("plop(a %#p k %d type %d)\n", a, k, type);
 
-	i = INDEX(b,a);
-	l = &b->blocks[BLOCK(b,i)];
+	i = INDEX(b, a);
+	l = &b->blocks[BLOCK(b, i)];
 
 	l->kval = k;
-	xphysfree(b, a, 1<<k);
+	xphysfree(b, a, 1 << k);
 
 	return 1;
 }
@@ -440,9 +677,9 @@ iimbchunk(Bal *b, uintmem a, uintmem e, int type)
 	e = ROUNDDN(e, b->bminsz);
 	DBG("iimbchunk: start a %#P e %#P\n", a, e);
 
-	b->nblocks += (e-a)/b->bminsz;
+	b->nblocks += (e - a) / b->bminsz;
 
-	for(k = b->kmin, s = b->bminsz; a+s < e && k < b->kmax; s <<= 1, k += 1){
+	for(k = b->kmin, s = b->bminsz; a + s < e && k < b->kmax; s <<= 1, k += 1){
 		if(a & s){
 			plop(b, a, k, type);
 			a += s;
@@ -450,14 +687,14 @@ iimbchunk(Bal *b, uintmem a, uintmem e, int type)
 	}
 	DBG("done1 a %#P e %#P s %#x %d\n", a, e, s, k);
 
-	while(a+s <= e){
+	while(a + s <= e){
 		plop(b, a, k, type);
 		a += s;
 	}
 	DBG("done2 a %#P e %#P s %#x %d\n", a, e, s, k);
 
 	for(k -= 1, s >>= 1; a < e; s >>= 1, k -= 1){
-		if(a+s <= e){
+		if(a + s <= e){
 			plop(b, a, k, type);
 			a += s;
 		}
@@ -480,9 +717,9 @@ physinit(uintmem a, uint64_t size)
 
 	DBG("physinit %#llx %#llx\n", a, size);
 
-	for(addr = a; addr < a+size; addr += len){
+	for(addr = a; addr < a + size; addr += len){
 		dom = 0;
-		len = 0; // acpimblocksize(addr, &dom);
+		len = 0;	// acpimblocksize(addr, &dom);
 		/* len can be zero if there's no acpi information about addr */
 		if(len == 0 || addr + len > a + size)
 			len = a + size - addr;
@@ -495,47 +732,47 @@ physinit(uintmem a, uint64_t size)
 		 * that there is no interleaving of domains. Ok by now.
 		 */
 		DBG("physmem block dom %d addr %#llx size %#llx\n",
-			dom, addr, len);
+		    dom, addr, len);
 		if(dom < 0 || dom >= Ndoms){
 			print("physinit: invalid dom %d\n", dom);
 			dom = 0;
 		}
 		b = &bal[dom];
 		if(dom >= ndoms)
-			ndoms = dom+1;
+			ndoms = dom + 1;
 		if(b->kmin == 0){
 			b->base = addr;
 			b->size = len;
 			b->kmin = BKmin;
 			b->kmax = BKmax;
-			b->bminsz = (UNO<<b->kmin);
+			b->bminsz = (UNO << b->kmin);
 			b->memory = sys->pmstart;
 			b->kspan = lg2floor(sys->pmend);
 			if(!ISPOWEROF2(sys->pmend))
 				b->kspan++;
-			dtsz = sizeof(Buddy)*(UNO<<(b->kspan-b->kmin+1));
+			dtsz = sizeof(Buddy) * (UNO << (b->kspan - b->kmin + 1));
 			DBG("kspan %u (arrysz = %llu)\n", b->kspan, dtsz);
 			b->blocks = malloc(dtsz);
 			if(b->blocks == nil)
 				panic("physinit: no blocks");
 			memset(b->blocks, 0, dtsz);
-			b->avail = malloc(sizeof(Buddy)*(b->kmax+1));
+			b->avail = malloc(sizeof(Buddy) * (b->kmax + 1));
 			if(b->avail == nil)
 				panic("physinit: no avail");
-			memset(b->avail, 0, sizeof(Buddy)*(b->kmax+1));
-		}else{
+			memset(b->avail, 0, sizeof(Buddy) * (b->kmax + 1));
+		} else {
 			if(addr < b->base)
 				panic("physinit: decreasing base");
-			if(b->base+b->size < addr + len)
-				b->size = (addr-b->base) + len;
+			if(b->base + b->size < addr + len)
+				b->size = (addr - b->base) + len;
 			for(i = 0; i < Ndoms; i++)
 				if(bal[i].kmin && &bal[i] != b)
-				if(bal[i].base < b->base + b->size &&
-				   bal[i].base + bal[i].size > b->base + b->size)
-					panic("physinit: doms overlap");
+					if(bal[i].base < b->base + b->size &&
+					   bal[i].base + bal[i].size > b->base + b->size)
+						panic("physinit: doms overlap");
 		}
-		assert(addr >= b->base && addr+len <= b->base + b->size);
+		assert(addr >= b->base && addr + len <= b->base + b->size);
 
-		iimbchunk(b, addr, addr+len, 0);
+		iimbchunk(b, addr, addr + len, 0);
 	}
 }

sys/src/9/amd64/pmcio.c

@@ -11,21 +11,20 @@
  *  Performance counters non port part
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-#include	"amd64.h"
-#include	"../port/pmc.h"
-
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+#include "amd64.h"
+#include "../port/pmc.h"
 
 /* non portable, for intel will be CPUID.0AH.EDX
  */
 
 enum {
-	PeNreg		= 4,	/* Number of Pe/Pct regs */
+	PeNreg = 4, /* Number of Pe/Pct regs */
 };
 
 int
@@ -38,12 +37,12 @@ pmcnregs(void)
 }
 
 //PeHo|PeGo
-#define PeAll	(PeOS|PeUsr)
-#define SetEvMsk(v, e) ((v)|(((e)&PeEvMskL)|(((e)<<(PeEvMsksh-8))&PeEvMskH)))
-#define SetUMsk(v, u) ((v)|(((u)<<8ull)&PeUnMsk))
+#define PeAll (PeOS | PeUsr)
+#define SetEvMsk(v, e) ((v) | (((e)&PeEvMskL) | (((e) << (PeEvMsksh - 8)) & PeEvMskH)))
+#define SetUMsk(v, u) ((v) | (((u) << 8ull) & PeUnMsk))
 
-#define GetEvMsk(e) (((e)&PeEvMskL)|(((e)&PeEvMskH)>>(PeEvMsksh-8)))
-#define GetUMsk(u) (((u)&PeUnMsk)>>8ull)
+#define GetEvMsk(e) (((e)&PeEvMskL) | (((e)&PeEvMskH) >> (PeEvMsksh - 8)))
+#define GetUMsk(u) (((u)&PeUnMsk) >> 8ull)
 
 static int
 pmcuserenab(int enable)
@@ -51,23 +50,23 @@ pmcuserenab(int enable)
 	uint64_t cr4;
 
 	cr4 = cr4get();
-	if (enable){
+	if(enable){
 		cr4 |= Pce;
 	} else
-		cr4 &=  ~Pce;
+		cr4 &= ~Pce;
 	cr4put(cr4);
-	return cr4&Pce;
+	return cr4 & Pce;
 }
 
 PmcCtlCtrId pmcids[] = {
 	{"locked instr", "0x024 0x1"},
-	{"locked cycles nonspec", "0x024 0x4"},	// cycles
+	{"locked cycles nonspec", "0x024 0x4"},	       // cycles
 	{"SMI intr", "0x02b 0x0"},
 	{"DC access", "0x040 0x0"},
 	{"DC miss", "0x041 0x0"},
 	{"DC refills", "0x042 0x1f"},
 	{"DC evicted", "0x042 0x3f"},
-	{"L1 DTLB miss", "0x045 0x7"},		//DTLB L2 hit
+	{"L1 DTLB miss", "0x045 0x7"},	      //DTLB L2 hit
 	{"L2 DTLB miss", "0x046 0x7"},
 	{"L1 DTLB hit", "0x04d 0x3"},
 	{"global TLB flush", "0x054 0x0"},
@@ -76,14 +75,14 @@ PmcCtlCtrId pmcids[] = {
 	{"IC miss", "0x081 0x0"},
 	{"IC refill from L2", "0x082 0x0"},
 	{"IC refill from system", "0x083 0x0"},
-	{"L1 ITLB miss", "0x084 0x0"},			//L2 ITLB hit
+	{"L1 ITLB miss", "0x084 0x0"},	      //L2 ITLB hit
 	{"L2 ITLB miss", "0x085 0x3"},
 	{"DRAM access", "0x0e0 0x3f"},
-	{"L3 miss core 0", "0x4e1 0x13"},		//core 0 only
+	{"L3 miss core 0", "0x4e1 0x13"},	 //core 0 only
 	{"L3 miss core 1", "0x4e1 0x23"},
 	{"L3 miss core 2", "0x4e1 0x43"},
 	{"L3 miss core 3", "0x4e1 0x83"},
-	{"L3 miss socket", "0x4e1 0xf3"},		//all cores in the socket
+	{"L3 miss socket", "0x4e1 0xf3"},	 //all cores in the socket
 	{"", ""},
 };
 
@@ -92,8 +91,8 @@ pmctrans(PmcCtl *p)
 {
 	PmcCtlCtrId *pi;
 
-	for (pi = &pmcids[0]; pi->portdesc[0] != '\0'; pi++){
-		if ( strncmp(p->descstr, pi->portdesc, strlen(pi->portdesc)) == 0){
+	for(pi = &pmcids[0]; pi->portdesc[0] != '\0'; pi++){
+		if(strncmp(p->descstr, pi->portdesc, strlen(pi->portdesc)) == 0){
 			strncpy(p->descstr, pi->archdesc, strlen(pi->archdesc) + 1);
 			return 0;
 		}
@@ -107,9 +106,9 @@ getctl(PmcCtl *p, uint32_t regno)
 	uint64_t r, e, u;
 
 	r = rdmsr(regno + PerfEvtbase);
-	p->enab = (r&PeCtEna) != 0;
-	p->user = (r&PeUsr) != 0;
-	p->os = (r&PeOS) != 0;
+	p->enab = (r & PeCtEna) != 0;
+	p->user = (r & PeUsr) != 0;
+	p->os = (r & PeOS) != 0;
 	e = GetEvMsk(r);
 	u = GetUMsk(r);
 	//TODO inverse translation
@@ -124,10 +123,10 @@ pmcanyenab(void)
 	int i;
 	PmcCtl p;
 
-	for (i = 0; i < pmcnregs(); i++) {
-		if (getctl(&p, i) < 0)
+	for(i = 0; i < pmcnregs(); i++){
+		if(getctl(&p, i) < 0)
 			return -1;
-		if (p.enab)
+		if(p.enab)
 			return 1;
 	}
 
@@ -143,54 +142,54 @@ setctl(PmcCtl *p, int regno)
 	char *toks[2];
 	char str[KNAMELEN];
 
-	if (regno >= pmcnregs())
+	if(regno >= pmcnregs())
 		error("invalid reg");
 
 	v = rdmsr(regno + PerfEvtbase);
-	v &= PeEvMskH|PeEvMskL|PeCtEna|PeOS|PeUsr|PeUnMsk;
-	if (p->enab != PmcCtlNullval) {
-		if (p->enab)
+	v &= PeEvMskH | PeEvMskL | PeCtEna | PeOS | PeUsr | PeUnMsk;
+	if(p->enab != PmcCtlNullval){
+		if(p->enab)
 			v |= PeCtEna;
 		else
 			v &= ~PeCtEna;
 	}
 
-	if (p->user != PmcCtlNullval) {
-		if (p->user)
+	if(p->user != PmcCtlNullval){
+		if(p->user)
 			v |= PeUsr;
 		else
 			v &= ~PeUsr;
 	}
 
-	if (p->os != PmcCtlNullval) {
-		if (p->os)
+	if(p->os != PmcCtlNullval){
+		if(p->os)
 			v |= PeOS;
 		else
 			v &= ~PeOS;
 	}
 
-	if (pmctrans(p) < 0)
+	if(pmctrans(p) < 0)
 		return -1;
 
-	if (p->nodesc == 0) {
+	if(p->nodesc == 0){
 		memmove(str, p->descstr, KNAMELEN);
-		if (tokenize(str, toks, 2) != 2)
+		if(tokenize(str, toks, 2) != 2)
 			return -1;
 		e = atoi(toks[0]);
 		u = atoi(toks[1]);
-		v &= ~(PeEvMskL|PeEvMskH|PeUnMsk);
+		v &= ~(PeEvMskL | PeEvMskH | PeUnMsk);
 		v |= SetEvMsk(v, e);
 		v |= SetUMsk(v, u);
 	}
-	if (p->reset != PmcCtlNullval && p->reset) {
+	if(p->reset != PmcCtlNullval && p->reset){
 		v = 0;
-		wrmsr(regno+ PerfCtrbase, 0);
+		wrmsr(regno + PerfCtrbase, 0);
 		p->reset = PmcCtlNullval; /* only reset once */
 	}
-	wrmsr(regno+ PerfEvtbase, v);
+	wrmsr(regno + PerfEvtbase, v);
 	pmcuserenab(pmcanyenab());
-	if (pmcdebug) {
-		v = rdmsr(regno+ PerfEvtbase);
+	if(pmcdebug){
+		v = rdmsr(regno + PerfEvtbase);
 		print("conf pmc[%#x]: %#llx\n", regno, v);
 	}
 	return 0;
@@ -202,14 +201,14 @@ pmcctlstr(char *str, int nstr, PmcCtl *p)
 	int ns;
 
 	ns = 0;
-	if (p->enab && p->enab != PmcCtlNullval)
+	if(p->enab && p->enab != PmcCtlNullval)
 		ns += snprint(str + ns, nstr - ns, "enable\n");
 	else
 		ns += snprint(str + ns, nstr - ns, "disable\n");
 
-	if (p->user && p->user != PmcCtlNullval)
+	if(p->user && p->user != PmcCtlNullval)
 		ns += snprint(str + ns, nstr - ns, "user\n");
-	if (p->os && p->user != PmcCtlNullval)
+	if(p->os && p->user != PmcCtlNullval)
 		ns += snprint(str + ns, nstr - ns, "os\n");
 
 	//TODO, inverse pmctrans?
@@ -228,8 +227,8 @@ pmcdescstr(char *str, int nstr)
 
 	ns = 0;
 
-	for (pi = &pmcids[0]; pi->portdesc[0] != '\0'; pi++)
-		ns += snprint(str + ns, nstr - ns, "%s\n",pi->portdesc);
+	for(pi = &pmcids[0]; pi->portdesc[0] != '\0'; pi++)
+		ns += snprint(str + ns, nstr - ns, "%s\n", pi->portdesc);
 	return ns;
 }
 
@@ -254,12 +253,12 @@ notstale(void *x)
 	return !p->stale;
 }
 
-static PmcWait*
+static PmcWait *
 newpmcw(void)
 {
 	PmcWait *w;
 
-	w = malloc(sizeof (PmcWait));
+	w = malloc(sizeof(PmcWait));
 	w->r.ref = 1;
 	return w;
 }
@@ -338,7 +337,7 @@ pmcgetctr(uint32_t coreno, uint32_t regno)
 
 	if(coreno == machp()->machno){
 		v = getctr(regno);
-		if (pmcdebug) {
+		if(pmcdebug){
 			print("int getctr[%#x, %#x] = %#llx\n", regno, coreno, v);
 		}
 		return v;
@@ -354,7 +353,7 @@ pmcgetctr(uint32_t coreno, uint32_t regno)
 	}
 	v = p->ctr;
 	iunlock(&mp->pmclock);
-	if (pmcdebug) {
+	if(pmcdebug){
 		print("ext getctr[%#x, %#x] = %#llx\n", regno, coreno, v);
 	}
 	return v;
@@ -367,7 +366,7 @@ pmcsetctr(uint32_t coreno, uint64_t v, uint32_t regno)
 	Mach *mp;
 
 	if(coreno == machp()->machno){
-		if (pmcdebug) {
+		if(pmcdebug){
 			print("int getctr[%#x, %#x] = %#llx\n", regno, coreno, v);
 		}
 		return setctr(v, regno);
@@ -375,7 +374,7 @@ pmcsetctr(uint32_t coreno, uint64_t v, uint32_t regno)
 
 	mp = sys->machptr[coreno];
 	p = &mp->pmc[regno];
-	if (pmcdebug) {
+	if(pmcdebug){
 		print("ext setctr[%#x, %#x] = %#llx\n", regno, coreno, v);
 	}
 	ilock(&mp->pmclock);
@@ -397,7 +396,7 @@ ctl2ctl(PmcCtl *dctl, PmcCtl *sctl)
 		dctl->user = sctl->user;
 	if(sctl->os != PmcCtlNullval)
 		dctl->os = sctl->os;
-	if(sctl->nodesc == 0) {
+	if(sctl->nodesc == 0){
 		memmove(dctl->descstr, sctl->descstr, KNAMELEN);
 		dctl->nodesc = 0;
 	}
@@ -456,7 +455,7 @@ pmcupdate(Mach *m)
 
 	return;
 	maxct = pmcnregs();
-	for (i = 0; i < maxct; i++) {
+	for(i = 0; i < maxct; i++){
 		p = &m->pmc[i];
 		ilock(&m->pmclock);
 		if(p->ctrset & PmcSet)

sys/src/9/amd64/qmalloc.c

@@ -20,7 +20,7 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-#include	<pool.h>
+#include <pool.h>
 
 typedef double Align;
 typedef union Header Header;
@@ -28,38 +28,37 @@ typedef struct Qlist Qlist;
 
 union Header {
 	struct {
-		Header*	next;
-		uint	size;
+		Header *next;
+		uint size;
 	} s;
-	Align	al;
+	Align al;
 };
 
 struct Qlist {
-	Lock	lk;
-	Header*	first;
+	Lock lk;
+	Header *first;
 
-	uint	nalloc;
+	uint nalloc;
 };
 
 enum {
-	Unitsz		= sizeof(Header),	/* 16 bytes on amd64 */
+	Unitsz = sizeof(Header), /* 16 bytes on amd64 */
 };
 
-#define	NUNITS(n)	(HOWMANY(n, Unitsz) + 1)
-#define	NQUICK		((512/Unitsz)+1)	/* 33 on amd64 */
+#define NUNITS(n) (HOWMANY(n, Unitsz) + 1)
+#define NQUICK ((512 / Unitsz) + 1) /* 33 on amd64 */
 
-static	Qlist	quicklist[NQUICK+1];
-static	Header	misclist;
-static	Header	*rover;
-static	unsigned tailsize;
-static	unsigned tailnunits;
-static	Header	*tailbase;
-static	Header	*tailptr;
-static	Header	checkval;
-static	int	morecore(unsigned);
+static Qlist quicklist[NQUICK + 1];
+static Header misclist;
+static Header *rover;
+static unsigned tailsize;
+static unsigned tailnunits;
+static Header *tailbase;
+static Header *tailptr;
+static Header checkval;
+static int morecore(unsigned);
 
-enum
-{
+enum {
 	QSmalign = 0,
 	QSmalignquick,
 	QSmalignrover,
@@ -78,48 +77,48 @@ enum
 	QSmax
 };
 
-static	void	qfreeinternal(void*);
-static	int	qstats[QSmax];
-static	char*	qstatstr[QSmax] = {
-[QSmalign] = "malign",
-[QSmalignquick] = "malignquick",
-[QSmalignrover] = "malignrover",
-[QSmalignfront] = "malignfront",
-[QSmalignback] = "malignback",
-[QSmaligntail] = "maligntail",
-[QSmalignnottail] = "malignnottail",
-[QSmalloc] = "malloc",
-[QSmallocrover] = "mallocrover",
-[QSmalloctail] = "malloctail",
-[QSfree] = "free",
-[QSfreetail] = "freetail",
-[QSfreequick] = "freequick",
-[QSfreenext] = "freenext",
-[QSfreeprev] = "freeprev",
+static void qfreeinternal(void *);
+static int qstats[QSmax];
+static char *qstatstr[QSmax] = {
+	[QSmalign] = "malign",
+	[QSmalignquick] = "malignquick",
+	[QSmalignrover] = "malignrover",
+	[QSmalignfront] = "malignfront",
+	[QSmalignback] = "malignback",
+	[QSmaligntail] = "maligntail",
+	[QSmalignnottail] = "malignnottail",
+	[QSmalloc] = "malloc",
+	[QSmallocrover] = "mallocrover",
+	[QSmalloctail] = "malloctail",
+	[QSfree] = "free",
+	[QSfreetail] = "freetail",
+	[QSfreequick] = "freequick",
+	[QSfreenext] = "freenext",
+	[QSfreeprev] = "freeprev",
 };
 
-static	Lock		mainlock;
+static Lock mainlock;
 
-#define	MLOCK		ilock(&mainlock)
-#define	MUNLOCK		iunlock(&mainlock)
-#define QLOCK(l)	ilock(l)
-#define QUNLOCK(l)	iunlock(l)
+#define MLOCK ilock(&mainlock)
+#define MUNLOCK iunlock(&mainlock)
+#define QLOCK(l) ilock(l)
+#define QUNLOCK(l) iunlock(l)
 
-#define	tailalloc(p, n)	((p)=tailptr, tailsize -= (n), tailptr+=(n),\
-			 (p)->s.size=(n), (p)->s.next = &checkval)
+#define tailalloc(p, n) ((p) = tailptr, tailsize -= (n), tailptr += (n), \
+			 (p)->s.size = (n), (p)->s.next = &checkval)
 
-#define ISPOWEROF2(x)	(/*((x) != 0) && */!((x) & ((x)-1)))
-#define ALIGNHDR(h, a)	(Header*)((((uintptr)(h))+((a)-1)) & ~((a)-1))
+#define ISPOWEROF2(x) (/*((x) != 0) && */ !((x) & ((x)-1)))
+#define ALIGNHDR(h, a) (Header *)((((uintptr)(h)) + ((a)-1)) & ~((a)-1))
 
 /*
  * From libc malloc.c to *draw devices
  */
 
-typedef struct Private	Private;
+typedef struct Private Private;
 struct Private {
-	Lock		lk;
-	char*		end;
-	char		msg[256];	/* a rock for messages to be printed at unlock */
+	Lock lk;
+	char *end;
+	char msg[256]; /* a rock for messages to be printed at unlock */
 };
 
 /*
@@ -131,9 +130,9 @@ struct Private {
  * using quicklist[machp()->machno] runs out of memory soon.
  * using quicklist[machp()->machno%4] yields times worse than using quicklist!
  */
-#define QLIST	quicklist
+#define QLIST quicklist
 
-static void*
+static void *
 qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 {
 	Qlist *qlist;
@@ -158,12 +157,12 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 		QLOCK(&qlist->lk);
 		pp = &qlist->first;
 		for(p = *pp; p != nil; p = p->s.next){
-			if(ALIGNED(p+1, align)){
+			if(ALIGNED(p + 1, align)){
 				*pp = p->s.next;
 				p->s.next = &checkval;
 				QUNLOCK(&qlist->lk);
 				qstats[QSmalignquick]++;
-				return p+1;
+				return p + 1;
 			}
 			pp = &p->s.next;
 		}
@@ -171,16 +170,16 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 	}
 
 	MLOCK;
-	if(nunits > tailsize) {
+	if(nunits > tailsize){
 		/* hard way */
 		if((q = rover) != nil){
 			do {
 				p = q->s.next;
 				if(p->s.size < nunits)
 					continue;
-				aligned = ALIGNED(p+1, align);
-				naligned = NUNITS(align)-1;
-				if(!aligned && p->s.size < nunits+naligned)
+				aligned = ALIGNED(p + 1, align);
+				naligned = NUNITS(align) - 1;
+				if(!aligned && p->s.size < nunits + naligned)
 					continue;
 
 				/*
@@ -196,13 +195,13 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 				 */
 				if(!aligned){
 					r = p;
-					p = ALIGNHDR(p+1, align) - 1;
+					p = ALIGNHDR(p + 1, align) - 1;
 					n = p - r;
 					p->s.size = r->s.size - n;
 
 					r->s.size = n;
 					r->s.next = &checkval;
-					qfreeinternal(r+1);
+					qfreeinternal(r + 1);
 					qstats[QSmalignfront]++;
 				}
 
@@ -210,18 +209,18 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 				 * Free any residue after the aligned block.
 				 */
 				if(p->s.size > nunits){
-					r = p+nunits;
+					r = p + nunits;
 					r->s.size = p->s.size - nunits;
 					r->s.next = &checkval;
 					qstats[QSmalignback]++;
-					qfreeinternal(r+1);
+					qfreeinternal(r + 1);
 
 					p->s.size = nunits;
 				}
 
 				p->s.next = &checkval;
 				MUNLOCK;
-				return p+1;
+				return p + 1;
 			} while((q = p) != rover);
 		}
 		if((n = morecore(nunits)) == 0){
@@ -231,14 +230,13 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 		tailsize += n;
 	}
 
-	q = ALIGNHDR(tailptr+1, align);
-	if(q == tailptr+1){
+	q = ALIGNHDR(tailptr + 1, align);
+	if(q == tailptr + 1){
 		tailalloc(p, nunits);
 		qstats[QSmaligntail]++;
-	}
-	else{
-		naligned = NUNITS(align)-1;
-		if(tailsize < nunits+naligned){
+	} else {
+		naligned = NUNITS(align) - 1;
+		if(tailsize < nunits + naligned){
 			/*
 			 * There are at least nunits,
 			 * get enough for alignment.
@@ -254,28 +252,28 @@ qmallocalign(usize nbytes, uintptr_t align, int32_t offset, usize span)
 		 * and free it after the tail pointer has been bumped
 		 * for the main allocation.
 		 */
-		n = q-tailptr - 1;
+		n = q - tailptr - 1;
 		tailalloc(r, n);
 		tailalloc(p, nunits);
 		qstats[QSmalignnottail]++;
-		qfreeinternal(r+1);
+		qfreeinternal(r + 1);
 	}
 	MUNLOCK;
 
-	return p+1;
+	return p + 1;
 }
 
-static void*
+static void *
 qmalloc(usize nbytes)
 {
 	Qlist *qlist;
 	Header *p, *q;
 	uint nunits, n;
 
-///* FIXME: (ignore for now)
+	///* FIXME: (ignore for now)
 	if(nbytes == 0)
 		return nil;
-//*/
+	//*/
 
 	qstats[QSmalloc]++;
 	nunits = NUNITS(nbytes);
@@ -287,19 +285,19 @@ qmalloc(usize nbytes)
 			qlist->nalloc++;
 			QUNLOCK(&qlist->lk);
 			p->s.next = &checkval;
-			return p+1;
+			return p + 1;
 		}
 		QUNLOCK(&qlist->lk);
 	}
 
 	MLOCK;
-	if(nunits > tailsize) {
+	if(nunits > tailsize){
 		/* hard way */
 		if((q = rover) != nil){
 			do {
 				p = q->s.next;
-				if(p->s.size >= nunits) {
-					if(p->s.size > nunits) {
+				if(p->s.size >= nunits){
+					if(p->s.size > nunits){
 						p->s.size -= nunits;
 						p += p->s.size;
 						p->s.size = nunits;
@@ -309,7 +307,7 @@ qmalloc(usize nbytes)
 					rover = q;
 					qstats[QSmallocrover]++;
 					MUNLOCK;
-					return p+1;
+					return p + 1;
 				}
 			} while((q = p) != rover);
 		}
@@ -323,11 +321,11 @@ qmalloc(usize nbytes)
 	tailalloc(p, nunits);
 	MUNLOCK;
 
-	return p+1;
+	return p + 1;
 }
 
 static void
-qfreeinternal(void* ap)
+qfreeinternal(void *ap)
 {
 	Qlist *qlist;
 	Header *p, *q;
@@ -337,17 +335,17 @@ qfreeinternal(void* ap)
 		return;
 	qstats[QSfree]++;
 
-	p = (Header*)ap - 1;
+	p = (Header *)ap - 1;
 	if((nunits = p->s.size) == 0 || p->s.next != &checkval)
 		panic("malloc: corrupt allocation arena\n");
-	if(tailptr != nil && p+nunits == tailptr) {
+	if(tailptr != nil && p + nunits == tailptr){
 		/* block before tail */
 		tailptr = p;
 		tailsize += nunits;
 		qstats[QSfreetail]++;
 		return;
 	}
-	if(nunits <= NQUICK) {
+	if(nunits <= NQUICK){
 		qlist = &QLIST[nunits];
 		QLOCK(&qlist->lk);
 		p->s.next = qlist->first;
@@ -356,7 +354,7 @@ qfreeinternal(void* ap)
 		qstats[QSfreequick]++;
 		return;
 	}
-	if((q = rover) == nil) {
+	if((q = rover) == nil){
 		q = &misclist;
 		q->s.size = 0;
 		q->s.next = q;
@@ -364,13 +362,13 @@ qfreeinternal(void* ap)
 	for(; !(p > q && p < q->s.next); q = q->s.next)
 		if(q >= q->s.next && (p > q || p < q->s.next))
 			break;
-	if(p+p->s.size == q->s.next) {
+	if(p + p->s.size == q->s.next){
 		p->s.size += q->s.next->s.size;
 		p->s.next = q->s.next->s.next;
 		qstats[QSfreenext]++;
 	} else
 		p->s.next = q->s.next;
-	if(q+q->s.size == p) {
+	if(q + q->s.size == p){
 		q->s.size += p->s.size;
 		q->s.next = p->s.next;
 		qstats[QSfreeprev]++;
@@ -380,7 +378,7 @@ qfreeinternal(void* ap)
 }
 
 uint32_t
-msize(void* ap)
+msize(void *ap)
 {
 	Header *p;
 	uint nunits;
@@ -388,15 +386,15 @@ msize(void* ap)
 	if(ap == nil)
 		return 0;
 
-	p = (Header*)ap - 1;
+	p = (Header *)ap - 1;
 	if((nunits = p->s.size) == 0 || p->s.next != &checkval)
 		panic("malloc: corrupt allocation arena\n");
 
-	return (nunits-1) * sizeof(Header);
+	return (nunits - 1) * sizeof(Header);
 }
 
 static void
-mallocreadfmt(char* s, char* e)
+mallocreadfmt(char *s, char *e)
 {
 	char *p;
 	Header *q;
@@ -404,29 +402,29 @@ mallocreadfmt(char* s, char* e)
 	Qlist *qlist;
 
 	p = seprint(s, e,
-		"%llu memory\n"
-		"%d pagesize\n"
-		"%llu kernel\n",
-		(uint64_t)conf.npage*PGSZ,
-		PGSZ,
-		(uint64_t)conf.npage-conf.upages);
+		    "%llu memory\n"
+		    "%d pagesize\n"
+		    "%llu kernel\n",
+		    (uint64_t)conf.npage * PGSZ,
+		    PGSZ,
+		    (uint64_t)conf.npage - conf.upages);
 
 	t = 0;
-	for(i = 0; i <= NQUICK; i++) {
+	for(i = 0; i <= NQUICK; i++){
 		n = 0;
 		qlist = &QLIST[i];
 		QLOCK(&qlist->lk);
 		for(q = qlist->first; q != nil; q = q->s.next){
-//			if(q->s.size != i)
-//				p = seprint(p, e, "q%d\t%#p\t%u\n",
-//					i, q, q->s.size);
+			//			if(q->s.size != i)
+			//				p = seprint(p, e, "q%d\t%#p\t%u\n",
+			//					i, q, q->s.size);
 			n++;
 		}
 		QUNLOCK(&qlist->lk);
 
-//		if(n != 0)
-//			p = seprint(p, e, "q%d %d\n", i, n);
-		t += n * i*sizeof(Header);
+		//		if(n != 0)
+		//			p = seprint(p, e, "q%d %d\n", i, n);
+		t += n * i * sizeof(Header);
 	}
 	p = seprint(p, e, "quick: %u bytes total\n", t);
 
@@ -436,14 +434,14 @@ mallocreadfmt(char* s, char* e)
 		do {
 			t += q->s.size;
 			i++;
-//			p = seprint(p, e, "m%d\t%#p\n", q->s.size, q);
+			//			p = seprint(p, e, "m%d\t%#p\n", q->s.size, q);
 		} while((q = q->s.next) != rover);
 
 		p = seprint(p, e, "rover: %d blocks %u bytes total\n",
-			i, t*sizeof(Header));
+			    i, t * sizeof(Header));
 	}
 	p = seprint(p, e, "total allocated %lu, %u remaining\n",
-		(tailptr-tailbase)*sizeof(Header), tailnunits*sizeof(Header));
+		    (tailptr - tailbase) * sizeof(Header), tailnunits * sizeof(Header));
 
 	for(i = 0; i < nelem(qstats); i++){
 		if(qstats[i] == 0)
@@ -454,12 +452,12 @@ mallocreadfmt(char* s, char* e)
 }
 
 int32_t
-mallocreadsummary(Chan* c, void *a, int32_t n, int32_t offset)
+mallocreadsummary(Chan *c, void *a, int32_t n, int32_t offset)
 {
 	char *alloc;
 
-	alloc = malloc(16*READSTR);
-	mallocreadfmt(alloc, alloc+16*READSTR);
+	alloc = malloc(16 * READSTR);
+	mallocreadfmt(alloc, alloc + 16 * READSTR);
 	n = readstr(offset, a, n, alloc);
 	free(alloc);
 
@@ -474,7 +472,7 @@ mallocsummary(void)
 	Qlist *qlist;
 
 	t = 0;
-	for(i = 0; i <= NQUICK; i++) {
+	for(i = 0; i <= NQUICK; i++){
 		n = 0;
 		qlist = &QLIST[i];
 		QLOCK(&qlist->lk);
@@ -485,7 +483,7 @@ mallocsummary(void)
 		}
 		QUNLOCK(&qlist->lk);
 
-		t += n * i*sizeof(Header);
+		t += n * i * sizeof(Header);
 	}
 	print("quick: %u bytes total\n", t);
 
@@ -501,10 +499,10 @@ mallocsummary(void)
 
 	if(i != 0){
 		print("rover: %d blocks %u bytes total\n",
-			i, t*sizeof(Header));
+		      i, t * sizeof(Header));
 	}
 	print("total allocated %lu, %u remaining\n",
-		(tailptr-tailbase)*sizeof(Header), tailnunits*sizeof(Header));
+	      (tailptr - tailbase) * sizeof(Header), tailnunits * sizeof(Header));
 
 	for(i = 0; i < nelem(qstats); i++){
 		if(qstats[i] == 0)
@@ -514,17 +512,17 @@ mallocsummary(void)
 }
 
 void
-free(void* ap)
+free(void *ap)
 {
 	MLOCK;
 	qfreeinternal(ap);
 	MUNLOCK;
 }
 
-void*
+void *
 malloc(uint32_t size)
 {
-	void* v;
+	void *v;
 
 	if((v = qmalloc(size)) != nil)
 		memset(v, 0, size);
@@ -532,7 +530,7 @@ malloc(uint32_t size)
 	return v;
 }
 
-void*
+void *
 mallocz(uint32_t size, int clr)
 {
 	void *v;
@@ -543,7 +541,7 @@ mallocz(uint32_t size, int clr)
 	return v;
 }
 
-void*
+void *
 mallocalign(uint32_t nbytes, uint32_t align, int32_t offset, uint32_t span)
 {
 	void *v;
@@ -557,7 +555,7 @@ mallocalign(uint32_t nbytes, uint32_t align, int32_t offset, uint32_t span)
 	return v;
 }
 
-void*
+void *
 smalloc(uint32_t size)
 {
 	Proc *up = externup();
@@ -568,8 +566,8 @@ smalloc(uint32_t size)
 	return v;
 }
 
-void*
-realloc(void* ap, uint32_t size)
+void *
+realloc(void *ap, uint32_t size)
 {
 	void *v;
 	Header *p;
@@ -594,7 +592,7 @@ realloc(void* ap, uint32_t size)
 	if(ap == nil)
 		return qmalloc(size);
 
-	p = (Header*)ap - 1;
+	p = (Header *)ap - 1;
 	if((ounits = p->s.size) == 0 || p->s.next != &checkval)
 		panic("realloc: corrupt allocation arena\n");
 
@@ -607,16 +605,16 @@ realloc(void* ap, uint32_t size)
 	 * adjust the tailptr.
 	 */
 	MLOCK;
-	if(tailptr != nil && p+ounits == tailptr){
+	if(tailptr != nil && p + ounits == tailptr){
 		if(ounits > nunits){
 			p->s.size = nunits;
-			tailsize += ounits-nunits;
+			tailsize += ounits - nunits;
 			MUNLOCK;
 			return ap;
 		}
-		if(tailsize >= nunits-ounits){
+		if(tailsize >= nunits - ounits){
 			p->s.size = nunits;
-			tailsize -= nunits-ounits;
+			tailsize -= nunits - ounits;
 			MUNLOCK;
 			return ap;
 		}
@@ -636,7 +634,7 @@ realloc(void* ap, uint32_t size)
 	 * What does the standard say for failure here?
 	 */
 	if((v = qmalloc(size)) != nil){
-		osize = (ounits-1)*sizeof(Header);
+		osize = (ounits - 1) * sizeof(Header);
 		if(size < osize)
 			osize = size;
 		memmove(v, ap, osize);
@@ -649,14 +647,14 @@ realloc(void* ap, uint32_t size)
 }
 
 void
-setmalloctag(void* v, uint32_t i)
+setmalloctag(void *v, uint32_t i)
 {
 }
 
 void
 mallocinit(void)
 {
-	static alignas(2*MiB) unsigned char kheap[256 *MiB];
+	static alignas(2 * MiB) unsigned char kheap[256 * MiB];
 
 	if(tailptr != nil)
 		return;
@@ -675,8 +673,8 @@ morecore(uint nunits)
 	 * Pump it up when you don't really need it.
 	 * Pump it up until you can feel it.
 	 */
-	if(nunits < NUNITS(128*KiB))
-		nunits = NUNITS(128*KiB);
+	if(nunits < NUNITS(128 * KiB))
+		nunits = NUNITS(128 * KiB);
 	if(nunits > tailnunits)
 		nunits = tailnunits;
 	tailnunits -= nunits;

sys/src/9/amd64/ratrace.c

@@ -13,8 +13,8 @@
 #include <thread.h>
 
 enum {
-	Stacksize	= 8*1024,
-	Bufsize		= 8*1024,
+	Stacksize = 8 * 1024,
+	Bufsize = 8 * 1024,
 };
 
 Channel *out;
@@ -24,8 +24,8 @@ int nread = 0;
 
 typedef struct Str Str;
 struct Str {
-	char	*buf;
-	int	len;
+	char *buf;
+	int len;
 };
 
 static void
@@ -38,7 +38,7 @@ die(char *s)
 static void
 cwrite(int fd, char *path, char *cmd, int len)
 {
-	if (write(fd, cmd, len) < len) {
+	if(write(fd, cmd, len) < len){
 		fprint(2, "cwrite: %s: failed %d bytes: %r\n", path, len);
 		sendp(quit, nil);
 		threadexits(nil);
@@ -54,10 +54,10 @@ reader(void *v)
 
 	pid = (int)(uintptr_t)v;
 	ctl = smprint("/proc/%d/ctl", pid);
-	if ((cfd = open(ctl, OWRITE)) < 0)
+	if((cfd = open(ctl, OWRITE)) < 0)
 		die(smprint("%s: %r", ctl));
 	truss = smprint("/proc/%d/syscall", pid);
-	if ((tfd = open(truss, OREAD)) < 0)
+	if((tfd = open(truss, OREAD)) < 0)
 		die(smprint("%s: %r", truss));
 
 	cwrite(cfd, ctl, "stop", 4);
@@ -66,27 +66,27 @@ reader(void *v)
 	s = mallocz(sizeof(Str) + Bufsize, 1);
 	s->buf = (char *)&s[1];
 	while((s->len = pread(tfd, s->buf, Bufsize - 1, 0)) > 0){
-		if (forking && s->buf[1] == '=' && s->buf[3] != '-') {
+		if(forking && s->buf[1] == '=' && s->buf[3] != '-'){
 			forking = 0;
 			newpid = strtol(&s->buf[3], 0, 0);
-			sendp(forkc, (void*)newpid);
-			procrfork(reader, (void*)newpid, Stacksize, 0);
+			sendp(forkc, (void *)newpid);
+			procrfork(reader, (void *)newpid, Stacksize, 0);
 		}
 
 		/*
 		 * There are three tests here and they (I hope) guarantee
 		 * no false positives.
 		 */
-		if (strstr(s->buf, " Rfork") != nil) {
+		if(strstr(s->buf, " Rfork") != nil){
 			char *a[8];
 			char *rf;
 
 			rf = strdup(s->buf);
-         		if (tokenize(rf, a, 8) == 5) {
+			if(tokenize(rf, a, 8) == 5){
 				uint32_t flags;
 
 				flags = strtoul(a[4], 0, 16);
-				if (flags & RFPROC)
+				if(flags & RFPROC)
 					forking = 1;
 			}
 			free(rf);
@@ -158,12 +158,12 @@ threadmain(int argc, char **argv)
 	 * for the command you are starting.  Just check for -c as argv[1]
 	 * and then take it from there.
 	 */
-	if (argc < 2)
+	if(argc < 2)
 		usage();
-	if (argv[1][0] == '-')
-		switch(argv[1][1]) {
+	if(argv[1][0] == '-')
+		switch(argv[1][1]){
 		case 'c':
-			if (argc < 3)
+			if(argc < 3)
 				usage();
 			cmd = strdup(argv[2]);
 			args = &argv[2];
@@ -173,11 +173,11 @@ threadmain(int argc, char **argv)
 		}
 
 	/* run a command? */
-	if(cmd) {
+	if(cmd){
 		pid = fork();
-		if (pid < 0)
+		if(pid < 0)
 			sysfatal("fork failed: %r");
-		if(pid == 0) {
+		if(pid == 0){
 			exec(cmd, args);
 			if(cmd[0] != '/')
 				exec(smprint("/bin/%s", cmd), args);
@@ -189,10 +189,10 @@ threadmain(int argc, char **argv)
 		pid = atoi(argv[1]);
 	}
 
-	out   = chancreate(sizeof(char*), 0);
-	quit  = chancreate(sizeof(char*), 0);
+	out = chancreate(sizeof(char *), 0);
+	quit = chancreate(sizeof(char *), 0);
 	forkc = chancreate(sizeof(uint32_t *), 0);
 	nread++;
 	procrfork(writer, nil, Stacksize, 0);
-	reader((void*)pid);
+	reader((void *)pid);
 }

sys/src/9/amd64/root/cpu.c

@@ -21,62 +21,73 @@
 #include <fcall.h>
 #include <libsec.h>
 
-#define	Maxfdata 8192
+#define Maxfdata 8192
 #define MaxStr 128
 
-void	remoteside(int);
-void	fatal(int, char*, ...);
-void	lclnoteproc(int);
-void	rmtnoteproc(void);
-void	catcher(void*, char*);
-void	usage(void);
-void	writestr(int, char*, char*, int);
-int	readstr(int, char*, int);
-char	*rexcall(int*, char*, char*);
-int	setamalg(char*);
+void remoteside(int);
+void fatal(int, char *, ...);
+void lclnoteproc(int);
+void rmtnoteproc(void);
+void catcher(void *, char *);
+void usage(void);
+void writestr(int, char *, char *, int);
+int readstr(int, char *, int);
+char *rexcall(int *, char *, char *);
+int setamalg(char *);
 char *keyspec = "";
 
-int 	notechan;
-int	exportpid;
-char	*system;
-int	cflag;
-int	dbg;
-char	*user;
-char	*patternfile;
-int	Nflag;
+int notechan;
+int exportpid;
+char *system;
+int cflag;
+int dbg;
+char *user;
+char *patternfile;
+int Nflag;
 
-char	*srvname = "ncpu";
-char	*exportfs = "/bin/exportfs";
-char	*ealgs = "rc4_256 sha1";
+char *srvname = "ncpu";
+char *exportfs = "/bin/exportfs";
+char *ealgs = "rc4_256 sha1";
 
 /* message size for exportfs; may be larger so we can do big graphics in CPU window */
-int	msgsize = Maxfdata+IOHDRSZ;
+int msgsize = Maxfdata + IOHDRSZ;
 
 /* authentication mechanisms */
-static int	netkeyauth(int);
-static int	netkeysrvauth(int, char*);
-static int	p9auth(int);
-static int	srvp9auth(int, char*);
-static int	noauth(int);
-static int	srvnoauth(int, char*);
+static int netkeyauth(int);
+static int netkeysrvauth(int, char *);
+static int p9auth(int);
+static int srvp9auth(int, char *);
+static int noauth(int);
+static int srvnoauth(int, char *);
 
 typedef struct AuthMethod AuthMethod;
 struct AuthMethod {
-	char	*name;			/* name of method */
-	int	(*cf)(int);		/* client side authentication */
-	int	(*sf)(int, char*);	/* server side authentication */
+	char *name;		/* name of method */
+	int (*cf)(int);		/* client side authentication */
+	int (*sf)(int, char *); /* server side authentication */
 } authmethod[] =
-{
-	{ "p9",		p9auth,		srvp9auth,},
-	{ "netkey",	netkeyauth,	netkeysrvauth,},
-	{ "none",	noauth,		srvnoauth,},
-	{ nil,	nil}
-};
-AuthMethod *am = authmethod;	/* default is p9 */
+	{
+		{
+			"p9",
+			p9auth,
+			srvp9auth,
+		},
+		{
+			"netkey",
+			netkeyauth,
+			netkeysrvauth,
+		},
+		{
+			"none",
+			noauth,
+			srvnoauth,
+		},
+		{nil, nil}};
+AuthMethod *am = authmethod; /* default is p9 */
 
 char *p9authproto = "p9any";
 
-int setam(char*);
+int setam(char *);
 
 void
 usage(void)
@@ -96,15 +107,16 @@ main(int argc, char **argv)
 	fd = open("/dev/draw", OREAD);
 	if(fd > 0){
 		ms = iounit(fd);
-		if(msgsize < ms+IOHDRSZ)
-			msgsize = ms+IOHDRSZ;
+		if(msgsize < ms + IOHDRSZ)
+			msgsize = ms + IOHDRSZ;
 		close(fd);
 	}
 
 	user = getuser();
 	if(user == nil)
 		fatal(1, "can't read user name");
-	ARGBEGIN{
+	ARGBEGIN
+	{
 	case 'a':
 		p = EARGF(usage());
 		if(setam(p) < 0)
@@ -123,9 +135,9 @@ main(int argc, char **argv)
 		break;
 	case 'O':
 		p9authproto = "p9sk2";
-		remoteside(1);				/* From listen */
+		remoteside(1); /* From listen */
 		break;
-	case 'R':				/* From listen */
+	case 'R': /* From listen */
 		remoteside(0);
 		break;
 	case 'h':
@@ -135,7 +147,7 @@ main(int argc, char **argv)
 		cflag++;
 		cmd[0] = '!';
 		cmd[1] = '\0';
-		while(p = ARGF()) {
+		while(p = ARGF()){
 			strcat(cmd, " ");
 			strcat(cmd, p);
 		}
@@ -155,13 +167,13 @@ main(int argc, char **argv)
 		break;
 	default:
 		usage();
-	}ARGEND;
-
+	}
+	ARGEND;
 
 	if(argc != 0)
 		usage();
 
-	if(system == nil) {
+	if(system == nil){
 		p = getenv("cpu");
 		if(p == 0)
 			fatal(0, "set $cpu");
@@ -188,7 +200,7 @@ main(int argc, char **argv)
 	 */
 	if(readstr(data, buf, sizeof(buf)) < 0)
 		fatal(1, "waiting for FS: %r");
-	if(strncmp("FS", buf, 2) != 0) {
+	if(strncmp("FS", buf, 2) != 0){
 		print("remote cpu: %s", buf);
 		exits(buf);
 	}
@@ -246,7 +258,7 @@ old9p(int fd)
 	if(pipe(p) < 0)
 		fatal(1, "pipe");
 
-	switch(rfork(RFPROC|RFFDG|RFNAMEG)) {
+	switch(rfork(RFPROC | RFFDG | RFNAMEG)){
 	case -1:
 		fatal(1, "rfork srvold9p");
 	case 0:
@@ -310,7 +322,7 @@ remoteside(int old)
 	gotcmd = 0;
 	if(readstr(fd, xdir, sizeof(xdir)) < 0)
 		fatal(1, "dir/cmd");
-	if(xdir[0] == '!') {
+	if(xdir[0] == '!'){
 		strcpy(cmd, &xdir[1]);
 		gotcmd = 1;
 		if(readstr(fd, xdir, sizeof(xdir)) < 0)
@@ -322,7 +334,7 @@ remoteside(int old)
 	badchdir = 0;
 	if(strcmp(xdir, "NO") == 0)
 		chdir(home);
-	else if(chdir(xdir) < 0) {
+	else if(chdir(xdir) < 0){
 		badchdir = 1;
 		chdir(home);
 	}
@@ -340,9 +352,9 @@ remoteside(int old)
 
 	/* make sure buffers are big by doing fversion explicitly; pick a huge number; other side will trim */
 	strcpy(buf, VERSION9P);
-	if(fversion(fd, 64*1024, buf, sizeof buf) < 0)
+	if(fversion(fd, 64 * 1024, buf, sizeof buf) < 0)
 		exits("fversion failed");
-	if(mount(fd, -1, "/mnt/term", MCREATE|MREPL, "", 'M') < 0)
+	if(mount(fd, -1, "/mnt/term", MCREATE | MREPL, "", 'M') < 0)
 		exits("mount failed");
 
 	close(fd);
@@ -369,7 +381,7 @@ remoteside(int old)
 	fatal(1, "exec shell");
 }
 
-char*
+char *
 rexcall(int *fd, char *host, char *service)
 {
 	char *na;
@@ -409,7 +421,7 @@ writestr(int fd, char *str, char *thing, int ignore)
 	int l, n;
 
 	l = strlen(str);
-	n = write(fd, str, l+1);
+	n = write(fd, str, l + 1);
 	if(!ignore && n < 0)
 		fatal(1, "writing network: %s", thing);
 }
@@ -419,7 +431,7 @@ readstr(int fd, char *str, int len)
 {
 	int n;
 
-	while(len) {
+	while(len){
 		n = read(fd, str, 1);
 		if(n < 0)
 			return -1;
@@ -437,9 +449,9 @@ readln(char *buf, int n)
 	int i;
 	char *p;
 
-	n--;	/* room for \0 */
+	n--; /* room for \0 */
 	p = buf;
-	for(i=0; i<n; i++){
+	for(i = 0; i < n; i++){
 		if(read(0, p, 1) != 1)
 			break;
 		if(*p == '\n' || *p == '\r')
@@ -447,7 +459,7 @@ readln(char *buf, int n)
 		p++;
 	}
 	*p = '\0';
-	return p-buf;
+	return p - buf;
 }
 
 /*
@@ -459,7 +471,7 @@ netkeyauth(int fd)
 	char chall[32];
 	char resp[32];
 
-	strecpy(chall, chall+sizeof chall, getuser());
+	strecpy(chall, chall + sizeof chall, getuser());
 	print("user[%s]: ", chall);
 	if(readln(resp, sizeof(resp)) < 0)
 		return -1;
@@ -518,7 +530,7 @@ static void
 mksecret(char *t, uint8_t *f)
 {
 	sprint(t, "%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x",
-		f[0], f[1], f[2], f[3], f[4], f[5], f[6], f[7], f[8], f[9]);
+	       f[0], f[1], f[2], f[3], f[4], f[5], f[6], f[7], f[8], f[9]);
 }
 
 /*
@@ -537,7 +549,7 @@ p9auth(int fd)
 	ai = auth_proxy(fd, auth_getkey, "proto=%q role=client %s", p9authproto, keyspec);
 	if(ai == nil)
 		return -1;
-	memmove(key+4, ai->secret, ai->nsecret);
+	memmove(key + 4, ai->secret, ai->nsecret);
 	if(ealgs == nil)
 		return fd;
 
@@ -547,13 +559,13 @@ p9auth(int fd)
 		key[i] = rand();
 	if(write(fd, key, 4) != 4)
 		return -1;
-	if(readn(fd, key+12, 4) != 4)
+	if(readn(fd, key + 12, 4) != 4)
 		return -1;
 
 	/* scramble into two secrets */
 	sha1(key, sizeof(key), digest, nil);
 	mksecret(fromclientsecret, digest);
-	mksecret(fromserversecret, digest+10);
+	mksecret(fromserversecret, digest + 10);
 
 	/* set up encryption */
 	i = pushssl(fd, ealgs, fromclientsecret, fromserversecret, nil);
@@ -562,7 +574,7 @@ p9auth(int fd)
 	return i;
 }
 
-static char*
+static char *
 gethostowner(void)
 {
 	static char hostowner[64];
@@ -571,7 +583,7 @@ gethostowner(void)
 
 	if((fd = open("/dev/hostowner", OREAD)) < 0)
 		return "none";
-	n = read(fd, hostowner, sizeof(hostowner)-1);
+	n = read(fd, hostowner, sizeof(hostowner) - 1);
 	close(fd);
 	if(n <= 0)
 		strcpy(hostowner, "none");
@@ -581,7 +593,7 @@ gethostowner(void)
 }
 
 static int
-chuid(char* to)
+chuid(char *to)
 {
 	int fd, r;
 	char *cap, *p;
@@ -594,7 +606,7 @@ chuid(char* to)
 
 	cap = smprint("%s@Why can't we all just get along?", to);
 	p = strrchr(cap, '@');
-	hmac_sha1((uint8_t*)cap, p-cap, (uint8_t*)p+1, strlen(p+1), hash,
+	hmac_sha1((uint8_t *)cap, p - cap, (uint8_t *)p + 1, strlen(p + 1), hash,
 		  nil);
 	if(write(fd, hash, SHA1dlen) < 0){
 		free(cap);
@@ -651,8 +663,7 @@ srvnoauth(int fd, char *user)
 		if(write(ufd, "none", 4) < 0)
 			return -1;
 		close(ufd);
-	}
-	else
+	} else
 		chuid(user);
 	newns(user, nil);
 	return fd;
@@ -665,7 +676,7 @@ loghex(uint8_t *p, int n)
 	int i;
 
 	for(i = 0; i < n; i++)
-		sprint(buf+2*i, "%2.2x", p[i]);
+		sprint(buf + 2 * i, "%2.2x", p[i]);
 	syslog(0, "cpu", buf);
 }
 
@@ -684,8 +695,8 @@ srvp9auth(int fd, char *user)
 		return -1;
 	if(auth_chuid(ai, nil) < 0)
 		return -1;
-	strecpy(user, user+MaxStr, ai->cuid);
-	memmove(key+4, ai->secret, ai->nsecret);
+	strecpy(user, user + MaxStr, ai->cuid);
+	memmove(key + 4, ai->secret, ai->nsecret);
 
 	if(ealgs == nil)
 		return fd;
@@ -693,16 +704,16 @@ srvp9auth(int fd, char *user)
 	/* exchange random numbers */
 	srand(truerand());
 	for(i = 0; i < 4; i++)
-		key[i+12] = rand();
+		key[i + 12] = rand();
 	if(readn(fd, key, 4) != 4)
 		return -1;
-	if(write(fd, key+12, 4) != 4)
+	if(write(fd, key + 12, 4) != 4)
 		return -1;
 
 	/* scramble into two secrets */
 	sha1(key, sizeof(key), digest, nil);
 	mksecret(fromclientsecret, digest);
-	mksecret(fromserversecret, digest+10);
+	mksecret(fromserversecret, digest + 10);
 
 	/* set up encryption */
 	i = pushssl(fd, ealgs, fromserversecret, fromclientsecret, nil);
@@ -749,7 +760,7 @@ rmtnoteproc(void)
 	char buf[256];
 
 	/* new proc returns to start shell */
-	pid = rfork(RFPROC|RFFDG|RFNOTEG|RFNAMEG|RFMEM);
+	pid = rfork(RFPROC | RFFDG | RFNOTEG | RFNAMEG | RFMEM);
 	switch(pid){
 	case -1:
 		syslog(0, "cpu", "cpu -R: can't start noteproc: %r");
@@ -759,7 +770,7 @@ rmtnoteproc(void)
 	}
 
 	/* new proc reads notes from other side and posts them to shell */
-	switch(notepid = rfork(RFPROC|RFFDG|RFMEM)){
+	switch(notepid = rfork(RFPROC | RFFDG | RFMEM)){
 	case -1:
 		syslog(0, "cpu", "cpu -R: can't start wait proc: %r");
 		_exits(0);
@@ -771,7 +782,7 @@ rmtnoteproc(void)
 		}
 
 		for(;;){
-			n = read(fd, buf, sizeof(buf)-1);
+			n = read(fd, buf, sizeof(buf) - 1);
 			if(n <= 0){
 				postnote(PNGROUP, pid, "hangup");
 				_exits(0);
@@ -791,8 +802,7 @@ rmtnoteproc(void)
 	_exits(0);
 }
 
-enum
-{
+enum {
 	Qdir,
 	Qcpunote,
 
@@ -800,35 +810,32 @@ enum
 };
 
 struct {
-	char	*name;
-	Qid	qid;
-	ulong	perm;
+	char *name;
+	Qid qid;
+	ulong perm;
 } fstab[] =
-{
-	[Qdir] =	{ ".",		{Qdir, 0, QTDIR},	DMDIR|0555	},
-	[Qcpunote] =	{ "cpunote",	{Qcpunote, 0},		0444		},
+	{
+		[Qdir] = {".", {Qdir, 0, QTDIR}, DMDIR | 0555},
+		[Qcpunote] = {"cpunote", {Qcpunote, 0}, 0444},
 };
 
 typedef struct Note Note;
-struct Note
-{
+struct Note {
 	Note *next;
 	char msg[ERRMAX];
 };
 
 typedef struct Request Request;
-struct Request
-{
+struct Request {
 	Request *next;
 	Fcall f;
 };
 
 typedef struct Fid Fid;
-struct Fid
-{
-	int	fid;
-	int	file;
-	int	omode;
+struct Fid {
+	int fid;
+	int file;
+	int omode;
 };
 Fid fids[Nfid];
 
@@ -841,7 +848,7 @@ struct {
 int
 fsreply(int fd, Fcall *f)
 {
-	uint8_t buf[IOHDRSZ+Maxfdata];
+	uint8_t buf[IOHDRSZ + Maxfdata];
 	int n;
 
 	if(dbg)
@@ -906,7 +913,7 @@ flushreq(int tag)
 	unlock(&nfs);
 }
 
-Fid*
+Fid *
 getfid(int fid)
 {
 	int i, freefid;
@@ -955,7 +962,7 @@ fsread(int fd, Fid *fid, Fcall *f)
 	default:
 		return -1;
 	case Qdir:
-		if(f->offset == 0 && f->count >0){
+		if(f->offset == 0 && f->count > 0){
 			memset(&d, 0, sizeof(d));
 			d.name = fstab[Qcpunote].name;
 			d.uid = user;
@@ -965,7 +972,7 @@ fsread(int fd, Fid *fid, Fcall *f)
 			d.mode = fstab[Qcpunote].perm;
 			d.atime = d.mtime = time(0);
 			f->count = convD2M(&d, buf, sizeof buf);
-			f->data = (char*)buf;
+			f->data = (char *)buf;
 		} else
 			f->count = 0;
 		return fsreply(fd, f);
@@ -981,7 +988,8 @@ fsread(int fd, Fid *fid, Fcall *f)
 			nfs.rlast->next = rp;
 		nfs.rlast = rp;
 		unlock(&nfs);
-		return kick(fd);;
+		return kick(fd);
+		;
 	}
 }
 
@@ -992,7 +1000,7 @@ char Enotdir[] = "not a directory";
 void
 notefs(int fd)
 {
-	uint8_t buf[IOHDRSZ+Maxfdata];
+	uint8_t buf[IOHDRSZ + Maxfdata];
 	int i, n, ncpunote;
 	Fcall f;
 	Qid wqid[MAXWELEM];
@@ -1022,7 +1030,7 @@ notefs(int fd)
 		doreply = 1;
 		fid = getfid(f.fid);
 		if(fid == nil){
-nofids:
+		nofids:
 			f.type = Rerror;
 			f.ename = Enofile;
 			fsreply(fd, &f);
@@ -1037,8 +1045,8 @@ nofids:
 			flushreq(f.oldtag);
 			break;
 		case Tversion:
-			if(f.msize > IOHDRSZ+Maxfdata)
-				f.msize = IOHDRSZ+Maxfdata;
+			if(f.msize > IOHDRSZ + Maxfdata)
+				f.msize = IOHDRSZ + Maxfdata;
 			break;
 		case Tauth:
 			f.type = Rerror;
@@ -1057,7 +1065,7 @@ nofids:
 				nfid->file = fid->file;
 				fid = nfid;
 			}
-			for(i=0; i<f.nwname && i<MAXWELEM; i++){
+			for(i = 0; i < f.nwname && i < MAXWELEM; i++){
 				if(fid->file != Qdir){
 					f.type = Rerror;
 					f.ename = Enotdir;
@@ -1078,10 +1086,10 @@ nofids:
 				wqid[i] = fstab[Qcpunote].qid;
 			}
 			if(nfid != nil && (f.type == Rerror || i < f.nwname))
-				nfid ->file = -1;
+				nfid->file = -1;
 			if(f.type != Rerror){
 				f.nwqid = i;
-				for(i=0; i<f.nwqid; i++)
+				for(i = 0; i < f.nwqid; i++)
 					f.wqid[i] = wqid[i];
 			}
 			break;
@@ -1105,7 +1113,7 @@ nofids:
 		case Tclunk:
 			if(fid->omode != -1 && fid->file == Qcpunote){
 				ncpunote--;
-				if(ncpunote == 0)	/* remote side is done */
+				if(ncpunote == 0) /* remote side is done */
 					goto err;
 			}
 			fid->file = -1;
@@ -1138,16 +1146,16 @@ err:
 	close(fd);
 }
 
-char 	notebuf[ERRMAX];
+char notebuf[ERRMAX];
 
 void
-catcher(void*, char *text)
+catcher(void *, char *text)
 {
 	int n;
 
 	n = strlen(text);
 	if(n >= sizeof(notebuf))
-		n = sizeof(notebuf)-1;
+		n = sizeof(notebuf) - 1;
 	memmove(notebuf, text, n);
 	notebuf[n] = '\0';
 	noted(NCONT);
@@ -1170,7 +1178,7 @@ lclnoteproc(int netfd)
 	}
 
 	/* new proc mounts and returns to start exportfs */
-	switch(pid = rfork(RFPROC|RFNAMEG|RFFDG|RFMEM)){
+	switch(pid = rfork(RFPROC | RFNAMEG | RFFDG | RFMEM)){
 	default:
 		exportpid = pid;
 		break;
@@ -1189,7 +1197,7 @@ lclnoteproc(int netfd)
 	close(pfd[1]);
 
 	/* new proc listens for note file system rpc's */
-	switch(rfork(RFPROC|RFNAMEG|RFMEM)){
+	switch(rfork(RFPROC | RFNAMEG | RFMEM)){
 	case -1:
 		fprint(2, "cpu: can't start note proc: rfork1: %r\n");
 		_exits(0);
@@ -1201,11 +1209,11 @@ lclnoteproc(int netfd)
 	/* original proc waits for notes */
 	notify(catcher);
 	w = nil;
-	for(;;) {
+	for(;;){
 		*notebuf = 0;
 		free(w);
 		w = wait();
-		if(w == nil) {
+		if(w == nil){
 			if(*notebuf == 0)
 				break;
 			np = mallocz(sizeof(Note), 1);
@@ -1228,5 +1236,5 @@ lclnoteproc(int netfd)
 	if(w == nil)
 		exits(nil);
 	exits(0);
-/*	exits(w->msg); */
+	/*	exits(w->msg); */
 }

sys/src/9/amd64/screen.c

@@ -16,13 +16,13 @@
 #include "ureg.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
 #include "screen.h"
 
-#define RGB2K(r,g,b)	((156763*(r)+307758*(g)+59769*(b))>>19)
+#define RGB2K(r, g, b) ((156763 * (r) + 307758 * (g) + 59769 * (b)) >> 19)
 
 Point ZP = {0, 0};
 
@@ -33,17 +33,75 @@ Memimage *gscreen;
 
 VGAscr vgascreen[1];
 
-Cursor	arrow = {
-	{ -1, -1 },
-	{ 0xFF, 0xFF, 0x80, 0x01, 0x80, 0x02, 0x80, 0x0C,
-	  0x80, 0x10, 0x80, 0x10, 0x80, 0x08, 0x80, 0x04,
-	  0x80, 0x02, 0x80, 0x01, 0x80, 0x02, 0x8C, 0x04,
-	  0x92, 0x08, 0x91, 0x10, 0xA0, 0xA0, 0xC0, 0x40,
+Cursor arrow = {
+	{-1, -1},
+	{
+		0xFF,
+		0xFF,
+		0x80,
+		0x01,
+		0x80,
+		0x02,
+		0x80,
+		0x0C,
+		0x80,
+		0x10,
+		0x80,
+		0x10,
+		0x80,
+		0x08,
+		0x80,
+		0x04,
+		0x80,
+		0x02,
+		0x80,
+		0x01,
+		0x80,
+		0x02,
+		0x8C,
+		0x04,
+		0x92,
+		0x08,
+		0x91,
+		0x10,
+		0xA0,
+		0xA0,
+		0xC0,
+		0x40,
 	},
-	{ 0x00, 0x00, 0x7F, 0xFE, 0x7F, 0xFC, 0x7F, 0xF0,
-	  0x7F, 0xE0, 0x7F, 0xE0, 0x7F, 0xF0, 0x7F, 0xF8,
-	  0x7F, 0xFC, 0x7F, 0xFE, 0x7F, 0xFC, 0x73, 0xF8,
-	  0x61, 0xF0, 0x60, 0xE0, 0x40, 0x40, 0x00, 0x00,
+	{
+		0x00,
+		0x00,
+		0x7F,
+		0xFE,
+		0x7F,
+		0xFC,
+		0x7F,
+		0xF0,
+		0x7F,
+		0xE0,
+		0x7F,
+		0xE0,
+		0x7F,
+		0xF0,
+		0x7F,
+		0xF8,
+		0x7F,
+		0xFC,
+		0x7F,
+		0xFE,
+		0x7F,
+		0xFC,
+		0x73,
+		0xF8,
+		0x61,
+		0xF0,
+		0x60,
+		0xE0,
+		0x40,
+		0x40,
+		0x00,
+		0x00,
 	},
 };
 
@@ -69,20 +127,19 @@ screensize(int x, int y, int z, uint32_t chan)
 	oldsoft = softscreen;
 
 	if(scr->paddr == 0){
-		int width = (x*z)/BI2WD;
+		int width = (x * z) / BI2WD;
 		void *p;
 
-		p = malloc(width*BY2WD*y);
+		p = malloc(width * BY2WD * y);
 		if(p == nil)
 			error("no memory for vga soft screen");
 		gscreendata.bdata = softscreen = p;
 		if(scr->dev && scr->dev->page){
 			scr->vaddr = KADDR(VGAMEM());
-			scr->apsize = 1<<16;
+			scr->apsize = 1 << 16;
 		}
 		scr->useflush = 1;
-	}
-	else{
+	} else {
 		gscreendata.bdata = scr->vaddr;
 		scr->useflush = scr->dev && scr->dev->flush;
 	}
@@ -90,12 +147,12 @@ screensize(int x, int y, int z, uint32_t chan)
 	scr->gscreen = nil;
 	if(gscreen)
 		freememimage(gscreen);
-	gscreen = allocmemimaged(Rect(0,0,x,y), chan, &gscreendata);
+	gscreen = allocmemimaged(Rect(0, 0, x, y), chan, &gscreendata);
 	if(gscreen == nil)
 		error("no memory for vga memimage");
 	vgaimageinit(chan);
 
-	scr->palettedepth = 6;	/* default */
+	scr->palettedepth = 6; /* default */
 	scr->gscreendata = &gscreendata;
 	scr->memdefont = getmemdefont();
 	scr->gscreen = gscreen;
@@ -122,7 +179,7 @@ screenaperture(int size, int align)
 
 	scr = &vgascreen[0];
 
-	if(scr->paddr)	/* set up during enable */
+	if(scr->paddr) /* set up during enable */
 		return 0;
 
 	if(size == 0)
@@ -137,7 +194,7 @@ screenaperture(int size, int align)
 	 * Need to allocate some physical address space.
 	 * The driver will tell the card to use it.
 	 */
-	size = ROUNDUP(sizeof(size), 4*KiB);
+	size = ROUNDUP(sizeof(size), 4 * KiB);
 	scr->paddr = (uint64_t)malloc(size);
 	if(scr->paddr == 0)
 		return -1;
@@ -149,8 +206,8 @@ screenaperture(int size, int align)
 	return 0;
 }
 
-unsigned char*
-attachscreen(Rectangle* r, uint32_t* chan, int* d, int* width, int *softscreen)
+unsigned char *
+attachscreen(Rectangle *r, uint32_t *chan, int *d, int *width, int *softscreen)
 {
 	VGAscr *scr;
 
@@ -204,25 +261,24 @@ flushmemscreen(Rectangle r)
 	if(len < 1)
 		return;
 
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
-	page = off/scr->apsize;
+	off = r.min.y * scr->gscreen->width * BY2WD + (r.min.x * scr->gscreen->depth) / 8;
+	page = off / scr->apsize;
 	off %= scr->apsize;
 	disp = scr->vaddr;
-	sdisp = disp+off;
-	edisp = disp+scr->apsize;
+	sdisp = disp + off;
+	edisp = disp + scr->apsize;
 
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
+	off = r.min.y * scr->gscreen->width * BY2WD + (r.min.x * scr->gscreen->depth) / 8;
 
 	sp = scr->gscreendata->bdata + off;
 
 	scr->dev->page(scr, page);
-	for(y = r.min.y; y < r.max.y; y++) {
-		if(sdisp + incs < edisp) {
+	for(y = r.min.y; y < r.max.y; y++){
+		if(sdisp + incs < edisp){
 			memmove(sdisp, sp, len);
 			sp += incs;
 			sdisp += incs;
-		}
-		else {
+		} else {
 			off = edisp - sdisp;
 			page++;
 			if(off <= len){
@@ -230,9 +286,8 @@ flushmemscreen(Rectangle r)
 					memmove(sdisp, sp, off);
 				scr->dev->page(scr, page);
 				if(len - off > 0)
-					memmove(disp, sp+off, len - off);
-			}
-			else {
+					memmove(disp, sp + off, len - off);
+			} else {
 				memmove(sdisp, sp, len);
 				scr->dev->page(scr, page);
 			}
@@ -243,7 +298,7 @@ flushmemscreen(Rectangle r)
 }
 
 void
-getcolor(uint32_t p, uint32_t* pr, uint32_t* pg, uint32_t* pb)
+getcolor(uint32_t p, uint32_t *pr, uint32_t *pg, uint32_t *pb)
 {
 	VGAscr *scr;
 	uint32_t x;
@@ -283,9 +338,9 @@ setpalette(uint32_t p, uint32_t r, uint32_t g, uint32_t b)
 	scr->colormap[p][1] = g;
 	scr->colormap[p][2] = b;
 	vgao(PaddrW, p);
-	vgao(Pdata, r>>(32-d));
-	vgao(Pdata, g>>(32-d));
-	vgao(Pdata, b>>(32-d));
+	vgao(Pdata, r >> (32 - d));
+	vgao(Pdata, g >> (32 - d));
+	vgao(Pdata, b >> (32 - d));
 	unlock(&cursor.l);
 
 	return ~0;
@@ -348,7 +403,7 @@ cursoroff(int i)
 }
 
 void
-setcursor(Cursor* curs)
+setcursor(Cursor *curs)
 {
 	VGAscr *scr;
 
@@ -360,7 +415,7 @@ setcursor(Cursor* curs)
 }
 
 int hwaccel = 1;
-int hwblank = 0;	/* turned on by drivers that are known good */
+int hwblank = 0; /* turned on by drivers that are known good */
 int panning = 0;
 
 int
@@ -374,11 +429,11 @@ hwdraw(Memdrawparam *par)
 		return 0;
 
 	scr = &vgascreen[0];
-	if((dst=par->dst) == nil || dst->data == nil)
+	if((dst = par->dst) == nil || dst->data == nil)
 		return 0;
-	if((src=par->src) == nil || src->data == nil)
+	if((src = par->src) == nil || src->data == nil)
 		return 0;
-	if((mask=par->mask) == nil || mask->data == nil)
+	if((mask = par->mask) == nil || mask->data == nil)
 		return 0;
 
 	if(scr->cur == &swcursor){
@@ -398,7 +453,7 @@ hwdraw(Memdrawparam *par)
 	if(dst->data->bdata != gscreendata.bdata)
 		return 0;
 
-	if(scr->fill==nil && scr->scroll==nil)
+	if(scr->fill == nil && scr->scroll == nil)
 		return 0;
 
 	/*
@@ -406,11 +461,8 @@ hwdraw(Memdrawparam *par)
 	 * pixel we can convert to the destination format and just
 	 * replicate with memset.
 	 */
-	m = Simplesrc|Simplemask|Fullmask;
-	if(scr->fill
-	&& (par->state&m)==m
-	&& ((par->srgba&0xFF) == 0xFF)
-	&& (par->op&S) == S)
+	m = Simplesrc | Simplemask | Fullmask;
+	if(scr->fill && (par->state & m) == m && ((par->srgba & 0xFF) == 0xFF) && (par->op & S) == S)
 		return scr->fill(scr, par->r, par->sdval);
 
 	/*
@@ -418,12 +470,8 @@ hwdraw(Memdrawparam *par)
 	 * source onto the destination.  If the channels are the same and
 	 * the source is not replicated, memmove suffices.
 	 */
-	m = Simplemask|Fullmask;
-	if(scr->scroll
-	&& src->data->bdata==dst->data->bdata
-	&& !(src->flags&Falpha)
-	&& (par->state&m)==m
-	&& (par->op&S) == S)
+	m = Simplemask | Fullmask;
+	if(scr->scroll && src->data->bdata == dst->data->bdata && !(src->flags & Falpha) && (par->state & m) == m && (par->op & S) == S)
 		return scr->scroll(scr, par->r, par->sr);
 
 	return 0;
@@ -450,7 +498,7 @@ vgalinearpciid(VGAscr *scr, int vid, int did)
 
 	p = nil;
 	while((p = pcimatch(p, vid, 0)) != nil){
-		if(p->ccrb != 3)	/* video card */
+		if(p->ccrb != 3) /* video card */
 			continue;
 		if(did != 0 && p->did != did)
 			continue;
@@ -486,16 +534,12 @@ vgalinearpci(VGAscr *scr)
 	 * call vgalinearaddr directly.
 	 */
 	best = -1;
-	for(i=0; i<nelem(p->mem); i++){
-		if(p->mem[i].bar&1)	/* not memory */
+	for(i = 0; i < nelem(p->mem); i++){
+		if(p->mem[i].bar & 1) /* not memory */
 			continue;
-		if(p->mem[i].size < 640*480)	/* not big enough */
+		if(p->mem[i].size < 640 * 480) /* not big enough */
 			continue;
-		if(best==-1
-		|| p->mem[i].size > p->mem[best].size
-		|| (p->mem[i].size == p->mem[best].size
-		  && (p->mem[i].bar&8)
-		  && !(p->mem[best].bar&8)))
+		if(best == -1 || p->mem[i].size > p->mem[best].size || (p->mem[i].size == p->mem[best].size && (p->mem[i].bar & 8) && !(p->mem[best].bar & 8)))
 			best = i;
 	}
 	if(best >= 0){
@@ -531,42 +575,41 @@ vgalinearaddr(VGAscr *scr, uint32_t paddr, int size)
 	}
 
 	/* round to page boundary, just in case */
-	x = paddr&(4*KiB-1);
-	npaddr = paddr-x;
-	nsize = ROUNDUP(size+x, 4*KiB);
+	x = paddr & (4 * KiB - 1);
+	npaddr = paddr - x;
+	nsize = ROUNDUP(size + x, 4 * KiB);
 
 	/*
 	 * Don't bother trying to map more than 4000x4000x32 = 64MB.
 	 * We only have a 256MB window.
 	 */
-	if(nsize > 64*MB)
-		nsize = 64*MB;
+	if(nsize > 64 * MB)
+		nsize = 64 * MB;
 	scr->vaddr = vmap(npaddr, nsize);
 	if(scr->vaddr == 0)
 		error("cannot allocate vga frame buffer");
-	scr->vaddr = (char*)scr->vaddr+x;
+	scr->vaddr = (char *)scr->vaddr + x;
 	scr->paddr = paddr;
 	scr->apsize = nsize;
 }
 
-
 /*
  * Software cursor.
  */
-int	swvisible;	/* is the cursor visible? */
-int	swenabled;	/* is the cursor supposed to be on the screen? */
-Memimage*	swback;	/* screen under cursor */
-Memimage*	swimg;	/* cursor image */
-Memimage*	swmask;	/* cursor mask */
-Memimage*	swimg1;
-Memimage*	swmask1;
-
-Point	swoffset;
-Rectangle	swrect;	/* screen rectangle in swback */
-Point	swpt;	/* desired cursor location */
-Point	swvispt;	/* actual cursor location */
-int	swvers;	/* incremented each time cursor image changes */
-int	swvisvers;	/* the version on the screen */
+int swvisible;	  /* is the cursor visible? */
+int swenabled;	  /* is the cursor supposed to be on the screen? */
+Memimage *swback; /* screen under cursor */
+Memimage *swimg;  /* cursor image */
+Memimage *swmask; /* cursor mask */
+Memimage *swimg1;
+Memimage *swmask1;
+
+Point swoffset;
+Rectangle swrect; /* screen rectangle in swback */
+Point swpt;	  /* desired cursor location */
+Point swvispt;	  /* actual cursor location */
+int swvers;	  /* incremented each time cursor image changes */
+int swvisvers;	  /* the version on the screen */
 
 /*
  * called with drawlock locked for us, most of the time.
@@ -605,7 +648,7 @@ swcursordraw(void)
 	assert(!canqlock(&drawlock));
 	swvispt = swpt;
 	swvisvers = swvers;
-	swrect = rectaddpt(Rect(0,0,16,16), swvispt);
+	swrect = rectaddpt(Rect(0, 0, 16, 16), swvispt);
 	memimagedraw(swback, swback->r, gscreen, swpt, memopaque, ZP, S);
 	memimagedraw(gscreen, swrect, swimg1, ZP, swmask1, ZP, SoverD);
 	flushmemscreen(swrect);
@@ -653,12 +696,12 @@ swload(VGAscr *v, Cursor *curs)
 	 */
 	ip = byteaddr(swimg, ZP);
 	mp = byteaddr(swmask, ZP);
-	for(i=0; i<32; i++){
+	for(i = 0; i < 32; i++){
 		set = curs->set[i];
 		clr = curs->clr[i];
-		for(j=0x80; j; j>>=1){
-			*ip++ = set&j ? 0x00 : 0xFF;
-			*mp++ = (clr|set)&j ? 0xFF : 0x00;
+		for(j = 0x80; j; j >>= 1){
+			*ip++ = set & j ? 0x00 : 0xFF;
+			*mp++ = (clr | set) & j ? 0xFF : 0x00;
 		}
 	}
 	swoffset = curs->offset;
@@ -680,17 +723,17 @@ swcursorclock(void)
 	int x;
 	if(!swenabled)
 		return;
-	if(swvisible && eqpt(swpt, swvispt) && swvers==swvisvers)
+	if(swvisible && eqpt(swpt, swvispt) && swvers == swvisvers)
 		return;
 
 	x = splhi();
 	if(swenabled)
-	if(!swvisible || !eqpt(swpt, swvispt) || swvers!=swvisvers)
-	if(canqlock(&drawlock)){
-		swcursorhide();
-		swcursordraw();
-		qunlock(&drawlock);
-	}
+		if(!swvisible || !eqpt(swpt, swvispt) || swvers != swvisvers)
+			if(canqlock(&drawlock)){
+				swcursorhide();
+				swcursordraw();
+				qunlock(&drawlock);
+			}
 	splx(x);
 }
 
@@ -701,7 +744,7 @@ swcursorinit(void)
 	VGAscr *scr;
 	didswcursorinit = 1;
 	scr = &vgascreen[0];
-	if(scr==nil || scr->gscreen==nil)
+	if(scr == nil || scr->gscreen == nil)
 		return;
 
 	if(scr->dev == nil || scr->dev->linear == nil){
@@ -720,12 +763,12 @@ swcursorinit(void)
 		freememimage(swimg1);
 	}
 
-	swback = allocmemimage(Rect(0,0,32,32), gscreen->chan);
-	swmask = allocmemimage(Rect(0,0,16,16), GREY8);
-	swmask1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	swimg = allocmemimage(Rect(0,0,16,16), GREY8);
-	swimg1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	if(swback==nil || swmask==nil || swmask1==nil || swimg==nil || swimg1 == nil){
+	swback = allocmemimage(Rect(0, 0, 32, 32), gscreen->chan);
+	swmask = allocmemimage(Rect(0, 0, 16, 16), GREY8);
+	swmask1 = allocmemimage(Rect(0, 0, 16, 16), GREY1);
+	swimg = allocmemimage(Rect(0, 0, 16, 16), GREY8);
+	swimg1 = allocmemimage(Rect(0, 0, 16, 16), GREY1);
+	if(swback == nil || swmask == nil || swmask1 == nil || swimg == nil || swimg1 == nil){
 		print("software cursor: allocmemimage fails");
 		return;
 	}
@@ -741,20 +784,20 @@ swcursorinit(void)
 }
 
 VGAcur swcursor =
-{
-	"soft",
-	swenable,
-	swdisable,
-	swload,
-	swmove,
+	{
+		"soft",
+		swenable,
+		swdisable,
+		swload,
+		swmove,
 };
 
 // A bit hokey but it saves dumbness in the build tool and other code.
 VGAcur vgavesacur =
-{
-	"vesa",
-	swenable,
-	swdisable,
-	swload,
-	swmove,
+	{
+		"vesa",
+		swenable,
+		swdisable,
+		swload,
+		swmove,
 };

sys/src/9/amd64/screen.h

@@ -19,9 +19,9 @@ extern void mousetrack(int, int, int, int);
 extern Point mousexy(void);
 
 extern void mouseaccelerate(int);
-extern int m3mouseputc(Queue*, int);
-extern int m5mouseputc(Queue*, int);
-extern int mouseputc(Queue*, int);
+extern int m3mouseputc(Queue *, int);
+extern int m5mouseputc(Queue *, int);
+extern int mouseputc(Queue *, int);
 
 extern Cursorinfo cursor;
 extern Cursor arrow;
@@ -30,36 +30,36 @@ extern Cursor arrow;
  * Generic VGA registers.
  */
 enum {
-	MiscW		= 0x03C2,	/* Miscellaneous Output (W) */
-	MiscR		= 0x03CC,	/* Miscellaneous Output (R) */
-	Status0		= 0x03C2,	/* Input status 0 (R) */
-	Status1		= 0x03DA,	/* Input Status 1 (R) */
-	FeatureR	= 0x03CA,	/* Feature Control (R) */
-	FeatureW	= 0x03DA,	/* Feature Control (W) */
-
-	Seqx		= 0x03C4,	/* Sequencer Index, Data at Seqx+1 */
-	Crtx		= 0x03D4,	/* CRT Controller Index, Data at Crtx+1 */
-	Grx		= 0x03CE,	/* Graphics Controller Index, Data at Grx+1 */
-	Attrx		= 0x03C0,	/* Attribute Controller Index and Data */
-
-	PaddrW		= 0x03C8,	/* Palette Address Register, write */
-	Pdata		= 0x03C9,	/* Palette Data Register */
-	Pixmask		= 0x03C6,	/* Pixel Mask Register */
-	PaddrR		= 0x03C7,	/* Palette Address Register, read */
-	Pstatus		= 0x03C7,	/* DAC Status (RO) */
-
-	Pcolours	= 256,		/* Palette */
-	Pred		= 0,
-	Pgreen		= 1,
-	Pblue		= 2,
-
-	Pblack		= 0x00,
-	Pwhite		= 0xFF,
+	MiscW = 0x03C2,	   /* Miscellaneous Output (W) */
+	MiscR = 0x03CC,	   /* Miscellaneous Output (R) */
+	Status0 = 0x03C2,  /* Input status 0 (R) */
+	Status1 = 0x03DA,  /* Input Status 1 (R) */
+	FeatureR = 0x03CA, /* Feature Control (R) */
+	FeatureW = 0x03DA, /* Feature Control (W) */
+
+	Seqx = 0x03C4,	/* Sequencer Index, Data at Seqx+1 */
+	Crtx = 0x03D4,	/* CRT Controller Index, Data at Crtx+1 */
+	Grx = 0x03CE,	/* Graphics Controller Index, Data at Grx+1 */
+	Attrx = 0x03C0, /* Attribute Controller Index and Data */
+
+	PaddrW = 0x03C8,  /* Palette Address Register, write */
+	Pdata = 0x03C9,	  /* Palette Data Register */
+	Pixmask = 0x03C6, /* Pixel Mask Register */
+	PaddrR = 0x03C7,  /* Palette Address Register, read */
+	Pstatus = 0x03C7, /* DAC Status (RO) */
+
+	Pcolours = 256, /* Palette */
+	Pred = 0,
+	Pgreen = 1,
+	Pblue = 2,
+
+	Pblack = 0x00,
+	Pwhite = 0xFF,
 };
 
-#define VGAMEM()	0xA0000
-#define vgai(port)		inb(port)
-#define vgao(port, data)	outb(port, data)
+#define VGAMEM() 0xA0000
+#define vgai(port) inb(port)
+#define vgao(port, data) outb(port, data)
 
 extern int vgaxi(int32_t, unsigned char);
 extern int vgaxo(int32_t, unsigned char, unsigned char);
@@ -71,61 +71,61 @@ typedef struct VGAcur VGAcur;
 typedef struct VGAscr VGAscr;
 
 struct VGAdev {
-	char*	name;
-
-	void	(*enable)(VGAscr*);
-	void	(*disable)(VGAscr*);
-	void	(*page)(VGAscr*, int);
-	void	(*linear)(VGAscr*, int, int);
-	void	(*drawinit)(VGAscr*);
-	int	(*fill)(VGAscr*, Rectangle, uint32_t);
-	void	(*ovlctl)(VGAscr*, Chan*, void*, int);
-	int	(*ovlwrite)(VGAscr*, void*, int, int64_t);
-	void (*flush)(VGAscr*, Rectangle);
+	char *name;
+
+	void (*enable)(VGAscr *);
+	void (*disable)(VGAscr *);
+	void (*page)(VGAscr *, int);
+	void (*linear)(VGAscr *, int, int);
+	void (*drawinit)(VGAscr *);
+	int (*fill)(VGAscr *, Rectangle, uint32_t);
+	void (*ovlctl)(VGAscr *, Chan *, void *, int);
+	int (*ovlwrite)(VGAscr *, void *, int, int64_t);
+	void (*flush)(VGAscr *, Rectangle);
 };
 
 struct VGAcur {
-	char*	name;
+	char *name;
 
-	void	(*enable)(VGAscr*);
-	void	(*disable)(VGAscr*);
-	void	(*load)(VGAscr*, Cursor*);
-	int	(*move)(VGAscr*, Point);
+	void (*enable)(VGAscr *);
+	void (*disable)(VGAscr *);
+	void (*load)(VGAscr *, Cursor *);
+	int (*move)(VGAscr *, Point);
 
-	int	doespanning;
+	int doespanning;
 };
 
 /*
  */
 struct VGAscr {
-	Lock	devlock;
-	VGAdev*	dev;
-	Pcidev*	pci;
+	Lock devlock;
+	VGAdev *dev;
+	Pcidev *pci;
 
-	VGAcur*	cur;
-	uint32_t	storage;
+	VGAcur *cur;
+	uint32_t storage;
 	Cursor Cursor;
 
-	int	useflush;
+	int useflush;
 
-	uint32_t	paddr;		/* frame buffer */
-	void*	vaddr;
-	int		apsize;
+	uint32_t paddr; /* frame buffer */
+	void *vaddr;
+	int apsize;
 
-	uint32_t	io;				/* device specific registers */
-	uint32_t	*mmio;
+	uint32_t io; /* device specific registers */
+	uint32_t *mmio;
 
-	uint32_t	colormap[Pcolours][3];
-	int	palettedepth;
+	uint32_t colormap[Pcolours][3];
+	int palettedepth;
 
-	Memimage* gscreen;
-	Memdata* gscreendata;
-	Memsubfont* memdefont;
+	Memimage *gscreen;
+	Memdata *gscreendata;
+	Memsubfont *memdefont;
 
-	int	(*fill)(VGAscr*, Rectangle, uint32_t);
-	int	(*scroll)(VGAscr*, Rectangle, Rectangle);
-	void	(*blank)(VGAscr*, int);
-	uint32_t	id;	/* internal identifier for driver use */
+	int (*fill)(VGAscr *, Rectangle, uint32_t);
+	int (*scroll)(VGAscr *, Rectangle, Rectangle);
+	void (*blank)(VGAscr *, int);
+	uint32_t id; /* internal identifier for driver use */
 	int isblank;
 	int overlayinit;
 };
@@ -133,27 +133,27 @@ struct VGAscr {
 extern VGAscr vgascreen[];
 
 enum {
-	Backgnd		= 0,	/* black */
+	Backgnd = 0, /* black */
 };
 
 /* mouse.c */
-extern void mousectl(Cmdbuf*);
+extern void mousectl(Cmdbuf *);
 extern void mouseresize(void);
 
 /* screen.c */
-extern int		hwaccel;	/* use hw acceleration; default on */
-extern int		hwblank;	/* use hw blanking; default on */
-extern int		panning;	/* use virtual screen panning; default off */
-extern void addvgaseg(char*, uint32_t, uint32_t);
-extern unsigned char* attachscreen(Rectangle*, uint32_t*, int*, int*, int*);
-extern void	flushmemscreen(Rectangle);
-extern int	cursoron(int);
-extern void	cursoroff(int);
-extern void	setcursor(Cursor*);
-extern int	screensize(int, int, int, uint32_t);
-extern int	screenaperture(int, int);
-extern Rectangle physgscreenr;	/* actual monitor size */
-extern void	blankscreen(int);
+extern int hwaccel; /* use hw acceleration; default on */
+extern int hwblank; /* use hw blanking; default on */
+extern int panning; /* use virtual screen panning; default off */
+extern void addvgaseg(char *, uint32_t, uint32_t);
+extern unsigned char *attachscreen(Rectangle *, uint32_t *, int *, int *, int *);
+extern void flushmemscreen(Rectangle);
+extern int cursoron(int);
+extern void cursoroff(int);
+extern void setcursor(Cursor *);
+extern int screensize(int, int, int, uint32_t);
+extern int screenaperture(int, int);
+extern Rectangle physgscreenr; /* actual monitor size */
+extern void blankscreen(int);
 
 extern VGAcur swcursor;
 extern void swcursorinit(void);
@@ -162,25 +162,25 @@ extern void swcursoravoid(Rectangle);
 extern void swcursorunhide(void);
 
 /* devdraw.c */
-extern void	deletescreenimage(void);
-extern void	resetscreenimage(void);
-extern int		drawhasclients(void);
-extern uint32_t	blanktime;
-extern void	setscreenimageclipr(Rectangle);
-extern void	drawflush(void);
+extern void deletescreenimage(void);
+extern void resetscreenimage(void);
+extern int drawhasclients(void);
+extern uint32_t blanktime;
+extern void setscreenimageclipr(Rectangle);
+extern void drawflush(void);
 extern int drawidletime(void);
-extern QLock	drawlock;
+extern QLock drawlock;
 
 /* vga.c */
-extern void	vgascreenwin(VGAscr*);
-extern void	vgaimageinit(uint32_t);
-extern void	vgalinearpciid(VGAscr*, int, int);
-extern void	vgalinearpci(VGAscr*);
-extern void	vgalinearaddr(VGAscr*, uint32_t, int);
+extern void vgascreenwin(VGAscr *);
+extern void vgaimageinit(uint32_t);
+extern void vgalinearpciid(VGAscr *, int, int);
+extern void vgalinearpci(VGAscr *);
+extern void vgalinearaddr(VGAscr *, uint32_t, int);
 
-extern void	drawblankscreen(int);
-extern void	vgablank(VGAscr*, int);
+extern void drawblankscreen(int);
+extern void vgablank(VGAscr *, int);
 
-extern Lock	vgascreenlock;
+extern Lock vgascreenlock;
 
-#define ishwimage(i)	(vgascreen[0].gscreendata && (i)->data->bdata == vgascreen[0].gscreendata->bdata)
+#define ishwimage(i) (vgascreen[0].gscreendata && (i)->data->bdata == vgascreen[0].gscreendata->bdata)

sys/src/9/amd64/sipi.c

@@ -16,8 +16,10 @@
 #include "apic.h"
 
 #undef DBG
-#define DBG if(1)print
-#define SIPIHANDLER	(KZERO+0x3000)
+#define DBG   \
+	if(1) \
+	print
+#define SIPIHANDLER (KZERO + 0x3000)
 
 void
 sipi(void)
@@ -37,11 +39,11 @@ sipi(void)
 	 * must be aligned properly.
 	 */
 	sipipa = mmuphysaddr(UINT2PTR(machp()->MMU.pml4->va), SIPIHANDLER);
-	if((sipipa == 0 || sipipa & (PGSZ - 1)) || sipipa > (1*MiB - 2*PGSZ))
+	if((sipipa == 0 || sipipa & (PGSZ - 1)) || sipipa > (1 * MiB - 2 * PGSZ))
 		panic("sipi: SIPI page improperly aligned or too far away, pa %#p", sipipa);
 	sipiptr = KADDR(sipipa);
 	DBG("sipiptr %#p sipipa %#llx\n", sipiptr, sipipa);
-	memmove((void *)sipiptr, &b1978, &e1978-&b1978);
+	memmove((void *)sipiptr, &b1978, &e1978 - &b1978);
 
 	/*
 	 * Notes: SMP startup algorithm.
@@ -61,8 +63,8 @@ sipi(void)
 		 * bootstrap processor, until the lsipi code is worked out,
 		 * so only the Mach and stack portions are used below.
 		 */
-		apsize = MACHSTKSZ+PTSZ+PGSZ;
-		p = mallocalign(apsize+MACHSZ, PGSZ, 0, 0);
+		apsize = MACHSTKSZ + PTSZ + PGSZ;
+		p = mallocalign(apsize + MACHSZ, PGSZ, 0, 0);
 		if(p == nil)
 			panic("sipi: cannot allocate for apicno %d", apicno);
 
@@ -75,13 +77,13 @@ sipi(void)
 		 * the AP is up to. Perhaps should try to put it
 		 * back into the INIT state?
 		 */
-		mach = (volatile Mach*)(p+apsize);
+		mach = (volatile Mach *)(p + apsize);
 		mach->self = PTR2UINT(mach);
-		mach->machno = apic->Lapic.machno;		/* NOT one-to-one... */
+		mach->machno = apic->Lapic.machno; /* NOT one-to-one... */
 		mach->splpc = PTR2UINT(squidboy);
 		mach->apicno = apicno;
 		mach->stack = PTR2UINT(p);
-		mach->vsvm = p+MACHSTKSZ+PTSZ;
+		mach->vsvm = p + MACHSTKSZ + PTSZ;
 
 		DBG("APICSIPI: %d, %p\n", apicno, (void *)sipipa);
 		apicsipi(apicno, sipipa);
@@ -93,7 +95,7 @@ sipi(void)
 		}
 
 		DBG("mach %#p (%#p) apicid %d machno %2d %dMHz\n",
-			mach, sys->machptr[mach->machno],
-			apicno, mach->machno, mach->cpumhz);
+		    mach, sys->machptr[mach->machno],
+		    apicno, mach->machno, mach->cpumhz);
 	}
 }

sys/src/9/amd64/syscall.c

@@ -25,19 +25,19 @@
 extern int nosmp;
 
 typedef struct {
-	uintptr_t	ip;
-	Ureg*	arg0;
-	char*	arg1;
-	char	msg[ERRMAX];
-	Ureg*	old;
-	Ureg	ureg;
+	uintptr_t ip;
+	Ureg *arg0;
+	char *arg1;
+	char msg[ERRMAX];
+	Ureg *old;
+	Ureg ureg;
 } NFrame;
 
 /*
  *   Return user to state before notify()
  */
 void
-noted(Ureg* cur, uintptr_t arg0)
+noted(Ureg *cur, uintptr_t arg0)
 {
 	Proc *up = externup();
 	NFrame *nf;
@@ -66,18 +66,17 @@ noted(Ureg* cur, uintptr_t arg0)
 	 * Check the segment selectors are all valid.
 	 */
 	nur = &nf->ureg;
-	if(nur->cs != SSEL(SiUCS, SsRPL3) || nur->ss != SSEL(SiUDS, SsRPL3)) {
+	if(nur->cs != SSEL(SiUCS, SsRPL3) || nur->ss != SSEL(SiUDS, SsRPL3)){
 		qunlock(&up->debug);
 		pprint("noted: suicide: bad segment selector (cs %p want %p, ss %p want %p), in noted\n",
-			nur->cs, SSEL(SiUCS, SsRPL3),
-			nur->ss, SSEL(SiUDS, SsRPL3)
-		);
+		       nur->cs, SSEL(SiUCS, SsRPL3),
+		       nur->ss, SSEL(SiUDS, SsRPL3));
 		pexit("Suicide in noted", 0);
 	}
 
 	/* don't let user change system flags */
-	nur->flags &= (Of|Df|Sf|Zf|Af|Pf|Cf);
-	nur->flags |= cur->flags & ~(Of|Df|Sf|Zf|Af|Pf|Cf);
+	nur->flags &= (Of | Df | Sf | Zf | Af | Pf | Cf);
+	nur->flags |= cur->flags & ~(Of | Df | Sf | Zf | Af | Pf | Cf);
 
 	memmove(cur, nur, sizeof(Ureg));
 
@@ -87,7 +86,7 @@ noted(Ureg* cur, uintptr_t arg0)
 		if(!okaddr(nur->ip, BY2SE, 0) || !okaddr(nur->sp, BY2SE, 0)){
 			qunlock(&up->debug);
 			pprint("suicide: trap in noted pc=%#p sp=%#p\n",
-				nur->ip, nur->sp);
+			       nur->ip, nur->sp);
 			pexit("Suicide", 0);
 		}
 		up->ureg = nf->old;
@@ -97,7 +96,7 @@ noted(Ureg* cur, uintptr_t arg0)
 		if(!okaddr(nur->ip, BY2SE, 0) || !okaddr(nur->sp, BY2SE, 0)){
 			qunlock(&up->debug);
 			pprint("suicide: trap in noted pc=%#p sp=%#p\n",
-				nur->ip, nur->sp);
+			       nur->ip, nur->sp);
 			pexit("Suicide", 0);
 		}
 		qunlock(&up->debug);
@@ -106,9 +105,9 @@ noted(Ureg* cur, uintptr_t arg0)
 		nf->arg1 = nf->msg;
 		nf->arg0 = &nf->ureg;
 		cur->bp = PTR2UINT(nf->arg0);
-	//	nf->ip = 0;
-		cur->di = (uint64_t) nf->arg0;
-		cur->si = (uint64_t) nf->arg1;
+		//	nf->ip = 0;
+		cur->di = (uint64_t)nf->arg0;
+		cur->si = (uint64_t)nf->arg1;
 		cur->sp = PTR2UINT(nf);
 		break;
 	default:
@@ -132,7 +131,7 @@ noted(Ureg* cur, uintptr_t arg0)
  *  Pass user the Ureg struct and the note on his stack.
  */
 int
-notify(Ureg* ureg)
+notify(Ureg *ureg)
 {
 	Proc *up = externup();
 	int l;
@@ -158,9 +157,9 @@ notify(Ureg* ureg)
 	memmove(&note, &up->note[0], sizeof(Note));
 	if(strncmp(note.msg, "sys:", 4) == 0){
 		l = strlen(note.msg);
-		if(l > ERRMAX-sizeof(" pc=0x0123456789abcdef"))
-			l = ERRMAX-sizeof(" pc=0x0123456789abcdef");
-		sprint(note.msg+l, " pc=%#p", ureg->ip);
+		if(l > ERRMAX - sizeof(" pc=0x0123456789abcdef"))
+			l = ERRMAX - sizeof(" pc=0x0123456789abcdef");
+		sprint(note.msg + l, " pc=%#p", ureg->ip);
 	}
 
 	if(note.flag != NUser && (up->notified || up->notify == nil)){
@@ -183,11 +182,11 @@ notify(Ureg* ureg)
 	if(!okaddr(PTR2UINT(up->notify), sizeof(ureg->ip), 0)){
 		qunlock(&up->debug);
 		pprint("suicide: bad function address %#p in notify\n",
-			up->notify);
+		       up->notify);
 		pexit("Suicide", 0);
 	}
 
-	sp = ureg->sp - ROUNDUP(sizeof(NFrame), 16) - 128; // amd64 red zone, also wanted by go stack traces
+	sp = ureg->sp - ROUNDUP(sizeof(NFrame), 16) - 128;	  // amd64 red zone, also wanted by go stack traces
 	if(!okaddr(sp, sizeof(NFrame), 1)){
 		qunlock(&up->debug);
 		pprint("suicide: bad stack address %#p in notify\n", sp);
@@ -197,7 +196,7 @@ notify(Ureg* ureg)
 	nf = UINT2PTR(sp);
 	memmove(&nf->ureg, ureg, sizeof(Ureg));
 	nf->old = up->ureg;
-	up->ureg = nf;	/* actually the NFrame, for noted */
+	up->ureg = nf; /* actually the NFrame, for noted */
 	memmove(nf->msg, note.msg, ERRMAX);
 	nf->arg1 = nf->msg;
 	nf->arg0 = &nf->ureg;
@@ -212,7 +211,7 @@ notify(Ureg* ureg)
 	up->notified = 1;
 	up->nnote--;
 	memmove(&up->lastnote, &note, sizeof(Note));
-	memmove(&up->note[0], &up->note[1], up->nnote*sizeof(Note));
+	memmove(&up->note[0], &up->note[1], up->nnote * sizeof(Note));
 
 	qunlock(&up->debug);
 	splx(pl);
@@ -234,7 +233,7 @@ noerrorsleft(void)
 		print("bad errstack: %d extra\n", up->nerrlab);
 		for(i = 0; i < NERR; i++)
 			print("sp=%#p pc=%#p\n",
-				up->errlab[i].sp, up->errlab[i].pc);
+			      up->errlab[i].sp, up->errlab[i].pc);
 		panic("error stack");
 	}
 }
@@ -250,18 +249,18 @@ syscall(unsigned int scallnr, Ureg *ureg)
 	uint64_t *retptr;
 
 	Proc *up = externup();
-	if (up->plan9) {
-		uint64_t *a = (void*)ureg->sp;
+	if(up->plan9){
+		uint64_t *a = (void *)ureg->sp;
 		scallnr = ureg->bp + 1024;
-		if (0)
+		if(0)
 			print("up %p plan9 %d sp %#lx bp %#lx\n", up, up->plan9, ureg->sp, scallnr);
 		int i = 1;
 		// Here is where we get into some of the weird parts of plan 9.
 		switch(scallnr){
-			case SEEK: // oseek
-				retptr = (void *)a[i++];
-				validaddr(retptr, sizeof(uint64_t), 1);
-				break;
+		case SEEK:	  // oseek
+			retptr = (void *)a[i++];
+			validaddr(retptr, sizeof(uint64_t), 1);
+			break;
 		}
 		a0 = a[i++];
 		a1 = a[i++];
@@ -277,9 +276,10 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		a4 = ureg->r8;
 		a5 = ureg->r9;
 	}
-	if (0) iprint("Syscall %d, %lx, %lx, %lx %lx %lx %lx\n", scallnr, a0, a1, a2, a3, a4, a5);
+	if(0)
+		iprint("Syscall %d, %lx, %lx, %lx %lx %lx %lx\n", scallnr, a0, a1, a2, a3, a4, a5);
 	char *e;
-	uintptr_t	sp;
+	uintptr_t sp;
 	int s;
 	int64_t startns, stopns;
 	Ar0 ar0;
@@ -298,10 +298,11 @@ syscall(unsigned int scallnr, Ureg *ureg)
 	up->dbgreg = ureg;
 	sp = ureg->sp;
 	startns = stopns = 0;
-	if (0) hi("so far syscall!\n");
-	if (up->pid == 0 || printallsyscalls) {
+	if(0)
+		hi("so far syscall!\n");
+	if(up->pid == 0 || printallsyscalls){
 		syscallfmt('E', scallnr, nil, startns, stopns, a0, a1, a2, a3, a4, a5);
-		if(up->syscalltrace) {
+		if(up->syscalltrace){
 			print("E %s\n", up->syscalltrace);
 			free(up->syscalltrace);
 			up->syscalltrace = nil;
@@ -316,8 +317,8 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		 * than an error if there's a problem; that might
 		 * change in the future.
 		 */
-		if(sp < (USTKTOP-BIGPGSZ) || sp > (USTKTOP-sizeof(up->arg)-BY2SE))
-			validaddr(UINT2PTR(sp), sizeof(up->arg)+BY2SE, 0);
+		if(sp < (USTKTOP - BIGPGSZ) || sp > (USTKTOP - sizeof(up->arg) - BY2SE))
+			validaddr(UINT2PTR(sp), sizeof(up->arg) + BY2SE, 0);
 
 		syscallfmt('E', scallnr, &ar0, startns, stopns, a0, a1, a2, a3, a4, a5);
 		up->procctl = Proc_stopme;
@@ -327,7 +328,7 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		up->syscalltrace = nil;
 		startns = todget(nil);
 	}
-	if(up->strace_on) {
+	if(up->strace_on){
 		/*
 		 * Redundant validaddr.  Do we care?
 		 * Tracing syscalls is not exactly a fast path...
@@ -335,8 +336,8 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		 * than an error if there's a problem; that might
 		 * change in the future.
 		 */
-		if(sp < (USTKTOP-BIGPGSZ) || sp > (USTKTOP-sizeof(up->arg)-BY2SE))
-			validaddr(UINT2PTR(sp), sizeof(up->arg)+BY2SE, 0);
+		if(sp < (USTKTOP - BIGPGSZ) || sp > (USTKTOP - sizeof(up->arg) - BY2SE))
+			validaddr(UINT2PTR(sp), sizeof(up->arg) + BY2SE, 0);
 
 		syscallfmt('E', scallnr, &ar0, startns, stopns, a0, a1, a2, a3, a4, a5);
 		// TODO: make this all use blocks so we have zero copy.
@@ -346,7 +347,8 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		up->syscalltrace = nil;
 		startns = todget(nil);
 	}
-	if (0) hi("more syscall!\n");
+	if(0)
+		hi("more syscall!\n");
 	up->scallnr = scallnr;
 	if(scallnr == RFORK)
 		fpusysrfork(ureg);
@@ -358,36 +360,37 @@ syscall(unsigned int scallnr, Ureg *ureg)
 	if(!waserror()){
 		if(scallnr >= nsyscall || systab[scallnr].f == nil){
 			pprint("bad sys call number %d pc %#llx\n",
-				scallnr, ureg->ip);
+			       scallnr, ureg->ip);
 			postnote(up, 1, "sys: bad sys call", NDebug);
 			error(Ebadarg);
 		}
 
-		if(sp < (USTKTOP-BIGPGSZ) || sp > (USTKTOP-sizeof(up->arg)-BY2SE))
-			validaddr(UINT2PTR(sp), sizeof(up->arg)+BY2SE, 0);
+		if(sp < (USTKTOP - BIGPGSZ) || sp > (USTKTOP - sizeof(up->arg) - BY2SE))
+			validaddr(UINT2PTR(sp), sizeof(up->arg) + BY2SE, 0);
 
-		memmove(up->arg, UINT2PTR(sp+BY2SE), sizeof(up->arg));
+		memmove(up->arg, UINT2PTR(sp + BY2SE), sizeof(up->arg));
 		up->psstate = systab[scallnr].n;
-	if (0) hi("call syscall!\n");
+		if(0)
+			hi("call syscall!\n");
 		systab[scallnr].f(&ar0, a0, a1, a2, a3, a4, a5);
-	if (0) hi("it returned!\n");
+		if(0)
+			hi("it returned!\n");
 		poperror();
-		if (up->plan9) {
-			switch(scallnr) {
-				case SEEK:
-					*retptr = ar0.p;
-					break;
+		if(up->plan9){
+			switch(scallnr){
+			case SEEK:
+				*retptr = ar0.p;
+				break;
 			}
 		}
-	}
-	else{
+	} else {
 		/* failure: save the error buffer for errstr */
 		e = up->syserrstr;
 		up->syserrstr = up->errstr;
 		up->errstr = e;
 		if(DBGFLG && up->pid == 1)
 			iprint("%s: syscall %s error %s\n",
-				up->text, systab[scallnr].n, up->syserrstr);
+			       up->text, systab[scallnr].n, up->syserrstr);
 		ar0 = systab[scallnr].r;
 	}
 
@@ -404,20 +407,20 @@ syscall(unsigned int scallnr, Ureg *ureg)
 	 */
 	ureg->ax = ar0.p;
 
-	if (up->pid == 0 || printallsyscalls) {
+	if(up->pid == 0 || printallsyscalls){
 		stopns = todget(nil);
 		syscallfmt('X', scallnr, &ar0, startns, stopns, a0, a1, a2, a3, a4, a5);
-		if(up->syscalltrace) {
+		if(up->syscalltrace){
 			print("X %s\n", up->syscalltrace);
 			free(up->syscalltrace);
 			up->syscalltrace = nil;
 		}
 	}
 
-	if(up->strace_on) {
+	if(up->strace_on){
 		uint8_t what = 'X';
 		stopns = todget(nil);
-		if (scallnr == RFORK && a0 & RFPROC && ar0.i > 0)
+		if(scallnr == RFORK && a0 & RFPROC && ar0.i > 0)
 			what = 'F';
 		syscallfmt(what, scallnr, &ar0, startns, stopns, a0, a1, a2, a3, a4, a5);
 		qwrite(up->strace->q, up->syscalltrace, strlen(up->syscalltrace));
@@ -429,7 +432,7 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		uint8_t what = 'X';
 		stopns = todget(nil);
 		up->procctl = Proc_stopme;
-		if (scallnr == RFORK && a0 & RFPROC && ar0.i > 0)
+		if(scallnr == RFORK && a0 & RFPROC && ar0.i > 0)
 			what = 'F';
 		syscallfmt(what, scallnr, &ar0, startns, stopns, a0, a1, a2, a3, a4, a5);
 		s = splhi();
@@ -438,17 +441,19 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		if(up->syscalltrace)
 			free(up->syscalltrace);
 		up->syscalltrace = nil;
-	}else if(up->procctl == Proc_totc || up->procctl == Proc_toac)
+	} else if(up->procctl == Proc_totc || up->procctl == Proc_toac)
 		procctl(up);
 
-	if (0) hi("past sysretfmt\n");
+	if(0)
+		hi("past sysretfmt\n");
 	up->insyscall = 0;
 	up->psstate = 0;
 
 	if(scallnr == NOTED)
 		noted(ureg, a0);
 
-	if (0) hi("now to splhi\n");
+	if(0)
+		hi("now to splhi\n");
 	splhi();
 	if(scallnr != RFORK && (up->procctl || up->nnote))
 		notify(ureg);
@@ -459,7 +464,8 @@ syscall(unsigned int scallnr, Ureg *ureg)
 		splhi();
 	}
 	kexit(ureg);
-	if (0) hi("done kexit\n");
+	if(0)
+		hi("done kexit\n");
 }
 
 uintptr_t
@@ -488,7 +494,7 @@ sysexecstack(uintptr_t stack, int argc)
 	 * are pushed. So if we have odd arguments, we need an odd-8-byte
 	 * aligned stack; else, an even aligned stack.
 	 */
-	if (argc & 1)
+	if(argc & 1)
 		sp -= sp & 8 ? 0 : 8;
 	else
 		sp -= sp & 8 ? 8 : 0;
@@ -496,7 +502,7 @@ sysexecstack(uintptr_t stack, int argc)
 	return sp;
 }
 
-void*
+void *
 sysexecregs(uintptr_t entry, uint32_t ssize, void *tos)
 {
 	Proc *up = externup();
@@ -504,37 +510,37 @@ sysexecregs(uintptr_t entry, uint32_t ssize, void *tos)
 	Ureg *ureg;
 
 	// We made sure it was correctly aligned in sysexecstack, above.
-	if (ssize & 0xf) {
+	if(ssize & 0xf){
 		print("your stack is wrong: stacksize is not 16-byte aligned: %d\n", ssize);
 		panic("misaligned stack in sysexecregs");
 	}
-	sp = (uintptr_t*)(USTKTOP - ssize);
+	sp = (uintptr_t *)(USTKTOP - ssize);
 
 	ureg = up->dbgreg;
 	ureg->sp = PTR2UINT(sp);
 	ureg->ip = entry;
-	ureg->type = 64;			/* fiction for acid */
+	ureg->type = 64; /* fiction for acid */
 	ureg->dx = (uintptr_t)tos;
 
 	/*
 	 * return the address of kernel/user shared data
 	 * (e.g. clock stuff)
 	 */
-	return UINT2PTR(USTKTOP-sizeof(Tos));
+	return UINT2PTR(USTKTOP - sizeof(Tos));
 }
 
 void
-sysprocsetup(Proc* p)
+sysprocsetup(Proc *p)
 {
 	fpusysprocsetup(p);
 }
 
 void
-sysrforkchild(Proc* child, Proc* parent)
+sysrforkchild(Proc *child, Proc *parent)
 {
 	char *cureg;
 
-	cureg = child->kstack+KSTACK-sizeof(Ureg);
+	cureg = child->kstack + KSTACK - sizeof(Ureg);
 	memmove(cureg, parent->dbgreg, sizeof(Ureg));
 
 	child->sched.sp = PTR2UINT(cureg);

sys/src/9/amd64/tcore.c

@@ -19,7 +19,7 @@
 #include "ureg.h"
 #include "io.h"
 
-Lock nixaclock;	/* NIX AC lock; held while assigning procs to cores */
+Lock nixaclock; /* NIX AC lock; held while assigning procs to cores */
 
 /*
  * NIX support for the time sharing core.
@@ -28,7 +28,7 @@ Lock nixaclock;	/* NIX AC lock; held while assigning procs to cores */
 extern void actrapret(void);
 extern void acsysret(void);
 
-Mach*
+Mach *
 getac(Proc *p, int core)
 {
 	Proc *up = externup();
@@ -53,7 +53,7 @@ getac(Proc *p, int core)
 			error("core is not an AC");
 	Found:
 		mp->proc = p;
-	}else{
+	} else {
 		for(i = 0; i < MACHMAX; i++)
 			if((mp = sys->machptr[i]) != nil && mp->online && mp->NIX.nixtype == NIXAC)
 				if(mp->proc == nil)
@@ -127,7 +127,7 @@ stopac(void)
  */
 
 typedef void (*APfunc)(void);
-extern int notify(Ureg*);
+extern int notify(Ureg *);
 
 /*
  * run an arbitrary function with arbitrary args on an ap core
@@ -143,7 +143,7 @@ runac(Mach *mp, APfunc func, int flushtlb, void *a, int32_t n)
 	Proc *up = externup();
 	uint8_t *dpg, *spg;
 
-	if (n > sizeof(mp->NIX.icc->data))
+	if(n > sizeof(mp->NIX.icc->data))
 		panic("runac: args too long");
 
 	if(mp->online == 0)
@@ -196,8 +196,8 @@ fakeretfromsyscall(Ureg *ureg)
 	Proc *up = externup();
 	int s;
 
-	poperror();	/* as syscall() would do if we would return */
-	if(up->procctl == Proc_tracesyscall){	/* Would this work? */
+	poperror();			       /* as syscall() would do if we would return */
+	if(up->procctl == Proc_tracesyscall) { /* Would this work? */
 		up->procctl = Proc_stopme;
 		s = splhi();
 		procctl(up);
@@ -261,7 +261,7 @@ runacore(void)
 			s = splhi();
 			machp()->MMU.cr2 = up->ac->MMU.cr2;
 			DBG("runacore: trap %llu cr2 %#llx ureg %#p\n",
-				ureg->type, machp()->MMU.cr2, ureg);
+			    ureg->type, machp()->MMU.cr2, ureg);
 			switch(ureg->type){
 			case IdtIPI:
 				if(up->procctl || up->nnote)
@@ -281,7 +281,7 @@ runacore(void)
 				n = up->ac->NIX.icc->note;
 				if(n != nil)
 					postnote(up, 1, n, NDebug);
-				ureg->type = IdtIPI;		/* NOP */
+				ureg->type = IdtIPI; /* NOP */
 				break;
 			default:
 				cr3put(machp()->MMU.pml4->pa);
@@ -300,14 +300,14 @@ runacore(void)
 			break;
 		case ICCSYSCALL:
 			DBG("runacore: syscall ax %#llx ureg %#p\n",
-				ureg->ax, ureg);
+			    ureg->ax, ureg);
 			cr3put(machp()->MMU.pml4->pa);
 			//syscall(ureg->ax, ureg);
 			flush = 1;
 			fn = acsysret;
 			if(0)
-			if(up->nqtrap > 2 || up->nsyscall > 1)
-				goto ToTC;
+				if(up->nqtrap > 2 || up->nsyscall > 1)
+					goto ToTC;
 			if(up->ac == nil)
 				goto ToTC;
 			break;
@@ -330,7 +330,7 @@ ToTC:
 extern ACVctl *acvctl[];
 
 void
-actrapenable(int vno, char* (*f)(Ureg*, void*), void* a, char *name)
+actrapenable(int vno, char *(*f)(Ureg *, void *), void *a, char *name)
 {
 	ACVctl *v;
 
@@ -341,7 +341,7 @@ actrapenable(int vno, char* (*f)(Ureg*, void*), void* a, char *name)
 	v->a = a;
 	v->vno = vno;
 	strncpy(v->name, name, KNAMELEN);
-	v->name[KNAMELEN-1] = 0;
+	v->name[KNAMELEN - 1] = 0;
 
 	if(acvctl[vno])
 		panic("AC traps can't be shared");

sys/src/9/amd64/trap.c

@@ -7,49 +7,49 @@
  * in the LICENSE file.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-
-#include	<tos.h>
-#include	"ureg.h"
-#include	"../port/pmc.h"
-
-#include	"io.h"
-#include	"amd64.h"
-
-extern int notify(Ureg*);
-
-static void debugbpt(Ureg*, void*);
-static void faultamd64(Ureg*, void*);
-static void doublefault(Ureg*, void*);
-static void unexpected(Ureg*, void*);
-static void expected(Ureg*, void*);
-static void dumpstackwithureg(Ureg*);
-extern int bus_irq_setup(Vctl*);
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+
+#include <tos.h>
+#include "ureg.h"
+#include "../port/pmc.h"
+
+#include "io.h"
+#include "amd64.h"
+
+extern int notify(Ureg *);
+
+static void debugbpt(Ureg *, void *);
+static void faultamd64(Ureg *, void *);
+static void doublefault(Ureg *, void *);
+static void unexpected(Ureg *, void *);
+static void expected(Ureg *, void *);
+static void dumpstackwithureg(Ureg *);
+extern int bus_irq_setup(Vctl *);
 
 static Lock vctllock;
 static Vctl *vctl[256];
 
 typedef struct Intrtime Intrtime;
 struct Intrtime {
-	uint64_t	count;
-	uint64_t	cycles;
+	uint64_t count;
+	uint64_t cycles;
 };
 static Intrtime intrtimes[256];
 
-void*
-intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
+void *
+intrenable(int irq, void (*f)(Ureg *, void *), void *a, int tbdf, char *name)
 {
 	int vno;
 	Vctl *v;
 
 	if(f == nil){
 		print("intrenable: nil handler for %d, tbdf %#x for %s\n",
-			irq, tbdf, name);
+		      irq, tbdf, name);
 		return nil;
 	}
 
@@ -59,23 +59,23 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
 	v->Vkey.tbdf = tbdf;
 	v->f = f;
 	v->a = a;
-	strncpy(v->name, name, KNAMELEN-1);
-	v->name[KNAMELEN-1] = 0;
+	strncpy(v->name, name, KNAMELEN - 1);
+	v->name[KNAMELEN - 1] = 0;
 
 	ilock(&vctllock);
 	vno = bus_irq_setup(v);
 	if(vno == -1){
 		iunlock(&vctllock);
 		print("intrenable: couldn't enable irq %d, tbdf %#x for %s\n",
-			irq, tbdf, v->name);
+		      irq, tbdf, v->name);
 		free(v);
 		return nil;
 	}
 	if(vctl[vno]){
 		if(vctl[v->vno]->isr != v->isr || vctl[v->vno]->eoi != v->eoi)
 			panic("intrenable: handler: %s %s %#p %#p %#p %#p",
-				vctl[v->vno]->name, v->name,
-				vctl[v->vno]->isr, v->isr, vctl[v->vno]->eoi, v->eoi);
+			      vctl[v->vno]->name, v->name,
+			      vctl[v->vno]->isr, v->isr, vctl[v->vno]->eoi, v->eoi);
 	}
 	v->vno = vno;
 	v->next = vctl[vno];
@@ -93,7 +93,8 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
 	return v;
 }
 
-int acpiintrenable(Vctl *v)
+int
+acpiintrenable(Vctl *v)
 {
 	int vno;
 	ilock(&vctllock);
@@ -101,15 +102,15 @@ int acpiintrenable(Vctl *v)
 	if(vno == -1){
 		iunlock(&vctllock);
 		print("intrenable: couldn't enable irq %d, tbdf %#x for %s\n",
-			v->Vkey.irq, v->Vkey.tbdf, v->name);
+		      v->Vkey.irq, v->Vkey.tbdf, v->name);
 		free(v);
 		return -1;
 	}
 	if(vctl[vno]){
 		if(vctl[v->vno]->isr != v->isr || vctl[v->vno]->eoi != v->eoi)
 			panic("intrenable: handler: %s %s %#p %#p %#p %#p",
-				vctl[v->vno]->name, v->name,
-				vctl[v->vno]->isr, v->isr, vctl[v->vno]->eoi, v->eoi);
+			      vctl[v->vno]->name, v->name,
+			      vctl[v->vno]->isr, v->isr, vctl[v->vno]->eoi, v->eoi);
 	}
 	v->vno = vno;
 	v->next = vctl[vno];
@@ -123,7 +124,7 @@ int acpiintrenable(Vctl *v)
 }
 
 int
-intrdisable(void* vector)
+intrdisable(void *vector)
 {
 	Vctl *v, *x, **ll;
 	extern int ioapicintrdisable(int);
@@ -132,7 +133,7 @@ intrdisable(void* vector)
 	v = vector;
 	if(v == nil || vctl[v->vno] != v)
 		panic("intrdisable: v %#p", v);
-	for(ll = vctl+v->vno; (x = *ll) != nil; ll = &x->next)
+	for(ll = vctl + v->vno; (x = *ll) != nil; ll = &x->next)
 		if(v == x)
 			break;
 	if(x != v)
@@ -149,14 +150,14 @@ intrdisable(void* vector)
 }
 
 static int32_t
-irqmapread(Chan* c, void *vbuf, int32_t n, int64_t offset)
+irqmapread(Chan *c, void *vbuf, int32_t n, int64_t offset)
 {
 	char *readtodo(void);
 	return readstr(offset, vbuf, n, readtodo());
 }
 
 static int32_t
-irqmapwrite(Chan* c, void *buf, int32_t n, int64_t offset)
+irqmapwrite(Chan *c, void *buf, int32_t n, int64_t offset)
 {
 	int acpiirq(uint32_t tbdf, int irq);
 	int t, b, d, f, irq;
@@ -164,7 +165,7 @@ irqmapwrite(Chan* c, void *buf, int32_t n, int64_t offset)
 	Cmdbuf *cb;
 
 	cb = parsecmd(buf, n);
-	if (cb->nf < nelem(p))
+	if(cb->nf < nelem(p))
 		error("iprqmapwrite t b d f irq");
 	for(int i = 0; i < nelem(p); i++)
 		*p[i] = strtoul(cb->f[i], 0, 0);
@@ -174,7 +175,7 @@ irqmapwrite(Chan* c, void *buf, int32_t n, int64_t offset)
 }
 
 static int32_t
-irqenablewrite(Chan* c, void *vbuf, int32_t n, int64_t offset)
+irqenablewrite(Chan *c, void *vbuf, int32_t n, int64_t offset)
 {
 	void irqenable(void);
 	irqenable();
@@ -182,9 +183,9 @@ irqenablewrite(Chan* c, void *vbuf, int32_t n, int64_t offset)
 }
 
 static int32_t
-irqallocread(Chan* c, void *vbuf, int32_t n, int64_t offset)
+irqallocread(Chan *c, void *vbuf, int32_t n, int64_t offset)
 {
-	char *buf, *p, str[2*(11+1)+2*(20+1)+(KNAMELEN+1)+(8+1)+1];
+	char *buf, *p, str[2 * (11 + 1) + 2 * (20 + 1) + (KNAMELEN + 1) + (8 + 1) + 1];
 	int m, vno;
 	int32_t oldn;
 	Intrtime *t;
@@ -195,17 +196,17 @@ irqallocread(Chan* c, void *vbuf, int32_t n, int64_t offset)
 
 	oldn = n;
 	buf = vbuf;
-	for(vno=0; vno<nelem(vctl); vno++){
-		for(v=vctl[vno]; v; v=v->next){
+	for(vno = 0; vno < nelem(vctl); vno++){
+		for(v = vctl[vno]; v; v = v->next){
 			t = intrtimes + vno;
 			m = snprint(str, sizeof str, "%11d %11d %20llu %20llu %-*.*s %.*s\n",
-				vno, v->Vkey.irq, t->count, t->cycles, 8, 8, v->type, KNAMELEN, v->name);
-			if(m <= offset)	/* if do not want this, skip entry */
+				    vno, v->Vkey.irq, t->count, t->cycles, 8, 8, v->type, KNAMELEN, v->name);
+			if(m <= offset) /* if do not want this, skip entry */
 				offset -= m;
-			else{
+			else {
 				/* skip offset bytes */
 				m -= offset;
-				p = str+offset;
+				p = str + offset;
 				offset = 0;
 
 				/* write at most max(n,m) bytes */
@@ -224,7 +225,7 @@ irqallocread(Chan* c, void *vbuf, int32_t n, int64_t offset)
 }
 
 void
-trapenable(int vno, void (*f)(Ureg*, void*), void* a, char *name)
+trapenable(int vno, void (*f)(Ureg *, void *), void *a, char *name)
 {
 	Vctl *v;
 
@@ -236,7 +237,7 @@ trapenable(int vno, void (*f)(Ureg*, void*), void* a, char *name)
 	v->f = f;
 	v->a = a;
 	strncpy(v->name, name, KNAMELEN);
-	v->name[KNAMELEN-1] = 0;
+	v->name[KNAMELEN - 1] = 0;
 
 	ilock(&vctllock);
 	v->next = vctl[vno];
@@ -252,11 +253,11 @@ nmienable(void)
 	/*
 	 * Hack: should be locked with NVRAM access.
 	 */
-	outb(0x70, 0x80);		/* NMI latch clear */
+	outb(0x70, 0x80); /* NMI latch clear */
 	outb(0x70, 0);
 
-	x = inb(0x61) & 0x07;		/* Enable NMI */
-	outb(0x61, 0x08|x);
+	x = inb(0x61) & 0x07; /* Enable NMI */
+	outb(0x61, 0x08 | x);
 	outb(0x61, x);
 }
 
@@ -282,27 +283,27 @@ trapinit(void)
 	addarchfile("irqenable", 0222, nil, irqenablewrite);
 }
 
-static char* excname[32] = {
-	"#DE",					/* Divide-by-Zero Error */
-	"#DB",					/* Debug */
-	"#NMI",					/* Non-Maskable-Interrupt */
-	"#BP",					/* Breakpoint */
-	"#OF",					/* Overflow */
-	"#BR",					/* Bound-Range */
-	"#UD",					/* Invalid-Opcode */
-	"#NM",					/* Device-Not-Available */
-	"#DF",					/* Double-Fault */
+static char *excname[32] = {
+	"#DE",	/* Divide-by-Zero Error */
+	"#DB",	/* Debug */
+	"#NMI", /* Non-Maskable-Interrupt */
+	"#BP",	/* Breakpoint */
+	"#OF",	/* Overflow */
+	"#BR",	/* Bound-Range */
+	"#UD",	/* Invalid-Opcode */
+	"#NM",	/* Device-Not-Available */
+	"#DF",	/* Double-Fault */
 	"#9 (reserved)",
-	"#TS",					/* Invalid-TSS */
-	"#NP",					/* Segment-Not-Present */
-	"#SS",					/* Stack */
-	"#GP",					/* General-Protection */
-	"#PF",					/* Page-Fault */
+	"#TS", /* Invalid-TSS */
+	"#NP", /* Segment-Not-Present */
+	"#SS", /* Stack */
+	"#GP", /* General-Protection */
+	"#PF", /* Page-Fault */
 	"#15 (reserved)",
-	"#MF",					/* x87 FPE-Pending */
-	"#AC",					/* Alignment-Check */
-	"#MC",					/* Machine-Check */
-	"#XM",					/* SIMD Floating-Point */
+	"#MF", /* x87 FPE-Pending */
+	"#AC", /* Alignment-Check */
+	"#MC", /* Machine-Check */
+	"#XM", /* SIMD Floating-Point */
 	"#20 (reserved)",
 	"#21 (reserved)",
 	"#22 (reserved)",
@@ -347,10 +348,10 @@ void (*_pmcupdate)(Mach *m) = pmcnop;
 
 /* go to user space */
 void
-kexit(Ureg* u)
+kexit(Ureg *u)
 {
- 	Proc *up = externup();
- 	uint64_t t;
+	Proc *up = externup();
+	uint64_t t;
 	Tos *tos;
 	Mach *mp;
 
@@ -358,14 +359,14 @@ kexit(Ureg* u)
 	 * precise time accounting, kernel exit
 	 * initialized in exec, sysproc.c
 	 */
-	tos = (Tos*)(USTKTOP-sizeof(Tos));
+	tos = (Tos *)(USTKTOP - sizeof(Tos));
 	cycles(&t);
 	tos->kcycles += t - up->kentry;
 	tos->pcycles = up->pcycles;
 	// pid was added to TOS at two different times.
 	// TODO: get rid of nixpid.
 	tos->prof.pid = tos->nixpid = up->pid;
-	if (up->ac != nil)
+	if(up->ac != nil)
 		mp = up->ac;
 	else
 		mp = machp();
@@ -387,11 +388,11 @@ kstackok(void)
 	Proc *up = externup();
 
 	if(up == nil){
-		uintptr_t *stk = (uintptr_t*)machp()->stack;
+		uintptr_t *stk = (uintptr_t *)machp()->stack;
 		if(*stk != STACKGUARD)
 			panic("trap: mach %d machstk went through bottom %p\n", machp()->machno, machp()->stack);
 	} else {
-		uintptr_t *stk = (uintptr_t*)up->kstack;
+		uintptr_t *stk = (uintptr_t *)up->kstack;
 		if(*stk != STACKGUARD)
 			panic("trap: proc %d kstack went through bottom %p\n", up->pid, up->kstack);
 	}
@@ -423,7 +424,7 @@ static int lastvno;
  *  Trap is called with interrupts disabled via interrupt-gates.
  */
 void
-trap(Ureg* ureg)
+trap(Ureg *ureg)
 {
 	int clockintr, vno, user;
 	// cache the previous vno to see what might be causing
@@ -432,7 +433,7 @@ trap(Ureg* ureg)
 	uint64_t gsbase = rdmsr(GSbase);
 	//if (sce > scx) iprint("====================");
 	lastvno = vno;
-	if (gsbase < KZERO)
+	if(gsbase < KZERO)
 		die("bogus gsbase");
 	Proc *up = externup();
 	char buf[ERRMAX];
@@ -454,23 +455,25 @@ trap(Ureg* ureg)
 			machp()->intr++;
 			if(vno >= VectorPIC && vno != VectorSYSCALL)
 				machp()->lastintr = ctl->Vkey.irq;
-		}else
-			if(up)
-				up->nqtrap++;
+		} else if(up)
+			up->nqtrap++;
 
 		if(ctl->isr){
 			ctl->isr(vno);
-			if(islo())print("trap %d: isr %p enabled interrupts\n", vno, ctl->isr);
+			if(islo())
+				print("trap %d: isr %p enabled interrupts\n", vno, ctl->isr);
 		}
 		for(v = ctl; v != nil; v = v->next){
 			if(v->f){
 				v->f(ureg, v->a);
-				if(islo())print("trap %d: ctlf %p enabled interrupts\n", vno, v->f);
+				if(islo())
+					print("trap %d: ctlf %p enabled interrupts\n", vno, v->f);
 			}
 		}
 		if(ctl->eoi){
 			ctl->eoi(vno);
-			if(islo())print("trap %d: eoi %p enabled interrupts\n", vno, ctl->eoi);
+			if(islo())
+				print("trap %d: eoi %p enabled interrupts\n", vno, ctl->eoi);
 		}
 
 		intrtime(vno);
@@ -478,19 +481,17 @@ trap(Ureg* ureg)
 			if(ctl->Vkey.irq == IrqCLOCK || ctl->Vkey.irq == IrqTIMER)
 				clockintr = 1;
 
-			if (ctl->Vkey.irq == IrqTIMER)
+			if(ctl->Vkey.irq == IrqTIMER)
 				oprof_alarm_handler(ureg);
 
 			if(up && !clockintr)
 				preempted();
 		}
-	}
-	else if(vno < nelem(excname) && user){
+	} else if(vno < nelem(excname) && user){
 		spllo();
 		snprint(buf, sizeof buf, "sys: trap: %s", excname[vno]);
 		postnote(up, 1, buf, NDebug);
-	}
-	else if(vno >= VectorPIC && vno != VectorSYSCALL){
+	} else if(vno >= VectorPIC && vno != VectorSYSCALL){
 		/*
 		 * An unknown interrupt.
 		 * Check for a default IRQ7. This can happen when
@@ -504,19 +505,19 @@ trap(Ureg* ureg)
 		i8259isr(vno);
 
 		iprint("cpu%d: spurious interrupt %d, last %d\n",
-			machp()->machno, vno, machp()->lastintr);
+		       machp()->machno, vno, machp()->lastintr);
 		intrtime(vno);
 		if(user)
 			kexit(ureg);
 		return;
-	}
-	else{
+	} else {
 		if(vno == VectorNMI){
 			nmienable();
 			if(machp()->machno != 0){
 				iprint("cpu%d: PC %#llx\n",
-					machp()->machno, ureg->ip);
-				for(;;);
+				       machp()->machno, ureg->ip);
+				for(;;)
+					;
 			}
 		}
 		dumpregs(ureg);
@@ -533,19 +534,18 @@ trap(Ureg* ureg)
 	/* delaysched set because we held a lock or because our quantum ended */
 	if(up && up->delaysched && clockintr){
 		if(0)
-		if(user && up->ac == nil && up->nqtrap == 0 && up->nqsyscall == 0){
-			if(!waserror()){
-				up->ac = getac(up, -1);
-				poperror();
-				runacore();
-				return;
+			if(user && up->ac == nil && up->nqtrap == 0 && up->nqsyscall == 0){
+				if(!waserror()){
+					up->ac = getac(up, -1);
+					poperror();
+					runacore();
+					return;
+				}
 			}
-		}
 		sched();
 		splhi();
 	}
 
-
 	if(user){
 		if(up != nil && (up->procctl || up->nnote))
 			notify(ureg);
@@ -557,12 +557,12 @@ trap(Ureg* ureg)
  * Dump general registers.
  */
 void
-dumpgpr(Ureg* ureg)
+dumpgpr(Ureg *ureg)
 {
 	Proc *up = externup();
 	if(up != nil)
 		print("cpu%d: registers for %s %d\n",
-			machp()->machno, up->text, up->pid);
+		      machp()->machno, up->text, up->pid);
 	else
 		print("cpu%d: registers for kernel\n", machp()->machno);
 
@@ -596,7 +596,7 @@ dumpgpr(Ureg* ureg)
 }
 
 void
-dumpregs(Ureg* ureg)
+dumpregs(Ureg *ureg)
 {
 	dumpgpr(ureg);
 
@@ -617,7 +617,7 @@ dumpregs(Ureg* ureg)
  * Used by debugging interface rdb.
  */
 void
-callwithureg(void (*fn)(Ureg*))
+callwithureg(void (*fn)(Ureg *))
 {
 	Ureg ureg;
 	ureg.ip = getcallerpc();
@@ -626,14 +626,14 @@ callwithureg(void (*fn)(Ureg*))
 }
 
 static void
-dumpstackwithureg(Ureg* ureg)
+dumpstackwithureg(Ureg *ureg)
 {
 	Proc *up = externup();
 	uintptr_t l, v, i, estack;
-//	extern char etext;
+	//	extern char etext;
 	int x;
 
-	if (0) { //if((s = getconf("*nodumpstack")) != nil && atoi(s) != 0){
+	if(0) {	       //if((s = getconf("*nodumpstack")) != nil && atoi(s) != 0){
 		iprint("dumpstack disabled\n");
 		return;
 	}
@@ -643,12 +643,12 @@ dumpstackwithureg(Ureg* ureg)
 	x += iprint("ktrace %#p %#p\n", ureg->ip, ureg->sp);
 	i = 0;
 	if(up != nil
-//	&& (uintptr)&l >= (uintptr)up->kstack
-	&& (uintptr_t)&l <= (uintptr_t)up->kstack+KSTACK)
-		estack = (uintptr_t)up->kstack+KSTACK;
-	else if((uintptr_t)&l >= machp()->stack && (uintptr_t)&l <= machp()->stack+MACHSTKSZ)
-		estack = machp()->stack+MACHSTKSZ;
-	else{
+	   //	&& (uintptr)&l >= (uintptr)up->kstack
+	   && (uintptr_t)&l <= (uintptr_t)up->kstack + KSTACK)
+		estack = (uintptr_t)up->kstack + KSTACK;
+	else if((uintptr_t)&l >= machp()->stack && (uintptr_t)&l <= machp()->stack + MACHSTKSZ)
+		estack = machp()->stack + MACHSTKSZ;
+	else {
 		if(up != nil)
 			iprint("&up->kstack %#p &l %#p\n", up->kstack, &l);
 		else
@@ -658,9 +658,8 @@ dumpstackwithureg(Ureg* ureg)
 	x += iprint("estackx %#p\n", estack);
 
 	for(l = (uintptr_t)&l; l < estack; l += sizeof(uintptr_t)){
-		v = *(uintptr_t*)l;
-		if((KTZERO < v && v < (uintptr_t)&etext)
-		|| ((uintptr_t)&l < v && v < estack) || estack-l < 256){
+		v = *(uintptr_t *)l;
+		if((KTZERO < v && v < (uintptr_t)&etext) || ((uintptr_t)&l < v && v < estack) || estack - l < 256){
 			x += iprint("%#16.16p=%#16.16p ", l, v);
 			i++;
 		}
@@ -680,7 +679,7 @@ dumpstack(void)
 }
 
 static void
-debugbpt(Ureg* ureg, void* v)
+debugbpt(Ureg *ureg, void *v)
 {
 	Proc *up = externup();
 	char buf[ERRMAX];
@@ -694,25 +693,25 @@ debugbpt(Ureg* ureg, void* v)
 }
 
 static void
-doublefault(Ureg* ureg, void* v)
+doublefault(Ureg *ureg, void *v)
 {
 	iprint("cr2 %p\n", (void *)cr2get());
 	panic("double fault");
 }
 
 static void
-unexpected(Ureg* ureg, void* v)
+unexpected(Ureg *ureg, void *v)
 {
 	iprint("unexpected trap %llu; ignoring\n", ureg->type);
 }
 
 static void
-expected(Ureg* ureg, void* v)
+expected(Ureg *ureg, void *v)
 {
 }
 
 static void
-faultamd64(Ureg* ureg, void* v)
+faultamd64(Ureg *ureg, void *v)
 {
 	Proc *up = externup();
 	uint64_t addr;
@@ -731,14 +730,16 @@ faultamd64(Ureg* ureg, void* v)
 	 */
 	if(up == nil){
 		panic("fault with up == nil; pc %#llx addr %#llx\n",
-			ureg->ip, addr);
+		      ureg->ip, addr);
 	}
 
-	ftype = (ureg->error&2) ? FT_WRITE : (ureg->error&16) ? FT_EXEC : FT_READ;
+	ftype = (ureg->error & 2) ? FT_WRITE : (ureg->error & 16) ? FT_EXEC
+								  : FT_READ;
 
 	insyscall = up->insyscall;
 	up->insyscall = 1;
-	if (0)hi("call fault\n");
+	if(0)
+		hi("call fault\n");
 
 	if(fault(addr, ureg->ip, ftype) < 0){
 		/*
@@ -757,7 +758,7 @@ faultamd64(Ureg* ureg, void* v)
 			panic("fault: %#llx\n", addr);
 		}
 		sprint(buf, "sys: trap: fault %s addr=%#llx",
-			faulttypes[ftype], addr);
+		       faulttypes[ftype], addr);
 		postnote(up, 1, buf, NDebug);
 		if(insyscall)
 			error(buf);
@@ -769,7 +770,7 @@ faultamd64(Ureg* ureg, void* v)
  *  return the userpc the last exception happened at
  */
 uintptr_t
-userpc(Ureg* ureg)
+userpc(Ureg *ureg)
 {
 	Proc *up = externup();
 	if(ureg == nil)
@@ -782,7 +783,7 @@ userpc(Ureg* ureg)
  * TODO: fix this because the segment registers are wrong for 64-bit mode.
  */
 void
-setregisters(Ureg* ureg, char* pureg, char* uva, int n)
+setregisters(Ureg *ureg, char *pureg, char *uva, int n)
 {
 	uint64_t cs, flags, ss;
 
@@ -799,10 +800,10 @@ setregisters(Ureg* ureg, char* pureg, char* uva, int n)
  * a sleeping process
  */
 void
-setkernur(Ureg* ureg, Proc* p)
+setkernur(Ureg *ureg, Proc *p)
 {
 	ureg->ip = p->sched.pc;
-	ureg->sp = p->sched.sp+BY2SE;
+	ureg->sp = p->sched.sp + BY2SE;
 }
 
 uintptr_t

sys/src/9/amd64/usbehci.h

@@ -8,14 +8,22 @@
  */
 
 /* override default macros from ../port/usb.h */
-#undef	dprint
-#undef	ddprint
-#undef	deprint
-#undef	ddeprint
-#define dprint		if(ehcidebug)print
-#define ddprint		if(ehcidebug>1)print
-#define deprint		if(ehcidebug || ep->debug)print
-#define ddeprint	if(ehcidebug>1 || ep->debug>1)print
+#undef dprint
+#undef ddprint
+#undef deprint
+#undef ddeprint
+#define dprint        \
+	if(ehcidebug) \
+	print
+#define ddprint           \
+	if(ehcidebug > 1) \
+	print
+#define deprint                    \
+	if(ehcidebug || ep->debug) \
+	print
+#define ddeprint                           \
+	if(ehcidebug > 1 || ep->debug > 1) \
+	print
 
 typedef struct Ctlr Ctlr;
 typedef struct Ecapio Ecapio;
@@ -38,118 +46,117 @@ typedef struct Qtree Qtree;
 /*
  * EHCI interface registers and bits
  */
-enum
-{
+enum {
 #ifdef WTF
 	/* Ecapio->parms reg. */
-	Cnports		= 0xF,		/* nport bits */
-	Cdbgportshift	= 20,		/* debug port */
-	Cdbgportmask	= 0xF,
+	Cnports = 0xF,	    /* nport bits */
+	Cdbgportshift = 20, /* debug port */
+	Cdbgportmask = 0xF,
 
 	/* Ecapio->capparms bits */
-	C64		= 1<<0,		/* 64-bits */
-	Cpfl		= 1<<1,	/* program'ble frame list: can be <1024 */
-	Casp		= 1<<2,		/* asynch. sched. park */
-	Ceecpshift	= 8,		/* extended capabilities ptr. */
-	Ceecpmask	= (1<<8) - 1,
+	C64 = 1 << 0,	/* 64-bits */
+	Cpfl = 1 << 1,	/* program'ble frame list: can be <1024 */
+	Casp = 1 << 2,	/* asynch. sched. park */
+	Ceecpshift = 8, /* extended capabilities ptr. */
+	Ceecpmask = (1 << 8) - 1,
 
-	Clegacy		= 1,		/* legacy support cap. id */
-	CLbiossem	= 2,		/* legacy cap. bios sem. */
-	CLossem		= 3,		/* legacy cap. os sem */
-	CLcontrol	= 4,		/* legacy support control & status */
+	Clegacy = 1,   /* legacy support cap. id */
+	CLbiossem = 2, /* legacy cap. bios sem. */
+	CLossem = 3,   /* legacy cap. os sem */
+	CLcontrol = 4, /* legacy support control & status */
 
 	/* typed links  */
-	Lterm		= 1,
-	Litd		= 0<<1,
-	Lqh		= 1<<1,
-	Lsitd		= 2<<1,
-	Lfstn		= 3<<1,		/* we don't use these */
+	Lterm = 1,
+	Litd = 0 << 1,
+	Lqh = 1 << 1,
+	Lsitd = 2 << 1,
+	Lfstn = 3 << 1, /* we don't use these */
 
 	/* Cmd reg. */
-	Cstop		= 0x00000,	/* stop running */
-	Crun		= 0x00001,	/* start operation */
-	Chcreset	= 0x00002,	/* host controller reset */
-	Cflsmask	= 0x0000C,	/* frame list size bits */
-	Cfls1024	= 0x00000,	/* frame list size 1024 */
-	Cfls512		= 0x00004,	/* frame list size 512 frames */
-	Cfls256		= 0x00008,	/* frame list size 256 frames */
-	Cpse		= 0x00010,	/* periodic sched. enable */
-	Case		= 0x00020,	/* async sched. enable */
-	Ciasync		= 0x00040,	/* interrupt on async advance doorbell */
-	Citcmask	= 0xff << 16,
+	Cstop = 0x00000,    /* stop running */
+	Crun = 0x00001,	    /* start operation */
+	Chcreset = 0x00002, /* host controller reset */
+	Cflsmask = 0x0000C, /* frame list size bits */
+	Cfls1024 = 0x00000, /* frame list size 1024 */
+	Cfls512 = 0x00004,  /* frame list size 512 frames */
+	Cfls256 = 0x00008,  /* frame list size 256 frames */
+	Cpse = 0x00010,	    /* periodic sched. enable */
+	Case = 0x00020,	    /* async sched. enable */
+	Ciasync = 0x00040,  /* interrupt on async advance doorbell */
+	Citcmask = 0xff << 16,
 #endif
-	Citc1		= 0x10000,	/* interrupt threshold ctl. 1 µframe */
-	Citc4		= 0x40000,	/* same. 2 µframes */
+	Citc1 = 0x10000, /* interrupt threshold ctl. 1 µframe */
+	Citc4 = 0x40000, /* same. 2 µframes */
 	/* ... */
-	Citc8		= 0x80000,	/* same. 8 µframes (can go up to 64) */
+	Citc8 = 0x80000, /* same. 8 µframes (can go up to 64) */
 #ifdef WTF
 	/* Sts reg. */
-	Sasyncss	= 0x08000,	/* aync schedule status */
-	Speriodss	= 0x04000,	/* periodic schedule status */
-	Srecl		= 0x02000,	/* reclamnation (empty async sched.) */
-	Shalted		= 0x01000,	/* h.c. is halted */
-	Sasync		= 0x00020,	/* interrupt on async advance */
-	Sherr		= 0x00010,	/* host system error */
-	Sfrroll		= 0x00008,	/* frame list roll over */
-	Sportchg	= 0x00004,	/* port change detect */
-	Serrintr	= 0x00002,		/* error interrupt */
-	Sintr		= 0x00001,	/* interrupt */
-	Sintrs		= 0x0003F,	/* interrupts status */
+	Sasyncss = 0x08000,  /* aync schedule status */
+	Speriodss = 0x04000, /* periodic schedule status */
+	Srecl = 0x02000,     /* reclamnation (empty async sched.) */
+	Shalted = 0x01000,   /* h.c. is halted */
+	Sasync = 0x00020,    /* interrupt on async advance */
+	Sherr = 0x00010,     /* host system error */
+	Sfrroll = 0x00008,   /* frame list roll over */
+	Sportchg = 0x00004,  /* port change detect */
+	Serrintr = 0x00002,  /* error interrupt */
+	Sintr = 0x00001,     /* interrupt */
+	Sintrs = 0x0003F,    /* interrupts status */
 
 	/* Intr reg. */
-	Iusb		= 0x01,		/* intr. on usb */
-	Ierr		= 0x02,		/* intr. on usb error */
-	Iportchg	= 0x04,		/* intr. on port change */
-	Ifrroll		= 0x08,		/* intr. on frlist roll over */
-	Ihcerr		= 0x10,		/* intr. on host error */
-	Iasync		= 0x20,		/* intr. on async advance enable */
-	Iall		= 0x3F,		/* all interrupts */
+	Iusb = 0x01,	 /* intr. on usb */
+	Ierr = 0x02,	 /* intr. on usb error */
+	Iportchg = 0x04, /* intr. on port change */
+	Ifrroll = 0x08,	 /* intr. on frlist roll over */
+	Ihcerr = 0x10,	 /* intr. on host error */
+	Iasync = 0x20,	 /* intr. on async advance enable */
+	Iall = 0x3F,	 /* all interrupts */
 
 	/* Config reg. */
-	Callmine	= 1,		/* route all ports to us */
+	Callmine = 1, /* route all ports to us */
 
 	/* Portsc reg. */
-	Pspresent	= 0x00000001,	/* device present */
-	Psstatuschg	= 0x00000002,	/* Pspresent changed */
-	Psenable	= 0x00000004,	/* device enabled */
-	Pschange	= 0x00000008,	/* Psenable changed */
-	Psresume	= 0x00000040,	/* resume detected */
-	Pssuspend	= 0x00000080,	/* port suspended */
-	Psreset		= 0x00000100,	/* port reset */
-	Pspower		= 0x00001000,	/* port power on */
-	Psowner		= 0x00002000,	/* port owned by companion */
-	Pslinemask	= 0x00000C00,	/* line status bits */
-	Pslow		= 0x00000400,	/* low speed device */
+	Pspresent = 0x00000001,	  /* device present */
+	Psstatuschg = 0x00000002, /* Pspresent changed */
+	Psenable = 0x00000004,	  /* device enabled */
+	Pschange = 0x00000008,	  /* Psenable changed */
+	Psresume = 0x00000040,	  /* resume detected */
+	Pssuspend = 0x00000080,	  /* port suspended */
+	Psreset = 0x00000100,	  /* port reset */
+	Pspower = 0x00001000,	  /* port power on */
+	Psowner = 0x00002000,	  /* port owned by companion */
+	Pslinemask = 0x00000C00,  /* line status bits */
+	Pslow = 0x00000400,	  /* low speed device */
 
 	/* Debug port csw reg. */
-	Cowner	= 0x40000000,		/* port owned by ehci */
-	Cenable	= 0x10000000,		/* debug port enabled */
-	Cdone	= 0x00010000,		/* request is done */
-	Cbusy	= 0x00000400,		/* port in use by a driver */
-	Cerrmask= 0x00000380,		/* error code bits */
-	Chwerr	= 0x00000100,		/* hardware error */
-	Cterr	= 0x00000080,		/* transaction error */
-	Cfailed	= 0x00000040,		/* transaction did fail */
-	Cgo	= 0x00000020,		/* execute the transaction */
-	Cwrite	= 0x00000010,		/* request is a write */
-	Clen	= 0x0000000F,		/* data len */
+	Cowner = 0x40000000,   /* port owned by ehci */
+	Cenable = 0x10000000,  /* debug port enabled */
+	Cdone = 0x00010000,    /* request is done */
+	Cbusy = 0x00000400,    /* port in use by a driver */
+	Cerrmask = 0x00000380, /* error code bits */
+	Chwerr = 0x00000100,   /* hardware error */
+	Cterr = 0x00000080,    /* transaction error */
+	Cfailed = 0x00000040,  /* transaction did fail */
+	Cgo = 0x00000020,      /* execute the transaction */
+	Cwrite = 0x00000010,   /* request is a write */
+	Clen = 0x0000000F,     /* data len */
 
 	/* Debug port pid reg. */
-	Prpidshift	= 16,		/* received pid */
-	Prpidmask	= 0xFF,
-	Pspidshift	= 8,		/* sent pid */
-	Pspidmask	= 0xFF,
-	Ptokshift	= 0,		/* token pid */
-	Ptokmask	= 0xFF,
+	Prpidshift = 16, /* received pid */
+	Prpidmask = 0xFF,
+	Pspidshift = 8, /* sent pid */
+	Pspidmask = 0xFF,
+	Ptokshift = 0, /* token pid */
+	Ptokmask = 0xFF,
 
-	Ptoggle		= 0x00008800,	/* to update toggles */
-	Ptogglemask	= 0x0000FF00,
+	Ptoggle = 0x00008800, /* to update toggles */
+	Ptogglemask = 0x0000FF00,
 
 	/* Debug port addr reg. */
-	Adevshift	= 8,		/* device address */
-	Adevmask	= 0x7F,
-	Aepshift	= 0,		/* endpoint number */
-	Aepmask		= 0xF,
+	Adevshift = 8, /* device address */
+	Adevmask = 0x7F,
+	Aepshift = 0, /* endpoint number */
+	Aepmask = 0xF,
 #endif
 };
 
@@ -157,59 +164,55 @@ enum
 /*
  * Capability registers (hw)
  */
-struct Ecapio
-{
-	uint32_t	cap;		/* 00 controller capability register */
-	uint32_t	parms;		/* 04 structural parameters register */
-	uint32_t	capparms;	/* 08 capability parameters */
-	uint32_t	portroute;	/* 0c not on the CS5536 */
+struct Ecapio {
+	uint32_t cap;	    /* 00 controller capability register */
+	uint32_t parms;	    /* 04 structural parameters register */
+	uint32_t capparms;  /* 08 capability parameters */
+	uint32_t portroute; /* 0c not on the CS5536 */
 };
 
 /*
  * Debug port registers (hw)
  */
-struct Edbgio
-{
-	uint32_t	csw;		/* control and status */
-	uint32_t	pid;		/* USB pid */
-	unsigned char	data[8];	/* data buffer */
-	uint32_t	addr;		/* device and endpoint addresses */
+struct Edbgio {
+	uint32_t csw;	       /* control and status */
+	uint32_t pid;	       /* USB pid */
+	unsigned char data[8]; /* data buffer */
+	uint32_t addr;	       /* device and endpoint addresses */
 };
 #endif
 
-struct Poll
-{
+struct Poll {
 	Lock l;
 	Rendez rend;
-	int	must;
-	int	does;
+	int must;
+	int does;
 };
 
-struct Ctlr
-{
-	Rendez rend;                 /* for waiting to async advance doorbell */
-	Lock l;			/* for ilock. qh lists and basic ctlr I/O */
-	QLock	portlck;	/* for port resets/enable... (and doorbell) */
-	int	active;		/* in use or not */
-	Pcidev*	pcidev;
-	Ecapio*	capio;		/* Capability i/o regs */
-	Eopio*	opio;		/* Operational i/o regs */
-
-	int	nframes;	/* 1024, 512, or 256 frames in the list */
-	uint32_t*	frames;		/* periodic frame list (hw) */
-	Qh*	qhs;		/* async Qh circular list for bulk/ctl */
-	Qtree*	tree;		/* tree of Qhs for the periodic list */
-	int	ntree;		/* number of dummy qhs in tree */
-	Qh*	intrqhs;		/* list of (not dummy) qhs in tree  */
-	Isoio*	iso;		/* list of active Iso I/O */
-	uint32_t	load;
-	uint32_t	isoload;
-	int	nintr;		/* number of interrupts attended */
-	int	ntdintr;	/* number of intrs. with something to do */
-	int	nqhintr;	/* number of async td intrs. */
-	int	nisointr;	/* number of periodic td intrs. */
-	int	nreqs;
-	Poll	poll;
+struct Ctlr {
+	Rendez rend;   /* for waiting to async advance doorbell */
+	Lock l;	       /* for ilock. qh lists and basic ctlr I/O */
+	QLock portlck; /* for port resets/enable... (and doorbell) */
+	int active;    /* in use or not */
+	Pcidev *pcidev;
+	Ecapio *capio; /* Capability i/o regs */
+	Eopio *opio;   /* Operational i/o regs */
+
+	int nframes;	  /* 1024, 512, or 256 frames in the list */
+	uint32_t *frames; /* periodic frame list (hw) */
+	Qh *qhs;	  /* async Qh circular list for bulk/ctl */
+	Qtree *tree;	  /* tree of Qhs for the periodic list */
+	int ntree;	  /* number of dummy qhs in tree */
+	Qh *intrqhs;	  /* list of (not dummy) qhs in tree  */
+	Isoio *iso;	  /* list of active Iso I/O */
+	uint32_t load;
+	uint32_t isoload;
+	int nintr;    /* number of interrupts attended */
+	int ntdintr;  /* number of intrs. with something to do */
+	int nqhintr;  /* number of async td intrs. */
+	int nisointr; /* number of periodic td intrs. */
+	int nreqs;
+	Poll poll;
 };
 
 /*
@@ -219,24 +222,23 @@ struct Ctlr
 /*
  * Operational registers (hw)
  */
-struct Eopio
-{
-	uint32_t	cmd;		/* 00 command */
-	uint32_t	sts;		/* 04 status */
-	uint32_t	intr;		/* 08 interrupt enable */
-	uint32_t	frno;		/* 0c frame index */
-	uint32_t	seg;		/* 10 bits 63:32 of EHCI datastructs (unused) */
-	uint32_t	frbase;		/* 14 frame list base addr, 4096-byte boundary */
-	uint32_t	link;		/* 18 link for async list */
-	unsigned char	d2c[0x40-0x1c];	/* 1c dummy */
-	uint32_t	config;		/* 40 1: all ports default-routed to this HC */
-	uint32_t	portsc[1];	/* 44 Port status and control, one per port */
+struct Eopio {
+	uint32_t cmd;			/* 00 command */
+	uint32_t sts;			/* 04 status */
+	uint32_t intr;			/* 08 interrupt enable */
+	uint32_t frno;			/* 0c frame index */
+	uint32_t seg;			/* 10 bits 63:32 of EHCI datastructs (unused) */
+	uint32_t frbase;		/* 14 frame list base addr, 4096-byte boundary */
+	uint32_t link;			/* 18 link for async list */
+	unsigned char d2c[0x40 - 0x1c]; /* 1c dummy */
+	uint32_t config;		/* 40 1: all ports default-routed to this HC */
+	uint32_t portsc[1];		/* 44 Port status and control, one per port */
 };
 
 extern int ehcidebug;
 extern Ecapio *ehcidebugcapio;
 extern int ehcidebugport;
 
-void	ehcilinkage(Hci *hp);
-void	ehcimeminit(Ctlr *ctlr);
-void	ehcirun(Ctlr *ctlr, int on);
+void ehcilinkage(Hci *hp);
+void ehcimeminit(Ctlr *ctlr);
+void ehcirun(Ctlr *ctlr, int on);

sys/src/9/amd64/usbehcipc.c

@@ -13,44 +13,44 @@
  * High speed USB 2.0.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"io.h"
-#include	"../port/error.h"
-#include	"../port/usb.h"
-#include	"../port/portusbehci.h"
-#include	"usbehci.h"
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+#include "../port/error.h"
+#include "../port/usb.h"
+#include "../port/portusbehci.h"
+#include "usbehci.h"
 
-static Ctlr* ctlrs[Nhcis];
+static Ctlr *ctlrs[Nhcis];
 
 /* Isn't this cap list search in a helper function? */
 static void
-getehci(Ctlr* ctlr)
+getehci(Ctlr *ctlr)
 {
 	int i, ptr, cap, sem;
 
 	ptr = (ctlr->capio->capparms >> Ceecpshift) & Ceecpmask;
-	for(; ptr != 0; ptr = pcicfgr8(ctlr->pcidev, ptr+1)){
+	for(; ptr != 0; ptr = pcicfgr8(ctlr->pcidev, ptr + 1)){
 		if(ptr < 0x40 || (ptr & ~0xFC))
 			break;
 		cap = pcicfgr8(ctlr->pcidev, ptr);
 		if(cap != Clegacy)
 			continue;
-		sem = pcicfgr8(ctlr->pcidev, ptr+CLbiossem);
+		sem = pcicfgr8(ctlr->pcidev, ptr + CLbiossem);
 		if(sem == 0)
 			continue;
-		pcicfgw8(ctlr->pcidev, ptr+CLossem, 1);
+		pcicfgw8(ctlr->pcidev, ptr + CLossem, 1);
 		for(i = 0; i < 100; i++){
-			if(pcicfgr8(ctlr->pcidev, ptr+CLbiossem) == 0)
+			if(pcicfgr8(ctlr->pcidev, ptr + CLbiossem) == 0)
 				break;
 			delay(10);
 		}
 		if(i == 100)
 			dprint("ehci %#p: bios timed out\n", ctlr->capio);
-		pcicfgw32(ctlr->pcidev, ptr+CLcontrol, 0);	/* no SMIs */
+		pcicfgw32(ctlr->pcidev, ptr + CLcontrol, 0); /* no SMIs */
 		ctlr->opio->config = 0;
 		coherence();
 		return;
@@ -89,7 +89,7 @@ ehcireset(Ctlr *ctlr)
 	}
 
 	if(ehcidebugcapio != ctlr->capio){
-		opio->cmd |= Chcreset;	/* controller reset */
+		opio->cmd |= Chcreset; /* controller reset */
 		coherence();
 		for(i = 0; i < 100; i++){
 			if((opio->cmd & Chcreset) == 0)
@@ -102,7 +102,7 @@ ehcireset(Ctlr *ctlr)
 
 	/* requesting more interrupts per µframe may miss interrupts */
 	opio->cmd &= ~Citcmask;
-	opio->cmd |= 1 << Citcshift;		/* max of 1 intr. per 125 µs */
+	opio->cmd |= 1 << Citcshift; /* max of 1 intr. per 125 µs */
 	coherence();
 	switch(opio->cmd & Cflsmask){
 	case Cfls1024:
@@ -137,7 +137,7 @@ shutdown(Hci *hp)
 	ctlr = hp->Hciimpl.aux;
 	ilock(&ctlr->l);
 	opio = ctlr->opio;
-	opio->cmd |= Chcreset;		/* controller reset */
+	opio->cmd |= Chcreset; /* controller reset */
 	coherence();
 	for(i = 0; i < 100; i++){
 		if((opio->cmd & Chcreset) == 0)
@@ -166,7 +166,7 @@ scanpci(void)
 		return;
 	already = 1;
 	p = nil;
-	while ((p = pcimatch(p, 0, 0)) != nil) {
+	while((p = pcimatch(p, 0, 0)) != nil){
 		/*
 		 * Find EHCI controllers (Programming Interface = 0x20).
 		 */
@@ -179,29 +179,29 @@ scanpci(void)
 		default:
 			continue;
 		}
-		//if(0 && p->vid == Vintel && p->did == 0x3b34) {
+		//if(0 && p->vid == Vintel && p->did == 0x3b34){
 		//	print("usbehci: ignoring known bad ctlr %#x/%#x\n",
 		//		p->vid, p->did);
 		//	continue;
 		//}
 		if(io == 0){
 			print("usbehci: %x %x: failed to map registers\n",
-				p->vid, p->did);
+			      p->vid, p->did);
 			continue;
 		}
-		if(p->intl == 0xff || p->intl == 0) {
+		if(p->intl == 0xff || p->intl == 0){
 			print("usbehci: no irq assigned for port %#lx\n", io);
 			continue;
 		}
 		dprint("usbehci: %#x %#x: port %#lx size %#x irq %d\n",
-			p->vid, p->did, io, p->mem[0].size, p->intl);
+		       p->vid, p->did, io, p->mem[0].size, p->intl);
 
 		ctlr = malloc(sizeof(Ctlr));
-		if (ctlr == nil)
+		if(ctlr == nil)
 			panic("usbehci: out of memory");
 		ctlr->pcidev = p;
 		capio = ctlr->capio = vmap(io, p->mem[0].size);
-		ctlr->opio = (Eopio*)((uintptr)capio + (capio->cap & 0xff));
+		ctlr->opio = (Eopio *)((uintptr)capio + (capio->cap & 0xff));
 		pcisetbme(p);
 		pcisetpms(p, 0);
 		for(i = 0; i < Nhcis; i++)
@@ -211,7 +211,6 @@ scanpci(void)
 			}
 		if(i >= Nhcis)
 			print("ehci: bug: more than %d controllers\n", Nhcis);
-
 	}
 }
 
@@ -236,10 +235,10 @@ reset(Hci *hp)
 	for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
 		ctlr = ctlrs[i];
 		if(ctlr->active == 0)
-		if(hp->ISAConf.port == 0 || hp->ISAConf.port == (uintptr)ctlr->capio){
-			ctlr->active = 1;
-			break;
-		}
+			if(hp->ISAConf.port == 0 || hp->ISAConf.port == (uintptr)ctlr->capio){
+				ctlr->active = 1;
+				break;
+			}
 	}
 	iunlock(&resetlck);
 	if(i >= Nhcis || ctlrs[i] == nil)

sys/src/9/amd64/vga.c

@@ -15,13 +15,13 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
 #include "screen.h"
 
-static Memimage* back;
+static Memimage *back;
 static Memimage *conscol;
 
 static Point curpos;
@@ -35,18 +35,18 @@ void
 vgaimageinit(uint32_t chan)
 {
 	if(back == nil){
-		back = allocmemimage(Rect(0,0,1,1), chan);	/* RSC BUG */
+		back = allocmemimage(Rect(0, 0, 1, 1), chan); /* RSC BUG */
 		if(back == nil)
-			panic("back alloc");		/* RSC BUG */
+			panic("back alloc"); /* RSC BUG */
 		back->flags |= Frepl;
 		back->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 		memfillcolor(back, DBlack);
 	}
 
 	if(conscol == nil){
-		conscol = allocmemimage(Rect(0,0,1,1), chan);	/* RSC BUG */
+		conscol = allocmemimage(Rect(0, 0, 1, 1), chan); /* RSC BUG */
 		if(conscol == nil)
-			panic("conscol alloc");	/* RSC BUG */
+			panic("conscol alloc"); /* RSC BUG */
 		conscol->flags |= Frepl;
 		conscol->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 		memfillcolor(conscol, DWhite);
@@ -54,39 +54,39 @@ vgaimageinit(uint32_t chan)
 }
 
 static void
-vgascroll(VGAscr* scr)
+vgascroll(VGAscr *scr)
 {
 	int h, o;
 	Point p;
 	Rectangle r;
 
 	h = scr->memdefont->height;
-	o = 8*h;
-	r = Rpt(window.min, Pt(window.max.x, window.max.y-o));
-	p = Pt(window.min.x, window.min.y+o);
+	o = 8 * h;
+	r = Rpt(window.min, Pt(window.max.x, window.max.y - o));
+	p = Pt(window.min.x, window.min.y + o);
 	memimagedraw(scr->gscreen, r, scr->gscreen, p, nil, p, S);
-	r = Rpt(Pt(window.min.x, window.max.y-o), window.max);
+	r = Rpt(Pt(window.min.x, window.max.y - o), window.max);
 	memimagedraw(scr->gscreen, r, back, ZP, nil, ZP, S);
 
 	curpos.y -= o;
 }
 
 static void
-vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
+vgascreenputc(VGAscr *scr, char *buf, Rectangle *flushr)
 {
 	Point p;
 	int h, w, pos;
 	Rectangle r;
 
-//	drawdebug = 1;
-	if(xp < xbuf || xp >= &xbuf[nelem(xbuf)-1])
+	//	drawdebug = 1;
+	if(xp < xbuf || xp >= &xbuf[nelem(xbuf) - 1])
 		xp = xbuf;
 
 	h = scr->memdefont->height;
 	switch(buf[0]){
 
 	case '\n':
-		if(curpos.y+h >= window.max.y){
+		if(curpos.y + h >= window.max.y){
 			vgascroll(scr);
 			*flushr = window;
 		}
@@ -102,22 +102,22 @@ vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
 	case '\t':
 		p = memsubfontwidth(scr->memdefont, " ");
 		w = p.x;
-		if(curpos.x >= window.max.x-4*w)
+		if(curpos.x >= window.max.x - 4 * w)
 			vgascreenputc(scr, "\n", flushr);
 
-		pos = (curpos.x-window.min.x)/w;
-		pos = 4-(pos%4);
+		pos = (curpos.x - window.min.x) / w;
+		pos = 4 - (pos % 4);
 		*xp++ = curpos.x;
-		r = Rect(curpos.x, curpos.y, curpos.x+pos*w, curpos.y + h);
+		r = Rect(curpos.x, curpos.y, curpos.x + pos * w, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
-		curpos.x += pos*w;
+		curpos.x += pos * w;
 		break;
 
 	case '\b':
 		if(xp <= xbuf)
 			break;
 		xp--;
-		r = Rect(*xp, curpos.y, curpos.x, curpos.y+h);
+		r = Rect(*xp, curpos.y, curpos.x, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, ZP, S);
 		combinerect(flushr, r);
 		curpos.x = *xp;
@@ -130,21 +130,21 @@ vgascreenputc(VGAscr* scr, char* buf, Rectangle *flushr)
 		p = memsubfontwidth(scr->memdefont, buf);
 		w = p.x;
 
-		if(curpos.x >= window.max.x-w)
+		if(curpos.x >= window.max.x - w)
 			vgascreenputc(scr, "\n", flushr);
 
 		*xp++ = curpos.x;
-		r = Rect(curpos.x, curpos.y, curpos.x+w, curpos.y+h);
+		r = Rect(curpos.x, curpos.y, curpos.x + w, curpos.y + h);
 		memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
 		memimagestring(scr->gscreen, curpos, conscol, ZP, scr->memdefont, buf);
 		combinerect(flushr, r);
 		curpos.x += w;
 	}
-//	drawdebug = 0;
+	//	drawdebug = 0;
 }
 
 static void
-vgascreenputs(char* s, int n)
+vgascreenputs(char *s, int n)
 {
 	int i, gotdraw;
 	Rune r;
@@ -161,8 +161,7 @@ vgascreenputs(char* s, int n)
 		 */
 		if(!canlock(&vgascreenlock))
 			return;
-	}
-	else
+	} else
 		lock(&vgascreenlock);
 
 	/*
@@ -194,35 +193,35 @@ vgascreenputs(char* s, int n)
 }
 
 void
-vgascreenwin(VGAscr* scr)
+vgascreenwin(VGAscr *scr)
 {
 	int h, w;
 
-	if (! scr)
+	if(!scr)
 		error("vgascreenwin: no scr");
 
-	if (! scr->memdefont)
+	if(!scr->memdefont)
 		error("vgascreenwin: no scr->memdefont");
 
-	if (! scr->memdefont->info)
+	if(!scr->memdefont->info)
 		error("vgascreenwin: no memdefont info");
 
 	h = scr->memdefont->height;
 
-	if (h == 0){
+	if(h == 0){
 		print("vgascreenwin: height is 0");
 		error("vgascreenwin: height is 0");
 	}
 
 	w = scr->memdefont->info[' '].width;
-	if (w == 0){
+	if(w == 0){
 		error("vgascreenwin: width is 0");
 		print("vgascreenwin: width is 0");
 	}
 
 	window = insetrect(scr->gscreen->r, 48);
-	window.max.x = window.min.x+((window.max.x-window.min.x)/w)*w;
-	window.max.y = window.min.y+((window.max.y-window.min.y)/h)*h;
+	window.max.x = window.min.x + ((window.max.x - window.min.x) / w) * w;
+	window.max.y = window.min.y + ((window.max.y - window.min.y) / h) * h;
 	curpos = window.min;
 
 	consputs = vgascreenputs;
@@ -239,7 +238,7 @@ vgablank(VGAscr *scr, int blank)
 {
 	unsigned char seq1, crtc17;
 
-	if(blank) {
+	if(blank){
 		seq1 = 0x00;
 		crtc17 = 0x80;
 	} else {
@@ -247,13 +246,13 @@ vgablank(VGAscr *scr, int blank)
 		crtc17 = 0x00;
 	}
 
-	outs(Seqx, 0x0100);			/* synchronous reset */
+	outs(Seqx, 0x0100); /* synchronous reset */
 	seq1 |= vgaxi(Seqx, 1) & ~0x20;
 	vgaxo(Seqx, 1, seq1);
 	crtc17 |= vgaxi(Crtx, 0x17) & ~0x80;
 	delay(10);
 	vgaxo(Crtx, 0x17, crtc17);
-	outs(Crtx, 0x0300);				/* end synchronous reset */
+	outs(Crtx, 0x0300); /* end synchronous reset */
 }
 
 void
@@ -266,7 +265,7 @@ addvgaseg(char *name, uint32_t pa, uint32_t size)
 	seg.name = name;
 	seg.pa = pa;
 	seg.size = size;
-	seg.pgszi = -1;		// Default page size
+	seg.pgszi = -1;	       // Default page size
 	addphysseg(&seg);
 }
 
@@ -288,5 +287,5 @@ cornerstring(char *s)
 	r = Rect(0, 0, w, h);
 	memimagedraw(scr->gscreen, r, back, back->r.min, nil, back->r.min, S);
 	memimagestring(scr->gscreen, r.min, conscol, ZP, scr->memdefont, s);
-//	flushmemscreen(r);
+	//	flushmemscreen(r);
 }

sys/src/9/amd64/vgax.c

@@ -15,13 +15,13 @@
 #include "io.h"
 #include "../port/error.h"
 
-#define	Image	IMAGE
+#define Image IMAGE
 #include <draw.h>
 #include <memdraw.h>
 #include <cursor.h>
 #include "screen.h"
 
-static Lock vgaxlock;			/* access to index registers */
+static Lock vgaxlock; /* access to index registers */
 
 int
 vgaxi(int32_t port, unsigned char index)
@@ -35,7 +35,7 @@ vgaxi(int32_t port, unsigned char index)
 	case Crtx:
 	case Grx:
 		outb(port, index);
-		data = inb(port+1);
+		data = inb(port + 1);
 		break;
 
 	case Attrx:
@@ -51,13 +51,12 @@ vgaxi(int32_t port, unsigned char index)
 		inb(Status1);
 		if(index < 0x10){
 			outb(Attrx, index);
-			data = inb(Attrx+1);
+			data = inb(Attrx + 1);
 			inb(Status1);
-			outb(Attrx, 0x20|index);
-		}
-		else{
-			outb(Attrx, 0x20|index);
-			data = inb(Attrx+1);
+			outb(Attrx, 0x20 | index);
+		} else {
+			outb(Attrx, 0x20 | index);
+			data = inb(Attrx + 1);
 		}
 		break;
 
@@ -85,7 +84,7 @@ vgaxo(int32_t port, unsigned char index, unsigned char data)
 		 * registers.
 		 */
 		outb(port, index);
-		outb(port+1, data);
+		outb(port + 1, data);
 		break;
 
 	case Attrx:
@@ -94,10 +93,9 @@ vgaxo(int32_t port, unsigned char index, unsigned char data)
 			outb(Attrx, index);
 			outb(Attrx, data);
 			inb(Status1);
-			outb(Attrx, 0x20|index);
-		}
-		else{
-			outb(Attrx, 0x20|index);
+			outb(Attrx, 0x20 | index);
+		} else {
+			outb(Attrx, 0x20 | index);
 			outb(Attrx, data);
 		}
 		break;

sys/src/9/amd64/vsvm.c

@@ -29,74 +29,70 @@ typedef uint16_t Ss;
 typedef struct Tss Tss;
 
 struct Gd {
-	Sd	sd;
-	uint64_t	hi;
+	Sd sd;
+	uint64_t hi;
 };
 
 struct Tss {
-	uint32_t	_0_;
-	uint32_t	rsp0[2];
-	uint32_t	rsp1[2];
-	uint32_t	rsp2[2];
-	uint32_t	_28_[2];
-	uint32_t	ist[14];
-	uint16_t	_92_[5];
-	uint16_t	iomap;
+	uint32_t _0_;
+	uint32_t rsp0[2];
+	uint32_t rsp1[2];
+	uint32_t rsp2[2];
+	uint32_t _28_[2];
+	uint32_t ist[14];
+	uint16_t _92_[5];
+	uint16_t iomap;
 };
 
 enum {
-	Ngdt		= 16,			/* max. entries in gdt */
-	Nidt		= 256,			/* max. entries in idt */
+	Ngdt = 16,  /* max. entries in gdt */
+	Nidt = 256, /* max. entries in idt */
 };
 
 static Sd gdt64[Ngdt] = {
-	0ull,					/* NULL descriptor */
-	SdL|SdP|SdDPL0|SdS|SdCODE,		/* CS */
-	SdG|SdD|SdP|SdDPL0|SdS|SdW,		/* DS */
-	SdG|SdD|SdP|SdDPL3|SdS|SdCODE|SdR|Sd4G,	/* User CS 32-bit */
-	SdG|SdD|SdP|SdDPL3|SdS|SdW|Sd4G,	/* User DS */
-	SdL|SdP|SdDPL3|SdS|SdCODE,		/* User CS 64-bit */
-
-	0ull,					/* FS */
-	0ull,					/* GS */
-
-	0ull,					/* TSS lower */
-	0ull,					/* TSS upper */
+	0ull,						      /* NULL descriptor */
+	SdL | SdP | SdDPL0 | SdS | SdCODE,		      /* CS */
+	SdG | SdD | SdP | SdDPL0 | SdS | SdW,		      /* DS */
+	SdG | SdD | SdP | SdDPL3 | SdS | SdCODE | SdR | Sd4G, /* User CS 32-bit */
+	SdG | SdD | SdP | SdDPL3 | SdS | SdW | Sd4G,	      /* User DS */
+	SdL | SdP | SdDPL3 | SdS | SdCODE,		      /* User CS 64-bit */
+
+	0ull, /* FS */
+	0ull, /* GS */
+
+	0ull, /* TSS lower */
+	0ull, /* TSS upper */
 };
 //static int ngdt64 = 10;
 
 static Gd idt64[Nidt];
-static Gd acidt64[Nidt];	/* NIX application core IDT */
+static Gd acidt64[Nidt]; /* NIX application core IDT */
 
 static Sd
-mksd(uint64_t base, uint64_t limit, uint64_t bits, uint64_t* upper)
+mksd(uint64_t base, uint64_t limit, uint64_t bits, uint64_t *upper)
 {
 	Sd sd;
 
 	sd = bits;
-	sd |= (((limit & 0x00000000000f0000ull)>>16)<<48)
-	     |(limit & 0x000000000000ffffull);
-	sd |= (((base & 0x00000000ff000000ull)>>24)<<56)
-	     |(((base & 0x0000000000ff0000ull)>>16)<<32)
-	     |((base & 0x000000000000ffffull)<<16);
+	sd |= (((limit & 0x00000000000f0000ull) >> 16) << 48) | (limit & 0x000000000000ffffull);
+	sd |= (((base & 0x00000000ff000000ull) >> 24) << 56) | (((base & 0x0000000000ff0000ull) >> 16) << 32) | ((base & 0x000000000000ffffull) << 16);
 	if(upper != nil)
-		*upper = base>>32;
+		*upper = base >> 32;
 
 	return sd;
 }
 
 static void
-mkgd(Gd* gd, uint64_t offset, Ss ss, uint64_t bits, int ist)
+mkgd(Gd *gd, uint64_t offset, Ss ss, uint64_t bits, int ist)
 {
 	Sd sd;
 
 	sd = bits;
-	sd |= (((offset & 0x00000000ffff0000ull)>>16)<<48)
-	     |(offset & 0x000000000000ffffull);
-	sd |= ((ss & 0x000000000000ffffull)<<16);
-	sd |= (ist & (SdISTM>>32))<<32;
+	sd |= (((offset & 0x00000000ffff0000ull) >> 16) << 48) | (offset & 0x000000000000ffffull);
+	sd |= ((ss & 0x000000000000ffffull) << 16);
+	sd |= (ist & (SdISTM >> 32)) << 32;
 	gd->sd = sd;
-	gd->hi = offset>>32;
+	gd->hi = offset >> 32;
 }
 
 static void
@@ -107,19 +103,19 @@ idtinit(Gd *gd, uintptr_t offset)
 
 	for(v = 0; v < Nidt; v++){
 		ist = 0;
-		dpl = SdP|SdDPL0|SdIG;
+		dpl = SdP | SdDPL0 | SdIG;
 		switch(v){
 		default:
 			break;
-		case IdtBP:			/* #BP */
-			dpl = SdP|SdDPL3|SdIG;
+		case IdtBP: /* #BP */
+			dpl = SdP | SdDPL3 | SdIG;
 			break;
-		case IdtUD:			/* #UD */
-		case IdtDF:			/* #DF */
+		case IdtUD: /* #UD */
+		case IdtDF: /* #DF */
 			ist = 1;
 			break;
 		}
-		mkgd(gd, offset, SSEL(SiCS, SsTIGDT|SsRPL0), dpl, ist);
+		mkgd(gd, offset, SSEL(SiCS, SsTIGDT | SsRPL0), dpl, ist);
 		gd++;
 		offset += 6;
 	}
@@ -132,7 +128,7 @@ tssrsp0(Mach *mach, uintptr_t sp)
 
 	tss = mach->tss;
 	tss->rsp0[0] = sp;
-	tss->rsp0[1] = sp>>32;
+	tss->rsp0[1] = sp >> 32;
 }
 
 static void
@@ -146,15 +142,16 @@ tssinit(Mach *mach, uintptr_t sp)
 
 	tssrsp0(mach, sp);
 
-	sp = PTR2UINT(mach->vsvm+PGSZ);
+	sp = PTR2UINT(mach->vsvm + PGSZ);
 	for(ist = 0; ist < 14; ist += 2){
 		tss->ist[ist] = sp;
-		tss->ist[ist+1] = sp>>32;
+		tss->ist[ist + 1] = sp >> 32;
 	}
 	tss->iomap = sizeof(*tss);
 }
 
-void acsyscallentry(void)
+void
+acsyscallentry(void)
 {
 	panic("acsyscallentry");
 }
@@ -172,17 +169,17 @@ vsvminit(int size, int nixtype, Mach *mach)
 	memmove(mach->gdt, gdt64, sizeof(gdt64));
 	mach->tss = &mach->vsvm[ROUNDUP(sizeof(gdt64), 16)];
 
-	sd = &((Sd*)mach->gdt)[SiTSS];
-	*sd = mksd(PTR2UINT(mach->tss), sizeof(Tss)-1, SdP|SdDPL0|SdaTSS, sd+1);
+	sd = &((Sd *)mach->gdt)[SiTSS];
+	*sd = mksd(PTR2UINT(mach->tss), sizeof(Tss) - 1, SdP | SdDPL0 | SdaTSS, sd + 1);
 	// Can not do this until multiboot information has been processed!
 	//*(uintptr_t*)mach->stack = STACKGUARD;
-	tssinit(mach, mach->stack+size);
-	gdtput(sizeof(gdt64)-1, PTR2UINT(mach->gdt), SSEL(SiCS, SsTIGDT|SsRPL0));
-	trput(SSEL(SiTSS, SsTIGDT|SsRPL0));
+	tssinit(mach, mach->stack + size);
+	gdtput(sizeof(gdt64) - 1, PTR2UINT(mach->gdt), SSEL(SiCS, SsTIGDT | SsRPL0));
+	trput(SSEL(SiTSS, SsTIGDT | SsRPL0));
 
-	idtput(sizeof(idt64)-1, PTR2UINT(idt64));
+	idtput(sizeof(idt64) - 1, PTR2UINT(idt64));
 
-#if 0 // NO ACs YET
+#if 0	     // NO ACs YET
 	if(nixtype == NIXAC)
 		idtput(sizeof(acidt64)-1, PTR2UINT(acidt64));
 #endif
@@ -203,8 +200,8 @@ vsvminit(int size, int nixtype, Mach *mach)
 	 * as-is. For the SS, 8 is added and you get the DS
 	 * shown above.
 	 */
-	r = ((uint64_t)SSEL(SiU32CS, SsRPL3))<<48;
-	r |= ((uint64_t)SSEL(SiCS, SsRPL0))<<32;
+	r = ((uint64_t)SSEL(SiU32CS, SsRPL3)) << 48;
+	r |= ((uint64_t)SSEL(SiCS, SsRPL0)) << 32;
 	wrmsr(Star, r);
 
 	if(nixtype != NIXAC)
@@ -213,13 +210,13 @@ vsvminit(int size, int nixtype, Mach *mach)
 		wrmsr(Lstar, PTR2UINT(acsyscallentry));
 
 	wrmsr(Sfmask, If);
-	if (mach != machp()) {
+	if(mach != machp()){
 		panic("vsvminit: m is not machp() at end\n");
 	}
 }
 
 int
-userureg(Ureg* ureg)
+userureg(Ureg *ureg)
 {
 	return ureg->cs == SSEL(SiUCS, SsRPL3);
 }

sys/src/9/boot/aux.c

@@ -54,7 +54,7 @@ readfile(char *name, char *buf, int len)
 		fprint(2, "readfile: cannot open %s (%r)\n", name);
 		return -1;
 	}
-	n = read(f, buf, len-1);
+	n = read(f, buf, len - 1);
 	if(n >= 0)
 		buf[n] = 0;
 	close(f);
@@ -129,11 +129,11 @@ outin(char *prompt, char *def, int len)
 	char *p, buf[256];
 
 	if(len >= sizeof buf)
-		len = sizeof(buf)-1;
+		len = sizeof(buf) - 1;
 
 	if(cpuflag){
 		notify(catchint);
-		alarm(15*1000);
+		alarm(15 * 1000);
 	}
 	print("%s[%s]: ", prompt, *def ? def : "no default");
 	memset(buf, 0, sizeof buf);
@@ -144,7 +144,7 @@ outin(char *prompt, char *def, int len)
 	}
 	if(n < 0)
 		return 1;
-	buf[sizeof(buf)-1] = '\0';
+	buf[sizeof(buf) - 1] = '\0';
 	p = strchr(buf, '\n');
 	if(p != nil)
 		*p = '\0';

sys/src/9/boot/boot.c

@@ -13,59 +13,59 @@
 #include <fcall.h>
 #include "../boot/boot.h"
 
-char	cputype[64];
-char	service[64];
-char	sys[2*64];
-int	printcol;
-int	mflag;
-int	fflag;
-int	kflag;
-
-char	*bargv[Nbarg];
-int	bargc;
-
-static Method	*rootserver(char*);
-static void	usbinit(void);
-static void	kbmap(void);
-
-static void acpiirq(void)
+char cputype[64];
+char service[64];
+char sys[2 * 64];
+int printcol;
+int mflag;
+int fflag;
+int kflag;
+
+char *bargv[Nbarg];
+int bargc;
+
+static Method *rootserver(char *);
+static void usbinit(void);
+static void kbmap(void);
+
+static void
+acpiirq(void)
 {
 	static char *devs[] = {"#Z", "#$", "#P"};
 	int i, pid, irqmap;
 	Waitmsg *w;
 
-	for (i = 0; i < nelem(devs); i++){
+	for(i = 0; i < nelem(devs); i++){
 		if(bind(devs[i], "/dev", MAFTER) < 0){
 			fprint(2, "Can't bind %s: %r", devs[i]);
 			return;
 		}
 	}
 	irqmap = open("/dev/irqmap", OREAD);
-	if (irqmap < 0) {
+	if(irqmap < 0){
 		warning("can't open /dev/irqmap");
 		return;
 	}
 
 	pid = fork();
-	if (pid < 0){
+	if(pid < 0){
 		warning("Can't fork: %r");
 		close(irqmap);
 		return;
 	}
-	if (pid > 0) {
+	if(pid > 0){
 		close(irqmap);
 		w = wait();
-		if (w && w->msg && w->msg[0])
+		if(w && w->msg && w->msg[0])
 			warning(w->msg);
 		return;
 	}
 	dup(irqmap, 0);
 	close(irqmap);
-	if (execl("/boot/irq", "irq", "-s", nil)) {
+	if(execl("/boot/irq", "irq", "-s", nil)){
 		print("note: can't start /boot/irq");
 	}
 	exits(nil);
-
 }
 void
 boot(int argc, char *argv[])
@@ -92,18 +92,19 @@ boot(int argc, char *argv[])
 	 * #ec gets us plan9.ini settings (*var variables).
 	 */
 	bind("#ec", "/env", MREPL);
-	bind("#e", "/env", MBEFORE|MCREATE);
-	bind("#s", "/srv", MREPL|MCREATE);
-	bind("#p", "/proc", MREPL|MCREATE);
+	bind("#e", "/env", MBEFORE | MCREATE);
+	bind("#s", "/srv", MREPL | MCREATE);
+	bind("#p", "/proc", MREPL | MCREATE);
 	print("\nHello, I am Harvey :-)\n\n");
 #ifdef DEBUG
 	print("argc=%d\n", argc);
 	for(fd = 0; fd < argc; fd++)
 		print("%#p %s ", argv[fd], argv[fd]);
 	print("\n");
-#endif //DEBUG
+#endif	      //DEBUG
 
-	ARGBEGIN{
+	ARGBEGIN
+	{
 	case 'k':
 		kflag = 1;
 		break;
@@ -113,14 +114,15 @@ boot(int argc, char *argv[])
 	case 'f':
 		fflag = 1;
 		break;
-	}ARGEND
+	}
+	ARGEND
 	readfile("#e/cputype", cputype, sizeof(cputype));
 	readfile("#e/service", service, sizeof(service));
 
 	/* Do the initial ACPI interrupt setup work.
 	 * If we don't do this we may not get needed
 	 * interfaces. */
-	if (getenv("acpiirq"))
+	if(getenv("acpiirq"))
 		acpiirq();
 
 	/*
@@ -135,10 +137,11 @@ boot(int argc, char *argv[])
 	if(method[0].name == nil)
 		fatal("no boot methods");
 	mp = rootserver(argc ? *argv : 0);
-	if(mp==nil){
+	if(mp == nil){
 		configrc(mp);
-		for(;;){}
-	}else{
+		for(;;){
+		}
+	} else {
 		(*mp->config)(mp);
 		islocal = strcmp(mp->name, "local") == 0;
 		ishybrid = strcmp(mp->name, "hybrid") == 0;
@@ -189,27 +192,27 @@ boot(int argc, char *argv[])
 		if(ai == nil)
 			print("authentication failed (%r), trying mount anyways\n");
 	}
-	if(mount(fd, afd, "/root", MREPL|MCREATE, rp, 'M') < 0)
+	if(mount(fd, afd, "/root", MREPL | MCREATE, rp, 'M') < 0)
 		fatal("mount /");
 	rsp = rp;
 	rp = getenv("rootdir");
 	if(rp == nil)
 		rp = rootdir;
-	if(bind(rp, "/", MAFTER|MCREATE) < 0){
+	if(bind(rp, "/", MAFTER | MCREATE) < 0){
 		if(strncmp(rp, "/root", 5) == 0){
 			fprint(2, "boot: couldn't bind $rootdir=%s to root: %r\n", rp);
 			fatal("second bind /");
 		}
 		snprint(rootbuf, sizeof rootbuf, "/root/%s", rp);
 		rp = rootbuf;
-		if(bind(rp, "/", MAFTER|MCREATE) < 0){
+		if(bind(rp, "/", MAFTER | MCREATE) < 0){
 			fprint(2, "boot: couldn't bind $rootdir=%s to root: %r\n", rp);
 			if(strcmp(rootbuf, "/root//plan9") == 0){
 				fprint(2, "**** warning: remove rootdir=/plan9 entry from plan9.ini\n");
 				rp = "/root";
-				if(bind(rp, "/", MAFTER|MCREATE) < 0)
+				if(bind(rp, "/", MAFTER | MCREATE) < 0)
 					fatal("second bind /");
-			}else
+			} else
 				fatal("second bind /");
 		}
 	}
@@ -223,17 +226,17 @@ boot(int argc, char *argv[])
 	cmd = getenv("init");
 	srvt = strcmp(service, "terminal");
 	if(cmd == nil){
-		if(!srvt) {
+		if(!srvt){
 			sprint(cmdbuf, "/%s/bin/init -%s%s", cputype,
-				"t", mflag ? "m" : "");
+			       "t", mflag ? "m" : "");
 			cmd = cmdbuf;
 		} else {
 			sprint(cmdbuf, "/%s/bin/init -%s%s", cputype,
-				"c", mflag ? "m" : "");
+			       "c", mflag ? "m" : "");
 			cmd = cmdbuf;
 		}
 	}
-	iargc = tokenize(cmd, iargv, nelem(iargv)-1);
+	iargc = tokenize(cmd, iargv, nelem(iargv) - 1);
 	cmd = iargv[0];
 
 	/* make iargv[0] basename(iargv[0]) */
@@ -248,7 +251,7 @@ boot(int argc, char *argv[])
 	fatal(cmd);
 }
 
-static Method*
+static Method *
 findmethod(char *a)
 {
 	Method *mp;
@@ -272,22 +275,23 @@ findmethod(char *a)
 	return nil;
 }
 
-static void catstuff(void)
+static void
+catstuff(void)
 {
 	char *files[] = {"#c/drivers", "#P/ioalloc", "#P/irqalloc"};
 	char dat[8192];
 	int rc, ifd, pid;
-	for (int i = 0; i < nelem(files); i++) {
+	for(int i = 0; i < nelem(files); i++){
 		memset(dat, 0, sizeof(dat));
-		rc = readfile(files[i], dat, sizeof(dat)-1);
-		if (rc) {
+		rc = readfile(files[i], dat, sizeof(dat) - 1);
+		if(rc){
 			print("Reading %s failed\n", files[i]);
 			continue;
 		}
 		print("%s:\n\r%s\n\r", files[i], dat);
 	}
 	pid = fork();
-	if (pid) {
+	if(pid){
 		print("fork: %d\n", pid);
 		return;
 	}
@@ -301,13 +305,13 @@ static void catstuff(void)
 	// can kill it any time if you're concerned about
 	// the overhead. It shows up as a child of init.
 	ifd = open("#t/eia0", ORDWR);
-	if (ifd < 0) {
+	if(ifd < 0){
 		print("can't open eia0!!!\n");
 		exits("can't open eia0");
 		return;
 	}
 	print("open: ifd %d\n", ifd);
-	while (1) {
+	while(1){
 		sleep(100000);
 	}
 }
@@ -315,7 +319,7 @@ static void catstuff(void)
 /*
  *  ask user from whence cometh the root file system
  */
-static Method*
+static Method *
 rootserver(char *arg)
 {
 	char prompt[256];
@@ -326,7 +330,7 @@ rootserver(char *arg)
 	int n;
 
 	// Leave this on if you want uart input!
-	if (1)
+	if(1)
 		catstuff();
 	/* look for required reply */
 	memset(reply, 0, sizeof(reply));
@@ -343,8 +347,8 @@ rootserver(char *arg)
 	mp = method;
 	n = sprint(prompt, "root is from (%s", mp->name);
 	for(mp++; mp->name; mp++)
-		n += sprint(prompt+n, ", %s", mp->name);
-	sprint(prompt+n, ")");
+		n += sprint(prompt + n, ", %s", mp->name);
+	sprint(prompt + n, ")");
 
 	/* create default reply */
 	memset(reply, 0, sizeof(reply));
@@ -360,17 +364,17 @@ rootserver(char *arg)
 		strcpy(reply, method->name);
 
 	/* parse replies */
-	do{
+	do {
 		outin(prompt, reply, sizeof(reply));
 		mp = findmethod(reply);
-	}while(mp == nil);
+	} while(mp == nil);
 
 HaveMethod:
-	bargc = tokenize(reply, bargv, Nbarg-2);
+	bargc = tokenize(reply, bargv, Nbarg - 2);
 	bargv[bargc] = nil;
 	cp = strchr(reply, '!');
 	if(cp)
-		strcpy(sys, cp+1);
+		strcpy(sys, cp + 1);
 	return mp;
 }
 
@@ -380,7 +384,7 @@ usbinit(void)
 	static char usbd[] = "/boot/usbd";
 	static char *argv[] = {"usbd", nil};
 
-	if (access(usbd, AEXIST) < 0) {
+	if(access(usbd, AEXIST) < 0){
 		print("usbinit: no %s\n", usbd);
 		return;
 	}
@@ -390,12 +394,12 @@ usbinit(void)
 		return;
 	}
 
-	if (bind("#j", "/dev", MAFTER) < 0) {
+	if(bind("#j", "/dev", MAFTER) < 0){
 		print("usbinit: can't bind #j to /dev: %r\n");
 		return;
 	}
 
-	if (bind("#u", "/dev", MAFTER) < 0) {
+	if(bind("#u", "/dev", MAFTER) < 0){
 		print("usbinit: can't bind #u to /dev: %r\n");
 		return;
 	}
@@ -432,7 +436,7 @@ kbmap(void)
 		return;
 	}
 	out = open("/dev/kbmap", OWRITE);
-	if(out < 0) {
+	if(out < 0){
 		warning("can't open /dev/kbmap");
 		close(in);
 		return;

sys/src/9/boot/boot.h

@@ -7,77 +7,75 @@
  * in the LICENSE file.
  */
 
-typedef struct Method	Method;
-struct Method
-{
-	char	*name;
-	void	(*config)(Method*);
-	int	(*connect)(void);
-	char	*arg;
+typedef struct Method Method;
+struct Method {
+	char *name;
+	void (*config)(Method *);
+	int (*connect)(void);
+	char *arg;
 };
-enum
-{
-	Statsz=	256,
-	Nbarg=	16,
+enum {
+	Statsz = 256,
+	Nbarg = 16,
 };
 
-extern void	authentication(int);
-extern char*	bootdisk;
-extern char*	rootdir;
-extern int	(*cfs)(int);
-extern int	cpuflag;
-extern char	cputype[];
-extern int	fflag;
-extern int	kflag;
-extern Method	method[];
-extern void	(*pword)(int, Method*);
-extern char	sys[];
-extern unsigned char	hostkey[];
-extern unsigned char	statbuf[Statsz];
-extern int	bargc;
-extern char	*bargv[Nbarg];
+extern void authentication(int);
+extern char *bootdisk;
+extern char *rootdir;
+extern int (*cfs)(int);
+extern int cpuflag;
+extern char cputype[];
+extern int fflag;
+extern int kflag;
+extern Method method[];
+extern void (*pword)(int, Method *);
+extern char sys[];
+extern unsigned char hostkey[];
+extern unsigned char statbuf[Statsz];
+extern int bargc;
+extern char *bargv[Nbarg];
 
 /* libc equivalent */
-extern int	cache(int);
-extern char*	checkkey(Method*, char*, char*);
-extern void	fatal(char*);
-extern void	getpasswd(char*, int);
-extern void	key(int, Method*);
-extern int	outin(char*, char*, int);
-extern int	plumb(char*, char*, int*, char*);
-extern int	readfile(char*, char*, int);
-extern int32_t	readn(int, void*, int32_t);
-extern void	run(char *file, ...);
-extern int	sendmsg(int, char*);
-extern void	setenv(char*, char*);
-extern void	settime(int, int, char*);
-extern void	srvcreate(char*, int);
-extern void	warning(char*);
-extern int	writefile(char*, char*, int);
-extern void	boot(int, char **);
-extern void	doauthenticate(int, Method*);
-extern int		old9p(int);
-extern int	parsefields(char*, char**, int, char*);
+extern int cache(int);
+extern char *checkkey(Method *, char *, char *);
+extern void fatal(char *);
+extern void getpasswd(char *, int);
+extern void key(int, Method *);
+extern int outin(char *, char *, int);
+extern int plumb(char *, char *, int *, char *);
+extern int readfile(char *, char *, int);
+extern int32_t readn(int, void *, int32_t);
+extern void run(char *file, ...);
+extern int sendmsg(int, char *);
+extern void setenv(char *, char *);
+extern void settime(int, int, char *);
+extern void srvcreate(char *, int);
+extern void warning(char *);
+extern int writefile(char *, char *, int);
+extern void boot(int, char **);
+extern void doauthenticate(int, Method *);
+extern int old9p(int);
+extern int parsefields(char *, char **, int, char *);
 
 /* methods */
-extern void	configtcp(Method*);
-extern int	connecttcp(void);
+extern void configtcp(Method *);
+extern int connecttcp(void);
 
-extern void	configlocal(Method*);
-extern int	connectlocal(void);
+extern void configlocal(Method *);
+extern int connectlocal(void);
 
-extern void	configsac(Method*);
-extern int	connectsac(void);
+extern void configsac(Method *);
+extern int connectsac(void);
 
-extern void	configpaq(Method*);
-extern int	connectpaq(void);
+extern void configpaq(Method *);
+extern int connectpaq(void);
 
-extern void	configembed(Method*);
-extern int	connectembed(void);
+extern void configembed(Method *);
+extern int connectembed(void);
 
-extern void	configip(int, char**, int);
+extern void configip(int, char **, int);
 
-extern void	configrc(Method*);
-extern int	connectrc(void);
+extern void configrc(Method *);
+extern int connectrc(void);
 /* hack for passing authentication address */
-extern char	*authaddr;
+extern char *authaddr;

sys/src/9/boot/bootauth.c

@@ -13,7 +13,7 @@
 #include <fcall.h>
 #include "../boot/boot.h"
 
-char	*authaddr;
+char *authaddr;
 static void glenda(void);
 
 void
@@ -22,7 +22,7 @@ authentication(int cpuflag)
 	char *argv[16], **av;
 	int ac;
 
-	if(access("/boot/factotum", AEXEC) < 0|| getenv("user") != nil){
+	if(access("/boot/factotum", AEXEC) < 0 || getenv("user") != nil){
 		glenda();
 		return;
 	}
@@ -33,8 +33,8 @@ authentication(int cpuflag)
 	av[ac++] = "factotum";
 	if(getenv("debugfactotum"))
 		av[ac++] = "-p";
-//	av[ac++] = "-d";		/* debug traces */
-//	av[ac++] = "-D";		/* 9p messages */
+	//	av[ac++] = "-d";		/* debug traces */
+	//	av[ac++] = "-D";		/* 9p messages */
 	if(cpuflag)
 		av[ac++] = "-S";
 	else

sys/src/9/boot/bootcache.c

@@ -32,8 +32,8 @@ cache(int fd)
 			if(strcmp(argv[i], "off") == 0)
 				return fd;
 			else if(stat(argv[i], statbuf, sizeof statbuf) >= 0){
-				strncpy(partition, argv[i], sizeof(partition)-1);
-				partition[sizeof(partition)-1] = 0;
+				strncpy(partition, argv[i], sizeof(partition) - 1);
+				partition[sizeof(partition) - 1] = 0;
 			}
 		}
 	}
@@ -45,12 +45,12 @@ cache(int fd)
 				*pp = 0;
 			/* damned artificial intelligence */
 			i = strlen(bd);
-			if(strcmp("disk", &bd[i-4]) == 0)
-				bd[i-4] = 0;
-			else if(strcmp("fs", &bd[i-2]) == 0)
-				bd[i-2] = 0;
-			else if(strcmp("fossil", &bd[i-6]) == 0)
-				bd[i-6] = 0;
+			if(strcmp("disk", &bd[i - 4]) == 0)
+				bd[i - 4] = 0;
+			else if(strcmp("fs", &bd[i - 2]) == 0)
+				bd[i - 2] = 0;
+			else if(strcmp("fossil", &bd[i - 6]) == 0)
+				bd[i - 6] = 0;
 			sprint(partition, "%scache", bd);
 			if(stat(partition, statbuf, sizeof statbuf) < 0)
 				*bd = 0;
@@ -63,7 +63,7 @@ cache(int fd)
 	}
 
 	print("cfs...");
-	if(pipe(p)<0)
+	if(pipe(p) < 0)
 		fatal("pipe");
 	switch(fork()){
 	case -1:

sys/src/9/boot/bootip.c

@@ -13,14 +13,13 @@
 
 #include "boot.h"
 
-static	uint8_t	fsip[IPaddrlen];
-static	uint8_t	auip[IPaddrlen];
-static	char	mpoint[32];
-
-static int isvalidip(uint8_t*);
-static void netndb(char*, uint8_t*);
-static void netenv(char*, uint8_t*);
+static uint8_t fsip[IPaddrlen];
+static uint8_t auip[IPaddrlen];
+static char mpoint[32];
 
+static int isvalidip(uint8_t *);
+static void netndb(char *, uint8_t *);
+static void netenv(char *, uint8_t *);
 
 void
 configip(int bargc, char **bargv, int needfs)
@@ -33,17 +32,18 @@ configip(int bargc, char **bargv, int needfs)
 	fmtinstall('M', eipfmt);
 	fmtinstall('E', eipfmt);
 
-	arg = malloc((bargc+1) * sizeof(char*));
+	arg = malloc((bargc + 1) * sizeof(char *));
 	if(arg == nil)
 		fatal("malloc");
-	memmove(arg, bargv, bargc * sizeof(char*));
+	memmove(arg, bargv, bargc * sizeof(char *));
 	arg[bargc] = 0;
 
 	print("ipconfig...");
 	argc = bargc;
 	argv = arg;
 	strcpy(mpoint, "/net");
-	ARGBEGIN {
+	ARGBEGIN
+	{
 	case 'x':
 		p = ARGF();
 		if(p != nil)
@@ -56,7 +56,8 @@ configip(int bargc, char **bargv, int needfs)
 		p = ARGF();
 		USED(p);
 		break;
-	} ARGEND;
+	}
+	ARGEND;
 
 	/* bind in an ip interface */
 	if(bind("#I", mpoint, MAFTER) < 0)
@@ -105,7 +106,7 @@ configip(int bargc, char **bargv, int needfs)
 	while(!isvalidip(fsip)){
 		memset(buf, 0, sizeof(buf));
 		outin("filesystem IP address", buf, sizeof(buf));
-		if (parseip(fsip, buf) == -1)
+		if(parseip(fsip, buf) == -1)
 			fprint(2, "configip: can't parse fs ip %s\n", buf);
 	}
 
@@ -115,7 +116,7 @@ configip(int bargc, char **bargv, int needfs)
 	while(!isvalidip(auip)){
 		memset(buf, 0, sizeof(buf));
 		outin("authentication server IP address", buf, sizeof(buf));
-		if (parseip(auip, buf) == -1)
+		if(parseip(auip, buf) == -1)
 			fprint(2, "configip: can't parse auth ip %s\n", buf);
 	}
 	free(arg);
@@ -131,7 +132,7 @@ setauthaddr(char *proto, int port)
 }
 
 void
-configtcp(Method* m)
+configtcp(Method *m)
 {
 	configip(bargc, bargv, 1);
 	setauthaddr("tcp", 567);
@@ -145,7 +146,7 @@ connecttcp(void)
 
 	snprint(buf, sizeof buf, "tcp!%I!5640", fsip);
 	fd = dial(buf, 0, 0, 0);
-	if (fd < 0)
+	if(fd < 0)
 		werrstr("dial %s: %r", buf);
 	return fd;
 }
@@ -172,10 +173,10 @@ netenv(char *attr, uint8_t *ip)
 	if(fd < 0)
 		return;
 
-	n = read(fd, buf, sizeof(buf)-1);
+	n = read(fd, buf, sizeof(buf) - 1);
 	if(n > 0){
 		buf[n] = 0;
-		if (parseip(ip, buf) == -1)
+		if(parseip(ip, buf) == -1)
 			fprint(2, "netenv: can't parse ip %s\n", buf);
 	}
 	close(fd);
@@ -193,20 +194,20 @@ netndb(char *attr, uint8_t *ip)
 	fd = open(buf, OREAD);
 	if(fd < 0)
 		return;
-	n = read(fd, buf, sizeof(buf)-1);
+	n = read(fd, buf, sizeof(buf) - 1);
 	close(fd);
 	if(n <= 0)
 		return;
 	buf[n] = 0;
 	n = strlen(attr);
-	for(p = buf; ; p++){
+	for(p = buf;; p++){
 		p = strstr(p, attr);
 		if(p == nil)
 			break;
-		c = *(p-1);
+		c = *(p - 1);
 		if(*(p + n) == '=' && (p == buf || c == '\n' || c == ' ' || c == '\t')){
-			p += n+1;
-			if (parseip(ip, p) == -1)
+			p += n + 1;
+			if(parseip(ip, p) == -1)
 				fprint(2, "netndb: can't parse ip %s\n", p);
 			return;
 		}

sys/src/9/boot/bootrc.c

@@ -14,12 +14,18 @@
 #include "boot.h"
 
 void
-configrc(Method* m)
+configrc(Method *m)
 {
 	void configloopback(void);
 	configloopback();
 	bind("#S", "/dev", MAFTER);
-	char *argv[] = {"rc", "-m", "/boot/rcmain", "-i", 0,};
+	char *argv[] = {
+		"rc",
+		"-m",
+		"/boot/rcmain",
+		"-i",
+		0,
+	};
 	print("Step 1. Run an rc. Set things up.\n");
 	switch(fork()){
 	case -1:
@@ -56,7 +62,7 @@ connectrc(void)
 	// Later, make this anything.
 	snprint(buf, sizeof buf, "/srv/fossil");
 	fd = open("#s/fossil", 2);
-	if (fd < 0)
+	if(fd < 0)
 		werrstr("dial %s: %r", buf);
 	return fd;
 }

sys/src/9/boot/doauthenticate.c

@@ -23,25 +23,25 @@ readn(int fd, void *buf, int32_t len)
 
 	p = buf;
 	for(n = 0; n < len; n += m){
-		m = read(fd, p+n, len-n);
+		m = read(fd, p + n, len - n);
 		if(m <= 0)
 			return -1;
 	}
 	return n;
 }
 
-static char*
+static char *
 fromauth(Method *mp, char *trbuf, char *tbuf)
 {
 	int afd;
 	char t;
 	char *msg;
-	static char error[2*ERRMAX];
+	static char error[2 * ERRMAX];
 
 	if(mp->auth == 0)
 		fatal("no method for accessing auth server");
 	afd = (*mp->auth)();
-	if(afd < 0) {
+	if(afd < 0){
 		sprint(error, "%s: %r", ccmsg);
 		return error;
 	}
@@ -54,18 +54,17 @@ fromauth(Method *mp, char *trbuf, char *tbuf)
 	switch(t){
 	case AuthOK:
 		msg = 0;
-		if(readn(afd, tbuf, 2*TICKETLEN) < 0) {
+		if(readn(afd, tbuf, 2 * TICKETLEN) < 0){
 			sprint(error, "%s: %r", pbmsg);
 			msg = error;
 		}
 		break;
 	case AuthErr:
-		if(readn(afd, error, ERRMAX) < 0) {
+		if(readn(afd, error, ERRMAX) < 0){
 			sprint(error, "%s: %r", pbmsg);
 			msg = error;
-		}
-		else {
-			error[ERRMAX-1] = 0;
+		} else {
+			error[ERRMAX - 1] = 0;
 			msg = error;
 		}
 		break;
@@ -83,14 +82,14 @@ doauthenticate(int fd, Method *mp)
 {
 	char *msg;
 	char trbuf[TICKREQLEN];
-	char tbuf[2*TICKETLEN];
+	char tbuf[2 * TICKETLEN];
 
 	print("session...");
 	if(fsession(fd, trbuf, sizeof trbuf) < 0)
 		fatal("session command failed");
 
 	/* no authentication required? */
-	memset(tbuf, 0, 2*TICKETLEN);
+	memset(tbuf, 0, 2 * TICKETLEN);
 	if(trbuf[0] == 0)
 		return;
 
@@ -106,7 +105,7 @@ doauthenticate(int fd, Method *mp)
 	fprint(2, "no authentication server (%s), using your key as server key\n", msg);
 }
 
-char*
+char *
 checkkey(Method *mp, char *name, char *key)
 {
 	char *msg;
@@ -129,7 +128,7 @@ checkkey(Method *mp, char *name, char *key)
 	if(msg)
 		return msg;
 	convM2T(tbuf, &t, key);
-	if(t.num == AuthTc && strcmp(name, t.cuid)==0)
+	if(t.num == AuthTc && strcmp(name, t.cuid) == 0)
 		return 0;
 	return "no match";
 }

sys/src/9/boot/embed.c

@@ -52,18 +52,18 @@ connectembed(void)
 		fatal("bind #c");
 	if(bind("#p", "/proc", MREPL) < 0)
 		fatal("bind #p");
-	if(pipe(p)<0)
+	if(pipe(p) < 0)
 		fatal("pipe");
 	switch(fork()){
 	case -1:
 		fatal("fork");
 	case 0:
-		arg = malloc((bargc+5)*sizeof(char*));
+		arg = malloc((bargc + 5) * sizeof(char *));
 		argp = arg;
 		*argp++ = "/boot/paqfs";
 		*argp++ = "-iv";
 		*argp++ = paqfile;
-		for(i=1; i<bargc; i++)
+		for(i = 1; i < bargc; i++)
 			*argp++ = bargv[i];
 		*argp = 0;
 

sys/src/9/boot/getpasswd.c

@@ -21,15 +21,15 @@ getpasswd(char *p, int len)
 	if(fd < 0)
 		fatal("can't open consctl; please reboot");
 	write(fd, "rawon", 5);
- Prompt:
+Prompt:
 	print("password: ");
 	n = 0;
 	for(;;){
-		do{
+		do {
 			i = read(0, &c, 1);
 			if(i < 0)
 				fatal("can't read cons; please reboot");
-		}while(i == 0);
+		} while(i == 0);
 		switch(c){
 		case '\n':
 			p[n] = '\0';
@@ -40,7 +40,7 @@ getpasswd(char *p, int len)
 			if(n > 0)
 				n--;
 			break;
-		case 'u' - 'a' + 1:		/* cntrl-u */
+		case 'u' - 'a' + 1: /* cntrl-u */
 			print("\n");
 			goto Prompt;
 		default:

sys/src/9/boot/local.c

@@ -14,7 +14,8 @@
 static char diskname[64];
 static char *disk;
 
-void shell(char *c, char *d)
+void
+shell(char *c, char *d)
 {
 	char *argv[] = {"rc", "-m", "/boot/rcmain", 0, 0, 0};
 	print("Shell: Run %s %s\n", c, d);
@@ -51,7 +52,7 @@ configlocal(Method *mp)
 		 *  scsi logical unit number
 		 */
 		p = strchr(argv0, ',');
-		n = strtoul(p+1, 0, 10);
+		n = strtoul(p + 1, 0, 10);
 		sprint(diskname, "#w%d/sd%dfs", n, n);
 		disk = diskname;
 	} else if(mp->arg){
@@ -70,20 +71,18 @@ configlocal(Method *mp)
 		disk = "#s/sdE0/";
 	}
 	/* if we've decided on one, pass it on to all programs */
-	if(disk) {
+	if(disk){
 		setenv("bootdisk", disk);
 		setenv("nvram", smprint("%s/nvram", disk));
 		setenv("venti", smprint("%s/arenas", disk));
 	}
 
-
 	shell("-c", smprint("/boot/fdisk -p '%s/data' > '%s/ctl'", disk, disk));
 	shell("-c", smprint("/boot/prep -p '%s/plan9' > '%s/ctl'", disk, disk));
 	//shell("-i", nil);
 	USED(mp);
 }
 
-
 static int
 print1(int fd, char *s)
 {
@@ -100,8 +99,7 @@ configloopback(void)
 		if((fd = open("/net/ipifc/clone", ORDWR)) < 0)
 			fatal("open /net/ipifc/clone for loopback");
 	}
-	if(print1(fd, "bind loopback /dev/null") < 0
-	|| print1(fd, "add 127.0.0.1 255.255.255.255") < 0)
+	if(print1(fd, "bind loopback /dev/null") < 0 || print1(fd, "add 127.0.0.1 255.255.255.255") < 0)
 		fatal("write /net/ipifc/clone for loopback");
 	close(fd);
 }
@@ -129,7 +127,7 @@ connectlocalfossil(void)
 			return -1;
 	}
 	memset(buf, 0, sizeof buf);
-	pread(fd, buf, 512, 127*1024);
+	pread(fd, buf, 512, 127 * 1024);
 	close(fd);
 	if(memcmp(buf, "fossil config\n", 14) != 0){
 		if(strstr(partition, "/fossil"))
@@ -141,11 +139,11 @@ connectlocalfossil(void)
 
 	/* make venti available */
 	if((venti = getenv("venti")) && (nf = tokenize(venti, f, nelem(f)))){
-print("VENTI on %s\n", f[0]);
+		print("VENTI on %s\n", f[0]);
 		if((fd = open(f[0], OREAD)) >= 0){
 			print("venti...");
 			memset(buf, 0, sizeof buf);
-			pread(fd, buf, 512, 248*1024);
+			pread(fd, buf, 512, 248 * 1024);
 			close(fd);
 			if(memcmp(buf, "venti config\n", 13) != 0){
 				print("no venti config found on %s\n", f[0]);
@@ -169,12 +167,12 @@ print("VENTI on %s\n", f[0]);
 			 */
 			if((p = strstr(f[1], "!*!")) != 0){
 				*p = 0;
-				snprint(buf, sizeof buf, "%s!127.1!%s", f[1], p+3);
+				snprint(buf, sizeof buf, "%s!127.1!%s", f[1], p + 3);
 				f[1] = buf;
 			}
 			setenv("venti", f[1]);
-		}else{
-print("NO VENTI?\n");
+		} else {
+			print("NO VENTI?\n");
 			/* set up the network so we can talk to the venti server */
 			/* this is such a crock. */
 			configip(nf, f, 0);
@@ -190,7 +188,7 @@ print("NO VENTI?\n");
 		print("open #s/fboot: %r\n");
 		return -1;
 	}
-	remove("#s/fboot");	/* we'll repost as #s/boot */
+	remove("#s/fboot"); /* we'll repost as #s/boot */
 	return fd;
 }
 

sys/src/9/boot/nopsession.c

@@ -13,7 +13,7 @@
 #include <fcall.h>
 #include "../boot/boot.h"
 
-static Fcall	hdr;
+static Fcall hdr;
 
 static void
 rpc(int fd, int type)
@@ -30,7 +30,7 @@ rpc(int fd, int type)
 	print("...");
 	p = buf;
 	l = 0;
-	while(l < 3) {
+	while(l < 3){
 		n = read(fd, p, 3);
 		if(n <= 0)
 			fatal("read rpc");
@@ -49,7 +49,7 @@ rpc(int fd, int type)
 		print("error %s;", hdr.ename);
 		fatal("remote error");
 	}
-	if(hdr.type != type+1)
+	if(hdr.type != type + 1)
 		fatal("not reply");
 }
 

sys/src/9/boot/paq.c

@@ -12,16 +12,16 @@
 #include <../boot/boot.h>
 
 char *fparts[] =
-{
-	"add bootldr	0x0000000 0x0040000",
-	"add params	0x0040000 0x0080000",
-	"add kernel	0x0080000 0x0140000",
-	"add user	0x0140000 0x0200000",
-	"add ramdisk	0x0200000 0x0600000",
+	{
+		"add bootldr	0x0000000 0x0040000",
+		"add params	0x0040000 0x0080000",
+		"add kernel	0x0080000 0x0140000",
+		"add user	0x0140000 0x0200000",
+		"add ramdisk	0x0200000 0x0600000",
 };
 
 void
-configpaq(Method* m)
+configpaq(Method *m)
 {
 	int fd;
 	int i;
@@ -42,17 +42,17 @@ configpaq(Method* m)
 int
 connectpaq(void)
 {
-	int  p[2];
+	int p[2];
 	char **arg, **argp;
 
 	print("paq...");
-	if(pipe(p)<0)
+	if(pipe(p) < 0)
 		fatal("pipe");
 	switch(fork()){
 	case -1:
 		fatal("fork");
 	case 0:
-		arg = malloc(10*sizeof(char*));
+		arg = malloc(10 * sizeof(char *));
 		argp = arg;
 		*argp++ = "paqfs";
 		*argp++ = "-v";

sys/src/9/boot/printstub.c

@@ -25,7 +25,7 @@ _fmtunlock(void)
 }
 
 int
-_efgfmt(Fmt* f)
+_efgfmt(Fmt *f)
 {
 	return -1;
 }

sys/src/9/boot/settime.c

@@ -13,29 +13,30 @@
 #include <fcall.h>
 #include "../boot/boot.h"
 
-static int32_t lusertime(char*);
+static int32_t lusertime(char *);
 
 char *timeserver = "#s/boot";
 
 static int
-setlocaltime(char* timebuf, int s){
+setlocaltime(char *timebuf, int s)
+{
 	int n, f, t;
-	t=0;
+	t = 0;
 	f = open("#r/rtc", ORDWR);
 	if(f >= 0){
-		if((n = read(f, timebuf, s-1)) > 0){
+		if((n = read(f, timebuf, s - 1)) > 0){
 			timebuf[n] = '\0';
 			t = 1;
 		}
 		close(f);
-	}else do{
-		strcpy(timebuf, "yymmddhhmm[ss]");
-		outin("\ndate/time ", timebuf, s);
-	}while((t=lusertime(timebuf)) <= 0);
+	} else
+		do {
+			strcpy(timebuf, "yymmddhhmm[ss]");
+			outin("\ndate/time ", timebuf, s);
+		} while((t = lusertime(timebuf)) <= 0);
 	return t;
 }
 
-
 void
 settime(int islocal, int afd, char *rp)
 {
@@ -50,7 +51,7 @@ settime(int islocal, int afd, char *rp)
 		/*
 		 *  set the time from the real time clock
 		 */
-		timeset=setlocaltime(timebuf, sizeof(timebuf));
+		timeset = setlocaltime(timebuf, sizeof(timebuf));
 	}
 	if(timeset == 0){
 		/*
@@ -68,13 +69,13 @@ settime(int islocal, int afd, char *rp)
 			close(f);
 			if(stat("/tmp", statbuf, sizeof statbuf) < 0)
 				fatal("stat");
-			convM2D(statbuf, sizeof statbuf, &dir[0], (char*)&dir[1]);
+			convM2D(statbuf, sizeof statbuf, &dir[0], (char *)&dir[1]);
 			sprint(timebuf, "%ld", dir[0].atime);
 			unmount(0, "/tmp");
 		}
 	}
 
-	if((!islocal) && (strcmp(timebuf,"0")==0))
+	if((!islocal) && (strcmp(timebuf, "0") == 0))
 		setlocaltime(timebuf, sizeof(timebuf));
 
 	f = open("#c/time", OWRITE);
@@ -85,15 +86,15 @@ settime(int islocal, int afd, char *rp)
 }
 
 #define SEC2MIN 60L
-#define SEC2HOUR (60L*SEC2MIN)
-#define SEC2DAY (24L*SEC2HOUR)
+#define SEC2HOUR (60L * SEC2MIN)
+#define SEC2DAY (24L * SEC2HOUR)
 
 int
 g2(char **pp)
 {
 	int v;
 
-	v = 10*((*pp)[0]-'0') + (*pp)[1]-'0';
+	v = 10 * ((*pp)[0] - '0') + (*pp)[1] - '0';
 	*pp += 2;
 	return v;
 }
@@ -101,14 +102,10 @@ g2(char **pp)
 /*
  *  days per month plus days/year
  */
-static	int	dmsize[] =
-{
-	365, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
-static	int	ldmsize[] =
-{
-	366, 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
+static int dmsize[] = {
+	365, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
+static int ldmsize[] = {
+	366, 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
 
 /*
  *  return the days/month for the given year
@@ -117,7 +114,7 @@ static int *
 yrsize(int y)
 {
 
-	if((y%4) == 0 && ((y%100) != 0 || (y%400) == 0))
+	if((y % 4) == 0 && ((y % 100) != 0 || (y % 400) == 0))
 		return ldmsize;
 	else
 		return dmsize;
@@ -161,7 +158,7 @@ lusertime(char *argbuf)
 	for(i = 1; i < m; i++)
 		secs += d2m[i] * SEC2DAY;
 
-	secs += (g2(&buf)-1) * SEC2DAY;
+	secs += (g2(&buf) - 1) * SEC2DAY;
 	secs += g2(&buf) * SEC2HOUR;
 	secs += g2(&buf) * SEC2MIN;
 	if(*buf)

sys/src/9/ip/arp.c

@@ -21,44 +21,42 @@
  *  address resolution tables
  */
 
-enum
-{
-	NHASH		= (1<<6),
-	NCACHE		= 256,
+enum {
+	NHASH = (1 << 6),
+	NCACHE = 256,
 
-	AOK		= 1,
-	AWAIT		= 2,
+	AOK = 1,
+	AWAIT = 2,
 };
 
 char *arpstate[] =
-{
-	"UNUSED",
-	"OK",
-	"WAIT",
+	{
+		"UNUSED",
+		"OK",
+		"WAIT",
 };
 
 /*
  *  one per Fs
  */
-struct Arp
-{
+struct Arp {
 	QLock ql;
-	Fs	*f;
-	Arpent	*hash[NHASH];
-	Arpent	cache[NCACHE];
-	Arpent	*rxmt;
-	Proc	*rxmitp;	/* neib sol re-transmit proc */
-	Rendez	rxmtq;
-	Block 	*dropf, *dropl;
+	Fs *f;
+	Arpent *hash[NHASH];
+	Arpent cache[NCACHE];
+	Arpent *rxmt;
+	Proc *rxmitp; /* neib sol re-transmit proc */
+	Rendez rxmtq;
+	Block *dropf, *dropl;
 };
 
 char *Ebadarp = "bad arp";
 
-#define haship(s) ((s)[IPaddrlen-1]%NHASH)
+#define haship(s) ((s)[IPaddrlen - 1] % NHASH)
 
-int 	ReTransTimer = RETRANS_TIMER;
+int ReTransTimer = RETRANS_TIMER;
 
-static void 	rxmitproc(void *v);
+static void rxmitproc(void *v);
 
 void
 arpinit(Fs *f)
@@ -73,7 +71,7 @@ arpinit(Fs *f)
 /*
  *  create a new arp entry for an ip address.
  */
-static Arpent*
+static Arpent *
 newarp6(Arp *arp, uint8_t *ip, Ipifc *ifc, int addrxt)
 {
 	uint t;
@@ -103,8 +101,7 @@ newarp6(Arp *arp, uint8_t *ip, Ipifc *ifc, int addrxt)
 			freeblist(xp);
 			xp = next;
 		}
-	}
-	else { /* queue icmp unreachable for rxmitproc later on, w/o arp lock */
+	} else { /* queue icmp unreachable for rxmitproc later on, w/o arp lock */
 		if(xp){
 			if(arp->dropl == nil)
 				arp->dropf = xp;
@@ -146,7 +143,7 @@ newarp6(Arp *arp, uint8_t *ip, Ipifc *ifc, int addrxt)
 	/* put to the end of re-transmit chain; addrxt is 0 when isv4(a->ip) */
 	if(!ipismulticast(a->ip) && addrxt){
 		l = &arp->rxmt;
-		empty = (*l==nil);
+		empty = (*l == nil);
 
 		for(f = *l; f; f = f->nextrxt){
 			if(f == a){
@@ -212,7 +209,7 @@ cleanarpent(Arp *arp, Arpent *a)
  *  for ip.  Add the packet to be sent onto the list of packets
  *  waiting for ip->mac to be resolved.
  */
-Arpent*
+Arpent *
 arpget(Arp *arp, Block *bp, int version, Ipifc *ifc, uint8_t *ip, uint8_t *mac)
 {
 	int hash;
@@ -229,8 +226,8 @@ arpget(Arp *arp, Block *bp, int version, Ipifc *ifc, uint8_t *ip, uint8_t *mac)
 	hash = haship(ip);
 	for(a = arp->hash[hash]; a; a = a->hash){
 		if(memcmp(ip, a->ip, sizeof(a->ip)) == 0)
-		if(type == a->type)
-			break;
+			if(type == a->type)
+				break;
 	}
 
 	if(a == nil){
@@ -247,13 +244,13 @@ arpget(Arp *arp, Block *bp, int version, Ipifc *ifc, uint8_t *ip, uint8_t *mac)
 			a->last = bp;
 			bp->list = nil;
 		}
-		return a;		/* return with arp qlocked */
+		return a; /* return with arp qlocked */
 	}
 
 	memmove(mac, a->mac, a->type->maclen);
 
 	/* remove old entries */
-	if(NOW - a->ctime > 15*60*1000)
+	if(NOW - a->ctime > 15 * 60 * 1000)
 		cleanarpent(arp, a);
 
 	qunlock(&arp->ql);
@@ -275,7 +272,7 @@ arprelease(Arp *arp, Arpent *arpen)
  *
  * called with arp locked
  */
-Block*
+Block *
 arpresolve(Arp *arp, Arpent *a, Medium *type, uint8_t *mac)
 {
 	Block *bp;
@@ -318,7 +315,7 @@ arpenter(Fs *fs, int version, uint8_t *ip, uint8_t *mac, int n, int refresh)
 	arp = fs->arp;
 
 	if(n != 6){
-//		print("arp: len = %d\n", n);
+		//		print("arp: len = %d\n", n);
 		return;
 	}
 
@@ -333,11 +330,11 @@ arpenter(Fs *fs, int version, uint8_t *ip, uint8_t *mac, int n, int refresh)
 		break;
 	default:
 		panic("arpenter: version %d", version);
-		return;	/* to supress warnings */
+		return; /* to supress warnings */
 	}
 
 	if(r == nil){
-//		print("arp: no route for entry\n");
+		//		print("arp: no route for entry\n");
 		return;
 	}
 
@@ -425,11 +422,11 @@ arpwrite(Fs *fs, char *s, int len)
 	if(len == 0)
 		error(Ebadarp);
 	if(len >= sizeof(buf))
-		len = sizeof(buf)-1;
+		len = sizeof(buf) - 1;
 	strncpy(buf, s, len);
 	buf[len] = 0;
-	if(len > 0 && buf[len-1] == '\n')
-		buf[len-1] = 0;
+	if(len > 0 && buf[len - 1] == '\n')
+		buf[len - 1] = 0;
 
 	n = getfields(buf, f, 4, 1, " ");
 	if(strcmp(f[0], "flush") == 0){
@@ -457,10 +454,10 @@ arpwrite(Fs *fs, char *s, int len)
 		default:
 			error(Ebadarg);
 		case 3:
-			if (parseip(ip, f[1]) == -1)
+			if(parseip(ip, f[1]) == -1)
 				error(Ebadip);
 			if(isv4(ip))
-				r = v4lookup(fs, ip+IPv4off, nil);
+				r = v4lookup(fs, ip + IPv4off, nil);
 			else
 				r = v6lookup(fs, ip, nil);
 			if(r == nil)
@@ -472,7 +469,7 @@ arpwrite(Fs *fs, char *s, int len)
 			medium = ipfindmedium(f[1]);
 			if(medium == nil)
 				error(Ebadarp);
-			if (parseip(ip, f[2]) == -1)
+			if(parseip(ip, f[2]) == -1)
 				error(Ebadip);
 			n = parsemac(mac, f[3], medium->maclen);
 			break;
@@ -486,7 +483,7 @@ arpwrite(Fs *fs, char *s, int len)
 		if(n != 2)
 			error(Ebadarg);
 
-		if (parseip(ip, f[1]) == -1)
+		if(parseip(ip, f[1]) == -1)
 			error(Ebadip);
 		qlock(&arp->ql);
 
@@ -525,9 +522,8 @@ arpwrite(Fs *fs, char *s, int len)
 	return len;
 }
 
-enum
-{
-	Alinelen=	90,
+enum {
+	Alinelen = 90,
 };
 
 char *aformat = "%-6.6s %-8.8s %-40.40I %-32.32s\n";
@@ -544,13 +540,13 @@ arpread(Arp *arp, char *p, uint32_t offset, int len)
 {
 	Arpent *a;
 	int n;
-	char mac[2*MAClen+1];
+	char mac[2 * MAClen + 1];
 
 	if(offset % Alinelen)
 		return 0;
 
-	offset = offset/Alinelen;
-	len = len/Alinelen;
+	offset = offset / Alinelen;
+	len = len / Alinelen;
 
 	n = 0;
 	for(a = arp->cache; len > 0 && a < &arp->cache[NCACHE]; a++){
@@ -563,8 +559,8 @@ arpread(Arp *arp, char *p, uint32_t offset, int len)
 		len--;
 		qlock(&arp->ql);
 		convmac(mac, &mac[sizeof mac], a->mac, a->type->maclen);
-		n += snprint(p+n, Alinelen+1, aformat, a->type->name,
-			arpstate[a->state], a->ip, mac);	/* +1 for NUL */
+		n += snprint(p + n, Alinelen + 1, aformat, a->type->name,
+			     arpstate[a->state], a->ip, mac); /* +1 for NUL */
 		qunlock(&arp->ql);
 	}
 
@@ -586,13 +582,13 @@ rxmitsols(Arp *arp)
 	f = arp->f;
 
 	a = arp->rxmt;
-	if(a==nil){
+	if(a == nil){
 		nrxt = 0;
-		goto dodrops; 		/* return nrxt; */
+		goto dodrops; /* return nrxt; */
 	}
 	nrxt = a->rtime - NOW;
-	if(nrxt > 3*ReTransTimer/4)
-		goto dodrops; 		/* return nrxt; */
+	if(nrxt > 3 * ReTransTimer / 4)
+		goto dodrops; /* return nrxt; */
 
 	for(; a; a = a->nextrxt){
 		ifc = a->ifc;
@@ -609,15 +605,13 @@ rxmitsols(Arp *arp)
 			}
 
 			cleanarpent(arp, a);
-		}
-		else
+		} else
 			break;
 	}
 	if(a == nil)
 		goto dodrops;
 
-
-	qunlock(&arp->ql);	/* for icmpns */
+	qunlock(&arp->ql); /* for icmpns */
 	if((sflag = ipv6anylocal(ifc, ipsrc)) != SRC_UNSPEC)
 		icmpns(f, ipsrc, sflag, a->ip, TARG_MULTI, ifc->mac);
 
@@ -642,7 +636,7 @@ rxmitsols(Arp *arp)
 	a->rtime = NOW + ReTransTimer;
 
 	a = arp->rxmt;
-	if(a==nil)
+	if(a == nil)
 		nrxt = 0;
 	else
 		nrxt = a->rtime - NOW;
@@ -659,13 +653,12 @@ dodrops:
 	}
 
 	return nrxt;
-
 }
 
 static int
 rxready(void *v)
 {
-	Arp *arp = (Arp *) v;
+	Arp *arp = (Arp *)v;
 	int x;
 
 	x = ((arp->rxmt != nil) || (arp->dropf != nil));
@@ -690,7 +683,7 @@ rxmitproc(void *v)
 		wakeupat = rxmitsols(arp);
 		if(wakeupat == 0)
 			sleep(&arp->rxmtq, rxready, v);
-		else if(wakeupat > ReTransTimer/4)
+		else if(wakeupat > ReTransTimer / 4)
 			tsleep(&arp->rxmtq, return0, 0, wakeupat);
 	}
 }

sys/src/9/ip/chandial.c

@@ -7,38 +7,36 @@
  * in the LICENSE file.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-#include	"../ip/ip.h"
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+#include "../ip/ip.h"
 
 typedef struct DS DS;
-static Chan*	call(char*, char*, DS*);
-static void	_dial_string_parse(char*, DS*);
+static Chan *call(char *, char *, DS *);
+static void _dial_string_parse(char *, DS *);
 
-enum
-{
-	Maxstring=	128,
+enum {
+	Maxstring = 128,
 };
 
-struct DS
-{
-	char	buf[Maxstring];			/* dist string */
-	char	*netdir;
-	char	*proto;
-	char	*rem;
-	char	*local;				/* other args */
-	char	*dir;
-	Chan	**ctlp;
+struct DS {
+	char buf[Maxstring]; /* dist string */
+	char *netdir;
+	char *proto;
+	char *rem;
+	char *local; /* other args */
+	char *dir;
+	Chan **ctlp;
 };
 
 /*
  *  the dialstring is of the form '[/net/]proto!dest'
  */
-Chan*
+Chan *
 chandial(char *dest, char *local, char *dir, Chan **ctlp)
 {
 	DS ds;
@@ -57,7 +55,7 @@ chandial(char *dest, char *local, char *dir, Chan **ctlp)
 	return call(clone, ds.rem, &ds);
 }
 
-static Chan*
+static Chan *
 call(char *clone, char *dest, DS *ds)
 {
 	Proc *up = externup();
@@ -72,7 +70,7 @@ call(char *clone, char *dest, DS *ds)
 		cclose(cchan);
 		nexterror();
 	}
-	n = cchan->dev->read(cchan, name, sizeof(name)-1, 0);
+	n = cchan->dev->read(cchan, name, sizeof(name) - 1, 0);
 	name[n] = 0;
 	for(p = name; *p == ' '; p++)
 		;
@@ -98,7 +96,6 @@ call(char *clone, char *dest, DS *ds)
 		cclose(cchan);
 	poperror();
 	return dchan;
-
 }
 
 /*
@@ -110,10 +107,10 @@ _dial_string_parse(char *str, DS *ds)
 	char *p, *p2;
 
 	strncpy(ds->buf, str, Maxstring);
-	ds->buf[Maxstring-1] = 0;
+	ds->buf[Maxstring - 1] = 0;
 
 	p = strchr(ds->buf, '!');
-	if(p == 0) {
+	if(p == 0){
 		ds->netdir = 0;
 		ds->proto = "net";
 		ds->rem = ds->buf;

sys/src/9/ip/devip.c

@@ -7,33 +7,32 @@
  * in the LICENSE file.
  */
 
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-#include	"../ip/ip.h"
-
-enum
-{
-	Qtopdir=	1,		/* top level directory */
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+#include "../ip/ip.h"
+
+enum {
+	Qtopdir = 1, /* top level directory */
 	Qtopbase,
-	Qarp=		Qtopbase,
+	Qarp = Qtopbase,
 	Qbootp,
 	Qndb,
 	Qiproute,
 	Qipselftab,
 	Qlog,
 
-	Qprotodir,			/* directory for a protocol */
+	Qprotodir, /* directory for a protocol */
 	Qprotobase,
-	Qclone=		Qprotobase,
+	Qclone = Qprotobase,
 	Qstats,
 
-	Qconvdir,			/* directory for a conversation */
+	Qconvdir, /* directory for a conversation */
 	Qconvbase,
-	Qctl=		Qconvbase,
+	Qctl = Qconvbase,
 	Qdata,
 	Qerr,
 	Qlisten,
@@ -42,31 +41,31 @@ enum
 	Qstatus,
 	Qsnoop,
 
-	Logtype=	5,
-	Masktype=	(1<<Logtype)-1,
-	Logconv=	12,
-	Maskconv=	(1<<Logconv)-1,
-	Shiftconv=	Logtype,
-	Logproto=	8,
-	Maskproto=	(1<<Logproto)-1,
-	Shiftproto=	Logtype + Logconv,
+	Logtype = 5,
+	Masktype = (1 << Logtype) - 1,
+	Logconv = 12,
+	Maskconv = (1 << Logconv) - 1,
+	Shiftconv = Logtype,
+	Logproto = 8,
+	Maskproto = (1 << Logproto) - 1,
+	Shiftproto = Logtype + Logconv,
 
-	Nfs=		128,
+	Nfs = 128,
 };
-#define TYPE(x) 	( ((uint32_t)(x).path) & Masktype )
-#define CONV(x) 	( (((uint32_t)(x).path) >> Shiftconv) & Maskconv )
-#define PROTO(x) 	( (((uint32_t)(x).path) >> Shiftproto) & Maskproto )
-#define QID(p, c, y) 	( ((p)<<(Shiftproto)) | ((c)<<Shiftconv) | (y) )
+#define TYPE(x) (((uint32_t)(x).path) & Masktype)
+#define CONV(x) ((((uint32_t)(x).path) >> Shiftconv) & Maskconv)
+#define PROTO(x) ((((uint32_t)(x).path) >> Shiftproto) & Maskproto)
+#define QID(p, c, y) (((p) << (Shiftproto)) | ((c) << Shiftconv) | (y))
 
 static char network[] = "network";
 
-QLock	fslock;
-Fs	*ipfs[Nfs];	/* attached fs's */
-Queue	*qlog;
+QLock fslock;
+Fs *ipfs[Nfs]; /* attached fs's */
+Queue *qlog;
 
-extern	void nullmediumlink(void);
-extern	void pktmediumlink(void);
-	int32_t ndbwrite(Fs *f, char *a, uint32_t off, int n);
+extern void nullmediumlink(void);
+extern void pktmediumlink(void);
+int32_t ndbwrite(Fs *f, char *a, uint32_t off, int n);
 
 static int
 ip3gen(Chan *c, int i, Dir *dp)
@@ -80,7 +79,7 @@ ip3gen(Chan *c, int i, Dir *dp)
 		kstrdup(&cv->owner, eve);
 	mkqid(&q, QID(PROTO(c->qid), CONV(c->qid), i), 0, QTFILE);
 
-	switch(i) {
+	switch(i){
 	default:
 		return -1;
 	case Qctl:
@@ -119,7 +118,7 @@ ip2gen(Chan *c, int i, Dir *dp)
 {
 	Qid q;
 
-	switch(i) {
+	switch(i){
 	case Qclone:
 		mkqid(&q, QID(PROTO(c->qid), 0, Qclone), 0, QTFILE);
 		devdir(c, q, "clone", 0, network, 0666, dp);
@@ -140,13 +139,13 @@ ip1gen(Chan *c, int i, Dir *dp)
 	int prot;
 	int len = 0;
 	Fs *f;
-	extern uint32_t	kerndate;
+	extern uint32_t kerndate;
 
 	f = ipfs[c->devno];
 
 	prot = 0666;
 	mkqid(&q, QID(0, 0, i), 0, QTFILE);
-	switch(i) {
+	switch(i){
 	default:
 		return -1;
 	case Qarp:
@@ -180,7 +179,7 @@ ip1gen(Chan *c, int i, Dir *dp)
 }
 
 static int
-ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
+ipgen(Chan *c, char *j, Dirtab *dir, int mm, int s, Dir *dp)
 
 {
 	Proc *up = externup();
@@ -190,7 +189,7 @@ ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
 
 	f = ipfs[c->devno];
 
-	switch(TYPE(c->qid)) {
+	switch(TYPE(c->qid)){
 	case Qtopdir:
 		if(s == DEVDOTDOT){
 			mkqid(&q, QID(0, 0, Qtopdir), 0, QTDIR);
@@ -198,15 +197,15 @@ ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
 			devdir(c, q, up->genbuf, 0, network, 0555, dp);
 			return 1;
 		}
-		if(s < f->np) {
+		if(s < f->np){
 			if(f->p[s]->connect == nil)
-				return 0;	/* protocol with no user interface */
+				return 0; /* protocol with no user interface */
 			mkqid(&q, QID(s, 0, Qprotodir), 0, QTDIR);
 			devdir(c, q, f->p[s]->name, 0, network, 0555, dp);
 			return 1;
 		}
 		s -= f->np;
-		return ip1gen(c, s+Qtopbase, dp);
+		return ip1gen(c, s + Qtopbase, dp);
 	case Qarp:
 	case Qbootp:
 	case Qndb:
@@ -221,7 +220,7 @@ ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
 			devdir(c, q, up->genbuf, 0, network, 0555, dp);
 			return 1;
 		}
-		if(s < f->p[PROTO(c->qid)]->ac) {
+		if(s < f->p[PROTO(c->qid)]->ac){
 			cv = f->p[PROTO(c->qid)]->conv[s];
 			snprint(up->genbuf, sizeof up->genbuf, "%d", s);
 			mkqid(&q, QID(PROTO(c->qid), s, Qconvdir), 0, QTDIR);
@@ -229,7 +228,7 @@ ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
 			return 1;
 		}
 		s -= f->p[PROTO(c->qid)]->ac;
-		return ip2gen(c, s+Qprotobase, dp);
+		return ip2gen(c, s + Qprotobase, dp);
 	case Qclone:
 	case Qstats:
 		return ip2gen(c, TYPE(c->qid), dp);
@@ -240,7 +239,7 @@ ipgen(Chan *c, char* j, Dirtab* dir, int mm, int s, Dir *dp)
 			devdir(c, q, f->p[s]->name, 0, network, 0555, dp);
 			return 1;
 		}
-		return ip3gen(c, s+Qconvbase, dp);
+		return ip3gen(c, s + Qconvbase, dp);
 	case Qctl:
 	case Qdata:
 	case Qerr:
@@ -267,10 +266,10 @@ ipreset(void)
 	fmtinstall('M', eipfmt);
 }
 
-static Fs*
+static Fs *
 ipgetfs(int dev)
 {
-	extern void (*ipprotoinit[])(Fs*);
+	extern void (*ipprotoinit[])(Fs *);
 	Fs *f;
 	int i;
 
@@ -293,7 +292,7 @@ ipgetfs(int dev)
 	return ipfs[dev];
 }
 
-IPaux*
+IPaux *
 newipaux(char *owner, char *tag)
 {
 	IPaux *a;
@@ -309,10 +308,10 @@ newipaux(char *owner, char *tag)
 	return a;
 }
 
-#define ATTACHER(c) (((IPaux*)((c)->aux))->owner)
+#define ATTACHER(c) (((IPaux *)((c)->aux))->owner)
 
-static Chan*
-ipattach(char* spec)
+static Chan *
+ipattach(char *spec)
 {
 	Chan *c;
 	int devno;
@@ -331,11 +330,11 @@ ipattach(char* spec)
 	return c;
 }
 
-static Walkqid*
-ipwalk(Chan* c, Chan *nc, char **name, int nname)
+static Walkqid *
+ipwalk(Chan *c, Chan *nc, char **name, int nname)
 {
 	IPaux *a = c->aux;
-	Walkqid* w;
+	Walkqid *w;
 
 	w = devwalk(c, nc, name, nname, nil, 0, ipgen);
 	if(w != nil && w->clone != nil)
@@ -343,15 +342,14 @@ ipwalk(Chan* c, Chan *nc, char **name, int nname)
 	return w;
 }
 
-
 static int
-ipstat(Chan* c, uint8_t* db, int n)
+ipstat(Chan *c, uint8_t *db, int n)
 {
 	return devstat(c, db, n, nil, 0, ipgen);
 }
 
 static int
-incoming(void* arg)
+incoming(void *arg)
 {
 	Conv *conv;
 
@@ -360,13 +358,12 @@ incoming(void* arg)
 }
 
 static int m2p[] = {
-	[OREAD] =		4,
-	[OWRITE] =	2,
-	[ORDWR]	=	6
-};
+	[OREAD] = 4,
+	[OWRITE] = 2,
+	[ORDWR] = 6};
 
-static Chan*
-ipopen(Chan* c, int omode)
+static Chan *
+ipopen(Chan *c, int omode)
 {
 	Proc *up = externup();
 	Conv *cv, *nc;
@@ -374,17 +371,17 @@ ipopen(Chan* c, int omode)
 	int perm;
 	Fs *f;
 
-	perm = m2p[omode&3];
+	perm = m2p[omode & 3];
 
 	f = ipfs[c->devno];
 
-	switch(TYPE(c->qid)) {
+	switch(TYPE(c->qid)){
 	default:
 		break;
 	case Qndb:
-		if(omode & (OWRITE|OTRUNC) && !iseve())
+		if(omode & (OWRITE | OTRUNC) && !iseve())
 			error(Eperm);
-		if((omode & (OWRITE|OTRUNC)) == (OWRITE|OTRUNC))
+		if((omode & (OWRITE | OTRUNC)) == (OWRITE | OTRUNC))
 			f->ndb[0] = 0;
 		break;
 	case Qlog:
@@ -426,7 +423,7 @@ ipopen(Chan* c, int omode)
 		cv = Fsprotoclone(p, ATTACHER(c));
 		qunlock(&p->ql);
 		poperror();
-		if(cv == nil) {
+		if(cv == nil){
 			error(Enodev);
 			break;
 		}
@@ -439,17 +436,16 @@ ipopen(Chan* c, int omode)
 		qlock(&p->ql);
 		cv = p->conv[CONV(c->qid)];
 		qlock(&cv->ql);
-		if(waserror()) {
+		if(waserror()){
 			qunlock(&cv->ql);
 			qunlock(&p->ql);
 			nexterror();
 		}
-		if((perm & (cv->perm>>6)) != perm) {
+		if((perm & (cv->perm >> 6)) != perm){
 			if(strcmp(ATTACHER(c), cv->owner) != 0)
 				error(Eperm);
-		 	if((perm & cv->perm) != perm)
+			if((perm & cv->perm) != perm)
 				error(Eperm);
-
 		}
 		cv->inuse++;
 		if(cv->inuse == 1){
@@ -462,12 +458,11 @@ ipopen(Chan* c, int omode)
 		break;
 	case Qlisten:
 		cv = f->p[PROTO(c->qid)]->conv[CONV(c->qid)];
-		if((perm & (cv->perm>>6)) != perm) {
+		if((perm & (cv->perm >> 6)) != perm){
 			if(strcmp(ATTACHER(c), cv->owner) != 0)
 				error(Eperm);
-		 	if((perm & cv->perm) != perm)
+			if((perm & cv->perm) != perm)
 				error(Eperm);
-
 		}
 
 		if(cv->state != Announced)
@@ -482,13 +477,13 @@ ipopen(Chan* c, int omode)
 		qunlock(&cv->ql);
 
 		nc = nil;
-		while(nc == nil) {
+		while(nc == nil){
 			/* give up if we got a hangup */
 			if(qisclosed(cv->rq))
 				error("listen hungup");
 
 			qlock(&cv->listenq);
-			if(waserror()) {
+			if(waserror()){
 				qunlock(&cv->listenq);
 				nexterror();
 			}
@@ -519,7 +514,7 @@ ipopen(Chan* c, int omode)
 }
 
 static void
-ipcreate(Chan* c, char* n, int i, int m)
+ipcreate(Chan *c, char *n, int i, int m)
 {
 	error(Eperm);
 }
@@ -539,7 +534,7 @@ ipwstat(Chan *c, uint8_t *dp, int n)
 	Proto *p;
 
 	f = ipfs[c->devno];
-	switch(TYPE(c->qid)) {
+	switch(TYPE(c->qid)){
 	default:
 		error(Eperm);
 		break;
@@ -569,7 +564,7 @@ closeconv(Conv *cv)
 
 	qlock(&cv->ql);
 
-	if(--cv->inuse > 0) {
+	if(--cv->inuse > 0){
 		qunlock(&cv->ql);
 		return;
 	}
@@ -595,12 +590,12 @@ closeconv(Conv *cv)
 }
 
 static void
-ipclose(Chan* c)
+ipclose(Chan *c)
 {
 	Fs *f;
 
 	f = ipfs[c->devno];
-	switch(TYPE(c->qid)) {
+	switch(TYPE(c->qid)){
 	default:
 		break;
 	case Qlog:
@@ -618,13 +613,12 @@ ipclose(Chan* c)
 			decref(&f->p[PROTO(c->qid)]->conv[CONV(c->qid)]->snoopers);
 		break;
 	}
-	free(((IPaux*)c->aux)->owner);
+	free(((IPaux *)c->aux)->owner);
 	free(c->aux);
 }
 
-enum
-{
-	Statelen=	32*1024,
+enum {
+	Statelen = 32 * 1024,
 };
 
 static int32_t
@@ -640,7 +634,7 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 	f = ipfs[ch->devno];
 
 	p = a;
-	switch(TYPE(ch->qid)) {
+	switch(TYPE(ch->qid)){
 	default:
 		error(Eperm);
 	case Qtopdir:
@@ -649,9 +643,9 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 		return devdirread(ch, a, n, 0, 0, ipgen);
 	case Qarp:
 		return arpread(f->arp, a, offset, n);
- 	case Qbootp:
- 		return bootpread(a, offset, n);
- 	case Qndb:
+	case Qbootp:
+		return bootpread(a, offset, n);
+	case Qndb:
 		return readstr(offset, a, n, f->ndb);
 	case Qiproute:
 		return routeread(f, a, offset, n);
@@ -669,10 +663,10 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 		buf = smalloc(Statelen);
 		x = f->p[PROTO(ch->qid)];
 		c = x->conv[CONV(ch->qid)];
-		if(x->remote == nil) {
+		if(x->remote == nil){
 			snprint(buf, Statelen, "%I!%d\n", c->raddr, c->rport);
 		} else {
-			(*x->remote)(c, buf, Statelen-2);
+			(*x->remote)(c, buf, Statelen - 2);
 		}
 		rv = readstr(offset, p, n, buf);
 		free(buf);
@@ -681,10 +675,10 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 		buf = smalloc(Statelen);
 		x = f->p[PROTO(ch->qid)];
 		c = x->conv[CONV(ch->qid)];
-		if(x->local == nil) {
+		if(x->local == nil){
 			snprint(buf, Statelen, "%I!%d\n", c->laddr, c->lport);
 		} else {
-			(*x->local)(c, buf, Statelen-2);
+			(*x->local)(c, buf, Statelen - 2);
 		}
 		rv = readstr(offset, p, n, buf);
 		free(buf);
@@ -693,7 +687,7 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 		buf = smalloc(Statelen);
 		x = f->p[PROTO(ch->qid)];
 		c = x->conv[CONV(ch->qid)];
-		(*x->state)(c, buf, Statelen-2);
+		(*x->state)(c, buf, Statelen - 2);
 		rv = readstr(offset, p, n, buf);
 		free(buf);
 		return rv;
@@ -718,8 +712,8 @@ ipread(Chan *ch, void *a, int32_t n, int64_t off)
 	}
 }
 
-static Block*
-ipbread(Chan* ch, int32_t n, int64_t offset)
+static Block *
+ipbread(Chan *ch, int32_t n, int64_t offset)
 {
 	Conv *c;
 	Proto *x;
@@ -740,7 +734,7 @@ ipbread(Chan* ch, int32_t n, int64_t offset)
  *  set local address to be that of the ifc closest to remote address
  */
 static void
-setladdr(Conv* c)
+setladdr(Conv *c)
 {
 	findlocalip(c->p->f, c->laddr, c->raddr);
 }
@@ -748,8 +742,8 @@ setladdr(Conv* c)
 /*
  *  set a local port making sure the quad of raddr,rport,laddr,lport is unique
  */
-char*
-setluniqueport(Conv* c, int lport)
+char *
+setluniqueport(Conv *c, int lport)
 {
 	Proto *p;
 	Conv *xp;
@@ -764,11 +758,7 @@ setluniqueport(Conv* c, int lport)
 			break;
 		if(xp == c)
 			continue;
-		if((xp->state == Connected || xp->state == Announced)
-		&& xp->lport == lport
-		&& xp->rport == c->rport
-		&& ipcmp(xp->raddr, c->raddr) == 0
-		&& ipcmp(xp->laddr, c->laddr) == 0){
+		if((xp->state == Connected || xp->state == Announced) && xp->lport == lport && xp->rport == c->rport && ipcmp(xp->raddr, c->raddr) == 0 && ipcmp(xp->laddr, c->laddr) == 0){
 			qunlock(&p->ql);
 			return "address in use";
 		}
@@ -796,7 +786,7 @@ lportinuse(Proto *p, uint16_t lport)
  *  pick a local port and set it
  */
 char *
-setlport(Conv* c)
+setlport(Conv *c)
 {
 	Proto *p;
 	int i, port;
@@ -805,14 +795,14 @@ setlport(Conv* c)
 	qlock(&p->ql);
 	if(c->restricted){
 		/* Restricted ports cycle between 600 and 1024. */
-		for(i=0; i<1024-600; i++){
+		for(i = 0; i < 1024 - 600; i++){
 			if(p->nextrport >= 1024 || p->nextrport < 600)
 				p->nextrport = 600;
 			port = p->nextrport++;
 			if(!lportinuse(p, port))
 				goto chosen;
 		}
-	}else{
+	} else {
 		/*
 		 * Unrestricted ports are chosen randomly
 		 * between 2^15 and 2^16.  There are at most
@@ -823,8 +813,8 @@ setlport(Conv* c)
 		 * (or a once in 10^58 event has happened, but that's
 		 * less likely than a venti collision).
 		 */
-		for(i=0; i<64; i++){
-			port = (1<<15) + nrand(1<<15);
+		for(i = 0; i < 64; i++){
+			port = (1 << 15) + nrand(1 << 15);
 			if(!lportinuse(p, port))
 				goto chosen;
 		}
@@ -848,8 +838,8 @@ chosen:
  *  set a local address and port from a string of the form
  *	[address!]port[!r]
  */
-char*
-setladdrport(Conv* c, char* str, int announcing)
+char *
+setladdrport(Conv *c, char *str, int announcing)
 {
 	char *p;
 	char *rv;
@@ -902,8 +892,8 @@ setladdrport(Conv* c, char* str, int announcing)
 	return rv;
 }
 
-static char*
-setraddrport(Conv* c, char* str)
+static char *
+setraddrport(Conv *c, char *str)
 {
 	char *p;
 
@@ -911,7 +901,7 @@ setraddrport(Conv* c, char* str)
 	if(p == nil)
 		return "malformed address";
 	*p++ = 0;
-	if (parseip(c->raddr, str) == -1)
+	if(parseip(c->raddr, str) == -1)
 		return Ebadip;
 	c->rport = atoi(p);
 	p = strchr(p, '!');
@@ -925,12 +915,12 @@ setraddrport(Conv* c, char* str)
 /*
  *  called by protocol connect routine to set addresses
  */
-char*
+char *
 Fsstdconnect(Conv *c, char *argv[], int argc)
 {
 	char *p;
 
-	switch(argc) {
+	switch(argc){
 	default:
 		return "bad args to connect";
 	case 2:
@@ -939,7 +929,7 @@ Fsstdconnect(Conv *c, char *argv[], int argc)
 			return p;
 		setladdr(c);
 		p = setlport(c);
-		if (p != nil)
+		if(p != nil)
 			return p;
 		break;
 	case 3:
@@ -951,9 +941,9 @@ Fsstdconnect(Conv *c, char *argv[], int argc)
 			return p;
 	}
 
-	if( (memcmp(c->raddr, v4prefix, IPv4off) == 0 &&
-		memcmp(c->laddr, v4prefix, IPv4off) == 0)
-		|| ipcmp(c->raddr, IPnoaddr) == 0)
+	if((memcmp(c->raddr, v4prefix, IPv4off) == 0 &&
+	    memcmp(c->laddr, v4prefix, IPv4off) == 0) ||
+	   ipcmp(c->raddr, IPnoaddr) == 0)
 		c->ipversion = V4;
 	else
 		c->ipversion = V6;
@@ -964,9 +954,9 @@ Fsstdconnect(Conv *c, char *argv[], int argc)
  *  initiate connection and sleep till its set up
  */
 static int
-connected(void* a)
+connected(void *a)
 {
-	return ((Conv*)a)->state == Connected;
+	return ((Conv *)a)->state == Connected;
 }
 static void
 connectctlmsg(Proto *x, Conv *c, Cmdbuf *cb)
@@ -1000,8 +990,8 @@ connectctlmsg(Proto *x, Conv *c, Cmdbuf *cb)
 /*
  *  called by protocol announce routine to set addresses
  */
-char*
-Fsstdannounce(Conv* c, char* argv[], int argc)
+char *
+Fsstdannounce(Conv *c, char *argv[], int argc)
 {
 	memset(c->raddr, 0, sizeof(c->raddr));
 	c->rport = 0;
@@ -1018,9 +1008,9 @@ Fsstdannounce(Conv* c, char* argv[], int argc)
  *  initiate announcement and sleep till its set up
  */
 static int
-announced(void* a)
+announced(void *a)
 {
-	return ((Conv*)a)->state == Announced;
+	return ((Conv *)a)->state == Announced;
 }
 static void
 announcectlmsg(Proto *x, Conv *c, Cmdbuf *cb)
@@ -1054,8 +1044,8 @@ announcectlmsg(Proto *x, Conv *c, Cmdbuf *cb)
 /*
  *  called by protocol bind routine to set addresses
  */
-char*
-Fsstdbind(Conv* c, char* argv[], int argc)
+char *
+Fsstdbind(Conv *c, char *argv[], int argc)
 {
 	switch(argc){
 	default:
@@ -1098,7 +1088,7 @@ ttlctlmsg(Conv *c, Cmdbuf *cb)
 }
 
 static int32_t
-ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
+ipwrite(Chan *ch, void *v, int32_t n, int64_t off)
 {
 	Proc *up = externup();
 	Conv *c;
@@ -1141,7 +1131,7 @@ ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
 		cb = parsecmd(a, n);
 
 		qlock(&c->ql);
-		if(waserror()) {
+		if(waserror()){
 			qunlock(&c->ql);
 			free(cb);
 			nexterror();
@@ -1166,12 +1156,12 @@ ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
 			if(cb->nf == 2){
 				if(!ipismulticast(c->raddr))
 					error("addmulti for a non multicast address");
-				if (parseip(ia, cb->f[1]) == -1)
+				if(parseip(ia, cb->f[1]) == -1)
 					error(Ebadip);
 				ipifcaddmulti(c, c->raddr, ia);
 			} else {
-				if (parseip(ia, cb->f[1]) == -1 ||
-				    parseip(ma, cb->f[2]) == -1)
+				if(parseip(ia, cb->f[1]) == -1 ||
+				   parseip(ma, cb->f[2]) == -1)
 					error(Ebadip);
 				if(!ipismulticast(ma))
 					error("addmulti for a non multicast address");
@@ -1182,7 +1172,7 @@ ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
 				error("remmulti needs interface address");
 			if(!ipismulticast(c->raddr))
 				error("remmulti for a non multicast address");
-			if (parseip(ia, cb->f[1]) == -1)
+			if(parseip(ia, cb->f[1]) == -1)
 				error(Ebadip);
 			ipifcremmulti(c, c->raddr, ia);
 		} else if(strcmp(cb->f[0], "maxfragsize") == 0){
@@ -1191,7 +1181,7 @@ ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
 
 			c->maxfragsize = (int)strtol(cb->f[1], nil, 0);
 
-		} else if(x->ctl != nil) {
+		} else if(x->ctl != nil){
 			p = x->ctl(c, cb->f, cb->nf);
 			if(p != nil)
 				error(p);
@@ -1205,7 +1195,7 @@ ipwrite(Chan* ch, void *v, int32_t n, int64_t off)
 }
 
 static int32_t
-ipbwrite(Chan* ch, Block* bp, int64_t offset)
+ipbwrite(Chan *ch, Block *bp, int64_t offset)
 {
 	Conv *c;
 	Proto *x;
@@ -1268,7 +1258,7 @@ Fsproto(Fs *f, Proto *p)
 
 	p->qid.type = QTDIR;
 	p->qid.path = QID(f->np, 0, Qprotodir);
-	p->conv = malloc(sizeof(Conv*)*(p->nc+1));
+	p->conv = malloc(sizeof(Conv *) * (p->nc + 1));
 	if(p->conv == nil)
 		panic("Fsproto");
 
@@ -1284,7 +1274,7 @@ Fsproto(Fs *f, Proto *p)
  *  built in
  */
 int
-Fsbuiltinproto(Fs* f, uint8_t proto)
+Fsbuiltinproto(Fs *f, uint8_t proto)
 {
 	return f->t2p[proto] != nil;
 }
@@ -1292,7 +1282,7 @@ Fsbuiltinproto(Fs* f, uint8_t proto)
 /*
  *  called with protocol locked
  */
-Conv*
+Conv *
 Fsprotoclone(Proto *p, char *user)
 {
 	Conv *c, **pp, **ep;
@@ -1300,7 +1290,7 @@ Fsprotoclone(Proto *p, char *user)
 retry:
 	c = nil;
 	ep = &p->conv[p->nc];
-	for(pp = p->conv; pp < ep; pp++) {
+	for(pp = p->conv; pp < ep; pp++){
 		c = *pp;
 		if(c == nil){
 			c = malloc(sizeof(Conv));
@@ -1311,7 +1301,7 @@ retry:
 			c->x = pp - p->conv;
 			if(p->ptclsize != 0){
 				c->ptcl = malloc(p->ptclsize);
-				if(c->ptcl == nil) {
+				if(c->ptcl == nil){
 					free(c);
 					error(Enomem);
 				}
@@ -1333,13 +1323,13 @@ retry:
 			qunlock(&c->ql);
 		}
 	}
-	if(pp >= ep) {
+	if(pp >= ep){
 		if(p->gc)
 			print("Fsprotoclone: garbage collecting Convs\n");
 		if(p->gc != nil && (*p->gc)(p))
 			goto retry;
 		/* debugging: do we ever get here? */
-		if (cpuserver)
+		if(cpuserver)
 			panic("Fsprotoclone: all conversations in use");
 		return nil;
 	}
@@ -1366,10 +1356,10 @@ retry:
 }
 
 int
-Fsconnected(Conv* c, char* msg)
+Fsconnected(Conv *c, char *msg)
 {
 	if(msg != nil && *msg != '\0')
-		strncpy(c->cerr, msg, ERRMAX-1);
+		strncpy(c->cerr, msg, ERRMAX - 1);
 
 	switch(c->state){
 
@@ -1386,8 +1376,8 @@ Fsconnected(Conv* c, char* msg)
 	return 0;
 }
 
-Proto*
-Fsrcvpcol(Fs* f, uint8_t proto)
+Proto *
+Fsrcvpcol(Fs *f, uint8_t proto)
 {
 	if(f->ipmux)
 		return f->ipmux;
@@ -1395,7 +1385,7 @@ Fsrcvpcol(Fs* f, uint8_t proto)
 		return f->t2p[proto];
 }
 
-Proto*
+Proto *
 Fsrcvpcolx(Fs *f, uint8_t proto)
 {
 	return f->t2p[proto];
@@ -1404,7 +1394,7 @@ Fsrcvpcolx(Fs *f, uint8_t proto)
 /*
  *  called with protocol locked
  */
-Conv*
+Conv *
 Fsnewcall(Conv *c, uint8_t *raddr, uint16_t rport, uint8_t *laddr, uint16_t lport, uint8_t version)
 {
 	Conv *nc;
@@ -1415,21 +1405,21 @@ Fsnewcall(Conv *c, uint8_t *raddr, uint16_t rport, uint8_t *laddr, uint16_t lpor
 	i = 0;
 	for(l = &c->incall; *l; l = &(*l)->next)
 		i++;
-	if(i >= Maxincall) {
+	if(i >= Maxincall){
 		static int beenhere;
 
 		qunlock(&c->ql);
-		if (!beenhere) {
+		if(!beenhere){
 			beenhere = 1;
 			print("Fsnewcall: incall queue full (%d) on port %d\n",
-				i, c->lport);
+			      i, c->lport);
 		}
 		return nil;
 	}
 
 	/* find a free conversation */
 	nc = Fsprotoclone(c->p, network);
-	if(nc == nil) {
+	if(nc == nil){
 		qunlock(&c->ql);
 		return nil;
 	}
@@ -1454,10 +1444,10 @@ ndbwrite(Fs *f, char *a, uint32_t off, int n)
 {
 	if(off > strlen(f->ndb))
 		error(Eio);
-	if(off+n >= sizeof(f->ndb))
+	if(off + n >= sizeof(f->ndb))
 		error(Eio);
-	memmove(f->ndb+off, a, n);
-	f->ndb[off+n] = 0;
+	memmove(f->ndb + off, a, n);
+	f->ndb[off + n] = 0;
 	f->ndbvers++;
 	f->ndbmtime = seconds();
 	return n;
@@ -1466,7 +1456,7 @@ ndbwrite(Fs *f, char *a, uint32_t off, int n)
 uint32_t
 scalednconv(void)
 {
-	if(cpuserver && conf.npage*PGSZ >= 128*MB)
-		return Nchans*4;
+	if(cpuserver && conf.npage * PGSZ >= 128 * MB)
+		return Nchans * 4;
 	return Nchans;
 }

sys/src/9/ip/eipconvtest.c

@@ -10,30 +10,28 @@
 #include <u.h>
 #include <libc.h>
 
-enum
-{
-	Isprefix= 16,
+enum {
+	Isprefix = 16,
 };
 
 uint8_t prefixvals[256] =
-{
-[0x00] 0 | Isprefix,
-[0x80] 1 | Isprefix,
-[0xC0] 2 | Isprefix,
-[0xE0] 3 | Isprefix,
-[0xF0] 4 | Isprefix,
-[0xF8] 5 | Isprefix,
-[0xFC] 6 | Isprefix,
-[0xFE] 7 | Isprefix,
-[0xFF] 8 | Isprefix,
+	{
+		[0x00] 0 | Isprefix,
+		[0x80] 1 | Isprefix,
+		[0xC0] 2 | Isprefix,
+		[0xE0] 3 | Isprefix,
+		[0xF0] 4 | Isprefix,
+		[0xF8] 5 | Isprefix,
+		[0xFC] 6 | Isprefix,
+		[0xFE] 7 | Isprefix,
+		[0xFF] 8 | Isprefix,
 };
 
 uint8_t v4prefix[16] = {
 	0, 0, 0, 0,
 	0, 0, 0, 0,
 	0, 0, 0xff, 0xff,
-	0, 0, 0, 0
-};
+	0, 0, 0, 0};
 
 void
 hnputl(void *p, uint32_t v)
@@ -41,16 +39,16 @@ hnputl(void *p, uint32_t v)
 	uint8_t *a;
 
 	a = p;
-	a[0] = v>>24;
-	a[1] = v>>16;
-	a[2] = v>>8;
+	a[0] = v >> 24;
+	a[1] = v >> 16;
+	a[2] = v >> 8;
 	a[3] = v;
 }
 
 int
 eipconv(va_list *arg, Fconv *f)
 {
-	char buf[8*5];
+	char buf[8 * 5];
 	static char *efmt = "%.2lux%.2lux%.2lux%.2lux%.2lux%.2lux";
 	static char *ifmt = "%d.%d.%d.%d";
 	uint8_t *p, ip[16];
@@ -58,14 +56,14 @@ eipconv(va_list *arg, Fconv *f)
 	uint16_t s;
 	int i, j, n, eln, eli;
 
-	switch(f->chr) {
-	case 'E':		/* Ethernet address */
-		p = va_arg(*arg, uint8_t*);
+	switch(f->chr){
+	case 'E': /* Ethernet address */
+		p = va_arg(*arg, uint8_t *);
 		sprint(buf, efmt, p[0], p[1], p[2], p[3], p[4], p[5]);
 		break;
-	case 'I':		/* Ip address */
-		p = va_arg(*arg, uint8_t*);
-common:
+	case 'I': /* Ip address */
+		p = va_arg(*arg, uint8_t *);
+	common:
 		if(memcmp(p, v4prefix, 12) == 0)
 			sprint(buf, ifmt, p[12], p[13], p[14], p[15]);
 		else {
@@ -73,7 +71,7 @@ common:
 			eln = eli = -1;
 			for(i = 0; i < 16; i += 2){
 				for(j = i; j < 16; j += 2)
-					if(p[j] != 0 || p[j+1] != 0)
+					if(p[j] != 0 || p[j + 1] != 0)
 						break;
 				if(j > i && j - i > eln){
 					eli = i;
@@ -85,29 +83,29 @@ common:
 			n = 0;
 			for(i = 0; i < 16; i += 2){
 				if(i == eli){
-					n += sprint(buf+n, "::");
+					n += sprint(buf + n, "::");
 					i += eln;
 					if(i >= 16)
 						break;
 				} else if(i != 0)
-					n += sprint(buf+n, ":");
-				s = (p[i]<<8) + p[i+1];
-				n += sprint(buf+n, "%x", s);
+					n += sprint(buf + n, ":");
+				s = (p[i] << 8) + p[i + 1];
+				n += sprint(buf + n, "%x", s);
 			}
 		}
 		break;
-	case 'i':		/* v6 address as 4 longs */
-		lp = va_arg(*arg, uint32_t*);
+	case 'i': /* v6 address as 4 longs */
+		lp = va_arg(*arg, uint32_t *);
 		for(i = 0; i < 4; i++)
-			hnputl(ip+4*i, *lp++);
+			hnputl(ip + 4 * i, *lp++);
 		p = ip;
 		goto common;
-	case 'V':		/* v4 ip address */
-		p = va_arg(*arg, uint8_t*);
+	case 'V': /* v4 ip address */
+		p = va_arg(*arg, uint8_t *);
 		sprint(buf, ifmt, p[0], p[1], p[2], p[3]);
 		break;
-	case 'M':		/* ip mask */
-		p = va_arg(*arg, uint8_t*);
+	case 'M': /* ip mask */
+		p = va_arg(*arg, uint8_t *);
 
 		/* look for a prefix mask */
 		for(i = 0; i < 16; i++)
@@ -116,12 +114,12 @@ common:
 		if(i < 16){
 			if((prefixvals[p[i]] & Isprefix) == 0)
 				goto common;
-			for(j = i+1; j < 16; j++)
+			for(j = i + 1; j < 16; j++)
 				if(p[j] != 0)
 					goto common;
-			n = 8*i + (prefixvals[p[i]] & ~Isprefix);
+			n = 8 * i + (prefixvals[p[i]] & ~Isprefix);
 		} else
-			n = 8*16;
+			n = 8 * 16;
 
 		/* got one, use /xx format */
 		sprint(buf, "/%d", n);
@@ -130,22 +128,209 @@ common:
 		strcpy(buf, "(eipconv)");
 	}
 	strconv(buf, f);
-	return sizeof(uint8_t*);
+	return sizeof(uint8_t *);
 }
 
 uint8_t testvec[11][16] =
-{
- { 0,0,0,0, 0,0,0,0, 0,0,0xff,0xff, 1,3,4,5, },
- { 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, },
- { 0xff,0xff,0x80,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, },
- { 0xff,0xff,0xff,0xc0, 0,0,0,0, 0,0,0,0, 0,0,0,0, },
- { 0xff,0xff,0xff,0xff, 0xe0,0,0,0, 0,0,0,0, 0,0,0,0, },
- { 0xff,0xff,0xff,0xff, 0xff,0xf0,0,0, 0,0,0,0, 0,0,0,0, },
- { 0xff,0xff,0xff,0xff, 0xff,0xff,0xf8,0, 0,0,0,0, 0,0,0,0, },
- { 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff, },
- { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, },
- { 0,0,0,0, 0,0x11,0,0, 0,0,0,0, 0,0,0,0, },
- { 0,0,0,0x11, 0,0,0,0, 0,0,0,0, 0,0,0,0x12, },
+	{
+		{
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0xff,
+			0xff,
+			1,
+			3,
+			4,
+			5,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+		},
+		{
+			0xff,
+			0xff,
+			0x80,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xc0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xe0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xf0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xf8,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+			0xff,
+		},
+		{
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0,
+			0,
+			0,
+			0,
+			0,
+			0x11,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+		},
+		{
+			0,
+			0,
+			0,
+			0x11,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0,
+			0x12,
+		},
 };
 
 void

sys/src/9/ip/esp.c

@@ -15,19 +15,19 @@
  * TODO: verify aes algorithms;
  *	transport mode (host-to-host)
  */
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
 
-#include	"ip.h"
-#include	"ipv6.h"
-#include	"libsec.h"
+#include "ip.h"
+#include "ipv6.h"
+#include "libsec.h"
 
 #define BITS2BYTES(bi) (((bi) + BI2BY - 1) / BI2BY)
-#define BYTES2BITS(by)  ((by) * BI2BY)
+#define BYTES2BITS(by) ((by)*BI2BY)
 
 typedef struct Algorithm Algorithm;
 typedef struct Esp4hdr Esp4hdr;
@@ -42,25 +42,24 @@ enum {
 	Encrypt,
 	Decrypt,
 
-	IP_ESPPROTO	= 50,	/* IP v4 and v6 protocol number */
-	Esp4hdrlen	= IP4HDR + 8,
-	Esp6hdrlen	= IP6HDR + 8,
+	IP_ESPPROTO = 50, /* IP v4 and v6 protocol number */
+	Esp4hdrlen = IP4HDR + 8,
+	Esp6hdrlen = IP6HDR + 8,
 
-	Esptaillen	= 2,	/* does not include pad or auth data */
-	Userhdrlen	= 4,	/* user-visible header size - if enabled */
+	Esptaillen = 2, /* does not include pad or auth data */
+	Userhdrlen = 4, /* user-visible header size - if enabled */
 
-	Desblk	 = BITS2BYTES(64),
+	Desblk = BITS2BYTES(64),
 	Des3keysz = BITS2BYTES(192),
 
-	Aesblk	 = BITS2BYTES(128),
+	Aesblk = BITS2BYTES(128),
 	Aeskeysz = BITS2BYTES(128),
 };
 
-struct Esphdr
-{
-	uint8_t	espspi[4];	/* Security parameter index */
-	uint8_t	espseq[4];	/* Sequence number */
-	uint8_t	payload[];
+struct Esphdr {
+	uint8_t espspi[4]; /* Security parameter index */
+	uint8_t espseq[4]; /* Sequence number */
+	uint8_t payload[];
 };
 
 /*
@@ -72,137 +71,151 @@ struct Esphdr
  *	orig IP hdrs | ESP hdr |
  *			enc { TCP/UDP hdr | user data | ESP trailer } | ESP ICV
  */
-struct Esp4hdr
-{
+struct Esp4hdr {
 	/* ipv4 header */
-	uint8_t	vihl;		/* Version and header length */
-	uint8_t	tos;		/* Type of service */
-	uint8_t	length[2];	/* packet length */
-	uint8_t	id[2];		/* Identification */
-	uint8_t	frag[2];	/* Fragment information */
-	uint8_t	Unused;
-	uint8_t	espproto;	/* Protocol */
-	uint8_t	espplen[2];	/* Header plus data length */
-	uint8_t	espsrc[4];	/* Ip source */
-	uint8_t	espdst[4];	/* Ip destination */
+	uint8_t vihl;	   /* Version and header length */
+	uint8_t tos;	   /* Type of service */
+	uint8_t length[2]; /* packet length */
+	uint8_t id[2];	   /* Identification */
+	uint8_t frag[2];   /* Fragment information */
+	uint8_t Unused;
+	uint8_t espproto;   /* Protocol */
+	uint8_t espplen[2]; /* Header plus data length */
+	uint8_t espsrc[4];  /* Ip source */
+	uint8_t espdst[4];  /* Ip destination */
 
 	Esphdr;
 };
 
 /* tunnel-mode layout */
-struct Esp6hdr
-{
+struct Esp6hdr {
 	IPV6HDR;
 	Esphdr;
 };
 
-struct Esptail
-{
-	uint8_t	pad;
-	uint8_t	nexthdr;
+struct Esptail {
+	uint8_t pad;
+	uint8_t nexthdr;
 };
 
 /* IP-version-dependent data */
 typedef struct Versdep Versdep;
-struct Versdep
-{
-	uint32_t	version;
-	uint32_t	iphdrlen;
-	uint32_t	hdrlen;		/* iphdrlen + esp hdr len */
-	uint32_t	spi;
-	uint8_t	laddr[IPaddrlen];
-	uint8_t	raddr[IPaddrlen];
+struct Versdep {
+	uint32_t version;
+	uint32_t iphdrlen;
+	uint32_t hdrlen; /* iphdrlen + esp hdr len */
+	uint32_t spi;
+	uint8_t laddr[IPaddrlen];
+	uint8_t raddr[IPaddrlen];
 };
 
 /* header as seen by the user */
-struct Userhdr
-{
-	uint8_t	nexthdr;	/* next protocol */
-	uint8_t	unused[3];
+struct Userhdr {
+	uint8_t nexthdr; /* next protocol */
+	uint8_t unused[3];
 };
 
-struct Esppriv
-{
-	uint64_t	in;
-	uint32_t	inerrors;
+struct Esppriv {
+	uint64_t in;
+	uint32_t inerrors;
 };
 
 /*
  *  protocol specific part of Conv
  */
-struct Espcb
-{
-	int	incoming;
-	int	header;		/* user-level header */
-	uint32_t	spi;
-	uint32_t	seq;		/* last seq sent */
-	uint32_t	window;		/* for replay attacks */
-
-	char	*espalg;
-	void	*espstate;	/* other state for esp */
-	int	espivlen;	/* in bytes */
-	int	espblklen;
-	int	(*cipher)(Espcb*, uint8_t *buf, int len);
-
-	char	*ahalg;
-	void	*ahstate;	/* other state for esp */
-	int	ahlen;		/* auth data length in bytes */
-	int	ahblklen;
-	int	(*auth)(Espcb*, uint8_t *buf, int len, uint8_t *hash);
+struct Espcb {
+	int incoming;
+	int header; /* user-level header */
+	uint32_t spi;
+	uint32_t seq;	 /* last seq sent */
+	uint32_t window; /* for replay attacks */
+
+	char *espalg;
+	void *espstate; /* other state for esp */
+	int espivlen;	/* in bytes */
+	int espblklen;
+	int (*cipher)(Espcb *, uint8_t *buf, int len);
+
+	char *ahalg;
+	void *ahstate; /* other state for esp */
+	int ahlen;     /* auth data length in bytes */
+	int ahblklen;
+	int (*auth)(Espcb *, uint8_t *buf, int len, uint8_t *hash);
 	DigestState *ds;
 };
 
-struct Algorithm
-{
-	char 	*name;
-	int	keylen;		/* in bits */
-	void	(*init)(Espcb*, char* name, uint8_t *key, unsigned keylen);
+struct Algorithm {
+	char *name;
+	int keylen; /* in bits */
+	void (*init)(Espcb *, char *name, uint8_t *key, unsigned keylen);
 };
 
-static	Conv* convlookup(Proto *esp, uint32_t spi);
-static	char *setalg(Espcb *ecb, char **f, int n, Algorithm *alg);
-static	void espkick(void *x);
+static Conv *convlookup(Proto *esp, uint32_t spi);
+static char *setalg(Espcb *ecb, char **f, int n, Algorithm *alg);
+static void espkick(void *x);
 
-static	void nullespinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void des3espinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void aescbcespinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void aesctrespinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void desespinit(Espcb *ecb, char *name, uint8_t *k, unsigned n);
+static void nullespinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void des3espinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void aescbcespinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void aesctrespinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void desespinit(Espcb *ecb, char *name, uint8_t *k, unsigned n);
 
-static	void nullahinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void shaahinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void aesahinit(Espcb*, char*, uint8_t *key, unsigned keylen);
-static	void md5ahinit(Espcb*, char*, uint8_t *key, unsigned keylen);
+static void nullahinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void shaahinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void aesahinit(Espcb *, char *, uint8_t *key, unsigned keylen);
+static void md5ahinit(Espcb *, char *, uint8_t *key, unsigned keylen);
 
 static Algorithm espalg[] =
-{
-	"null",		0,	nullespinit,
-	"des3_cbc",	192,	des3espinit,	/* new rfc2451, des-ede3 */
-	"aes_128_cbc",	128,	aescbcespinit,	/* new rfc3602 */
-	"aes_ctr",	128,	aesctrespinit,	/* new rfc3686 */
-	"des_56_cbc",	64,	desespinit,	/* rfc2405, deprecated */
-	/* rc4 was never required, was used in original bandt */
-//	"rc4_128",	128,	rc4espinit,
-	nil,		0,	nil,
+	{
+		"null",
+		0,
+		nullespinit,
+		"des3_cbc",
+		192,
+		des3espinit, /* new rfc2451, des-ede3 */
+		"aes_128_cbc",
+		128,
+		aescbcespinit, /* new rfc3602 */
+		"aes_ctr",
+		128,
+		aesctrespinit, /* new rfc3686 */
+		"des_56_cbc",
+		64,
+		desespinit, /* rfc2405, deprecated */
+		/* rc4 was never required, was used in original bandt */
+		//	"rc4_128",	128,	rc4espinit,
+		nil,
+		0,
+		nil,
 };
 
 static Algorithm ahalg[] =
-{
-	"null",		0,	nullahinit,
-	"hmac_sha1_96",	128,	shaahinit,	/* rfc2404 */
-	"aes_xcbc_mac_96", 128,	aesahinit,	/* new rfc3566 */
-	"hmac_md5_96",	128,	md5ahinit,	/* rfc2403 */
-	nil,		0,	nil,
+	{
+		"null",
+		0,
+		nullahinit,
+		"hmac_sha1_96",
+		128,
+		shaahinit, /* rfc2404 */
+		"aes_xcbc_mac_96",
+		128,
+		aesahinit, /* new rfc3566 */
+		"hmac_md5_96",
+		128,
+		md5ahinit, /* rfc2403 */
+		nil,
+		0,
+		nil,
 };
 
-static char*
+static char *
 espconnect(Conv *c, char **argv, int argc)
 {
 	char *p, *pp, *e = nil;
 	uint32_t spi;
-	Espcb *ecb = (Espcb*)c->ptcl;
+	Espcb *ecb = (Espcb *)c->ptcl;
 
-	switch(argc) {
+	switch(argc){
 	default:
 		e = "bad args to connect";
 		break;
@@ -213,17 +226,17 @@ espconnect(Conv *c, char **argv, int argc)
 			break;
 		}
 		*p++ = 0;
-		if (parseip(c->raddr, argv[1]) == -1) {
+		if(parseip(c->raddr, argv[1]) == -1){
 			e = Ebadip;
 			break;
 		}
 		findlocalip(c->p->f, c->laddr, c->raddr);
 		ecb->incoming = 0;
 		ecb->seq = 0;
-		if(strcmp(p, "*") == 0) {
+		if(strcmp(p, "*") == 0){
 			qlock(c->p);
-			for(;;) {
-				spi = nrand(1<<16) + 256;
+			for(;;){
+				spi = nrand(1 << 16) + 256;
 				if(convlookup(c->p, spi) == nil)
 					break;
 			}
@@ -233,7 +246,7 @@ espconnect(Conv *c, char **argv, int argc)
 			qhangup(c->wq, nil);
 		} else {
 			spi = strtoul(p, &pp, 10);
-			if(pp == p) {
+			if(pp == p){
 				e = "malformed address";
 				break;
 			}
@@ -248,18 +261,17 @@ espconnect(Conv *c, char **argv, int argc)
 	return e;
 }
 
-
 static int
 espstate(Conv *c, char *state, int n)
 {
-	return snprint(state, n, "%s", c->inuse?"Open\n":"Closed\n");
+	return snprint(state, n, "%s", c->inuse ? "Open\n" : "Closed\n");
 }
 
 static void
 espcreate(Conv *c)
 {
-	c->rq = qopen(64*1024, Qmsg, 0, 0);
-	c->wq = qopen(64*1024, Qkick, espkick, c);
+	c->rq = qopen(64 * 1024, Qmsg, 0, 0);
+	c->wq = qopen(64 * 1024, Qkick, espkick, c);
 }
 
 static void
@@ -273,7 +285,7 @@ espclose(Conv *c)
 	ipmove(c->laddr, IPnoaddr);
 	ipmove(c->raddr, IPnoaddr);
 
-	ecb = (Espcb*)c->ptcl;
+	ecb = (Espcb *)c->ptcl;
 	free(ecb->espstate);
 	free(ecb->ahstate);
 	memset(ecb, 0, sizeof(Espcb));
@@ -284,7 +296,7 @@ convipvers(Conv *c)
 {
 	if((memcmp(c->raddr, v4prefix, IPv4off) == 0 &&
 	    memcmp(c->laddr, v4prefix, IPv4off) == 0) ||
-	    ipcmp(c->raddr, IPnoaddr) == 0)
+	   ipcmp(c->raddr, IPnoaddr) == 0)
 		return V4;
 	else
 		return V6;
@@ -293,29 +305,29 @@ convipvers(Conv *c)
 static int
 pktipvers(Fs *f, Block **bpp)
 {
-	if (*bpp == nil || BLEN(*bpp) == 0) {
+	if(*bpp == nil || BLEN(*bpp) == 0){
 		/* get enough to identify the IP version */
 		*bpp = pullupblock(*bpp, IP4HDR);
-		if(*bpp == nil) {
+		if(*bpp == nil){
 			netlog(f, Logesp, "esp: short packet\n");
 			return 0;
 		}
 	}
-	return (((Esp4hdr*)(*bpp)->rp)->vihl & 0xf0) == IP_VER4? V4: V6;
+	return (((Esp4hdr *)(*bpp)->rp)->vihl & 0xf0) == IP_VER4 ? V4 : V6;
 }
 
 static void
 getverslens(int version, Versdep *vp)
 {
 	vp->version = version;
-	switch(vp->version) {
+	switch(vp->version){
 	case V4:
 		vp->iphdrlen = IP4HDR;
-		vp->hdrlen   = Esp4hdrlen;
+		vp->hdrlen = Esp4hdrlen;
 		break;
 	case V6:
 		vp->iphdrlen = IP6HDR;
-		vp->hdrlen   = Esp6hdrlen;
+		vp->hdrlen = Esp6hdrlen;
 		break;
 	default:
 		panic("esp: getverslens version %d wrong", version);
@@ -328,15 +340,15 @@ getpktspiaddrs(uint8_t *pkt, Versdep *vp)
 	Esp4hdr *eh4;
 	Esp6hdr *eh6;
 
-	switch(vp->version) {
+	switch(vp->version){
 	case V4:
-		eh4 = (Esp4hdr*)pkt;
+		eh4 = (Esp4hdr *)pkt;
 		v4tov6(vp->raddr, eh4->espsrc);
 		v4tov6(vp->laddr, eh4->espdst);
 		vp->spi = nhgetl(eh4->espspi);
 		break;
 	case V6:
-		eh6 = (Esp6hdr*)pkt;
+		eh6 = (Esp6hdr *)pkt;
 		ipmove(vp->raddr, eh6->src);
 		ipmove(vp->laddr, eh6->dst);
 		vp->spi = nhgetl(eh6->espspi);
@@ -372,18 +384,18 @@ espkick(void *x)
 	qlock(&c->ql);
 	ecb = c->ptcl;
 
-	if(ecb->header) {
+	if(ecb->header){
 		/* make sure the message has a User header */
 		bp = pullupblock(bp, Userhdrlen);
-		if(bp == nil) {
+		if(bp == nil){
 			qunlock(&c->ql);
 			return;
 		}
-		uh = (Userhdr*)bp->rp;
+		uh = (Userhdr *)bp->rp;
 		nexthdr = uh->nexthdr;
 		bp->rp += Userhdrlen;
 	} else {
-		nexthdr = 0;	/* what should this be? */
+		nexthdr = 0; /* what should this be? */
 	}
 
 	payload = BLEN(bp) + ecb->espivlen;
@@ -397,17 +409,17 @@ espkick(void *x)
 		align = ecb->espblklen;
 	if(align % ecb->ahblklen != 0)
 		panic("espkick: ahblklen is important after all");
-	pad = (align-1) - (payload + Esptaillen-1)%align;
+	pad = (align - 1) - (payload + Esptaillen - 1) % align;
 
 	/*
 	 * Make space for tail
 	 * this is done by calling padblock with a negative size
 	 * Padblock does not change bp->wp!
 	 */
-	bp = padblock(bp, -(pad+Esptaillen+ecb->ahlen));
-	bp->wp += pad+Esptaillen+ecb->ahlen;
+	bp = padblock(bp, -(pad + Esptaillen + ecb->ahlen));
+	bp->wp += pad + Esptaillen + ecb->ahlen;
 
-	et = (Esptail*)(bp->rp + vers.hdrlen + payload + pad);
+	et = (Esptail *)(bp->rp + vers.hdrlen + payload + pad);
 
 	/* fill in tail */
 	et->pad = pad;
@@ -418,7 +430,7 @@ espkick(void *x)
 	auth = bp->rp + vers.hdrlen + payload + pad + Esptaillen;
 
 	/* fill in head; construct a new IP header and an ESP header */
-	if (vers.version == V4) {
+	if(vers.version == V4){
 		eh4 = (Esp4hdr *)bp->rp;
 		eh4->vihl = IP_VER4;
 		v6tov4(eh4->espsrc, c->laddr);
@@ -441,12 +453,11 @@ espkick(void *x)
 	}
 
 	/* compute secure hash */
-	ecb->auth(ecb, bp->rp + vers.iphdrlen, (vers.hdrlen - vers.iphdrlen) +
-		payload + pad + Esptaillen, auth);
+	ecb->auth(ecb, bp->rp + vers.iphdrlen, (vers.hdrlen - vers.iphdrlen) + payload + pad + Esptaillen, auth);
 
 	qunlock(&c->ql);
 	/* print("esp: pass down: %lu\n", BLEN(bp)); */
-	if (vers.version == V4)
+	if(vers.version == V4)
 		ipoput4(c->p->f, bp, 0, c->ttl, c->tos, c);
 	else
 		ipoput6(c->p->f, bp, 0, c->ttl, c->tos, c);
@@ -474,7 +485,7 @@ espiput(Proto *esp, Ipifc *ipifc, Block *bp)
 	getverslens(pktipvers(f, &bp), &vers);
 
 	bp = pullupblock(bp, vers.hdrlen + Esptaillen);
-	if(bp == nil) {
+	if(bp == nil){
 		netlog(f, Logesp, "esp: short packet\n");
 		return;
 	}
@@ -483,10 +494,10 @@ espiput(Proto *esp, Ipifc *ipifc, Block *bp)
 	qlock(esp);
 	/* Look for a conversation structure for this port */
 	c = convlookup(esp, vers.spi);
-	if(c == nil) {
+	if(c == nil){
 		qunlock(esp);
 		netlog(f, Logesp, "esp: no conv %I -> %I!%lu\n", vers.raddr,
-			vers.laddr, vers.spi);
+		       vers.laddr, vers.spi);
 		icmpnoconv(f, bp);
 		freeblist(bp);
 		return;
@@ -500,55 +511,54 @@ espiput(Proto *esp, Ipifc *ipifc, Block *bp)
 	if(bp->next)
 		bp = concatblock(bp);
 
-	if(BLEN(bp) < vers.hdrlen + ecb->espivlen + Esptaillen + ecb->ahlen) {
+	if(BLEN(bp) < vers.hdrlen + ecb->espivlen + Esptaillen + ecb->ahlen){
 		qunlock(&c->ql);
 		netlog(f, Logesp, "esp: short block %I -> %I!%lu\n", vers.raddr,
-			vers.laddr, vers.spi);
+		       vers.laddr, vers.spi);
 		freeb(bp);
 		return;
 	}
 
 	auth = bp->wp - ecb->ahlen;
-	espspi = vers.version == V4?	((Esp4hdr*)bp->rp)->espspi:
-					((Esp6hdr*)bp->rp)->espspi;
+	espspi = vers.version == V4 ? ((Esp4hdr *)bp->rp)->espspi : ((Esp6hdr *)bp->rp)->espspi;
 
 	/* compute secure hash and authenticate */
-	if(!ecb->auth(ecb, espspi, auth - espspi, auth)) {
+	if(!ecb->auth(ecb, espspi, auth - espspi, auth)){
 		qunlock(&c->ql);
-print("esp: bad auth %I -> %I!%ld\n", vers.raddr, vers.laddr, vers.spi);
+		print("esp: bad auth %I -> %I!%ld\n", vers.raddr, vers.laddr, vers.spi);
 		netlog(f, Logesp, "esp: bad auth %I -> %I!%lu\n", vers.raddr,
-			vers.laddr, vers.spi);
+		       vers.laddr, vers.spi);
 		freeb(bp);
 		return;
 	}
 
 	payload = BLEN(bp) - vers.hdrlen - ecb->ahlen;
-	if(payload <= 0 || payload % 4 != 0 || payload % ecb->espblklen != 0) {
+	if(payload <= 0 || payload % 4 != 0 || payload % ecb->espblklen != 0){
 		qunlock(&c->ql);
 		netlog(f, Logesp, "esp: bad length %I -> %I!%lu payload=%d BLEN=%lu\n",
-			vers.raddr, vers.laddr, vers.spi, payload, BLEN(bp));
+		       vers.raddr, vers.laddr, vers.spi, payload, BLEN(bp));
 		freeb(bp);
 		return;
 	}
 
 	/* decrypt payload */
-	if(!ecb->cipher(ecb, bp->rp + vers.hdrlen, payload)) {
+	if(!ecb->cipher(ecb, bp->rp + vers.hdrlen, payload)){
 		qunlock(&c->ql);
-print("esp: cipher failed %I -> %I!%ld: %s\n", vers.raddr, vers.laddr, vers.spi, up->errstr);
+		print("esp: cipher failed %I -> %I!%ld: %s\n", vers.raddr, vers.laddr, vers.spi, up->errstr);
 		netlog(f, Logesp, "esp: cipher failed %I -> %I!%lu: %s\n",
-			vers.raddr, vers.laddr, vers.spi, up->errstr);
+		       vers.raddr, vers.laddr, vers.spi, up->errstr);
 		freeb(bp);
 		return;
 	}
 
 	payload -= Esptaillen;
-	et = (Esptail*)(bp->rp + vers.hdrlen + payload);
+	et = (Esptail *)(bp->rp + vers.hdrlen + payload);
 	payload -= et->pad + ecb->espivlen;
 	nexthdr = et->nexthdr;
-	if(payload <= 0) {
+	if(payload <= 0){
 		qunlock(&c->ql);
 		netlog(f, Logesp, "esp: short packet after decrypt %I -> %I!%lu\n",
-			vers.raddr, vers.laddr, vers.spi);
+		       vers.raddr, vers.laddr, vers.spi);
 		freeb(bp);
 		return;
 	}
@@ -556,10 +566,10 @@ print("esp: cipher failed %I -> %I!%ld: %s\n", vers.raddr, vers.laddr, vers.spi,
 	/* trim packet */
 	bp->rp += vers.hdrlen + ecb->espivlen; /* toss original IP & ESP hdrs */
 	bp->wp = bp->rp + payload;
-	if(ecb->header) {
+	if(ecb->header){
 		/* assume Userhdrlen < Esp4hdrlen < Esp6hdrlen */
 		bp->rp -= Userhdrlen;
-		uh = (Userhdr*)bp->rp;
+		uh = (Userhdr *)bp->rp;
 		memset(uh, 0, Userhdrlen);
 		uh->nexthdr = nexthdr;
 	}
@@ -568,17 +578,17 @@ print("esp: cipher failed %I -> %I!%ld: %s\n", vers.raddr, vers.laddr, vers.spi,
 
 	if(qfull(c->rq)){
 		netlog(f, Logesp, "esp: qfull %I -> %I.%lu\n", vers.raddr,
-			vers.laddr, vers.spi);
+		       vers.laddr, vers.spi);
 		freeblist(bp);
-	}else {
-//		print("esp: pass up: %lu\n", BLEN(bp));
-		qpass(c->rq, bp);	/* pass packet up the read queue */
+	} else {
+		//		print("esp: pass up: %lu\n", BLEN(bp));
+		qpass(c->rq, bp); /* pass packet up the read queue */
 	}
 
 	qunlock(&c->ql);
 }
 
-char*
+char *
 espctl(Conv *c, char **f, int n)
 {
 	Espcb *ecb = c->ptcl;
@@ -609,7 +619,7 @@ espadvise(Proto *esp, Block *bp, char *msg)
 
 	qlock(esp);
 	c = convlookup(esp, vers.spi);
-	if(c != nil) {
+	if(c != nil){
 		qhangup(c->rq, msg);
 		qhangup(c->wq, msg);
 	}
@@ -624,8 +634,8 @@ espstats(Proto *esp, char *buf, int len)
 
 	upriv = esp->priv;
 	return snprint(buf, len, "%llu %lu\n",
-		upriv->in,
-		upriv->inerrors);
+		       upriv->in,
+		       upriv->inerrors);
 }
 
 static int
@@ -658,13 +668,13 @@ espremote(Conv *c, char *buf, int len)
 	return n;
 }
 
-static	Conv*
+static Conv *
 convlookup(Proto *esp, uint32_t spi)
 {
 	Conv *c, **p;
 	Espcb *ecb;
 
-	for(p=esp->conv; *p; p++){
+	for(p = esp->conv; *p; p++){
 		c = *p;
 		ecb = c->ptcl;
 		if(ecb->incoming && ecb->spi == spi)
@@ -689,31 +699,31 @@ setalg(Espcb *ecb, char **f, int n, Algorithm *alg)
 		return "unknown algorithm";
 
 	nbyte = (alg->keylen + 7) >> 3;
-	if (n == 2)
+	if(n == 2)
 		nchar = 0;
 	else
 		nchar = strlen(f[2]);
-	if(nchar != 2 * nbyte)			/* TODO: maybe < is ok */
+	if(nchar != 2 * nbyte) /* TODO: maybe < is ok */
 		return "key not required length";
 	/* convert hex digits from ascii, in place */
-	for(i=0; i<nchar; i++) {
+	for(i = 0; i < nchar; i++){
 		c = f[2][i];
 		if(c >= '0' && c <= '9')
 			f[2][i] -= '0';
 		else if(c >= 'a' && c <= 'f')
-			f[2][i] -= 'a'-10;
+			f[2][i] -= 'a' - 10;
 		else if(c >= 'A' && c <= 'F')
-			f[2][i] -= 'A'-10;
+			f[2][i] -= 'A' - 10;
 		else
 			return "non-hex character in key";
 	}
 	/* collapse hex digits into complete bytes in reverse order in key */
 	key = smalloc(nbyte);
-	for(i = 0; i < nchar && i/2 < nbyte; i++) {
-		c = f[2][nchar-i-1];
-		if(i&1)
+	for(i = 0; i < nchar && i / 2 < nbyte; i++){
+		c = f[2][nchar - i - 1];
+		if(i & 1)
 			c <<= 4;
-		key[i/2] |= c;
+		key[i / 2] |= c;
 	}
 
 	alg->init(ecb, alg->name, key, alg->keylen);
@@ -721,7 +731,6 @@ setalg(Espcb *ecb, char **f, int n, Algorithm *alg)
 	return nil;
 }
 
-
 /*
  * null encryption
  */
@@ -756,7 +765,6 @@ nullahinit(Espcb *ecb, char *name, uint8_t *c, unsigned keylen)
 	ecb->auth = nullauth;
 }
 
-
 /*
  * sha1
  */
@@ -765,7 +773,7 @@ static void
 seanq_hmac_sha1(uint8_t hash[SHA1dlen], uint8_t *t, int32_t tlen, uint8_t *key, int32_t klen)
 {
 	int i;
-	uint8_t ipad[Hmacblksz+1], opad[Hmacblksz+1], innerhash[SHA1dlen];
+	uint8_t ipad[Hmacblksz + 1], opad[Hmacblksz + 1], innerhash[SHA1dlen];
 	DigestState *digest;
 
 	memset(ipad, 0x36, Hmacblksz);
@@ -788,7 +796,7 @@ shaauth(Espcb *ecb, uint8_t *t, int tlen, uint8_t *auth)
 	uint8_t hash[SHA1dlen];
 
 	memset(hash, 0, SHA1dlen);
-	seanq_hmac_sha1(hash, t, tlen, (uint8_t*)ecb->ahstate, BITS2BYTES(128));
+	seanq_hmac_sha1(hash, t, tlen, (uint8_t *)ecb->ahstate, BITS2BYTES(128));
 	r = memcmp(auth, hash, ecb->ahlen) == 0;
 	memmove(auth, hash, ecb->ahlen);
 	return r;
@@ -809,7 +817,6 @@ shaahinit(Espcb *ecb, char *name, uint8_t *key, unsigned klen)
 	memmove(ecb->ahstate, key, klen);
 }
 
-
 /*
  * aes
  */
@@ -822,8 +829,8 @@ aesahauth(Espcb *ecb, uint8_t *t, int tlen, uint8_t *auth)
 	uint8_t hash[AESdlen];
 
 	memset(hash, 0, AESdlen);
-	ecb->ds = hmac_aes(t, tlen, (uint8_t*)ecb->ahstate, BITS2BYTES(96), hash,
-		ecb->ds);
+	ecb->ds = hmac_aes(t, tlen, (uint8_t *)ecb->ahstate, BITS2BYTES(96), hash,
+			   ecb->ds);
 	r = memcmp(auth, hash, ecb->ahlen) == 0;
 	memmove(auth, hash, ecb->ahlen);
 	return r;
@@ -845,14 +852,14 @@ aesahinit(Espcb *ecb, char *name, uint8_t *key, unsigned klen)
 }
 
 static int
-aescbccipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
+aescbccipher(Espcb *ecb, uint8_t *p, int n) /* 128-bit blocks */
 {
 	uint8_t tmp[AESbsize], q[AESbsize];
 	uint8_t *pp, *tp, *ip, *eip, *ep;
 	AESstate *ds = ecb->espstate;
 
 	ep = p + n;
-	if(ecb->incoming) {
+	if(ecb->incoming){
 		memmove(ds->ivec, p, AESbsize);
 		p += AESbsize;
 		while(p < ep){
@@ -861,7 +868,7 @@ aescbccipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
 			memmove(p, q, AESbsize);
 			tp = tmp;
 			ip = ds->ivec;
-			for(eip = ip + AESbsize; ip < eip; ){
+			for(eip = ip + AESbsize; ip < eip;){
 				*p++ ^= *ip;
 				*ip++ = *tp++;
 			}
@@ -871,7 +878,7 @@ aescbccipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
 		for(p += AESbsize; p < ep; p += AESbsize){
 			pp = p;
 			ip = ds->ivec;
-			for(eip = ip + AESbsize; ip < eip; )
+			for(eip = ip + AESbsize; ip < eip;)
 				*pp++ ^= *ip++;
 			aes_encrypt(ds->ekey, ds->rounds, p, q);
 			memmove(ds->ivec, q, AESbsize);
@@ -903,14 +910,14 @@ aescbcespinit(Espcb *ecb, char *name, uint8_t *k, unsigned n)
 }
 
 static int
-aesctrcipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
+aesctrcipher(Espcb *ecb, uint8_t *p, int n) /* 128-bit blocks */
 {
 	uint8_t tmp[AESbsize], q[AESbsize];
 	uint8_t *pp, *tp, *ip, *eip, *ep;
 	AESstate *ds = ecb->espstate;
 
 	ep = p + n;
-	if(ecb->incoming) {
+	if(ecb->incoming){
 		memmove(ds->ivec, p, AESbsize);
 		p += AESbsize;
 		while(p < ep){
@@ -919,7 +926,7 @@ aesctrcipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
 			memmove(p, q, AESbsize);
 			tp = tmp;
 			ip = ds->ivec;
-			for(eip = ip + AESbsize; ip < eip; ){
+			for(eip = ip + AESbsize; ip < eip;){
 				*p++ ^= *ip;
 				*ip++ = *tp++;
 			}
@@ -929,7 +936,7 @@ aesctrcipher(Espcb *ecb, uint8_t *p, int n)	/* 128-bit blocks */
 		for(p += AESbsize; p < ep; p += AESbsize){
 			pp = p;
 			ip = ds->ivec;
-			for(eip = ip + AESbsize; ip < eip; )
+			for(eip = ip + AESbsize; ip < eip;)
 				*pp++ ^= *ip++;
 			aes_encrypt(ds->ekey, ds->rounds, p, q);
 			memmove(ds->ivec, q, AESbsize);
@@ -960,7 +967,6 @@ aesctrespinit(Espcb *ecb, char *name, uint8_t *k, unsigned n)
 	setupAESstate(ecb->espstate, key, n /* keybytes */, ivec);
 }
 
-
 /*
  * md5
  */
@@ -969,7 +975,7 @@ static void
 seanq_hmac_md5(uint8_t hash[MD5dlen], uint8_t *t, int32_t tlen, uint8_t *key, int32_t klen)
 {
 	int i;
-	uint8_t ipad[Hmacblksz+1], opad[Hmacblksz+1], innerhash[MD5dlen];
+	uint8_t ipad[Hmacblksz + 1], opad[Hmacblksz + 1], innerhash[MD5dlen];
 	DigestState *digest;
 
 	memset(ipad, 0x36, Hmacblksz);
@@ -992,7 +998,7 @@ md5auth(Espcb *ecb, uint8_t *t, int tlen, uint8_t *auth)
 	int r;
 
 	memset(hash, 0, MD5dlen);
-	seanq_hmac_md5(hash, t, tlen, (uint8_t*)ecb->ahstate, BITS2BYTES(128));
+	seanq_hmac_md5(hash, t, tlen, (uint8_t *)ecb->ahstate, BITS2BYTES(128));
 	r = memcmp(auth, hash, ecb->ahlen) == 0;
 	memmove(auth, hash, ecb->ahlen);
 	return r;
@@ -1012,7 +1018,6 @@ md5ahinit(Espcb *ecb, char *name, uint8_t *key, unsigned klen)
 	memmove(ecb->ahstate, key, klen);
 }
 
-
 /*
  * des, single and triple
  */
@@ -1022,7 +1027,7 @@ descipher(Espcb *ecb, uint8_t *p, int n)
 {
 	DESstate *ds = ecb->espstate;
 
-	if(ecb->incoming) {
+	if(ecb->incoming){
 		memmove(ds->ivec, p, Desblk);
 		desCBCdecrypt(p + Desblk, n - Desblk, ds);
 	} else {
@@ -1037,7 +1042,7 @@ des3cipher(Espcb *ecb, uint8_t *p, int n)
 {
 	DES3state *ds = ecb->espstate;
 
-	if(ecb->incoming) {
+	if(ecb->incoming){
 		memmove(ds->ivec, p, Desblk);
 		des3CBCdecrypt(p + Desblk, n - Desblk, ds);
 	} else {
@@ -1091,7 +1096,6 @@ des3espinit(Espcb *ecb, char *name, uint8_t *k, unsigned n)
 	setupDES3state(ecb->espstate, key, ivec);
 }
 
-
 /*
  * interfacing to devip
  */

sys/src/9/ip/ethermedium.c

@@ -19,109 +19,117 @@
 #include "ipv6.h"
 
 typedef struct Etherhdr Etherhdr;
-struct Etherhdr
-{
-	uint8_t	d[6];
-	uint8_t	s[6];
-	uint8_t	t[2];
+struct Etherhdr {
+	uint8_t d[6];
+	uint8_t s[6];
+	uint8_t t[2];
 };
 
 static uint8_t ipbroadcast[IPaddrlen] = {
-	0xff,0xff,0xff,0xff,
-	0xff,0xff,0xff,0xff,
-	0xff,0xff,0xff,0xff,
-	0xff,0xff,0xff,0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
+	0xff,
 };
 
-static uint8_t etherbroadcast[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
-
-static void	etherread4(void *a);
-static void	etherread6(void *a);
-static void	etherbind(Ipifc *ifc, int argc, char **argv);
-static void	etherunbind(Ipifc *ifc);
-static void	etherbwrite(Ipifc *ifc, Block *bp, int version, uint8_t *ip);
-static void	etheraddmulti(Ipifc *ifc, uint8_t *a, uint8_t *ia);
-static void	etherremmulti(Ipifc *ifc, uint8_t *a, uint8_t *ia);
-static Block*	multicastarp(Fs *f, Arpent *a, Medium*, uint8_t *mac);
-static void	sendarp(Ipifc *ifc, Arpent *a);
-static void	sendgarp(Ipifc *ifc, uint8_t*);
-static int	multicastea(uint8_t *ea, uint8_t *ip);
-static void	recvarpproc(void*);
-static void	resolveaddr6(Ipifc *ifc, Arpent *a);
-static void	etherpref2addr(uint8_t *pref, uint8_t *ea);
+static uint8_t etherbroadcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+static void etherread4(void *a);
+static void etherread6(void *a);
+static void etherbind(Ipifc *ifc, int argc, char **argv);
+static void etherunbind(Ipifc *ifc);
+static void etherbwrite(Ipifc *ifc, Block *bp, int version, uint8_t *ip);
+static void etheraddmulti(Ipifc *ifc, uint8_t *a, uint8_t *ia);
+static void etherremmulti(Ipifc *ifc, uint8_t *a, uint8_t *ia);
+static Block *multicastarp(Fs *f, Arpent *a, Medium *, uint8_t *mac);
+static void sendarp(Ipifc *ifc, Arpent *a);
+static void sendgarp(Ipifc *ifc, uint8_t *);
+static int multicastea(uint8_t *ea, uint8_t *ip);
+static void recvarpproc(void *);
+static void resolveaddr6(Ipifc *ifc, Arpent *a);
+static void etherpref2addr(uint8_t *pref, uint8_t *ea);
 
 Medium ethermedium =
-{
-.name=		"ether",
-.hsize=		14,
-.mintu=		60,
-.maxtu=		1514,
-.maclen=	6,
-.bind=		etherbind,
-.unbind=	etherunbind,
-.bwrite=	etherbwrite,
-.addmulti=	etheraddmulti,
-.remmulti=	etherremmulti,
-.ares=		arpenter,
-.areg=		sendgarp,
-.pref2addr=	etherpref2addr,
+	{
+		.name = "ether",
+		.hsize = 14,
+		.mintu = 60,
+		.maxtu = 1514,
+		.maclen = 6,
+		.bind = etherbind,
+		.unbind = etherunbind,
+		.bwrite = etherbwrite,
+		.addmulti = etheraddmulti,
+		.remmulti = etherremmulti,
+		.ares = arpenter,
+		.areg = sendgarp,
+		.pref2addr = etherpref2addr,
 };
 
 Medium gbemedium =
-{
-.name=		"gbe",
-.hsize=		14,
-.mintu=		60,
-.maxtu=		9014,
-.maclen=	6,
-.bind=		etherbind,
-.unbind=	etherunbind,
-.bwrite=	etherbwrite,
-.addmulti=	etheraddmulti,
-.remmulti=	etherremmulti,
-.ares=		arpenter,
-.areg=		sendgarp,
-.pref2addr=	etherpref2addr,
+	{
+		.name = "gbe",
+		.hsize = 14,
+		.mintu = 60,
+		.maxtu = 9014,
+		.maclen = 6,
+		.bind = etherbind,
+		.unbind = etherunbind,
+		.bwrite = etherbwrite,
+		.addmulti = etheraddmulti,
+		.remmulti = etherremmulti,
+		.ares = arpenter,
+		.areg = sendgarp,
+		.pref2addr = etherpref2addr,
 };
 
-typedef struct	Etherrock Etherrock;
-struct Etherrock
-{
-	Fs	*f;		/* file system we belong to */
-	Proc	*arpp;		/* arp process */
-	Proc	*read4p;	/* reading process (v4)*/
-	Proc	*read6p;	/* reading process (v6)*/
-	Chan	*mchan4;	/* Data channel for v4 */
-	Chan	*achan;		/* Arp channel */
-	Chan	*cchan4;	/* Control channel for v4 */
-	Chan	*mchan6;	/* Data channel for v6 */
-	Chan	*cchan6;	/* Control channel for v6 */
+typedef struct Etherrock Etherrock;
+struct Etherrock {
+	Fs *f;	      /* file system we belong to */
+	Proc *arpp;   /* arp process */
+	Proc *read4p; /* reading process (v4)*/
+	Proc *read6p; /* reading process (v6)*/
+	Chan *mchan4; /* Data channel for v4 */
+	Chan *achan;  /* Arp channel */
+	Chan *cchan4; /* Control channel for v4 */
+	Chan *mchan6; /* Data channel for v6 */
+	Chan *cchan6; /* Control channel for v6 */
 };
 
 /*
  *  ethernet arp request
  */
-enum
-{
-	ARPREQUEST	= 1,
-	ARPREPLY	= 2,
+enum {
+	ARPREQUEST = 1,
+	ARPREPLY = 2,
 };
 
 typedef struct Etherarp Etherarp;
-struct Etherarp
-{
-	uint8_t	d[6];
-	uint8_t	s[6];
-	uint8_t	type[2];
-	uint8_t	hrd[2];
-	uint8_t	pro[2];
-	uint8_t	hln;
-	uint8_t	pln;
-	uint8_t	op[2];
-	uint8_t	sha[6];
-	uint8_t	spa[4];
-	uint8_t	tha[6];
-	uint8_t	tpa[4];
+struct Etherarp {
+	uint8_t d[6];
+	uint8_t s[6];
+	uint8_t type[2];
+	uint8_t hrd[2];
+	uint8_t pro[2];
+	uint8_t hln;
+	uint8_t pln;
+	uint8_t op[2];
+	uint8_t sha[6];
+	uint8_t spa[4];
+	uint8_t tha[6];
+	uint8_t tpa[4];
 };
 
 static char *nbmsg = "nonblocking";
@@ -135,8 +143,8 @@ etherbind(Ipifc *ifc, int argc, char **argv)
 {
 	Proc *up = externup();
 	Chan *mchan4, *cchan4, *achan, *mchan6, *cchan6, *schan;
-	char addr[Maxpath];	//char addr[2*KNAMELEN];
-	char dir[Maxpath];	//char dir[2*KNAMELEN];
+	char addr[Maxpath];	   //char addr[2*KNAMELEN];
+	char dir[Maxpath];	   //char dir[2*KNAMELEN];
 	char *buf;
 	int n;
 	char *ptr;
@@ -169,7 +177,7 @@ etherbind(Ipifc *ifc, int argc, char **argv)
 	 *  the dial will fail if the type is already open on
 	 *  this device.
 	 */
-	snprint(addr, sizeof(addr), "%s!0x800", argv[2]);	/* ETIP4 */
+	snprint(addr, sizeof(addr), "%s!0x800", argv[2]); /* ETIP4 */
 	mchan4 = chandial(addr, nil, dir, &cchan4);
 
 	/*
@@ -208,7 +216,7 @@ etherbind(Ipifc *ifc, int argc, char **argv)
 	/*
  	 *  open arp conversation
 	 */
-	snprint(addr, sizeof(addr), "%s!0x806", argv[2]);	/* ETARP */
+	snprint(addr, sizeof(addr), "%s!0x806", argv[2]); /* ETARP */
 	achan = chandial(addr, nil, nil, nil);
 
 	/*
@@ -217,7 +225,7 @@ etherbind(Ipifc *ifc, int argc, char **argv)
 	 *  the dial will fail if the type is already open on
 	 *  this device.
 	 */
-	snprint(addr, sizeof(addr), "%s!0x86DD", argv[2]);	/* ETIP6 */
+	snprint(addr, sizeof(addr), "%s!0x86DD", argv[2]); /* ETIP6 */
 	mchan6 = chandial(addr, nil, dir, &cchan6);
 
 	/*
@@ -292,7 +300,7 @@ etherbwrite(Ipifc *ifc, Block *bp, int version, uint8_t *ip)
 	if(a){
 		/* check for broadcast or multicast */
 		bp = multicastarp(er->f, a, ifc->medium, mac);
-		if(bp==nil){
+		if(bp == nil){
 			switch(version){
 			case V4:
 				sendarp(ifc, a);
@@ -313,13 +321,13 @@ etherbwrite(Ipifc *ifc, Block *bp, int version, uint8_t *ip)
 		bp = concatblock(bp);
 	if(BLEN(bp) < ifc->mintu)
 		bp = adjustblock(bp, ifc->mintu);
-	eh = (Etherhdr*)bp->rp;
+	eh = (Etherhdr *)bp->rp;
 
 	/* copy in mac addresses and ether type */
 	memmove(eh->s, ifc->mac, sizeof(eh->s));
 	memmove(eh->d, mac, sizeof(eh->d));
 
- 	switch(version){
+	switch(version){
 	case V4:
 		eh->t[0] = 0x08;
 		eh->t[1] = 0x00;
@@ -336,7 +344,6 @@ etherbwrite(Ipifc *ifc, Block *bp, int version, uint8_t *ip)
 	ifc->out++;
 }
 
-
 /*
  *  process to read from the ethernet
  */
@@ -350,7 +357,7 @@ etherread4(void *a)
 
 	ifc = a;
 	er = ifc->arg;
-	er->read4p = up;	/* hide identity under a rock for unbind */
+	er->read4p = up; /* hide identity under a rock for unbind */
 	if(waserror()){
 		er->read4p = 0;
 		pexit("hangup", 1);
@@ -376,7 +383,6 @@ etherread4(void *a)
 	}
 }
 
-
 /*
  *  process to read from the ethernet, IPv6
  */
@@ -390,7 +396,7 @@ etherread6(void *a)
 
 	ifc = a;
 	er = ifc->arg;
-	er->read6p = up;	/* hide identity under a rock for unbind */
+	er->read6p = up; /* hide identity under a rock for unbind */
 	if(waserror()){
 		er->read6p = 0;
 		pexit("hangup", 1);
@@ -495,11 +501,11 @@ sendarp(Ipifc *ifc, Arpent *a)
 		n = a->type->mintu;
 	bp = allocb(n);
 	memset(bp->rp, 0, n);
-	e = (Etherarp*)bp->rp;
-	memmove(e->tpa, a->ip+IPv4off, sizeof(e->tpa));
+	e = (Etherarp *)bp->rp;
+	memmove(e->tpa, a->ip + IPv4off, sizeof(e->tpa));
 	ipv4local(ifc, e->spa);
 	memmove(e->sha, ifc->mac, sizeof(e->sha));
-	memset(e->d, 0xff, sizeof(e->d));		/* ethernet broadcast */
+	memset(e->d, 0xff, sizeof(e->d)); /* ethernet broadcast */
 	memmove(e->s, ifc->mac, sizeof(e->s));
 
 	hnputs(e->type, ETARP);
@@ -538,7 +544,7 @@ resolveaddr6(Ipifc *ifc, Arpent *a)
 	/* try to keep it around for a second more */
 	a->ctime = NOW;
 	a->rtime = NOW + ReTransTimer;
-	if(a->rxtsrem <= 0) {
+	if(a->rxtsrem <= 0){
 		arprelease(er->f->arp, a);
 		return;
 	}
@@ -570,11 +576,11 @@ sendgarp(Ipifc *ifc, uint8_t *ip)
 		n = ifc->medium->mintu;
 	bp = allocb(n);
 	memset(bp->rp, 0, n);
-	e = (Etherarp*)bp->rp;
-	memmove(e->tpa, ip+IPv4off, sizeof(e->tpa));
-	memmove(e->spa, ip+IPv4off, sizeof(e->spa));
+	e = (Etherarp *)bp->rp;
+	memmove(e->tpa, ip + IPv4off, sizeof(e->tpa));
+	memmove(e->spa, ip + IPv4off, sizeof(e->spa));
 	memmove(e->sha, ifc->mac, sizeof(e->sha));
-	memset(e->d, 0xff, sizeof(e->d));		/* ethernet broadcast */
+	memset(e->d, 0xff, sizeof(e->d)); /* ethernet broadcast */
 	memmove(e->s, ifc->mac, sizeof(e->s));
 
 	hnputs(e->type, ETARP);
@@ -602,8 +608,8 @@ recvarp(Ipifc *ifc)
 	if(ebp == nil)
 		return;
 
-	e = (Etherarp*)ebp->rp;
-	switch(nhgets(e->op)) {
+	e = (Etherarp *)ebp->rp;
+	switch(nhgets(e->op)){
 	default:
 		break;
 
@@ -613,16 +619,16 @@ recvarp(Ipifc *ifc)
 		if(iplocalonifc(ifc, ip) || ipproxyifc(er->f, ifc, ip)){
 			if(memcmp(e->sha, ifc->mac, sizeof(e->sha)) != 0){
 				print("arprep: 0x%E/0x%E also has ip addr %V\n",
-					e->s, e->sha, e->spa);
+				      e->s, e->sha, e->spa);
 				break;
 			}
 		}
 
 		/* make sure we're not entering broadcast addresses */
 		if(ipcmp(ip, ipbroadcast) == 0 ||
-			!memcmp(e->sha, etherbroadcast, sizeof(e->sha))){
+		   !memcmp(e->sha, etherbroadcast, sizeof(e->sha))){
 			print("arprep: 0x%E/0x%E cannot register broadcast address %I\n",
-				e->s, e->sha, e->spa);
+			      e->s, e->sha, e->spa);
 			break;
 		}
 
@@ -638,7 +644,7 @@ recvarp(Ipifc *ifc)
 		v4tov6(ip, e->spa);
 		if(iplocalonifc(ifc, ip) || ipproxyifc(er->f, ifc, ip)){
 			if(memcmp(e->sha, ifc->mac, sizeof(e->sha)) != 0){
-				if (memcmp(eprinted, e->spa, sizeof(e->spa))){
+				if(memcmp(eprinted, e->spa, sizeof(e->spa))){
 					/* print only once */
 					print("arpreq: 0x%E also has ip addr %V\n", e->sha, e->spa);
 					memmove(eprinted, e->spa, sizeof(e->spa));
@@ -657,14 +663,14 @@ recvarp(Ipifc *ifc)
 		/* answer only requests for our address or systems we're proxying for */
 		v4tov6(ip, e->tpa);
 		if(!iplocalonifc(ifc, ip))
-		if(!ipproxyifc(er->f, ifc, ip))
-			break;
+			if(!ipproxyifc(er->f, ifc, ip))
+				break;
 
 		n = sizeof(Etherarp);
 		if(n < ifc->mintu)
 			n = ifc->mintu;
 		rbp = allocb(n);
-		r = (Etherarp*)rbp->rp;
+		r = (Etherarp *)rbp->rp;
 		memset(r, 0, sizeof(Etherarp));
 		hnputs(r->type, ETARP);
 		hnputs(r->hrd, 1);
@@ -715,14 +721,14 @@ multicastea(uint8_t *ea, uint8_t *ip)
 		ea[4] = ip[14];
 		ea[5] = ip[15];
 		break;
- 	case V6:
- 		ea[0] = 0x33;
- 		ea[1] = 0x33;
- 		ea[2] = ip[12];
+	case V6:
+		ea[0] = 0x33;
+		ea[1] = 0x33;
+		ea[2] = ip[12];
 		ea[3] = ip[13];
- 		ea[4] = ip[14];
- 		ea[5] = ip[15];
- 		break;
+		ea[4] = ip[14];
+		ea[5] = ip[15];
+		break;
 	}
 	return x;
 }
@@ -732,7 +738,7 @@ multicastea(uint8_t *ea, uint8_t *ip)
  *  addresses.  Return the first queued packet for the
  *  IP address.
  */
-static Block*
+static Block *
 multicastarp(Fs *f, Arpent *a, Medium *medium, uint8_t *mac)
 {
 	/* is it broadcast? */
@@ -764,7 +770,6 @@ ethermediumlink(void)
 	addipmedium(&gbemedium);
 }
 
-
 static void
 etherpref2addr(uint8_t *pref, uint8_t *ea)
 {

sys/src/9/ip/gre.c

@@ -20,26 +20,26 @@
 #include "ip.h"
 
 enum {
-	GRE_IPONLY	= 12,		/* size of ip header */
-	GRE_IPPLUSGRE	= 12,		/* minimum size of GRE header */
-	IP_GREPROTO	= 47,
+	GRE_IPONLY = 12,    /* size of ip header */
+	GRE_IPPLUSGRE = 12, /* minimum size of GRE header */
+	IP_GREPROTO = 47,
 
-	GRErxms		= 200,
-	GREtickms	= 100,
-	GREmaxxmit	= 10,
+	GRErxms = 200,
+	GREtickms = 100,
+	GREmaxxmit = 10,
 
-	K		= 1024,
-	GREqlen		= 256 * K,
+	K = 1024,
+	GREqlen = 256 * K,
 
-	GRE_cksum	= 0x8000,
-	GRE_routing	= 0x4000,
-	GRE_key		= 0x2000,
-	GRE_seq		= 0x1000,
+	GRE_cksum = 0x8000,
+	GRE_routing = 0x4000,
+	GRE_key = 0x2000,
+	GRE_seq = 0x1000,
 
-	Nring		= 1 << 10,	/* power of two, please */
-	Ringmask	= Nring - 1,
+	Nring = 1 << 10, /* power of two, please */
+	Ringmask = Nring - 1,
 
-	GREctlraw	= 0,
+	GREctlraw = 0,
 	GREctlcooked,
 	GREctlretunnel,
 	GREctlreport,
@@ -53,61 +53,61 @@ enum {
 };
 
 typedef struct GREhdr GREhdr;
-struct GREhdr{
+struct GREhdr {
 	/* ip header */
-	uint8_t	vihl;		/* Version and header length */
-	uint8_t	tos;		/* Type of service */
-	uint8_t	len[2];		/* packet length (including headers) */
-	uint8_t	id[2];		/* Identification */
-	uint8_t	frag[2];	/* Fragment information */
-	uint8_t	ttl;
-	uint8_t	proto;		/* Protocol */
-	uint8_t	cksum[2];	/* checksum */
-	uint8_t	src[4];		/* Ip source */
-	uint8_t	dst[4];		/* Ip destination */
+	uint8_t vihl;	 /* Version and header length */
+	uint8_t tos;	 /* Type of service */
+	uint8_t len[2];	 /* packet length (including headers) */
+	uint8_t id[2];	 /* Identification */
+	uint8_t frag[2]; /* Fragment information */
+	uint8_t ttl;
+	uint8_t proto;	  /* Protocol */
+	uint8_t cksum[2]; /* checksum */
+	uint8_t src[4];	  /* Ip source */
+	uint8_t dst[4];	  /* Ip destination */
 
 	/* gre header */
-	uint8_t	flags[2];
-	uint8_t	eproto[2];	/* encapsulation protocol */
+	uint8_t flags[2];
+	uint8_t eproto[2]; /* encapsulation protocol */
 };
 
 typedef struct GREpriv GREpriv;
-struct GREpriv{
+struct GREpriv {
 	/* non-MIB stats */
-	uint32_t	lenerr;			/* short packet */
+	uint32_t lenerr; /* short packet */
 };
 
-typedef struct Bring	Bring;
-struct Bring{
-	Block	*ring[Nring];
-	int32_t	produced;
-	int32_t	consumed;
+typedef struct Bring Bring;
+struct Bring {
+	Block *ring[Nring];
+	int32_t produced;
+	int32_t consumed;
 };
 
-typedef struct GREconv	GREconv;
-struct GREconv{
-	int	raw;
+typedef struct GREconv GREconv;
+struct GREconv {
+	int raw;
 
 	/* Retunnelling information.  v4 only */
-	uint8_t	north[4];			/* HA */
-	uint8_t	south[4];			/* Base station */
-	uint8_t	hoa[4];				/* Home address */
-	uint8_t	coa[4];				/* Careof address */
-	uint32_t	seq;				/* Current sequence # */
-	int	dlsusp;				/* Downlink suspended? */
-	int	ulsusp;				/* Uplink suspended? */
-	uint32_t	ulkey;				/* GRE key */
-
-	QLock	lock;				/* Lock for rings */
-	Bring	dlpending;			/* Ring of pending packets */
-	Bring	dlbuffered;			/* Received while suspended */
-	Bring	ulbuffered;			/* Received while suspended */
+	uint8_t north[4]; /* HA */
+	uint8_t south[4]; /* Base station */
+	uint8_t hoa[4];	  /* Home address */
+	uint8_t coa[4];	  /* Careof address */
+	uint32_t seq;	  /* Current sequence # */
+	int dlsusp;	  /* Downlink suspended? */
+	int ulsusp;	  /* Uplink suspended? */
+	uint32_t ulkey;	  /* GRE key */
+
+	QLock lock;	  /* Lock for rings */
+	Bring dlpending;  /* Ring of pending packets */
+	Bring dlbuffered; /* Received while suspended */
+	Bring ulbuffered; /* Received while suspended */
 };
 
 typedef struct Metablock Metablock;
-struct Metablock{
-	uint8_t	*rp;
-	uint32_t	seq;
+struct Metablock {
+	uint8_t *rp;
+	uint32_t seq;
 };
 
 static char *grectlcooked(Conv *, int, char **);
@@ -121,21 +121,61 @@ static char *grectlulkey(Conv *, int, char **);
 static char *grectlulresume(Conv *, int, char **);
 static char *grectlulsuspend(Conv *, int, char **);
 
-static struct{
-	char	*cmd;
-	int	argc;
-	char	*(*f)(Conv *, int, char **);
+static struct {
+	char *cmd;
+	int argc;
+	char *(*f)(Conv *, int, char **);
 } grectls[Ncmds] = {
-[GREctlraw]	=	{	"raw",		1,	grectlraw,	},
-[GREctlcooked]	=	{	"cooked",	1,	grectlcooked,	},
-[GREctlretunnel]=	{	"retunnel",	5,	grectlretunnel,	},
-[GREctlreport]	=	{	"report",	2,	grectlreport,	},
-[GREctldlsuspend]=	{	"dlsuspend",	1,	grectldlsuspend,},
-[GREctlulsuspend]=	{	"ulsuspend",	1,	grectlulsuspend,},
-[GREctldlresume]=	{	"dlresume",	1,	grectldlresume,	},
-[GREctlulresume]=	{	"ulresume",	1,	grectlulresume,	},
-[GREctlforward]	=	{	"forward",	2,	grectlforward,	},
-[GREctlulkey]	=	{	"ulkey",	2,	grectlulkey,	},
+	[GREctlraw] = {
+		"raw",
+		1,
+		grectlraw,
+	},
+	[GREctlcooked] = {
+		"cooked",
+		1,
+		grectlcooked,
+	},
+	[GREctlretunnel] = {
+		"retunnel",
+		5,
+		grectlretunnel,
+	},
+	[GREctlreport] = {
+		"report",
+		2,
+		grectlreport,
+	},
+	[GREctldlsuspend] = {
+		"dlsuspend",
+		1,
+		grectldlsuspend,
+	},
+	[GREctlulsuspend] = {
+		"ulsuspend",
+		1,
+		grectlulsuspend,
+	},
+	[GREctldlresume] = {
+		"dlresume",
+		1,
+		grectldlresume,
+	},
+	[GREctlulresume] = {
+		"ulresume",
+		1,
+		grectlulresume,
+	},
+	[GREctlforward] = {
+		"forward",
+		2,
+		grectlforward,
+	},
+	[GREctlulkey] = {
+		"ulkey",
+		2,
+		grectlulkey,
+	},
 };
 
 static uint8_t nulladdr[4];
@@ -228,24 +268,24 @@ grestate(Conv *c, char *state, int n)
 	char *ep, *p;
 
 	grec = c->ptcl;
-	p    = state;
-	ep   = p + n;
-	p    = seprint(p, ep, "%s%s%s%shoa %V north %V south %V seq %lx "
-	 "pending %lu  %lu buffered dl %lu %lu ul %lu %lu ulkey %.8lx\n",
-			c->inuse? "Open ": "Closed ",
-			grec->raw? "raw ": "",
-			grec->dlsusp? "DL suspended ": "",
-			grec->ulsusp? "UL suspended ": "",
-			grec->hoa, grec->north, grec->south, grec->seq,
-			grec->dlpending.consumed, grec->dlpending.produced,
-			grec->dlbuffered.consumed, grec->dlbuffered.produced,
-			grec->ulbuffered.consumed, grec->ulbuffered.produced,
-			grec->ulkey);
+	p = state;
+	ep = p + n;
+	p = seprint(p, ep, "%s%s%s%shoa %V north %V south %V seq %lx "
+			   "pending %lu  %lu buffered dl %lu %lu ul %lu %lu ulkey %.8lx\n",
+		    c->inuse ? "Open " : "Closed ",
+		    grec->raw ? "raw " : "",
+		    grec->dlsusp ? "DL suspended " : "",
+		    grec->ulsusp ? "UL suspended " : "",
+		    grec->hoa, grec->north, grec->south, grec->seq,
+		    grec->dlpending.consumed, grec->dlpending.produced,
+		    grec->dlbuffered.consumed, grec->dlbuffered.produced,
+		    grec->ulbuffered.consumed, grec->ulbuffered.produced,
+		    grec->ulkey);
 	return p - state;
 }
 
-static char*
-greannounce(Conv* conv, char** c, int i)
+static char *
+greannounce(Conv *conv, char **c, int i)
 {
 	return "gre does not support announce";
 }
@@ -301,7 +341,7 @@ grekick(void *x, Block *bp)
 	if(bp == nil)
 		return;
 
-	c    = x;
+	c = x;
 	grec = c->ptcl;
 
 	/* Make space to fit ip header (gre header already there) */
@@ -310,7 +350,7 @@ grekick(void *x, Block *bp)
 		return;
 
 	/* make sure the message has a GRE header */
-	bp = pullupblock(bp, GRE_IPONLY+GRE_IPPLUSGRE);
+	bp = pullupblock(bp, GRE_IPONLY + GRE_IPPLUSGRE);
 	if(bp == nil)
 		return;
 
@@ -360,8 +400,8 @@ gredownlink(Conv *c, Block *bp)
 	 * re-adjust the packet header to strip all unwanted parts
 	 * but leave room for only a sequence number.
 	 */
-	grec   = c->ptcl;
-	flags  = nhgets(gre->flags);
+	grec = c->ptcl;
+	flags = nhgets(gre->flags);
 	hdrlen = 0;
 	if(flags & GRE_cksum)
 		hdrlen += 2;
@@ -370,8 +410,8 @@ gredownlink(Conv *c, Block *bp)
 		freeb(bp);
 		return;
 	}
-	if(flags & (GRE_cksum|GRE_routing))
-		hdrlen += 2;			/* Offset field */
+	if(flags & (GRE_cksum | GRE_routing))
+		hdrlen += 2; /* Offset field */
 	if(flags & GRE_key)
 		hdrlen += 4;
 	if(flags & GRE_seq)
@@ -403,7 +443,7 @@ gredownlink(Conv *c, Block *bp)
 	 */
 	assert(bp->rp - bp->base >= sizeof(Metablock));
 	m = (Metablock *)bp->base;
-	m->rp  = bp->rp;
+	m->rp = bp->rp;
 	m->seq = seq;
 
 	/*
@@ -461,7 +501,7 @@ restart:
 	 * Now make sure we didn't do the wrong thing.
 	 */
 	if(!canqlock(&grec->lock)){
-		freeb(bp);		/* The packet just goes away */
+		freeb(bp); /* The packet just goes away */
 		return;
 	}
 
@@ -490,9 +530,9 @@ greuplink(Conv *c, Block *bp)
 	 */
 	if(grec->ulkey){
 		flags = nhgets(gre->flags);
-		if(flags & (GRE_cksum|GRE_routing)){
+		if(flags & (GRE_cksum | GRE_routing)){
 			print("%V routing info present.  Discarding packet\n",
-				gre->src);
+			      gre->src);
 			freeb(bp);
 			return;
 		}
@@ -523,7 +563,7 @@ greuplink(Conv *c, Block *bp)
 
 	if(grec->ulsusp)
 		addring(&grec->ulbuffered, bp);
-	else{
+	else {
 		ipoput4(c->p->f, bp, 0, gre->ttl - 1, gre->tos, nil);
 		grepuout++;
 		grebuout += BLEN(bp);
@@ -550,7 +590,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 	 */
 	if(bp->next){
 		len = blocklen(bp);
-		bp  = pullupblock(bp, len);
+		bp = pullupblock(bp, len);
 		assert(BLEN(bp) == len && bp->next == nil);
 	}
 
@@ -562,7 +602,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 
 	v4tov6(raddr, gre->src);
 	eproto = nhgets(gre->eproto);
-	flags  = nhgets(gre->flags);
+	flags = nhgets(gre->flags);
 	hdrlen = sizeof(GREhdr);
 
 	if(flags & GRE_cksum)
@@ -572,8 +612,8 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 		freeb(bp);
 		return;
 	}
-	if(flags & (GRE_cksum|GRE_routing))
-		hdrlen += 2;			/* Offset field */
+	if(flags & (GRE_cksum | GRE_routing))
+		hdrlen += 2; /* Offset field */
 	if(flags & GRE_key)
 		hdrlen += 4;
 	if(flags & GRE_seq)
@@ -581,7 +621,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 
 	if(BLEN(bp) - hdrlen < sizeof(Ip4hdr)){
 		print("greretunnel: packet too short (s=%V d=%V)\n",
-			gre->src, gre->dst);
+		      gre->src, gre->dst);
 		freeb(bp);
 		return;
 	}
@@ -592,7 +632,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 	 * Look for a conversation structure for this port and address, or
 	 * match the retunnel part, or match on the raw flag.
 	 */
-	for(p = proto->conv; *p; p++) {
+	for(p = proto->conv; *p; p++){
 		c = *p;
 
 		if(c->inuse == 0)
@@ -624,7 +664,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 	 * when we get here, none of the forwarding tunnels matched.  now
 	 * try to match on raw and conversational sessions.
 	 */
-	for(c = nil, p = proto->conv; *p; p++) {
+	for(c = nil, p = proto->conv; *p; p++){
 		c = *p;
 
 		if(c->inuse == 0)
@@ -636,7 +676,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 		 */
 		grec = c->ptcl;
 		if(c->rport == eproto &&
-		    (grec->raw || ipcmp(c->raddr, raddr) == 0))
+		   (grec->raw || ipcmp(c->raddr, raddr) == 0))
 			break;
 	}
 
@@ -668,7 +708,7 @@ greiput(Proto *proto, Ipifc *ipifc, Block *bp)
 	 */
 	if(qlen(c->rq) > GREqlen)
 		freeb(bp);
-	else{
+	else {
 		bp = concatblock(bp);
 		if(bp == 0)
 			panic("greiput");
@@ -683,9 +723,9 @@ grestats(Proto *gre, char *buf, int len)
 
 	gpriv = gre->priv;
 	return snprint(buf, len,
-		"gre: %lu %lu %lu %lu %lu %lu %lu %lu, lenerrs %lu\n",
-		grepdin, grepdout, grepuin, grepuout,
-		grebdin, grebdout, grebuin, grebuout, gpriv->lenerr);
+		       "gre: %lu %lu %lu %lu %lu %lu %lu %lu, lenerrs %lu\n",
+		       grepdin, grepdout, grepuin, grepuout,
+		       grebdin, grebdout, grebuin, grebuout, gpriv->lenerr);
 }
 
 static char *
@@ -744,7 +784,7 @@ grectlreport(Conv *c, int i, char **argv)
 	Metablock *m;
 
 	grec = c->ptcl;
-	seq  = strtoul(argv[1], nil, 0);
+	seq = strtoul(argv[1], nil, 0);
 
 	qlock(&grec->lock);
 	r = &grec->dlpending;
@@ -887,9 +927,8 @@ grectlforward(Conv *c, int i, char **argv)
 			memmove(nbp->wp, m->rp, len);
 			nbp->wp += len;
 			freeb(bp);
-			bp  = nbp;
-		}
-		else{
+			bp = nbp;
+		} else {
 			/* Patch up rp */
 			bp->rp = m->rp;
 		}