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@@ -433,6 +433,9 @@ trap(Ureg* ureg)
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if(ctl->Vkey.irq == IrqCLOCK || ctl->Vkey.irq == IrqTIMER)
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clockintr = 1;
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+ if (ctl->Vkey.irq == IrqTIMER)
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+ oprof_alarm_handler(ureg);
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+
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if(up && !clockintr)
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preempted();
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}
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@@ -513,38 +516,38 @@ dumpgpr(Ureg* ureg)
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{
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Proc *up = externup();
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if(up != nil)
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- iprint("cpu%d: registers for %s %d\n",
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+ print("cpu%d: registers for %s %d\n",
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machp()->machno, up->text, up->pid);
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else
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- iprint("cpu%d: registers for kernel\n", machp()->machno);
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-
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- iprint("ax\t%#16.16llux\n", ureg->ax);
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- iprint("bx\t%#16.16llux\n", ureg->bx);
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- iprint("cx\t%#16.16llux\n", ureg->cx);
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- iprint("dx\t%#16.16llux\n", ureg->dx);
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- iprint("di\t%#16.16llux\n", ureg->di);
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- iprint("si\t%#16.16llux\n", ureg->si);
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- iprint("bp\t%#16.16llux\n", ureg->bp);
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- iprint("r8\t%#16.16llux\n", ureg->r8);
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- iprint("r9\t%#16.16llux\n", ureg->r9);
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- iprint("r10\t%#16.16llux\n", ureg->r10);
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- iprint("r11\t%#16.16llux\n", ureg->r11);
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- iprint("r12\t%#16.16llux\n", ureg->r12);
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- iprint("r13\t%#16.16llux\n", ureg->r13);
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- iprint("r14\t%#16.16llux\n", ureg->r14);
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- iprint("r15\t%#16.16llux\n", ureg->r15);
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- iprint("type\t%#llux\n", ureg->type);
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- iprint("error\t%#llux\n", ureg->error);
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- iprint("pc\t%#llux\n", ureg->ip);
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- iprint("cs\t%#llux\n", ureg->cs);
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- iprint("flags\t%#llux\n", ureg->flags);
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- iprint("sp\t%#llux\n", ureg->sp);
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- iprint("ss\t%#llux\n", ureg->ss);
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- iprint("type\t%#llux\n", ureg->type);
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- iprint("FS\t%#llux\n", rdmsr(FSbase));
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- iprint("GS\t%#llux\n", rdmsr(GSbase));
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-
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- iprint("m\t%#16.16p\nup\t%#16.16p\n", machp(), up);
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+ print("cpu%d: registers for kernel\n", machp()->machno);
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+
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+ print("ax\t%#16.16llux\n", ureg->ax);
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+ print("bx\t%#16.16llux\n", ureg->bx);
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+ print("cx\t%#16.16llux\n", ureg->cx);
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+ print("dx\t%#16.16llux\n", ureg->dx);
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+ print("di\t%#16.16llux\n", ureg->di);
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+ print("si\t%#16.16llux\n", ureg->si);
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+ print("bp\t%#16.16llux\n", ureg->bp);
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+ print("r8\t%#16.16llux\n", ureg->r8);
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+ print("r9\t%#16.16llux\n", ureg->r9);
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+ print("r10\t%#16.16llux\n", ureg->r10);
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+ print("r11\t%#16.16llux\n", ureg->r11);
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+ print("r12\t%#16.16llux\n", ureg->r12);
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+ print("r13\t%#16.16llux\n", ureg->r13);
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+ print("r14\t%#16.16llux\n", ureg->r14);
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+ print("r15\t%#16.16llux\n", ureg->r15);
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+ print("type\t%#llux\n", ureg->type);
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+ print("error\t%#llux\n", ureg->error);
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+ print("pc\t%#llux\n", ureg->ip);
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+ print("cs\t%#llux\n", ureg->cs);
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+ print("flags\t%#llux\n", ureg->flags);
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+ print("sp\t%#llux\n", ureg->sp);
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+ print("ss\t%#llux\n", ureg->ss);
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+ print("type\t%#llux\n", ureg->type);
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+ print("FS\t%#llux\n", rdmsr(FSbase));
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+ print("GS\t%#llux\n", rdmsr(GSbase));
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+
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+ print("m\t%#16.16p\nup\t%#16.16p\n", machp(), up);
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}
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void
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@@ -560,9 +563,9 @@ dumpregs(Ureg* ureg)
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* CR4. If there is a CR4 and machine check extensions, read the machine
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* check address and machine check type registers if RDMSR supported.
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*/
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- iprint("cr0\t%#16.16llux\n", cr0get());
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- iprint("cr2\t%#16.16llux\n", machp()->MMU.cr2);
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- iprint("cr3\t%#16.16llux\n", cr3get());
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+ print("cr0\t%#16.16llux\n", cr0get());
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+ print("cr2\t%#16.16llux\n", machp()->MMU.cr2);
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+ print("cr3\t%#16.16llux\n", cr3get());
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die("dumpregs");
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// archdumpregs();
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}
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