arch.c 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201
  1. /*
  2. * This file is part of the UCB release of Plan 9. It is subject to the license
  3. * terms in the LICENSE file found in the top-level directory of this
  4. * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
  5. * part of the UCB release of Plan 9, including this file, may be copied,
  6. * modified, propagated, or distributed except according to the terms contained
  7. * in the LICENSE file.
  8. */
  9. /*
  10. * EPISODE 12B
  11. * How to recognise different types of trees from quite a long way away.
  12. * NO. 1
  13. * THE LARCH
  14. */
  15. #include "u.h"
  16. #include "../port/lib.h"
  17. #include "mem.h"
  18. #include "dat.h"
  19. #include "fns.h"
  20. #include "../port/error.h"
  21. #include "ureg.h"
  22. /* the rules are different for different compilers. We need to define up. */
  23. // Initialize it to force it into data.
  24. // That way, if we set them in assembly, they won't get zero'd by the bss init in main
  25. // N.B. There was an interesting hack in plan 9 c. You could grab up to two registers for your
  26. // program. In the case of Plan 9, m was r15, and up was r14. Very slick, and if there is a way to do
  27. // this in gcc or clang I don't know it. This also nicely handled per cpu info; R15/14 were always right for
  28. // your core and context.
  29. //Mach *m = (void *)0;
  30. int
  31. incref(Ref *r)
  32. {
  33. int x;
  34. lock(&r->l);
  35. x = ++r->ref;
  36. unlock(&r->l);
  37. return x;
  38. }
  39. int
  40. decref(Ref *r)
  41. {
  42. int x;
  43. lock(&r->l);
  44. x = --r->ref;
  45. unlock(&r->l);
  46. if(x < 0)
  47. panic("decref pc=%#p", getcallerpc());
  48. return x;
  49. }
  50. void fpuprocrestore(Proc *p)
  51. {
  52. panic("fpuprocrestore");
  53. }
  54. void
  55. procrestore(Proc *p)
  56. {
  57. uint64_t t;
  58. if(p->kp)
  59. return;
  60. cycles(&t);
  61. p->pcycles -= t;
  62. fpuprocrestore(p);
  63. }
  64. void
  65. fpuprocsave(Proc *p)
  66. {
  67. panic("fpuprocsave");
  68. }
  69. /*
  70. * Save the mach dependent part of the process state.
  71. * NB: the caller should mmuflushtlb after procsave().
  72. * procsave/procrestore don't touch the mmu, they
  73. * care about fpu, mostly.
  74. */
  75. void
  76. procsave(Proc *p)
  77. {
  78. uint64_t t;
  79. cycles(&t);
  80. p->pcycles += t;
  81. fpuprocsave(p);
  82. }
  83. static void
  84. linkproc(void)
  85. {
  86. Proc *up = externup();
  87. spllo();
  88. up->kpfun(up->kparg);
  89. pexit("kproc dying", 0);
  90. }
  91. void
  92. kprocchild(Proc* p, void (*func)(void*), void* arg)
  93. {
  94. /*
  95. * gotolabel() needs a word on the stack in
  96. * which to place the return PC used to jump
  97. * to linkproc().
  98. */
  99. p->sched.pc = PTR2UINT(linkproc);
  100. p->sched.sp = PTR2UINT(p->kstack+KSTACK-BY2SE);
  101. p->sched.sp = STACKALIGN(p->sched.sp);
  102. p->kpfun = func;
  103. p->kparg = arg;
  104. }
  105. /*
  106. * put the processor in the halt state if we've no processes to run.
  107. * an interrupt will get us going again.
  108. * The boot TC in nix can't halt, because it must stay alert in
  109. * case an AC makes a handler process ready.
  110. * We should probably use mwait in that case.
  111. */
  112. void
  113. idlehands(void)
  114. {
  115. /* if(machp()->NIX.nixtype != NIXAC)
  116. halt();*/
  117. }
  118. #if 0
  119. void
  120. ureg2gdb(Ureg *u, uintptr_t *g)
  121. {
  122. g[GDB_AX] = u->ax;
  123. g[GDB_BX] = u->bx;
  124. g[GDB_CX] = u->cx;
  125. g[GDB_DX] = u->dx;
  126. g[GDB_SI] = u->si;
  127. g[GDB_DI] = u->di;
  128. g[GDB_BP] = u->bp;
  129. g[GDB_SP] = u->sp;
  130. g[GDB_R8] = u->r8;
  131. g[GDB_R9] = u->r9;
  132. g[GDB_R10] = u->r10;
  133. g[GDB_R11] = u->r11;
  134. g[GDB_R12] = u->r12;
  135. g[GDB_R13] = u->r13;
  136. g[GDB_R14] = u->r14;
  137. g[GDB_R15] = u->r15;
  138. g[GDB_PC] = u->ip;
  139. /* it's weird, docs say 5 32-bit fields
  140. * but I count 4 if we pack these. Fix me
  141. */
  142. g[GDB_PS] = 0; // u->PS;
  143. g[GDB_CS] = 0; // u->CS;
  144. g[GDB_SS] = 0; // u->SS;
  145. g[GDB_DS] = 0; // u->DS;
  146. g[GDB_ES] = 0; // u->ES;
  147. g[GDB_FS] = 0; // u->FS;
  148. g[GDB_GS] = 0; // u->GS;
  149. }
  150. void
  151. gdb2ureg(uintptr_t *g, Ureg *u)
  152. {
  153. u->ax = g[GDB_AX];
  154. u->bx = g[GDB_BX];
  155. u->cx = g[GDB_CX];
  156. u->dx = g[GDB_DX];
  157. u->si = g[GDB_SI];
  158. u->di = g[GDB_DI];
  159. u->bp = g[GDB_BP];
  160. u->sp = g[GDB_SP];
  161. u->r8 = g[GDB_R8];
  162. u->r9 = g[GDB_R9];
  163. u->r10 = g[GDB_R10];
  164. u->r11 = g[GDB_R11];
  165. u->r12 = g[GDB_R12];
  166. u->r13 = g[GDB_R13];
  167. u->r14 = g[GDB_R14];
  168. u->r15 = g[GDB_R15];
  169. u->ip = g[GDB_PC];
  170. /* it's weird but gdb seems to have no way to
  171. * express the sp. Hmm.
  172. */
  173. u->flags = g[GDB_PS];
  174. /* is there any point to this? */
  175. u->cs = g[GDB_CS];
  176. u->ss = g[GDB_SS];
  177. }
  178. #endif